module fsm #(parameter UDW = 1_048_576) // Resolution for duty cycle
(
    input PS2_CLK,
    input PS2_DATA,
    input CLK,
    output [2:0] RGB
);

wire PS2_R_O;
wire [3:0] flags;
wire [7:0] PS2_OUT;

reg [$clog2(UDW)-1:0] PWM_IN_R;
reg [$clog2(UDW)-1:0] PWM_IN_G;
reg [$clog2(UDW)-1:0] PWM_IN_B;

reg [$clog2(100_000)-1:0] PWM_IN_R_TEMPLATE;
reg [$clog2(100_000)-1:0] PWM_IN_G_TEMPLATE;
reg [$clog2(100_000)-1:0] PWM_IN_B_TEMPLATE;

reg [$clog2(COUNTER_BOUND)+20:0] transition_rate;
reg [$clog2(700_000):0] brightness;

parameter S0 = 0, S1 = 1, S2 = 2, S3 = 3, S4 = 4, S5 = 5, S6 = 6;
parameter COLOR_LOWER_BOUND = 0, COLOR_UPPER_BOUND = 10_000;
parameter COUNTER_BOUND = 10000;

reg [2:0] state;
reg [2:0] color;
reg RST;
reg [$clog2(UDW)-1:0] counter;
reg [$clog2(300_000):0] brightness_rate;


initial begin
    PWM_IN_R_TEMPLATE = COLOR_UPPER_BOUND;
    PWM_IN_G_TEMPLATE = 0;
    PWM_IN_B_TEMPLATE = 0;
    PWM_IN_R          = 0;
    PWM_IN_G          = 0;
    PWM_IN_B          = 0;
    state             = S0;
    RST               = 0;
    brightness        = 0;
    transition_rate   = 1;
    brightness_rate   = 1;
    counter           = 0;
end

always@(posedge CLK) begin
    if (PS2_R_O) begin
        case(PS2_OUT)
            // down
            8'hFE:
                transition_rate <= transition_rate + COUNTER_BOUND / 1000 ;
            // right
            8'hFF:
                brightness_rate <= brightness_rate + 25_000;
        endcase
    end
end

// changing color
always@(posedge CLK) begin

    if (counter > COUNTER_BOUND) begin
        counter <= 0;
        /*
        *  100 to 110
        *  110 to 010
        *  010 to 011
        *  011 to 001
        *  001 to 101
        *  101 to 100
        */
        case(state)
            // 100 to 110
            S0: begin
                PWM_IN_R_TEMPLATE <= PWM_IN_R_TEMPLATE;
                PWM_IN_G_TEMPLATE <= PWM_IN_G_TEMPLATE + 1;
                PWM_IN_B_TEMPLATE <= 0;

                if (PWM_IN_G_TEMPLATE >= COLOR_UPPER_BOUND)
                    state <= S1;
            end
            // 110 to 010
            S1: begin
                PWM_IN_R_TEMPLATE <= PWM_IN_R_TEMPLATE - 1;
                PWM_IN_G_TEMPLATE <= PWM_IN_G_TEMPLATE;
                PWM_IN_B_TEMPLATE <= 0;

                if (PWM_IN_R_TEMPLATE <= COLOR_LOWER_BOUND)
                    state <= S2;
            end
            // 010 to 011
            S2: begin
                PWM_IN_R_TEMPLATE <= 0;
                PWM_IN_G_TEMPLATE <= PWM_IN_G_TEMPLATE;
                PWM_IN_B_TEMPLATE <= PWM_IN_B_TEMPLATE + 1;

                if (PWM_IN_B_TEMPLATE >= COLOR_UPPER_BOUND)
                    state <= S3;
            end
            // 011 to 001
            S3: begin
                PWM_IN_R_TEMPLATE <= 0;
                PWM_IN_G_TEMPLATE <= PWM_IN_G_TEMPLATE - 1;
                PWM_IN_B_TEMPLATE <= PWM_IN_B_TEMPLATE;

                if (PWM_IN_G_TEMPLATE <= COLOR_LOWER_BOUND)
                    state <= S4;
            end
            // 001 to 101
            S4: begin
                PWM_IN_R_TEMPLATE <= PWM_IN_R_TEMPLATE + 1;
                PWM_IN_G_TEMPLATE <= 0;
                PWM_IN_B_TEMPLATE <= PWM_IN_B_TEMPLATE;

                if (PWM_IN_R_TEMPLATE >= COLOR_UPPER_BOUND)
                    state <= S5;
            end
            // 101 to 100
            S5: begin
                PWM_IN_R_TEMPLATE <= PWM_IN_R_TEMPLATE;
                PWM_IN_G_TEMPLATE <= 0;
                PWM_IN_B_TEMPLATE <= PWM_IN_B_TEMPLATE - 1;

                if (PWM_IN_B_TEMPLATE <= COLOR_LOWER_BOUND)
                    state <= S0;
            end
        endcase
        /*
        case(state)
        // 100 TO 110
        S0: begin
           PWM_IN_R <= PWM_IN_R_TEMPLATE + 100_000;
           PWM_IN_G <= PWM_IN_G_TEMPLATE + 100_000;
           PWM_IN_B <= 0;
        end
        // 110 to 010
        S1: begin
           PWM_IN_R <= PWM_IN_R_TEMPLATE + 100_000;
           PWM_IN_G <= PWM_IN_G_TEMPLATE + 100_000;
           PWM_IN_B <= 0;
        end
        // 010 to 011
        S2: begin
            PWM_IN_R <= 0;
           PWM_IN_G <= PWM_IN_G_TEMPLATE + 100_000;
           PWM_IN_B <= PWM_IN_B_TEMPLATE + 100_000;
        end
        // 011 to 001
        S3: begin
            PWM_IN_R <= 0;
           PWM_IN_G <= PWM_IN_G_TEMPLATE + 100_000;
           PWM_IN_B <= PWM_IN_B_TEMPLATE + 100_000;
        end
        // 001 to 101
        S4: begin
            PWM_IN_R <= PWM_IN_R_TEMPLATE + 100_000;
           PWM_IN_G <= 0;
           PWM_IN_B <= PWM_IN_B_TEMPLATE + 100_000;
        end
        // 101 to 100
        S5: begin
            PWM_IN_R <= PWM_IN_R_TEMPLATE + 100_000;
           PWM_IN_G <= 0;
           PWM_IN_B <= PWM_IN_B_TEMPLATE + 100_000;
        end
        endcase
        */
    end
    else
        counter <= counter + 1;
end


always@(posedge CLK) begin
    brightness <= brightness + brightness_rate;
    PWM_IN_R <= PWM_IN_R_TEMPLATE;
    PWM_IN_G <= PWM_IN_G_TEMPLATE;
    PWM_IN_B <= PWM_IN_B_TEMPLATE;
end


PWM_FSM #($clog2(UDW)) pwm_fsm_RED(
    .CLK(CLK),
    .RST(RST),
    .CE(1'b1),
    .PWM_IN(PWM_IN_B),
    .PWM_P(RGB[0])
);
PWM_FSM #($clog2(UDW)) pwm_fsm_GREEN(
    .CLK(CLK),
    .RST(RST),
    .CE(1'b1),
    .PWM_IN(PWM_IN_G),
    .PWM_P(RGB[1])
);
PWM_FSM #($clog2(UDW)) pwm_fsm_BLUE (
    .CLK(CLK),
    .RST(RST),
    .CE(1'b1),
    .PWM_IN(PWM_IN_R),
    .PWM_P(RGB[2])
);


PS2_Controller controller (.clk(CLK), .PS2_dat(PS2_DATA), .PS2_clk(PS2_CLK), .R_O(PS2_R_O), .out(PS2_OUT), .flags(flags));
endmodule