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device tree kunbus

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Dec 12th, 2023
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  1. /dts-v1/;
  2.  
  3. / {
  4. #address-cells = <0x02>;
  5. #size-cells = <0x01>;
  6. compatible = "kunbus,revpi-connect4\0brcm,bcm2711";
  7. interrupt-parent = <0x01>;
  8. memreserve = <0x3b400000 0x4c00000>;
  9. model = "Raspberry Pi Compute Module 4 Rev 1.0";
  10. serial-number = "10000000595f98c2";
  11.  
  12. __overrides__ {
  13. act_led_activelow = "\0\0\0=gpios:8";
  14. act_led_gpio = "\0\0\0=gpios:4";
  15. act_led_trigger = "\0\0\0=linux,default-trigger";
  16. ant1 = "\0\0\0?output-high?=on\0\0\0\0?output-low?=off\0\0\0\0@output-high?=off\0\0\0\0@output-low?=on";
  17. ant2 = "\0\0\0?output-high?=off\0\0\0\0?output-low?=on\0\0\0\0@output-high?=on\0\0\0\0@output-low?=off";
  18. arm_freq;
  19. audio = "\0\0\06status";
  20. axiperf = "\0\0\0<status";
  21. cache_line_size;
  22. cam0-led;
  23. cam0-led-ctrl;
  24. cam0-pwdn;
  25. cam0-pwdn-ctrl;
  26. eth_led0 = "\0\0\0.led-modes:0";
  27. eth_led1 = "\0\0\0.led-modes:4";
  28. i2c = "\0\0\05status";
  29. i2c0 = [00 00 00 10 73 74 61 74 75 73 00 00 00 00 34 73 74 61 74 75 73 00];
  30. i2c0_baudrate = [00 00 00 10 63 6c 6f 63 6b 2d 66 72 65 71 75 65 6e 63 79 3a 30 00];
  31. i2c1 = "\0\0\05status";
  32. i2c1_baudrate = "\0\0\05clock-frequency:0";
  33. i2c_arm = "\0\0\05status";
  34. i2c_arm_baudrate = "\0\0\05clock-frequency:0";
  35. i2c_baudrate = "\0\0\05clock-frequency:0";
  36. i2c_vc = [00 00 00 10 73 74 61 74 75 73 00 00 00 00 34 73 74 61 74 75 73 00];
  37. i2c_vc_baudrate = [00 00 00 10 63 6c 6f 63 6b 2d 66 72 65 71 75 65 6e 63 79 3a 30 00];
  38. i2s = "\0\0\02status";
  39. krnbt = "\0\0\0/status";
  40. krnbt_baudrate = "\0\0\0/max-speed:0";
  41. noant = "\0\0\0?output-high?=off\0\0\0\0?output-low?=on\0\0\0\0@output-high?=off\0\0\0\0@output-low?=on";
  42. pwr_led_activelow = "\0\0\0>gpios:8";
  43. pwr_led_gpio = "\0\0\0>gpios:4";
  44. pwr_led_trigger = "\0\0\0>linux,default-trigger";
  45. random = "\0\0\08status";
  46. sd_debug = "\0\0\09brcm,debug";
  47. sd_force_pio = "\0\0\09brcm,force-pio?";
  48. sd_overclock = "\0\0\09brcm,overclock-50:0";
  49. sd_pio_limit = "\0\0\09brcm,pio-limit:0";
  50. sd_poll_once = "\0\0\0Anon-removable?";
  51. sdio_overclock = "\0\0\0:brcm,overclock-50:0\0\0\0\0;brcm,overclock-50:0";
  52. spi = "\0\0\03status";
  53. spi_dma4 = <0x33 0x646d6173 0x3a303d00 0x42 0x33 0x646d6173 0x3a383d00 0x42>;
  54. uart0 = "\0\0\00status";
  55. uart1 = "\0\0\01status";
  56. watchdog = "\0\0\07status";
  57. };
  58.  
  59. __symbols__ {
  60. act_led = "/leds/led-act";
  61. alt0 = "/soc/gpio@7e200000/alt0";
  62. ant1 = "/soc/firmware/gpio/ant1";
  63. ant2 = "/soc/firmware/gpio/ant2";
  64. aon_intr = "/soc/interrupt-controller@7ef00100";
  65. audio = "/soc/mailbox@7e00b840/bcm2835_audio";
  66. audio_pins = "/soc/gpio@7e200000/audio_pins";
  67. aux = "/soc/aux@7e215000";
  68. avs_monitor = "/soc/avs-monitor@7d5d2000";
  69. axiperf = "/soc/axiperf";
  70. blconfig = "/reserved-memory/nvram@0";
  71. bt = "/soc/serial@7e201000/bluetooth";
  72. bt_pins = "/soc/gpio@7e200000/bt_pins";
  73. cam0_clk = "/cam0_clk";
  74. cam0_reg = "/cam1_regulator";
  75. cam0_regulator = "/cam0_regulator";
  76. cam1_clk = "/cam1_clk";
  77. cam1_reg = "/cam1_regulator";
  78. cam_dummy_reg = "/cam_dummy_reg";
  79. clk_108MHz = "/clk-108M";
  80. clk_27MHz = "/clk-27M";
  81. clk_osc = "/clocks/clk-osc";
  82. clk_usb = "/clocks/clk-usb";
  83. clocks = "/soc/cprman@7e101000";
  84. cma = "/reserved-memory/linux,cma";
  85. cpu0 = "/cpus/cpu@0";
  86. cpu1 = "/cpus/cpu@1";
  87. cpu2 = "/cpus/cpu@2";
  88. cpu3 = "/cpus/cpu@3";
  89. cpu_thermal = "/thermal-zones/cpu-thermal";
  90. cpus = "/cpus";
  91. csi0 = "/soc/csi@7e800000";
  92. csi1 = "/soc/csi@7e801000";
  93. ddc0 = "/soc/i2c@7ef04500";
  94. ddc1 = "/soc/i2c@7ef09500";
  95. dma = "/soc/dma@7e007000";
  96. dma40 = "/scb/dma@7e007b00";
  97. dpi = "/soc/dpi@7e208000";
  98. dpi_16bit_cpadhi_gpio0 = "/soc/gpio@7e200000/dpi_16bit_cpadhi_gpio0";
  99. dpi_16bit_cpadhi_gpio2 = "/soc/gpio@7e200000/dpi_16bit_cpadhi_gpio2";
  100. dpi_16bit_gpio0 = "/soc/gpio@7e200000/dpi_16bit_gpio0";
  101. dpi_16bit_gpio2 = "/soc/gpio@7e200000/dpi_16bit_gpio2";
  102. dpi_18bit_cpadhi_gpio0 = "/soc/gpio@7e200000/dpi_18bit_cpadhi_gpio0";
  103. dpi_18bit_cpadhi_gpio2 = "/soc/gpio@7e200000/dpi_18bit_cpadhi_gpio2";
  104. dpi_18bit_gpio0 = "/soc/gpio@7e200000/dpi_18bit_gpio0";
  105. dpi_18bit_gpio2 = "/soc/gpio@7e200000/dpi_18bit_gpio2";
  106. dpi_gpio0 = "/soc/gpio@7e200000/dpi_gpio0";
  107. dsi0 = "/soc/dsi@7e209000";
  108. dsi1 = "/soc/dsi@7e700000";
  109. dvp = "/soc/clock@7ef00000";
  110. emmc2 = "/emmc2bus/mmc@7e340000";
  111. emmc2bus = "/emmc2bus";
  112. emmc_gpio22 = "/soc/gpio@7e200000/emmc_gpio22";
  113. emmc_gpio34 = "/soc/gpio@7e200000/emmc_gpio34";
  114. emmc_gpio48 = "/soc/gpio@7e200000/emmc_gpio48";
  115. expgpio = "/soc/firmware/gpio";
  116. fb = "/soc/fb";
  117. firmware = "/soc/firmware";
  118. firmware_clocks = "/soc/firmware/clocks";
  119. firmwarekms = "/soc/firmwarekms@7e600000";
  120. genet = "/scb/ethernet@7d580000";
  121. genet_mdio = "/scb/ethernet@7d580000/mdio@e14";
  122. gicv2 = "/soc/interrupt-controller@40041000";
  123. gpclk0_gpio4 = "/soc/gpio@7e200000/gpclk0_gpio4";
  124. gpclk0_gpio49 = "/soc/gpio@7e200000/gpclk0_gpio49";
  125. gpclk1_gpio42 = "/soc/gpio@7e200000/gpclk1_gpio42";
  126. gpclk1_gpio44 = "/soc/gpio@7e200000/gpclk1_gpio44";
  127. gpclk1_gpio5 = "/soc/gpio@7e200000/gpclk1_gpio5";
  128. gpclk1_gpio50 = "/soc/gpio@7e200000/gpclk1_gpio50";
  129. gpclk2_gpio43 = "/soc/gpio@7e200000/gpclk2_gpio43";
  130. gpclk2_gpio51 = "/soc/gpio@7e200000/gpclk2_gpio51";
  131. gpclk2_gpio6 = "/soc/gpio@7e200000/gpclk2_gpio6";
  132. gpio = "/soc/gpio@7e200000";
  133. gpioout = "/soc/gpio@7e200000/gpioout";
  134. hdmi0 = "/soc/hdmi@7ef00700";
  135. hdmi1 = "/soc/hdmi@7ef05700";
  136. hvs = "/soc/hvs@7e400000";
  137. i2c = "/soc/i2c@7e804000";
  138. i2c0 = "/soc/i2c0mux/i2c@0";
  139. i2c0_gpio0 = "/soc/gpio@7e200000/i2c0_gpio0";
  140. i2c0_gpio28 = "/soc/gpio@7e200000/i2c0_gpio28";
  141. i2c0_gpio44 = "/soc/gpio@7e200000/i2c0_gpio44";
  142. i2c0_gpio46 = "/soc/gpio@7e200000/i2c0_gpio46";
  143. i2c0_pins = "/soc/gpio@7e200000/i2c0";
  144. i2c0if = "/soc/i2c@7e205000";
  145. i2c0mux = "/soc/i2c0mux";
  146. i2c1 = "/soc/i2c@7e804000";
  147. i2c1_gpio2 = "/soc/gpio@7e200000/i2c1_gpio2";
  148. i2c1_gpio44 = "/soc/gpio@7e200000/i2c1_gpio44";
  149. i2c1_gpio46 = "/soc/gpio@7e200000/i2c1_gpio46";
  150. i2c1_pins = "/soc/gpio@7e200000/i2c1";
  151. i2c3 = "/soc/i2c@7e205600";
  152. i2c3_gpio2 = "/soc/gpio@7e200000/i2c3_gpio2";
  153. i2c3_gpio4 = "/soc/gpio@7e200000/i2c3_gpio4";
  154. i2c3_pins = "/soc/gpio@7e200000/i2c3";
  155. i2c4 = "/soc/i2c@7e205800";
  156. i2c4_gpio6 = "/soc/gpio@7e200000/i2c4_gpio6";
  157. i2c4_gpio8 = "/soc/gpio@7e200000/i2c4_gpio8";
  158. i2c4_pins = "/soc/gpio@7e200000/i2c4";
  159. i2c5 = "/soc/i2c@7e205a00";
  160. i2c5_gpio10 = "/soc/gpio@7e200000/i2c5_gpio10";
  161. i2c5_gpio12 = "/soc/gpio@7e200000/i2c5_gpio12";
  162. i2c5_pins = "/soc/gpio@7e200000/i2c5";
  163. i2c6 = "/soc/i2c@7e205c00";
  164. i2c6_gpio0 = "/soc/gpio@7e200000/i2c6_gpio0";
  165. i2c6_gpio22 = "/soc/gpio@7e200000/i2c6_gpio22";
  166. i2c6_pins = "/soc/gpio@7e200000/i2c6";
  167. i2c_arm = "/soc/i2c@7e804000";
  168. i2c_csi_dsi = "/soc/i2c0mux/i2c@1";
  169. i2c_slave_gpio8 = "/soc/gpio@7e200000/i2c_slave_gpio8";
  170. i2c_vc = "/soc/i2c0mux/i2c@0";
  171. i2s = "/soc/i2s@7e203000";
  172. i2s_pins = "/soc/gpio@7e200000/i2s";
  173. jtag_gpio22 = "/soc/gpio@7e200000/jtag_gpio22";
  174. jtag_gpio48 = "/soc/gpio@7e200000/jtag_gpio48";
  175. l2 = "/cpus/l2-cache0";
  176. leds = "/leds";
  177. local_intc = "/soc/local_intc@40000000";
  178. mailbox = "/soc/mailbox@7e00b880";
  179. mii_gpio28 = "/soc/gpio@7e200000/mii_gpio28";
  180. mii_gpio36 = "/soc/gpio@7e200000/mii_gpio36";
  181. minibt = "/soc/serial@7e215040/bluetooth";
  182. mmc = "/soc/mmc@7e300000";
  183. mmcnr = "/soc/mmcnr@7e300000";
  184. pcie0 = "/scb/pcie@7d500000";
  185. pcm_gpio18 = "/soc/gpio@7e200000/pcm_gpio18";
  186. pcm_gpio28 = "/soc/gpio@7e200000/pcm_gpio28";
  187. pcm_gpio50 = "/soc/gpio@7e200000/pcm_gpio50";
  188. phy1 = "/scb/ethernet@7d580000/mdio@e14/ethernet-phy@0";
  189. pixelvalve0 = "/soc/pixelvalve@7e206000";
  190. pixelvalve1 = "/soc/pixelvalve@7e207000";
  191. pixelvalve2 = "/soc/pixelvalve@7e20a000";
  192. pixelvalve3 = "/soc/pixelvalve@7ec12000";
  193. pixelvalve4 = "/soc/pixelvalve@7e216000";
  194. pm = "/soc/watchdog@7e100000";
  195. power = "/soc/power";
  196. pwm = "/soc/pwm@7e20c000";
  197. pwm0_0_gpio12 = "/soc/gpio@7e200000/pwm0_0_gpio12";
  198. pwm0_0_gpio18 = "/soc/gpio@7e200000/pwm0_0_gpio18";
  199. pwm0_0_gpio52 = "/soc/gpio@7e200000/pwm0_0_gpio52";
  200. pwm0_1_gpio13 = "/soc/gpio@7e200000/pwm0_1_gpio13";
  201. pwm0_1_gpio19 = "/soc/gpio@7e200000/pwm0_1_gpio19";
  202. pwm0_1_gpio45 = "/soc/gpio@7e200000/pwm0_1_gpio45";
  203. pwm0_1_gpio53 = "/soc/gpio@7e200000/pwm0_1_gpio53";
  204. pwm1 = "/soc/pwm@7e20c800";
  205. pwm1_0_gpio40 = "/soc/gpio@7e200000/pwm1_0_gpio40";
  206. pwm1_1_gpio41 = "/soc/gpio@7e200000/pwm1_1_gpio41";
  207. pwr_led = "/leds/led-pwr";
  208. random = "/soc/rng@7e104000";
  209. reset = "/soc/firmware/reset";
  210. rgmii_gpio35 = "/soc/gpio@7e200000/rgmii_gpio35";
  211. rgmii_irq_gpio34 = "/soc/gpio@7e200000/rgmii_irq_gpio34";
  212. rgmii_irq_gpio39 = "/soc/gpio@7e200000/rgmii_irq_gpio39";
  213. rgmii_mdio_gpio28 = "/soc/gpio@7e200000/rgmii_mdio_gpio28";
  214. rgmii_mdio_gpio37 = "/soc/gpio@7e200000/rgmii_mdio_gpio37";
  215. rmem = "/reserved-memory";
  216. scb = "/scb";
  217. sd_io_1v8_reg = "/sd_io_1v8_reg";
  218. sd_vcc_reg = "/sd_vcc_reg";
  219. sdhci = "/soc/mmc@7e300000";
  220. sdhost = "/soc/mmc@7e202000";
  221. sdhost_gpio48 = "/soc/gpio@7e200000/sdhost_gpio48";
  222. sdio_pins = "/soc/gpio@7e200000/sdio_pins";
  223. smi = "/soc/smi@7e600000";
  224. soc = "/soc";
  225. sound = "/soc/sound";
  226. spi = "/soc/spi@7e204000";
  227. spi0 = "/soc/spi@7e204000";
  228. spi0_cs_pins = "/soc/gpio@7e200000/spi0_cs_pins";
  229. spi0_gpio35 = "/soc/gpio@7e200000/spi0_gpio35";
  230. spi0_gpio46 = "/soc/gpio@7e200000/spi0_gpio46";
  231. spi0_gpio7 = "/soc/gpio@7e200000/spi0_gpio7";
  232. spi0_pins = "/soc/gpio@7e200000/spi0_pins";
  233. spi1 = "/soc/spi@7e215080";
  234. spi1_gpio16 = "/soc/gpio@7e200000/spi1_gpio16";
  235. spi2 = "/soc/spi@7e2150c0";
  236. spi2_gpio40 = "/soc/gpio@7e200000/spi2_gpio40";
  237. spi2_gpio46 = "/soc/gpio@7e200000/spi2_gpio46";
  238. spi3 = "/soc/spi@7e204600";
  239. spi3_cs_pins = "/soc/gpio@7e200000/spi3_cs_pins";
  240. spi3_gpio0 = "/soc/gpio@7e200000/spi3_gpio0";
  241. spi3_pins = "/soc/gpio@7e200000/spi3_pins";
  242. spi4 = "/soc/spi@7e204800";
  243. spi4_cs_pins = "/soc/gpio@7e200000/spi4_cs_pins";
  244. spi4_gpio4 = "/soc/gpio@7e200000/spi4_gpio4";
  245. spi4_pins = "/soc/gpio@7e200000/spi4_pins";
  246. spi5 = "/soc/spi@7e204a00";
  247. spi5_cs_pins = "/soc/gpio@7e200000/spi5_cs_pins";
  248. spi5_gpio12 = "/soc/gpio@7e200000/spi5_gpio12";
  249. spi5_pins = "/soc/gpio@7e200000/spi5_pins";
  250. spi6 = "/soc/spi@7e204c00";
  251. spi6_cs_pins = "/soc/gpio@7e200000/spi6_cs_pins";
  252. spi6_gpio18 = "/soc/gpio@7e200000/spi6_gpio18";
  253. spi6_pins = "/soc/gpio@7e200000/spi6_pins";
  254. spidev0 = "/soc/spi@7e204000/spidev@0";
  255. spidev1 = "/soc/spi@7e204000/spidev@1";
  256. system_timer = "/soc/timer@7e003000";
  257. thermal = "/soc/avs-monitor@7d5d2000/thermal";
  258. txp = "/soc/txp@7e004000";
  259. uart0 = "/soc/serial@7e201000";
  260. uart0_ctsrts_gpio16 = "/soc/gpio@7e200000/uart0_ctsrts_gpio16";
  261. uart0_ctsrts_gpio30 = "/soc/gpio@7e200000/uart0_ctsrts_gpio30";
  262. uart0_ctsrts_gpio38 = "/soc/gpio@7e200000/uart0_ctsrts_gpio38";
  263. uart0_gpio14 = "/soc/gpio@7e200000/uart0_gpio14";
  264. uart0_gpio32 = "/soc/gpio@7e200000/uart0_gpio32";
  265. uart0_gpio36 = "/soc/gpio@7e200000/uart0_gpio36";
  266. uart0_pins = "/soc/gpio@7e200000/uart0_pins";
  267. uart1 = "/soc/serial@7e215040";
  268. uart1_ctsrts_gpio16 = "/soc/gpio@7e200000/uart1_ctsrts_gpio16";
  269. uart1_ctsrts_gpio30 = "/soc/gpio@7e200000/uart1_ctsrts_gpio30";
  270. uart1_ctsrts_gpio42 = "/soc/gpio@7e200000/uart1_ctsrts_gpio42";
  271. uart1_gpio14 = "/soc/gpio@7e200000/uart1_gpio14";
  272. uart1_gpio32 = "/soc/gpio@7e200000/uart1_gpio32";
  273. uart1_gpio40 = "/soc/gpio@7e200000/uart1_gpio40";
  274. uart1_pins = "/soc/gpio@7e200000/uart1_pins";
  275. uart2 = "/soc/serial@7e201400";
  276. uart2_ctsrts_gpio2 = "/soc/gpio@7e200000/uart2_ctsrts_gpio2";
  277. uart2_gpio0 = "/soc/gpio@7e200000/uart2_gpio0";
  278. uart2_pins = "/soc/gpio@7e200000/uart2_pins";
  279. uart3 = "/soc/serial@7e201600";
  280. uart3_ctsrts_gpio6 = "/soc/gpio@7e200000/uart3_ctsrts_gpio6";
  281. uart3_gpio4 = "/soc/gpio@7e200000/uart3_gpio4";
  282. uart3_pins = "/soc/gpio@7e200000/uart3_pins";
  283. uart4 = "/soc/serial@7e201800";
  284. uart4_ctsrts_gpio10 = "/soc/gpio@7e200000/uart4_ctsrts_gpio10";
  285. uart4_gpio8 = "/soc/gpio@7e200000/uart4_gpio8";
  286. uart4_pins = "/soc/gpio@7e200000/uart4_pins";
  287. uart5 = "/soc/serial@7e201a00";
  288. uart5_ctsrts_gpio14 = "/soc/gpio@7e200000/uart5_ctsrts_gpio14";
  289. uart5_gpio12 = "/soc/gpio@7e200000/uart5_gpio12";
  290. uart5_pins = "/soc/gpio@7e200000/uart5_pins";
  291. usb = "/soc/usb@7e980000";
  292. usbphy = "/phy";
  293. v3d = "/v3dbus/v3d@7ec04000";
  294. v3dbus = "/v3dbus";
  295. vc4 = "/gpu";
  296. vchiq = "/soc/mailbox@7e00b840";
  297. vcio = "/soc/firmware/vcio";
  298. vdd_3v3_reg = "/fixedregulator_3v3";
  299. vdd_5v0_reg = "/fixedregulator_5v0";
  300. vec = "/soc/vec@7ec13000";
  301. watchdog = "/soc/watchdog@7e100000";
  302. xhci = "/scb/xhci@7e9c0000";
  303. };
  304.  
  305. aliases {
  306. audio = "/soc/mailbox@7e00b840/bcm2835_audio";
  307. aux = "/soc/aux@7e215000";
  308. axiperf = "/soc/axiperf";
  309. blconfig = "/reserved-memory/nvram@0";
  310. dma = "/soc/dma@7e007000";
  311. emmc2bus = "/emmc2bus";
  312. ethernet0 = "/scb/ethernet@7d580000";
  313. fb = "/soc/fb";
  314. gpio = "/soc/gpio@7e200000";
  315. i2c = "/soc/i2c@7e804000";
  316. i2c0 = "/soc/i2c0mux/i2c@0";
  317. i2c1 = "/soc/i2c@7e804000";
  318. i2c10 = "/soc/i2c0mux/i2c@1";
  319. i2c20 = "/soc/i2c@7ef04500";
  320. i2c21 = "/soc/i2c@7ef09500";
  321. i2c3 = "/soc/i2c@7e205600";
  322. i2c4 = "/soc/i2c@7e205800";
  323. i2c5 = "/soc/i2c@7e205a00";
  324. i2c6 = "/soc/i2c@7e205c00";
  325. i2c_arm = "/soc/i2c@7e804000";
  326. i2c_vc = "/soc/i2c0mux/i2c@0";
  327. i2s = "/soc/i2s@7e203000";
  328. leds = "/leds";
  329. mailbox = "/soc/mailbox@7e00b880";
  330. mmc = "/soc/mmc@7e300000";
  331. mmc0 = "/emmc2bus/mmc@7e340000";
  332. mmc1 = "/soc/mmcnr@7e300000";
  333. mmc2 = "/soc/mmc@7e202000";
  334. pcie0 = "/scb/pcie@7d500000";
  335. random = "/soc/rng@7e104000";
  336. sdhost = "/soc/mmc@7e202000";
  337. serial0 = "/soc/serial@7e215040";
  338. serial1 = "/soc/serial@7e201000";
  339. soc = "/soc";
  340. sound = "/soc/sound";
  341. spi0 = "/soc/spi@7e204000";
  342. spi1 = "/soc/spi@7e215080";
  343. spi2 = "/soc/spi@7e2150c0";
  344. spi3 = "/soc/spi@7e204600";
  345. spi4 = "/soc/spi@7e204800";
  346. spi5 = "/soc/spi@7e204a00";
  347. spi6 = "/soc/spi@7e204c00";
  348. thermal = "/soc/avs-monitor@7d5d2000/thermal";
  349. uart0 = "/soc/serial@7e201000";
  350. uart1 = "/soc/serial@7e215040";
  351. usb = "/soc/usb@7e980000";
  352. watchdog = "/soc/watchdog@7e100000";
  353. };
  354.  
  355. arm-pmu {
  356. compatible = "arm,cortex-a72-pmu\0arm,armv8-pmuv3";
  357. interrupt-affinity = <0x28 0x29 0x2a 0x2b>;
  358. interrupts = <0x00 0x10 0x04 0x00 0x11 0x04 0x00 0x12 0x04 0x00 0x13 0x04>;
  359. };
  360.  
  361. axi {
  362.  
  363. vc_mem {
  364. reg = <0x3ec00000 0x40000000 0xc0000000>;
  365. };
  366. };
  367.  
  368. cam0_clk {
  369. #clock-cells = <0x00>;
  370. compatible = "fixed-clock";
  371. phandle = <0xe7>;
  372. status = "disabled";
  373. };
  374.  
  375. cam0_regulator {
  376. compatible = "regulator-fixed";
  377. enable-active-high;
  378. phandle = <0xe6>;
  379. regulator-name = "cam0-reg";
  380. status = "disabled";
  381. };
  382.  
  383. cam1_clk {
  384. #clock-cells = <0x00>;
  385. compatible = "fixed-clock";
  386. phandle = <0xe5>;
  387. status = "disabled";
  388. };
  389.  
  390. cam1_regulator {
  391. compatible = "regulator-fixed";
  392. enable-active-high;
  393. gpio = <0x0b 0x05 0x00>;
  394. phandle = <0xe4>;
  395. regulator-name = "cam1-reg";
  396. status = "okay";
  397. };
  398.  
  399. cam_dummy_reg {
  400. compatible = "regulator-fixed";
  401. phandle = <0xe8>;
  402. regulator-name = "cam-dummy-reg";
  403. status = "okay";
  404. };
  405.  
  406. chosen {
  407. bootargs = "coherent_pool=1M 8250.nr_uarts=0 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1 bcm2708_fb.fbwidth=1824 bcm2708_fb.fbheight=984 bcm2708_fb.fbswap=1 smsc95xx.macaddr=E4:5F:01:93:03:8A vc_mem.mem_base=0x3ec00000 vc_mem.mem_size=0x40000000 dwc_otg.lpm_enable=0 console=tty1 root=/dev/mmcblk0p2 rootfstype=ext4 fsck.repair=yes rootwait nosplash plymouth.ignore-serial-consoles";
  408. kaslr-seed = <0x6baec672 0xb721f1b0>;
  409. log = <0x3ff80000 0x7ffe0>;
  410. os_prefix;
  411. overlay_prefix = [6f 76 65 72 6c 61 79 73 2f];
  412. rpi-boardrev-ext = <0x00>;
  413.  
  414. bootloader {
  415. boot-mode = <0x01>;
  416. build-timestamp = <0x61a8a4d9>;
  417. capabilities = <0x7f>;
  418. partition = <0x00>;
  419. rsts = <0x1000>;
  420. tryboot = <0x00>;
  421. update-timestamp = <0x00>;
  422. version = "78ec57468d6bb1dd7051698539ec814d22a98c64";
  423. };
  424. };
  425.  
  426. clk-108M {
  427. #clock-cells = <0x00>;
  428. clock-frequency = <0x66ff300>;
  429. clock-output-names = "108MHz-clock";
  430. compatible = "fixed-clock";
  431. phandle = <0x1d>;
  432. };
  433.  
  434. clk-27M {
  435. #clock-cells = <0x00>;
  436. clock-frequency = <0x19bfcc0>;
  437. clock-output-names = "27MHz-clock";
  438. compatible = "fixed-clock";
  439. phandle = <0x1f>;
  440. };
  441.  
  442. clocks {
  443.  
  444. clk-osc {
  445. #clock-cells = <0x00>;
  446. clock-frequency = <0x337f980>;
  447. clock-output-names = "osc";
  448. compatible = "fixed-clock";
  449. phandle = <0x03>;
  450. };
  451.  
  452. clk-usb {
  453. #clock-cells = <0x00>;
  454. clock-frequency = <0x1c9c3800>;
  455. clock-output-names = "otg";
  456. compatible = "fixed-clock";
  457. phandle = <0x19>;
  458. };
  459. };
  460.  
  461. cpus {
  462. #address-cells = <0x01>;
  463. #size-cells = <0x00>;
  464. enable-method = "brcm,bcm2836-smp";
  465. phandle = <0xde>;
  466.  
  467. cpu@0 {
  468. compatible = "arm,cortex-a72";
  469. cpu-release-addr = <0x00 0xd8>;
  470. d-cache-line-size = <0x40>;
  471. d-cache-sets = <0x100>;
  472. d-cache-size = <0x8000>;
  473. device_type = "cpu";
  474. enable-method = "spin-table";
  475. i-cache-line-size = <0x40>;
  476. i-cache-sets = <0x100>;
  477. i-cache-size = <0xc000>;
  478. next-level-cache = <0x2c>;
  479. phandle = <0x28>;
  480. reg = <0x00>;
  481. };
  482.  
  483. cpu@1 {
  484. compatible = "arm,cortex-a72";
  485. cpu-release-addr = <0x00 0xe0>;
  486. d-cache-line-size = <0x40>;
  487. d-cache-sets = <0x100>;
  488. d-cache-size = <0x8000>;
  489. device_type = "cpu";
  490. enable-method = "spin-table";
  491. i-cache-line-size = <0x40>;
  492. i-cache-sets = <0x100>;
  493. i-cache-size = <0xc000>;
  494. next-level-cache = <0x2c>;
  495. phandle = <0x29>;
  496. reg = <0x01>;
  497. };
  498.  
  499. cpu@2 {
  500. compatible = "arm,cortex-a72";
  501. cpu-release-addr = <0x00 0xe8>;
  502. d-cache-line-size = <0x40>;
  503. d-cache-sets = <0x100>;
  504. d-cache-size = <0x8000>;
  505. device_type = "cpu";
  506. enable-method = "spin-table";
  507. i-cache-line-size = <0x40>;
  508. i-cache-sets = <0x100>;
  509. i-cache-size = <0xc000>;
  510. next-level-cache = <0x2c>;
  511. phandle = <0x2a>;
  512. reg = <0x02>;
  513. };
  514.  
  515. cpu@3 {
  516. compatible = "arm,cortex-a72";
  517. cpu-release-addr = <0x00 0xf0>;
  518. d-cache-line-size = <0x40>;
  519. d-cache-sets = <0x100>;
  520. d-cache-size = <0x8000>;
  521. device_type = "cpu";
  522. enable-method = "spin-table";
  523. i-cache-line-size = <0x40>;
  524. i-cache-sets = <0x100>;
  525. i-cache-size = <0xc000>;
  526. next-level-cache = <0x2c>;
  527. phandle = <0x2b>;
  528. reg = <0x03>;
  529. };
  530.  
  531. l2-cache0 {
  532. cache-level = <0x02>;
  533. cache-line-size = <0x40>;
  534. cache-sets = <0x400>;
  535. cache-size = <0x100000>;
  536. compatible = "cache";
  537. phandle = <0x2c>;
  538. };
  539. };
  540.  
  541. emmc2bus {
  542. #address-cells = <0x02>;
  543. #size-cells = <0x01>;
  544. compatible = "simple-bus";
  545. dma-ranges = <0x00 0x00 0x00 0x00 0xfc000000>;
  546. phandle = <0xdd>;
  547. ranges = <0x00 0x7e000000 0x00 0xfe000000 0x1800000>;
  548.  
  549. mmc@7e340000 {
  550. broken-cd;
  551. bus-width = <0x08>;
  552. clocks = <0x08 0x33>;
  553. compatible = "brcm,bcm2711-emmc2";
  554. interrupts = <0x00 0x7e 0x04>;
  555. mmc-ddr-3_3v;
  556. phandle = <0x41>;
  557. reg = <0x00 0x7e340000 0x100>;
  558. status = "okay";
  559. vmmc-supply = <0x27>;
  560. vqmmc-supply = <0x26>;
  561. };
  562. };
  563.  
  564. fixedregulator_3v3 {
  565. compatible = "regulator-fixed";
  566. phandle = <0xe9>;
  567. regulator-always-on;
  568. regulator-max-microvolt = <0x325aa0>;
  569. regulator-min-microvolt = <0x325aa0>;
  570. regulator-name = "3v3";
  571. };
  572.  
  573. fixedregulator_5v0 {
  574. compatible = "regulator-fixed";
  575. phandle = <0xea>;
  576. regulator-always-on;
  577. regulator-max-microvolt = <0x4c4b40>;
  578. regulator-min-microvolt = <0x4c4b40>;
  579. regulator-name = "5v0";
  580. };
  581.  
  582. gpu {
  583. compatible = "brcm,bcm2711-vc5";
  584. phandle = <0xdc>;
  585. raspberrypi,firmware = <0x06>;
  586. status = "disabled";
  587. };
  588.  
  589. hat {
  590. custom_0 = [31];
  591. custom_1 = [39 39 39 38 34];
  592. custom_2 = [30];
  593. custom_3 = [32 30 32 33 2d 30 36 2d 32 39];
  594. custom_4 = [30];
  595. custom_5 = [63 38 3a 33 65 3a 61 37 3a 31 30 3a 61 36 3a 62 32];
  596. custom_6 = [31];
  597. product = "RevPi Connect 4 WLAN 16/2GB";
  598. product_id = "0x0181";
  599. product_ver = "0x000a";
  600. uuid = "16e8dbfb-4cee-3896-8ffb-94b9c9d4f10f";
  601. vendor = "KUNBUS GmbH";
  602. };
  603.  
  604. leds {
  605. compatible = "gpio-leds";
  606. phandle = <0xe3>;
  607.  
  608. a1_blue {
  609. gpios = <0xee 0x03 0x01>;
  610. label = "a1:blue:status";
  611. linux,default-trigger = "a1_blue";
  612. };
  613.  
  614. a1_green {
  615. gpios = <0xee 0x02 0x01>;
  616. label = "a1:green:status";
  617. linux,default-trigger = "a1_green";
  618. };
  619.  
  620. a1_red {
  621. gpios = <0xee 0x01 0x01>;
  622. label = "a1:red:status";
  623. linux,default-trigger = "a1_red";
  624. };
  625.  
  626. a2_blue {
  627. gpios = <0xee 0x06 0x01>;
  628. label = "a2:blue:status";
  629. linux,default-trigger = "a2_blue";
  630. };
  631.  
  632. a2_green {
  633. gpios = <0xee 0x05 0x01>;
  634. label = "a2:green:status";
  635. linux,default-trigger = "a2_green";
  636. };
  637.  
  638. a2_red {
  639. gpios = <0xee 0x04 0x01>;
  640. label = "a2:red:status";
  641. linux,default-trigger = "a2_red";
  642. };
  643.  
  644. a3_blue {
  645. gpios = <0xef 0x02 0x01>;
  646. label = "a3:blue:status";
  647. linux,default-trigger = "a3_blue";
  648. };
  649.  
  650. a3_green {
  651. gpios = <0xef 0x01 0x01>;
  652. label = "a3:green:status";
  653. linux,default-trigger = "a3_green";
  654. };
  655.  
  656. a3_red {
  657. gpios = <0xef 0x00 0x01>;
  658. label = "a3:red:status";
  659. linux,default-trigger = "a3_red";
  660. };
  661.  
  662. a4_blue {
  663. gpios = <0xef 0x0a 0x01>;
  664. label = "a4:blue:status";
  665. linux,default-trigger = "a4_blue";
  666. };
  667.  
  668. a4_green {
  669. gpios = <0xef 0x09 0x01>;
  670. label = "a4:green:status";
  671. linux,default-trigger = "a4_green";
  672. };
  673.  
  674. a4_red {
  675. gpios = <0xef 0x08 0x01>;
  676. label = "a4:red:status";
  677. linux,default-trigger = "a4_red";
  678. };
  679.  
  680. a5_blue {
  681. gpios = <0xef 0x0d 0x01>;
  682. label = "a5:blue:status";
  683. linux,default-trigger = "a5_blue";
  684. };
  685.  
  686. a5_green {
  687. gpios = <0xef 0x0c 0x01>;
  688. label = "a5:green:status";
  689. linux,default-trigger = "a5_green";
  690. };
  691.  
  692. a5_red {
  693. gpios = <0xef 0x0b 0x01>;
  694. label = "a5:red:status";
  695. linux,default-trigger = "a5_red";
  696. };
  697.  
  698. led-act {
  699. default-state = "keep";
  700. gpios = <0x07 0x2a 0x00>;
  701. label = "led0";
  702. linux,default-trigger = "mmc0";
  703. phandle = <0x3d>;
  704. };
  705.  
  706. led-pwr {
  707. default-state = "keep";
  708. gpios = <0x0b 0x02 0x01>;
  709. label = "led1";
  710. linux,default-trigger = "default-on";
  711. phandle = <0x3e>;
  712. };
  713.  
  714. power_red {
  715. gpios = <0xee 0x00 0x00>;
  716. label = "power:1:fault";
  717. linux,default-trigger = "power_red";
  718. };
  719. };
  720.  
  721. memory@0 {
  722. device_type = "memory";
  723. reg = <0x00 0x00 0x3b400000 0x00 0x40000000 0x40000000>;
  724. };
  725.  
  726. phy {
  727. #phy-cells = <0x00>;
  728. compatible = "usb-nop-xceiv";
  729. phandle = <0x1a>;
  730. };
  731.  
  732. pibridge {
  733. compatible = "kunbus,pibridge";
  734. connect-gpios = <0x07 0x06 0x00 0x07 0x10 0x00>;
  735. left-sniff-gpios = <0xee 0x08 0x00 0xee 0x09 0x00>;
  736. pinctrl-0 = <0xed>;
  737. pinctrl-names = "default";
  738. right-sniff-gpios = <0xee 0x0c 0x00 0xee 0x0b 0x00>;
  739. };
  740.  
  741. reserved-memory {
  742. #address-cells = <0x02>;
  743. #size-cells = <0x01>;
  744. phandle = <0x43>;
  745. ranges;
  746.  
  747. linux,cma {
  748. alloc-ranges = <0x00 0x00 0x30000000>;
  749. compatible = "shared-dma-pool";
  750. linux,cma-default;
  751. phandle = <0x44>;
  752. reusable;
  753. size = <0x4000000>;
  754. };
  755.  
  756. nvram@0 {
  757. #address-cells = <0x01>;
  758. #size-cells = <0x01>;
  759. compatible = "raspberrypi,bootloader-config\0nvmem-rmem";
  760. no-map;
  761. phandle = <0x45>;
  762. reg = <0x00 0x3ef63240 0x134>;
  763. status = "okay";
  764. };
  765. };
  766.  
  767. scb {
  768. #address-cells = <0x02>;
  769. #size-cells = <0x02>;
  770. compatible = "simple-bus";
  771. dma-ranges = <0x00 0x00 0x00 0x00 0x04 0x00>;
  772. phandle = <0xdf>;
  773. ranges = <0x00 0x7c000000 0x00 0xfc000000 0x00 0x3800000 0x00 0x40000000 0x00 0xff800000 0x00 0x800000 0x06 0x00 0x06 0x00 0x00 0x40000000 0x00 0x00 0x00 0x00 0x00 0xfc000000>;
  774.  
  775. dma@7e007b00 {
  776. #dma-cells = <0x01>;
  777. brcm,dma-channel-mask = <0x3000>;
  778. compatible = "brcm,bcm2711-dma";
  779. interrupt-names = "dma11\0dma12\0dma13\0dma14";
  780. interrupts = <0x00 0x59 0x04 0x00 0x5a 0x04 0x00 0x5b 0x04 0x00 0x5c 0x04>;
  781. phandle = <0x42>;
  782. reg = <0x00 0x7e007b00 0x00 0x400>;
  783. };
  784.  
  785. ethernet@7d580000 {
  786. #address-cells = <0x01>;
  787. #size-cells = <0x01>;
  788. compatible = "brcm,bcm2711-genet-v5";
  789. interrupts = <0x00 0x9d 0x04 0x00 0x9e 0x04>;
  790. local-mac-address = [e4 5f 01 93 03 8a];
  791. phandle = <0xe0>;
  792. phy-handle = <0x2e>;
  793. phy-mode = "rgmii-rxid";
  794. reg = <0x00 0x7d580000 0x00 0x10000>;
  795. status = "okay";
  796.  
  797. mdio@e14 {
  798. #address-cells = <0x01>;
  799. #size-cells = <0x00>;
  800. compatible = "brcm,genet-mdio-v5";
  801. phandle = <0xe1>;
  802. reg = <0xe14 0x08>;
  803. reg-names = "mdio";
  804.  
  805. ethernet-phy@0 {
  806. led-modes = <0x08 0x00>;
  807. phandle = <0x2e>;
  808. reg = <0x00>;
  809. };
  810. };
  811. };
  812.  
  813. h264-decoder@7eb20000 {
  814. compatible = "raspberrypi,rpivid-h264-decoder";
  815. reg = <0x00 0x7eb20000 0x00 0x10000>;
  816. status = "okay";
  817. };
  818.  
  819. hevc-decoder@7eb00000 {
  820. compatible = "raspberrypi,rpivid-hevc-decoder";
  821. reg = <0x00 0x7eb00000 0x00 0x10000>;
  822. status = "okay";
  823. };
  824.  
  825. pcie@7d500000 {
  826. #address-cells = <0x03>;
  827. #interrupt-cells = <0x01>;
  828. #size-cells = <0x02>;
  829. brcm,enable-l1ss;
  830. brcm,enable-ssc;
  831. compatible = "brcm,bcm2711-pcie\0brcm,bcm7445-pcie";
  832. device_type = "pci";
  833. dma-ranges = <0x2000000 0x04 0x00 0x00 0x00 0x00 0x80000000>;
  834. interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x00 0x8f 0x04 0x00 0x00 0x00 0x02 0x01 0x00 0x90 0x04 0x00 0x00 0x00 0x03 0x01 0x00 0x91 0x04 0x00 0x00 0x00 0x04 0x01 0x00 0x92 0x04>;
  835. interrupt-map-mask = <0x00 0x00 0x00 0x07>;
  836. interrupt-names = "pcie\0msi";
  837. interrupts = <0x00 0x93 0x04 0x00 0x94 0x04>;
  838. msi-controller;
  839. msi-parent = <0x2d>;
  840. phandle = <0x2d>;
  841. ranges = <0x2000000 0x00 0xc0000000 0x06 0x00 0x00 0x40000000>;
  842. reg = <0x00 0x7d500000 0x00 0x9310>;
  843.  
  844. pci@0,0 {
  845. #address-cells = <0x03>;
  846. #size-cells = <0x02>;
  847. device_type = "pci";
  848. ranges;
  849. reg = <0x00 0x00 0x00 0x00 0x00>;
  850. };
  851. };
  852.  
  853. rpivid-local-intc@7eb10000 {
  854. compatible = "raspberrypi,rpivid-local-intc";
  855. interrupts = <0x00 0x62 0x04>;
  856. reg = <0x00 0x7eb10000 0x00 0x1000>;
  857. status = "okay";
  858. };
  859.  
  860. vp9-decoder@7eb30000 {
  861. compatible = "raspberrypi,rpivid-vp9-decoder";
  862. reg = <0x00 0x7eb30000 0x00 0x10000>;
  863. status = "okay";
  864. };
  865.  
  866. xhci@7e9c0000 {
  867. compatible = "generic-xhci";
  868. interrupts = <0x00 0xb0 0x04>;
  869. phandle = <0xe2>;
  870. power-domains = <0x13 0x06>;
  871. reg = <0x00 0x7e9c0000 0x00 0x100000>;
  872. status = "disabled";
  873. };
  874. };
  875.  
  876. sd_io_1v8_reg {
  877. compatible = "regulator-gpio";
  878. gpios = <0x0b 0x04 0x00>;
  879. phandle = <0x26>;
  880. regulator-always-on;
  881. regulator-boot-on;
  882. regulator-max-microvolt = <0x325aa0>;
  883. regulator-min-microvolt = <0x1b7740>;
  884. regulator-name = "vdd-sd-io";
  885. regulator-settling-time-us = <0x1388>;
  886. states = <0x1b7740 0x01 0x325aa0 0x00>;
  887. status = "okay";
  888. };
  889.  
  890. sd_vcc_reg {
  891. compatible = "regulator-fixed";
  892. enable-active-high;
  893. gpio = <0x0b 0x06 0x00>;
  894. phandle = <0x27>;
  895. regulator-boot-on;
  896. regulator-max-microvolt = <0x325aa0>;
  897. regulator-min-microvolt = <0x325aa0>;
  898. regulator-name = "vcc-sd";
  899. };
  900.  
  901. soc {
  902. #address-cells = <0x01>;
  903. #size-cells = <0x01>;
  904. compatible = "simple-bus";
  905. dma-ranges = <0xc0000000 0x00 0x00 0x40000000>;
  906. phandle = <0x47>;
  907. ranges = <0x7e000000 0x00 0xfe000000 0x1800000 0x7c000000 0x00 0xfc000000 0x2000000 0x40000000 0x00 0xff800000 0x800000>;
  908.  
  909. aux@7e215000 {
  910. #clock-cells = <0x01>;
  911. clocks = <0x08 0x14>;
  912. compatible = "brcm,bcm2835-aux";
  913. phandle = <0x14>;
  914. reg = <0x7e215000 0x08>;
  915. };
  916.  
  917. avs-monitor@7d5d2000 {
  918. compatible = "brcm,bcm2711-avs-monitor\0syscon\0simple-mfd";
  919. phandle = <0xbd>;
  920. reg = <0x7d5d2000 0xf00>;
  921.  
  922. thermal {
  923. #thermal-sensor-cells = <0x00>;
  924. compatible = "brcm,bcm2711-thermal";
  925. phandle = <0x02>;
  926. };
  927. };
  928.  
  929. axiperf {
  930. compatible = "brcm,bcm2835-axiperf";
  931. firmware = <0x06>;
  932. phandle = <0x3c>;
  933. reg = <0x7e009800 0x100 0x7ee08000 0x100>;
  934. status = "disabled";
  935. };
  936.  
  937. clock@7ef00000 {
  938. #clock-cells = <0x01>;
  939. #reset-cells = <0x01>;
  940. clocks = <0x1d>;
  941. compatible = "brcm,brcm2711-dvp";
  942. phandle = <0x1e>;
  943. reg = <0x7ef00000 0x10>;
  944. status = "disabled";
  945. };
  946.  
  947. cprman@7e101000 {
  948. #clock-cells = <0x01>;
  949. clocks = <0x03 0x04 0x00 0x04 0x01 0x04 0x02 0x05 0x00 0x05 0x01 0x05 0x02>;
  950. compatible = "brcm,bcm2711-cprman";
  951. firmware = <0x06>;
  952. phandle = <0x08>;
  953. reg = <0x7e101000 0x2000>;
  954. };
  955.  
  956. csi@7e800000 {
  957. #address-cells = <0x01>;
  958. #clock-cells = <0x01>;
  959. #size-cells = <0x00>;
  960. brcm,num-data-lanes = <0x02>;
  961. clock-names = "lp\0vpu";
  962. clocks = <0x08 0x2d 0x17 0x04>;
  963. compatible = "brcm,bcm2835-unicam";
  964. interrupts = <0x00 0x66 0x04>;
  965. phandle = <0xd8>;
  966. power-domains = <0x13 0x0c>;
  967. reg = <0x7e800000 0x800 0x7e802000 0x04>;
  968. status = "disabled";
  969. };
  970.  
  971. csi@7e801000 {
  972. #address-cells = <0x01>;
  973. #clock-cells = <0x01>;
  974. #size-cells = <0x00>;
  975. brcm,num-data-lanes = <0x04>;
  976. clock-names = "lp\0vpu";
  977. clocks = <0x08 0x2e 0x17 0x04>;
  978. compatible = "brcm,bcm2835-unicam";
  979. interrupts = <0x00 0x67 0x04>;
  980. phandle = <0xd9>;
  981. power-domains = <0x13 0x0d>;
  982. reg = <0x7e801000 0x800 0x7e802004 0x04>;
  983. status = "disabled";
  984. };
  985.  
  986. dma@7e007000 {
  987. #dma-cells = <0x01>;
  988. brcm,dma-channel-mask = <0x7f5>;
  989. compatible = "brcm,bcm2835-dma";
  990. interrupt-names = "dma0\0dma1\0dma2\0dma3\0dma4\0dma5\0dma6\0dma7\0dma8\0dma9\0dma10";
  991. interrupts = <0x00 0x50 0x04 0x00 0x51 0x04 0x00 0x52 0x04 0x00 0x53 0x04 0x00 0x54 0x04 0x00 0x55 0x04 0x00 0x56 0x04 0x00 0x57 0x04 0x00 0x57 0x04 0x00 0x58 0x04 0x00 0x58 0x04>;
  992. phandle = <0x0c>;
  993. reg = <0x7e007000 0xb00>;
  994. };
  995.  
  996. dpi@7e208000 {
  997. #address-cells = <0x01>;
  998. #size-cells = <0x00>;
  999. clock-names = "core\0pixel";
  1000. clocks = <0x08 0x14 0x08 0x2c>;
  1001. compatible = "brcm,bcm2835-dpi";
  1002. phandle = <0xb5>;
  1003. reg = <0x7e208000 0x8c>;
  1004. status = "disabled";
  1005. };
  1006.  
  1007. dsi@7e209000 {
  1008. #address-cells = <0x01>;
  1009. #clock-cells = <0x01>;
  1010. #size-cells = <0x00>;
  1011. clock-names = "phy\0escape\0pixel";
  1012. clock-output-names = "dsi0_byte\0dsi0_ddr2\0dsi0_ddr";
  1013. clocks = <0x08 0x20 0x08 0x2f 0x08 0x31>;
  1014. compatible = "brcm,bcm2835-dsi0";
  1015. interrupts = <0x00 0x64 0x04>;
  1016. phandle = <0x04>;
  1017. power-domains = <0x13 0x11>;
  1018. reg = <0x7e209000 0x78>;
  1019. status = "disabled";
  1020. };
  1021.  
  1022. dsi@7e700000 {
  1023. #address-cells = <0x01>;
  1024. #clock-cells = <0x01>;
  1025. #size-cells = <0x00>;
  1026. clock-names = "phy\0escape\0pixel";
  1027. clock-output-names = "dsi1_byte\0dsi1_ddr2\0dsi1_ddr";
  1028. clocks = <0x08 0x23 0x08 0x30 0x08 0x32>;
  1029. compatible = "brcm,bcm2711-dsi1";
  1030. interrupts = <0x00 0x6c 0x04>;
  1031. phandle = <0x05>;
  1032. power-domains = <0x13 0x12>;
  1033. reg = <0x7e700000 0x8c>;
  1034. status = "disabled";
  1035. };
  1036.  
  1037. fb {
  1038. compatible = "brcm,bcm2708-fb";
  1039. firmware = <0x06>;
  1040. phandle = <0xda>;
  1041. status = "okay";
  1042. };
  1043.  
  1044. firmware {
  1045. #address-cells = <0x01>;
  1046. #size-cells = <0x01>;
  1047. compatible = "raspberrypi,bcm2835-firmware\0simple-mfd";
  1048. dma-ranges;
  1049. mboxes = <0x23>;
  1050. phandle = <0x06>;
  1051.  
  1052. clocks {
  1053. #clock-cells = <0x01>;
  1054. compatible = "raspberrypi,firmware-clocks";
  1055. phandle = <0x17>;
  1056. };
  1057.  
  1058. gpio {
  1059. #gpio-cells = <0x02>;
  1060. compatible = "raspberrypi,firmware-gpio";
  1061. gpio-controller;
  1062. gpio-line-names = "BT_ON\0WL_ON\0PWR_LED_OFF\0ANT1\0VDD_SD_IO_SEL\0CAM_GPIO\0SD_PWR_ON\0ANT2";
  1063. phandle = <0x0b>;
  1064. status = "okay";
  1065.  
  1066. ant1 {
  1067. gpio-hog;
  1068. gpios = <0x03 0x00>;
  1069. output-high;
  1070. phandle = <0x3f>;
  1071. };
  1072.  
  1073. ant2 {
  1074. gpio-hog;
  1075. gpios = <0x07 0x00>;
  1076. output-low;
  1077. phandle = <0x40>;
  1078. };
  1079. };
  1080.  
  1081. reset {
  1082. #reset-cells = <0x01>;
  1083. compatible = "raspberrypi,firmware-reset";
  1084. phandle = <0xd3>;
  1085. };
  1086.  
  1087. vcio {
  1088. compatible = "raspberrypi,vcio";
  1089. phandle = <0xd4>;
  1090. };
  1091. };
  1092.  
  1093. firmwarekms@7e600000 {
  1094. brcm,firmware = <0x06>;
  1095. compatible = "raspberrypi,rpi-firmware-kms-2711";
  1096. interrupts = <0x00 0x70 0x04>;
  1097. phandle = <0xd6>;
  1098. reg = <0x7e600000 0x100>;
  1099. status = "disabled";
  1100. };
  1101.  
  1102. gpio@7e200000 {
  1103. #gpio-cells = <0x02>;
  1104. #interrupt-cells = <0x02>;
  1105. compatible = "brcm,bcm2711-gpio";
  1106. gpio-controller;
  1107. gpio-line-names = "ID_SDA\0ID_SCL\0SDA1\0SCL1\0GPIO_GCLK\0GPIO5\0GPIO6\0SPI_CE1_N\0SPI_CE0_N\0SPI_MISO\0SPI_MOSI\0SPI_SCLK\0GPIO12\0GPIO13\0TXD1\0RXD1\0GPIO16\0GPIO17\0GPIO18\0GPIO19\0GPIO20\0GPIO21\0GPIO22\0GPIO23\0GPIO24\0GPIO25\0GPIO26\0GPIO27\0RGMII_MDIO\0RGMIO_MDC\0CTS0\0RTS0\0TXD0\0RXD0\0SD1_CLK\0SD1_CMD\0SD1_DATA0\0SD1_DATA1\0SD1_DATA2\0SD1_DATA3\0PWM0_MISO\0PWM1_MOSI\0STATUS_LED_G_CLK\0SPIFLASH_CE_N\0SDA0\0SCL0\0RGMII_RXCLK\0RGMII_RXCTL\0RGMII_RXD0\0RGMII_RXD1\0RGMII_RXD2\0RGMII_RXD3\0RGMII_TXCLK\0RGMII_TXCTL\0RGMII_TXD0\0RGMII_TXD1\0RGMII_TXD2\0RGMII_TXD3";
  1108. gpio-ranges = <0x07 0x00 0x00 0x3a>;
  1109. interrupt-controller;
  1110. interrupts = <0x00 0x71 0x04 0x00 0x72 0x04>;
  1111. phandle = <0x07>;
  1112. pinctrl-0 = <0xf0>;
  1113. pinctrl-names = "default";
  1114. reg = <0x7e200000 0xb4>;
  1115.  
  1116. alt0 {
  1117. brcm,function = <0x04>;
  1118. brcm,pins = <0x04 0x05 0x07 0x08 0x09 0x0a 0x0b>;
  1119. phandle = <0x97>;
  1120. };
  1121.  
  1122. audio_pins {
  1123. brcm,function;
  1124. brcm,pins;
  1125. phandle = <0x24>;
  1126. };
  1127.  
  1128. bt_pins {
  1129. brcm,function = <0x00>;
  1130. brcm,pins = "-";
  1131. brcm,pull = <0x02>;
  1132. phandle = <0x0a>;
  1133. };
  1134.  
  1135. debug_uart_pins {
  1136. brcm,function = <0x02>;
  1137. brcm,pins = <0x0e>;
  1138. brcm,pull = <0x00>;
  1139. phandle = <0xf8>;
  1140. };
  1141.  
  1142. digital_io_pins {
  1143. brcm,function = <0x00 0x01>;
  1144. brcm,pins = <0x06 0x10>;
  1145. brcm,pull = <0x00 0x00>;
  1146. phandle = <0xed>;
  1147. };
  1148.  
  1149. dpi_16bit_cpadhi_gpio0 {
  1150. brcm,function = <0x06>;
  1151. brcm,pins = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x14 0x15 0x16 0x17 0x18>;
  1152. phandle = <0x9e>;
  1153. };
  1154.  
  1155. dpi_16bit_cpadhi_gpio2 {
  1156. brcm,function = <0x06>;
  1157. brcm,pins = <0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x14 0x15 0x16 0x17 0x18>;
  1158. phandle = <0x9f>;
  1159. };
  1160.  
  1161. dpi_16bit_gpio0 {
  1162. brcm,function = <0x06>;
  1163. brcm,pins = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13>;
  1164. phandle = <0x9c>;
  1165. };
  1166.  
  1167. dpi_16bit_gpio2 {
  1168. brcm,function = <0x06>;
  1169. brcm,pins = <0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13>;
  1170. phandle = <0x9d>;
  1171. };
  1172.  
  1173. dpi_18bit_cpadhi_gpio0 {
  1174. brcm,function = <0x06>;
  1175. brcm,pins = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x14 0x15 0x16 0x17 0x18 0x19>;
  1176. brcm,pull = <0x00>;
  1177. phandle = <0x98>;
  1178. };
  1179.  
  1180. dpi_18bit_cpadhi_gpio2 {
  1181. brcm,function = <0x06>;
  1182. brcm,pins = <0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x14 0x15 0x16 0x17 0x18 0x19>;
  1183. phandle = <0x99>;
  1184. };
  1185.  
  1186. dpi_18bit_gpio0 {
  1187. brcm,function = <0x06>;
  1188. brcm,pins = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15>;
  1189. phandle = <0x9a>;
  1190. };
  1191.  
  1192. dpi_18bit_gpio2 {
  1193. brcm,function = <0x06>;
  1194. brcm,pins = <0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15>;
  1195. phandle = <0x9b>;
  1196. };
  1197.  
  1198. dpi_gpio0 {
  1199. brcm,function = <0x06>;
  1200. brcm,pins = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b>;
  1201. phandle = <0x4a>;
  1202. };
  1203.  
  1204. emmc_gpio22 {
  1205. brcm,function = <0x07>;
  1206. brcm,pins = <0x16 0x17 0x18 0x19 0x1a 0x1b>;
  1207. phandle = <0x4b>;
  1208. };
  1209.  
  1210. emmc_gpio34 {
  1211. brcm,function = <0x07>;
  1212. brcm,pins = <0x22 0x23 0x24 0x25 0x26 0x27>;
  1213. brcm,pull = <0x00 0x02 0x02 0x02 0x02 0x02>;
  1214. phandle = <0x4c>;
  1215. };
  1216.  
  1217. emmc_gpio48 {
  1218. brcm,function = <0x07>;
  1219. brcm,pins = <0x30 0x31 0x32 0x33 0x34 0x35>;
  1220. phandle = <0x16>;
  1221. };
  1222.  
  1223. exp_core_pins {
  1224. brcm,function = <0x00>;
  1225. brcm,pins = <0x08>;
  1226. brcm,pull = <0x00>;
  1227. phandle = <0xf2>;
  1228. };
  1229.  
  1230. exp_power_pins {
  1231. brcm,function = <0x00>;
  1232. brcm,pins = <0x09>;
  1233. brcm,pull = <0x00>;
  1234. phandle = <0xf1>;
  1235. };
  1236.  
  1237. gpclk0_gpio4 {
  1238. brcm,function = <0x04>;
  1239. brcm,pins = <0x04>;
  1240. phandle = <0x4d>;
  1241. };
  1242.  
  1243. gpclk0_gpio49 {
  1244. phandle = <0x6a>;
  1245.  
  1246. pin-gpclk {
  1247. bias-disable;
  1248. function = "alt1";
  1249. pins = "gpio49";
  1250. };
  1251. };
  1252.  
  1253. gpclk1_gpio42 {
  1254. brcm,function = <0x04>;
  1255. brcm,pins = <0x2a>;
  1256. phandle = <0x4f>;
  1257. };
  1258.  
  1259. gpclk1_gpio44 {
  1260. brcm,function = <0x04>;
  1261. brcm,pins = <0x2c>;
  1262. phandle = <0x50>;
  1263. };
  1264.  
  1265. gpclk1_gpio5 {
  1266. brcm,function = <0x04>;
  1267. brcm,pins = <0x05>;
  1268. phandle = <0x4e>;
  1269. };
  1270.  
  1271. gpclk1_gpio50 {
  1272. phandle = <0x6b>;
  1273.  
  1274. pin-gpclk {
  1275. bias-disable;
  1276. function = "alt1";
  1277. pins = "gpio50";
  1278. };
  1279. };
  1280.  
  1281. gpclk2_gpio43 {
  1282. brcm,function = <0x04>;
  1283. brcm,pins = <0x2b>;
  1284. brcm,pull = <0x00>;
  1285. phandle = <0x52>;
  1286. };
  1287.  
  1288. gpclk2_gpio51 {
  1289. phandle = <0x6c>;
  1290.  
  1291. pin-gpclk {
  1292. bias-disable;
  1293. function = "alt1";
  1294. pins = "gpio51";
  1295. };
  1296. };
  1297.  
  1298. gpclk2_gpio6 {
  1299. brcm,function = <0x04>;
  1300. brcm,pins = <0x06>;
  1301. phandle = <0x51>;
  1302. };
  1303.  
  1304. gpioout {
  1305. brcm,function = <0x01>;
  1306. brcm,pins = <0x06>;
  1307. phandle = <0x96>;
  1308. };
  1309.  
  1310. i2c0 {
  1311. brcm,function = <0x04>;
  1312. brcm,pins = <0x00 0x01>;
  1313. brcm,pull = <0x02>;
  1314. phandle = <0xa8>;
  1315. };
  1316.  
  1317. i2c0_gpio0 {
  1318. brcm,function = <0x04>;
  1319. brcm,pins = <0x00 0x01>;
  1320. phandle = <0x11>;
  1321. };
  1322.  
  1323. i2c0_gpio28 {
  1324. brcm,function = <0x04>;
  1325. brcm,pins = <0x1c 0x1d>;
  1326. phandle = <0x53>;
  1327. };
  1328.  
  1329. i2c0_gpio44 {
  1330. brcm,function = <0x05>;
  1331. brcm,pins = <0x2c 0x2d>;
  1332. phandle = <0x12>;
  1333. };
  1334.  
  1335. i2c0_gpio46 {
  1336. phandle = <0x6d>;
  1337.  
  1338. pin-scl {
  1339. bias-disable;
  1340. function = "alt0";
  1341. pins = "gpio47";
  1342. };
  1343.  
  1344. pin-sda {
  1345. bias-pull-up;
  1346. function = "alt0";
  1347. pins = "gpio46";
  1348. };
  1349. };
  1350.  
  1351. i2c1 {
  1352. brcm,function = <0x04>;
  1353. brcm,pins = <0x02 0x03>;
  1354. brcm,pull = <0x00>;
  1355. phandle = <0x18>;
  1356. };
  1357.  
  1358. i2c1_gpio2 {
  1359. brcm,function = <0x04>;
  1360. brcm,pins = <0x02 0x03>;
  1361. phandle = <0x54>;
  1362. };
  1363.  
  1364. i2c1_gpio44 {
  1365. brcm,function = <0x06>;
  1366. brcm,pins = <0x2c 0x2d>;
  1367. phandle = <0x55>;
  1368. };
  1369.  
  1370. i2c1_gpio46 {
  1371. phandle = <0x6e>;
  1372.  
  1373. pin-scl {
  1374. bias-disable;
  1375. function = "alt1";
  1376. pins = "gpio47";
  1377. };
  1378.  
  1379. pin-sda {
  1380. bias-pull-up;
  1381. function = "alt1";
  1382. pins = "gpio46";
  1383. };
  1384. };
  1385.  
  1386. i2c3 {
  1387. brcm,function = <0x02>;
  1388. brcm,pins = <0x04 0x05>;
  1389. brcm,pull = <0x02>;
  1390. phandle = <0xa9>;
  1391. };
  1392.  
  1393. i2c3_gpio2 {
  1394. phandle = <0x6f>;
  1395.  
  1396. pin-scl {
  1397. bias-disable;
  1398. function = "alt5";
  1399. pins = "gpio3";
  1400. };
  1401.  
  1402. pin-sda {
  1403. bias-pull-up;
  1404. function = "alt5";
  1405. pins = "gpio2";
  1406. };
  1407. };
  1408.  
  1409. i2c3_gpio4 {
  1410. phandle = <0x70>;
  1411.  
  1412. pin-scl {
  1413. bias-disable;
  1414. function = "alt5";
  1415. pins = "gpio5";
  1416. };
  1417.  
  1418. pin-sda {
  1419. bias-pull-up;
  1420. function = "alt5";
  1421. pins = "gpio4";
  1422. };
  1423. };
  1424.  
  1425. i2c4 {
  1426. brcm,function = <0x02>;
  1427. brcm,pins = <0x08 0x09>;
  1428. brcm,pull = <0x02>;
  1429. phandle = <0xaa>;
  1430. };
  1431.  
  1432. i2c4_gpio6 {
  1433. phandle = <0x71>;
  1434.  
  1435. pin-scl {
  1436. bias-disable;
  1437. function = "alt5";
  1438. pins = "gpio7";
  1439. };
  1440.  
  1441. pin-sda {
  1442. bias-pull-up;
  1443. function = "alt5";
  1444. pins = "gpio6";
  1445. };
  1446. };
  1447.  
  1448. i2c4_gpio8 {
  1449. phandle = <0x72>;
  1450.  
  1451. pin-scl {
  1452. bias-disable;
  1453. function = "alt5";
  1454. pins = "gpio9";
  1455. };
  1456.  
  1457. pin-sda {
  1458. bias-pull-up;
  1459. function = "alt5";
  1460. pins = "gpio8";
  1461. };
  1462. };
  1463.  
  1464. i2c5 {
  1465. brcm,function = <0x02>;
  1466. brcm,pins = <0x0c 0x0d>;
  1467. brcm,pull = <0x02>;
  1468. phandle = <0xab>;
  1469. };
  1470.  
  1471. i2c5_gpio10 {
  1472. phandle = <0x73>;
  1473.  
  1474. pin-scl {
  1475. bias-disable;
  1476. function = "alt5";
  1477. pins = "gpio11";
  1478. };
  1479.  
  1480. pin-sda {
  1481. bias-pull-up;
  1482. function = "alt5";
  1483. pins = "gpio10";
  1484. };
  1485. };
  1486.  
  1487. i2c5_gpio12 {
  1488. phandle = <0x74>;
  1489.  
  1490. pin-scl {
  1491. bias-disable;
  1492. function = "alt5";
  1493. pins = "gpio13";
  1494. };
  1495.  
  1496. pin-sda {
  1497. bias-pull-up;
  1498. function = "alt5";
  1499. pins = "gpio12";
  1500. };
  1501. };
  1502.  
  1503. i2c6 {
  1504. brcm,function = <0x02>;
  1505. brcm,pins = <0x16 0x17>;
  1506. brcm,pull = <0x02>;
  1507. phandle = <0xac>;
  1508. };
  1509.  
  1510. i2c6_gpio0 {
  1511. phandle = <0x75>;
  1512.  
  1513. pin-scl {
  1514. bias-disable;
  1515. function = "alt5";
  1516. pins = "gpio1";
  1517. };
  1518.  
  1519. pin-sda {
  1520. bias-pull-up;
  1521. function = "alt5";
  1522. pins = "gpio0";
  1523. };
  1524. };
  1525.  
  1526. i2c6_gpio22 {
  1527. phandle = <0x76>;
  1528.  
  1529. pin-scl {
  1530. bias-disable;
  1531. function = "alt5";
  1532. pins = "gpio23";
  1533. };
  1534.  
  1535. pin-sda {
  1536. bias-pull-up;
  1537. function = "alt5";
  1538. pins = "gpio22";
  1539. };
  1540. };
  1541.  
  1542. i2c_slave_gpio8 {
  1543. phandle = <0x77>;
  1544.  
  1545. pins-i2c-slave {
  1546. function = "alt3";
  1547. pins = "gpio8\0gpio9\0gpio10\0gpio11";
  1548. };
  1549. };
  1550.  
  1551. i2s {
  1552. brcm,function = <0x04>;
  1553. brcm,pins = <0x12 0x13 0x14 0x15>;
  1554. phandle = <0x0d>;
  1555. };
  1556.  
  1557. id_wp_pins {
  1558. brcm,function = <0x00>;
  1559. brcm,pins = <0x11>;
  1560. brcm,pull = <0x00>;
  1561. line-name = "ID_WP";
  1562. phandle = <0xf0>;
  1563. };
  1564.  
  1565. jtag_gpio22 {
  1566. brcm,function = <0x03>;
  1567. brcm,pins = <0x16 0x17 0x18 0x19 0x1a 0x1b>;
  1568. phandle = <0x56>;
  1569. };
  1570.  
  1571. jtag_gpio48 {
  1572. phandle = <0x78>;
  1573.  
  1574. pins-jtag {
  1575. function = "alt4";
  1576. pins = "gpio48\0gpio49\0gpio50\0gpio51\0gpio52\0gpio53";
  1577. };
  1578. };
  1579.  
  1580. mii_gpio28 {
  1581. phandle = <0x79>;
  1582.  
  1583. pins-mii {
  1584. function = "alt4";
  1585. pins = "gpio28\0gpio29\0gpio30\0gpio31";
  1586. };
  1587. };
  1588.  
  1589. mii_gpio36 {
  1590. phandle = <0x7a>;
  1591.  
  1592. pins-mii {
  1593. function = "alt5";
  1594. pins = "gpio36\0gpio37\0gpio38\0gpio39";
  1595. };
  1596. };
  1597.  
  1598. pb_uart_pins {
  1599. brcm,function = <0x03>;
  1600. brcm,pins = <0x04 0x05 0x07>;
  1601. brcm,pull = <0x00>;
  1602. phandle = <0xf7>;
  1603. };
  1604.  
  1605. pcm_gpio18 {
  1606. brcm,function = <0x04>;
  1607. brcm,pins = <0x12 0x13 0x14 0x15>;
  1608. phandle = <0x57>;
  1609. };
  1610.  
  1611. pcm_gpio28 {
  1612. brcm,function = <0x06>;
  1613. brcm,pins = <0x1c 0x1d 0x1e 0x1f>;
  1614. phandle = <0x58>;
  1615. };
  1616.  
  1617. pcm_gpio50 {
  1618. phandle = <0x7b>;
  1619.  
  1620. pins-pcm {
  1621. function = "alt2";
  1622. pins = "gpio50\0gpio51\0gpio52\0gpio53";
  1623. };
  1624. };
  1625.  
  1626. pwm0_0_gpio12 {
  1627. phandle = <0x7c>;
  1628.  
  1629. pin-pwm {
  1630. bias-disable;
  1631. function = "alt0";
  1632. pins = "gpio12";
  1633. };
  1634. };
  1635.  
  1636. pwm0_0_gpio18 {
  1637. phandle = <0x7d>;
  1638.  
  1639. pin-pwm {
  1640. bias-disable;
  1641. function = "alt5";
  1642. pins = "gpio18";
  1643. };
  1644. };
  1645.  
  1646. pwm0_0_gpio52 {
  1647. phandle = <0x81>;
  1648.  
  1649. pin-pwm {
  1650. bias-disable;
  1651. function = "alt1";
  1652. pins = "gpio52";
  1653. };
  1654. };
  1655.  
  1656. pwm0_1_gpio13 {
  1657. phandle = <0x7e>;
  1658.  
  1659. pin-pwm {
  1660. bias-disable;
  1661. function = "alt0";
  1662. pins = "gpio13";
  1663. };
  1664. };
  1665.  
  1666. pwm0_1_gpio19 {
  1667. phandle = <0x7f>;
  1668.  
  1669. pin-pwm {
  1670. bias-disable;
  1671. function = "alt5";
  1672. pins = "gpio19";
  1673. };
  1674. };
  1675.  
  1676. pwm0_1_gpio45 {
  1677. phandle = <0x80>;
  1678.  
  1679. pin-pwm {
  1680. bias-disable;
  1681. function = "alt0";
  1682. pins = "gpio45";
  1683. };
  1684. };
  1685.  
  1686. pwm0_1_gpio53 {
  1687. phandle = <0x82>;
  1688.  
  1689. pin-pwm {
  1690. bias-disable;
  1691. function = "alt1";
  1692. pins = "gpio53";
  1693. };
  1694. };
  1695.  
  1696. pwm1_0_gpio40 {
  1697. phandle = <0x1b>;
  1698.  
  1699. pin-pwm {
  1700. bias-disable;
  1701. function = "alt0";
  1702. pins = "gpio40";
  1703. };
  1704. };
  1705.  
  1706. pwm1_1_gpio41 {
  1707. phandle = <0x1c>;
  1708.  
  1709. pin-pwm {
  1710. bias-disable;
  1711. function = "alt0";
  1712. pins = "gpio41";
  1713. };
  1714. };
  1715.  
  1716. rgmii_gpio35 {
  1717. phandle = <0x83>;
  1718.  
  1719. pin-rx-ok {
  1720. function = "alt4";
  1721. pins = "gpio36";
  1722. };
  1723.  
  1724. pin-start-stop {
  1725. function = "alt4";
  1726. pins = "gpio35";
  1727. };
  1728. };
  1729.  
  1730. rgmii_irq_gpio34 {
  1731. phandle = <0x84>;
  1732.  
  1733. pin-irq {
  1734. function = "alt5";
  1735. pins = "gpio34";
  1736. };
  1737. };
  1738.  
  1739. rgmii_irq_gpio39 {
  1740. phandle = <0x85>;
  1741.  
  1742. pin-irq {
  1743. function = "alt4";
  1744. pins = "gpio39";
  1745. };
  1746. };
  1747.  
  1748. rgmii_mdio_gpio28 {
  1749. phandle = <0x86>;
  1750.  
  1751. pins-mdio {
  1752. function = "alt5";
  1753. pins = "gpio28\0gpio29";
  1754. };
  1755. };
  1756.  
  1757. rgmii_mdio_gpio37 {
  1758. phandle = <0x87>;
  1759.  
  1760. pins-mdio {
  1761. function = "alt4";
  1762. pins = "gpio37\0gpio38";
  1763. };
  1764. };
  1765.  
  1766. rs485_pins {
  1767. brcm,function = <0x03>;
  1768. brcm,pins = <0x0c 0x0d 0x0f>;
  1769. brcm,pull = <0x00>;
  1770. phandle = <0xf6>;
  1771. };
  1772.  
  1773. sdhost_gpio48 {
  1774. brcm,function = <0x04>;
  1775. brcm,pins = <0x30 0x31 0x32 0x33 0x34 0x35>;
  1776. phandle = <0x59>;
  1777. };
  1778.  
  1779. sdio_pins {
  1780. brcm,function = <0x07>;
  1781. brcm,pins = <0x22 0x23 0x24 0x25 0x26 0x27>;
  1782. brcm,pull = <0x00 0x02 0x02 0x02 0x02 0x02>;
  1783. phandle = <0x25>;
  1784. };
  1785.  
  1786. spi0_cs_pins {
  1787. brcm,function = <0x01>;
  1788. brcm,pins = <0x08 0x07>;
  1789. phandle = <0x0f>;
  1790. };
  1791.  
  1792. spi0_gpio35 {
  1793. brcm,function = <0x04>;
  1794. brcm,pins = <0x23 0x24 0x25 0x26 0x27>;
  1795. phandle = <0x5b>;
  1796. };
  1797.  
  1798. spi0_gpio46 {
  1799. phandle = <0x88>;
  1800.  
  1801. pins-spi {
  1802. function = "alt2";
  1803. pins = "gpio46\0gpio47\0gpio48\0gpio49";
  1804. };
  1805. };
  1806.  
  1807. spi0_gpio7 {
  1808. brcm,function = <0x04>;
  1809. brcm,pins = <0x07 0x08 0x09 0x0a 0x0b>;
  1810. phandle = <0x5a>;
  1811. };
  1812.  
  1813. spi0_pins {
  1814. brcm,function = <0x04>;
  1815. brcm,pins = <0x09 0x0a 0x0b>;
  1816. phandle = <0x0e>;
  1817. };
  1818.  
  1819. spi1_cs_pins {
  1820. brcm,function = <0x01>;
  1821. brcm,pins = <0x12>;
  1822. brcm,pull = <0x00>;
  1823. phandle = <0xf4>;
  1824. };
  1825.  
  1826. spi1_gpio16 {
  1827. brcm,function = <0x03>;
  1828. brcm,pins = <0x10 0x11 0x12 0x13 0x14 0x15>;
  1829. phandle = <0x5c>;
  1830. };
  1831.  
  1832. spi1_pins {
  1833. brcm,function = <0x03>;
  1834. brcm,pins = <0x13 0x14 0x15>;
  1835. brcm,pull = <0x00>;
  1836. phandle = <0xf3>;
  1837. };
  1838.  
  1839. spi2_gpio40 {
  1840. brcm,function = <0x03>;
  1841. brcm,pins = <0x28 0x29 0x2a 0x2b 0x2c 0x2d>;
  1842. phandle = <0x5d>;
  1843. };
  1844.  
  1845. spi2_gpio46 {
  1846. phandle = <0x89>;
  1847.  
  1848. pins-spi {
  1849. function = "alt5";
  1850. pins = "gpio46\0gpio47\0gpio48\0gpio49\0gpio50";
  1851. };
  1852. };
  1853.  
  1854. spi3_cs_pins {
  1855. brcm,function = <0x01>;
  1856. brcm,pins = <0x00 0x18>;
  1857. phandle = <0xa1>;
  1858. };
  1859.  
  1860. spi3_gpio0 {
  1861. phandle = <0x8a>;
  1862.  
  1863. pins-spi {
  1864. function = "alt3";
  1865. pins = "gpio0\0gpio1\0gpio2\0gpio3";
  1866. };
  1867. };
  1868.  
  1869. spi3_pins {
  1870. brcm,function = <0x07>;
  1871. brcm,pins = <0x01 0x02 0x03>;
  1872. phandle = <0xa0>;
  1873. };
  1874.  
  1875. spi4_cs_pins {
  1876. brcm,function = <0x01>;
  1877. brcm,pins = <0x04 0x19>;
  1878. phandle = <0xa3>;
  1879. };
  1880.  
  1881. spi4_gpio4 {
  1882. phandle = <0x8b>;
  1883.  
  1884. pins-spi {
  1885. function = "alt3";
  1886. pins = "gpio4\0gpio5\0gpio6\0gpio7";
  1887. };
  1888. };
  1889.  
  1890. spi4_pins {
  1891. brcm,function = <0x07>;
  1892. brcm,pins = <0x05 0x06 0x07>;
  1893. phandle = <0xa2>;
  1894. };
  1895.  
  1896. spi5_cs_pins {
  1897. brcm,function = <0x01>;
  1898. brcm,pins = <0x0c 0x1a>;
  1899. phandle = <0xa5>;
  1900. };
  1901.  
  1902. spi5_gpio12 {
  1903. phandle = <0x8c>;
  1904.  
  1905. pins-spi {
  1906. function = "alt3";
  1907. pins = "gpio12\0gpio13\0gpio14\0gpio15";
  1908. };
  1909. };
  1910.  
  1911. spi5_pins {
  1912. brcm,function = <0x07>;
  1913. brcm,pins = <0x0d 0x0e 0x0f>;
  1914. phandle = <0xa4>;
  1915. };
  1916.  
  1917. spi6_cs_pins {
  1918. brcm,function = <0x01>;
  1919. brcm,pins = <0x12 0x1b>;
  1920. phandle = <0xa7>;
  1921. };
  1922.  
  1923. spi6_gpio18 {
  1924. phandle = <0x8d>;
  1925.  
  1926. pins-spi {
  1927. function = "alt3";
  1928. pins = "gpio18\0gpio19\0gpio20\0gpio21";
  1929. };
  1930. };
  1931.  
  1932. spi6_pins {
  1933. brcm,function = <0x07>;
  1934. brcm,pins = <0x13 0x14 0x15>;
  1935. phandle = <0xa6>;
  1936. };
  1937.  
  1938. tpm_pins {
  1939. brcm,function = <0x00>;
  1940. brcm,pins = <0x0a>;
  1941. brcm,pull = <0x00>;
  1942. phandle = <0xf5>;
  1943. };
  1944.  
  1945. uart0_ctsrts_gpio16 {
  1946. brcm,function = <0x07>;
  1947. brcm,pins = <0x10 0x11>;
  1948. phandle = <0x5f>;
  1949. };
  1950.  
  1951. uart0_ctsrts_gpio30 {
  1952. brcm,function = <0x07>;
  1953. brcm,pins = <0x1e 0x1f>;
  1954. brcm,pull = <0x02 0x00>;
  1955. phandle = <0x60>;
  1956. };
  1957.  
  1958. uart0_ctsrts_gpio38 {
  1959. brcm,function = <0x06>;
  1960. brcm,pins = <0x26 0x27>;
  1961. phandle = <0x63>;
  1962. };
  1963.  
  1964. uart0_gpio14 {
  1965. brcm,function = <0x04>;
  1966. brcm,pins = <0x0e 0x0f>;
  1967. phandle = <0x5e>;
  1968. };
  1969.  
  1970. uart0_gpio32 {
  1971. brcm,function = <0x07>;
  1972. brcm,pins = <0x20 0x21>;
  1973. brcm,pull = <0x00 0x02>;
  1974. phandle = <0x61>;
  1975. };
  1976.  
  1977. uart0_gpio36 {
  1978. brcm,function = <0x06>;
  1979. brcm,pins = <0x24 0x25>;
  1980. phandle = <0x62>;
  1981. };
  1982.  
  1983. uart0_pins {
  1984. brcm,function = <0x07>;
  1985. brcm,pins = <0x1e 0x1f 0x20 0x21>;
  1986. brcm,pull = <0x02 0x00 0x00 0x02>;
  1987. phandle = <0x09>;
  1988. };
  1989.  
  1990. uart1_ctsrts_gpio16 {
  1991. brcm,function = <0x02>;
  1992. brcm,pins = <0x10 0x11>;
  1993. phandle = <0x65>;
  1994. };
  1995.  
  1996. uart1_ctsrts_gpio30 {
  1997. brcm,function = <0x02>;
  1998. brcm,pins = <0x1e 0x1f>;
  1999. phandle = <0x67>;
  2000. };
  2001.  
  2002. uart1_ctsrts_gpio42 {
  2003. brcm,function = <0x02>;
  2004. brcm,pins = <0x2a 0x2b>;
  2005. phandle = <0x69>;
  2006. };
  2007.  
  2008. uart1_gpio14 {
  2009. brcm,function = <0x02>;
  2010. brcm,pins = <0x0e 0x0f>;
  2011. phandle = <0x64>;
  2012. };
  2013.  
  2014. uart1_gpio32 {
  2015. brcm,function = <0x02>;
  2016. brcm,pins = <0x20 0x21>;
  2017. phandle = <0x66>;
  2018. };
  2019.  
  2020. uart1_gpio40 {
  2021. brcm,function = <0x02>;
  2022. brcm,pins = <0x28 0x29>;
  2023. phandle = <0x68>;
  2024. };
  2025.  
  2026. uart1_pins {
  2027. brcm,function;
  2028. brcm,pins;
  2029. brcm,pull;
  2030. phandle = <0x15>;
  2031. };
  2032.  
  2033. uart2_ctsrts_gpio2 {
  2034. phandle = <0x8f>;
  2035.  
  2036. pin-cts {
  2037. bias-pull-up;
  2038. function = "alt4";
  2039. pins = "gpio2";
  2040. };
  2041.  
  2042. pin-rts {
  2043. bias-disable;
  2044. function = "alt4";
  2045. pins = "gpio3";
  2046. };
  2047. };
  2048.  
  2049. uart2_gpio0 {
  2050. phandle = <0x8e>;
  2051.  
  2052. pin-rx {
  2053. bias-pull-up;
  2054. function = "alt4";
  2055. pins = "gpio1";
  2056. };
  2057.  
  2058. pin-tx {
  2059. bias-disable;
  2060. function = "alt4";
  2061. pins = "gpio0";
  2062. };
  2063. };
  2064.  
  2065. uart2_pins {
  2066. brcm,function = <0x03>;
  2067. brcm,pins = <0x00 0x01>;
  2068. brcm,pull = <0x00 0x02>;
  2069. phandle = <0xad>;
  2070. };
  2071.  
  2072. uart3_ctsrts_gpio6 {
  2073. phandle = <0x91>;
  2074.  
  2075. pin-cts {
  2076. bias-pull-up;
  2077. function = "alt4";
  2078. pins = "gpio6";
  2079. };
  2080.  
  2081. pin-rts {
  2082. bias-disable;
  2083. function = "alt4";
  2084. pins = "gpio7";
  2085. };
  2086. };
  2087.  
  2088. uart3_gpio4 {
  2089. phandle = <0x90>;
  2090.  
  2091. pin-rx {
  2092. bias-pull-up;
  2093. function = "alt4";
  2094. pins = "gpio5";
  2095. };
  2096.  
  2097. pin-tx {
  2098. bias-disable;
  2099. function = "alt4";
  2100. pins = "gpio4";
  2101. };
  2102. };
  2103.  
  2104. uart3_pins {
  2105. brcm,function = <0x03>;
  2106. brcm,pins = <0x04 0x05>;
  2107. brcm,pull = <0x00 0x02>;
  2108. phandle = <0xae>;
  2109. };
  2110.  
  2111. uart4_ctsrts_gpio10 {
  2112. phandle = <0x93>;
  2113.  
  2114. pin-cts {
  2115. bias-pull-up;
  2116. function = "alt4";
  2117. pins = "gpio10";
  2118. };
  2119.  
  2120. pin-rts {
  2121. bias-disable;
  2122. function = "alt4";
  2123. pins = "gpio11";
  2124. };
  2125. };
  2126.  
  2127. uart4_gpio8 {
  2128. phandle = <0x92>;
  2129.  
  2130. pin-rx {
  2131. bias-pull-up;
  2132. function = "alt4";
  2133. pins = "gpio9";
  2134. };
  2135.  
  2136. pin-tx {
  2137. bias-disable;
  2138. function = "alt4";
  2139. pins = "gpio8";
  2140. };
  2141. };
  2142.  
  2143. uart4_pins {
  2144. brcm,function = <0x03>;
  2145. brcm,pins = <0x08 0x09>;
  2146. brcm,pull = <0x00 0x02>;
  2147. phandle = <0xaf>;
  2148. };
  2149.  
  2150. uart5_ctsrts_gpio14 {
  2151. phandle = <0x95>;
  2152.  
  2153. pin-cts {
  2154. bias-pull-up;
  2155. function = "alt4";
  2156. pins = "gpio14";
  2157. };
  2158.  
  2159. pin-rts {
  2160. bias-disable;
  2161. function = "alt4";
  2162. pins = "gpio15";
  2163. };
  2164. };
  2165.  
  2166. uart5_gpio12 {
  2167. phandle = <0x94>;
  2168.  
  2169. pin-rx {
  2170. bias-pull-up;
  2171. function = "alt4";
  2172. pins = "gpio13";
  2173. };
  2174.  
  2175. pin-tx {
  2176. bias-disable;
  2177. function = "alt4";
  2178. pins = "gpio12";
  2179. };
  2180. };
  2181.  
  2182. uart5_pins {
  2183. brcm,function = <0x03>;
  2184. brcm,pins = <0x0c 0x0d>;
  2185. brcm,pull = <0x00 0x02>;
  2186. phandle = <0xb0>;
  2187. };
  2188. };
  2189.  
  2190. gpiomem {
  2191. compatible = "brcm,bcm2835-gpiomem";
  2192. reg = <0x7e200000 0x1000>;
  2193. };
  2194.  
  2195. hdmi@7ef00700 {
  2196. clock-names = "hdmi\0bvb\0audio\0cec";
  2197. clocks = <0x17 0x0d 0x17 0x0e 0x1e 0x00 0x1f>;
  2198. compatible = "brcm,bcm2711-hdmi0";
  2199. ddc = <0x21>;
  2200. dma-names = "audio-rx";
  2201. dmas = <0x0c 0x9fa000a>;
  2202. interrupt-names = "cec-tx\0cec-rx\0cec-low\0wakeup\0hpd-connected\0hpd-removed";
  2203. interrupt-parent = <0x20>;
  2204. interrupts = <0x00 0x01 0x02 0x03 0x04 0x05>;
  2205. phandle = <0xd1>;
  2206. reg = <0x7ef00700 0x300 0x7ef00300 0x200 0x7ef00f00 0x80 0x7ef00f80 0x80 0x7ef01b00 0x200 0x7ef01f00 0x400 0x7ef00200 0x80 0x7ef04300 0x100 0x7ef20000 0x100 0x7ef00100 0x30>;
  2207. reg-names = "hdmi\0dvp\0phy\0rm\0packet\0metadata\0csc\0cec\0hd\0intr2";
  2208. resets = <0x1e 0x00>;
  2209. status = "disabled";
  2210. wifi-2.4ghz-coexistence;
  2211. };
  2212.  
  2213. hdmi@7ef05700 {
  2214. clock-names = "hdmi\0bvb\0audio\0cec";
  2215. clocks = <0x17 0x0d 0x17 0x0e 0x1e 0x01 0x1f>;
  2216. compatible = "brcm,bcm2711-hdmi1";
  2217. ddc = <0x22>;
  2218. dma-names = "audio-rx";
  2219. dmas = <0x0c 0x9fa0011>;
  2220. interrupt-names = "cec-tx\0cec-rx\0cec-low\0wakeup\0hpd-connected\0hpd-removed";
  2221. interrupt-parent = <0x20>;
  2222. interrupts = <0x08 0x07 0x06 0x09 0x0a 0x0b>;
  2223. phandle = <0xd2>;
  2224. reg = <0x7ef05700 0x300 0x7ef05300 0x200 0x7ef05f00 0x80 0x7ef05f80 0x80 0x7ef06b00 0x200 0x7ef06f00 0x400 0x7ef00280 0x80 0x7ef09300 0x100 0x7ef20000 0x100 0x7ef00100 0x30>;
  2225. reg-names = "hdmi\0dvp\0phy\0rm\0packet\0metadata\0csc\0cec\0hd\0intr2";
  2226. resets = <0x1e 0x01>;
  2227. status = "disabled";
  2228. wifi-2.4ghz-coexistence;
  2229. };
  2230.  
  2231. hvs@7e400000 {
  2232. clocks = <0x17 0x04>;
  2233. compatible = "brcm,bcm2711-hvs";
  2234. interrupts = <0x00 0x61 0x04>;
  2235. phandle = <0xba>;
  2236. reg = <0x7e400000 0x8000>;
  2237. status = "disabled";
  2238. };
  2239.  
  2240. i2c0mux {
  2241. #address-cells = <0x01>;
  2242. #size-cells = <0x00>;
  2243. compatible = "i2c-mux-pinctrl";
  2244. i2c-parent = <0x10>;
  2245. phandle = <0x34>;
  2246. pinctrl-0 = <0x11>;
  2247. pinctrl-1 = <0x12>;
  2248. pinctrl-names = "i2c0\0i2c_csi_dsi";
  2249. status = "disabled";
  2250.  
  2251. i2c@0 {
  2252. #address-cells = <0x01>;
  2253. #size-cells = <0x00>;
  2254. phandle = <0xb3>;
  2255. reg = <0x00>;
  2256. };
  2257.  
  2258. i2c@1 {
  2259. #address-cells = <0x01>;
  2260. #size-cells = <0x00>;
  2261. phandle = <0xb4>;
  2262. reg = <0x01>;
  2263. };
  2264. };
  2265.  
  2266. i2c@7e205000 {
  2267. #address-cells = <0x01>;
  2268. #size-cells = <0x00>;
  2269. clock-frequency = <0x186a0>;
  2270. clocks = <0x08 0x14>;
  2271. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  2272. interrupts = <0x00 0x75 0x04>;
  2273. phandle = <0x10>;
  2274. reg = <0x7e205000 0x200>;
  2275. status = "disabled";
  2276. };
  2277.  
  2278. i2c@7e205600 {
  2279. #address-cells = <0x01>;
  2280. #size-cells = <0x00>;
  2281. clocks = <0x08 0x14>;
  2282. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  2283. interrupts = <0x00 0x75 0x04>;
  2284. phandle = <0xc6>;
  2285. reg = <0x7e205600 0x200>;
  2286. status = "disabled";
  2287. };
  2288.  
  2289. i2c@7e205800 {
  2290. #address-cells = <0x01>;
  2291. #size-cells = <0x00>;
  2292. clocks = <0x08 0x14>;
  2293. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  2294. interrupts = <0x00 0x75 0x04>;
  2295. phandle = <0xc7>;
  2296. reg = <0x7e205800 0x200>;
  2297. status = "disabled";
  2298. };
  2299.  
  2300. i2c@7e205a00 {
  2301. #address-cells = <0x01>;
  2302. #size-cells = <0x00>;
  2303. clocks = <0x08 0x14>;
  2304. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  2305. interrupts = <0x00 0x75 0x04>;
  2306. phandle = <0xc8>;
  2307. reg = <0x7e205a00 0x200>;
  2308. status = "disabled";
  2309. };
  2310.  
  2311. i2c@7e205c00 {
  2312. #address-cells = <0x01>;
  2313. #size-cells = <0x00>;
  2314. clocks = <0x08 0x14>;
  2315. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  2316. interrupts = <0x00 0x75 0x04>;
  2317. phandle = <0xc9>;
  2318. reg = <0x7e205c00 0x200>;
  2319. status = "disabled";
  2320. };
  2321.  
  2322. i2c@7e804000 {
  2323. #address-cells = <0x01>;
  2324. #size-cells = <0x00>;
  2325. clock-frequency = <0x61a80>;
  2326. clocks = <0x08 0x14>;
  2327. compatible = "brcm,bcm2711-i2c\0brcm,bcm2835-i2c";
  2328. interrupts = <0x00 0x75 0x04>;
  2329. phandle = <0x35>;
  2330. pinctrl-0 = <0x18>;
  2331. pinctrl-names = "default";
  2332. reg = <0x7e804000 0x1000>;
  2333. status = "okay";
  2334.  
  2335. gpio@21 {
  2336. #gpio-cells = <0x02>;
  2337. #interrupt-cells = <0x02>;
  2338. compatible = "nxp,pcal6416";
  2339. gpio-controller;
  2340. interrupt-controller;
  2341. interrupt-parent = <0x07>;
  2342. interrupts = <0x09 0x08>;
  2343. phandle = <0xef>;
  2344. pinctrl-0 = <0xf1>;
  2345. pinctrl-names = "default";
  2346. reg = <0x21>;
  2347. status = "okay";
  2348. };
  2349.  
  2350. gpio@22 {
  2351. #gpio-cells = <0x02>;
  2352. #interrupt-cells = <0x02>;
  2353. compatible = "nxp,pcal6524";
  2354. gpio-controller;
  2355. interrupt-controller;
  2356. interrupt-parent = <0x07>;
  2357. interrupts = <0x08 0x08>;
  2358. phandle = <0xee>;
  2359. pinctrl-0 = <0xf2>;
  2360. pinctrl-names = "default";
  2361. reg = <0x22>;
  2362. status = "okay";
  2363. };
  2364.  
  2365. pcie@38 {
  2366. reg = <0x38>;
  2367. status = "disabled";
  2368. };
  2369.  
  2370. rtc@51 {
  2371. compatible = "nxp,pcf2129";
  2372. reg = <0x51>;
  2373. reset-source;
  2374. status = "okay";
  2375. };
  2376. };
  2377.  
  2378. i2c@7ef04500 {
  2379. clock-frequency = <0x17cdc>;
  2380. compatible = "brcm,bcm2711-hdmi-i2c";
  2381. phandle = <0x21>;
  2382. reg = <0x7ef04500 0x100 0x7ef00b00 0x300>;
  2383. reg-names = "bsc\0auto-i2c";
  2384. status = "disabled";
  2385. };
  2386.  
  2387. i2c@7ef09500 {
  2388. clock-frequency = <0x17cdc>;
  2389. compatible = "brcm,bcm2711-hdmi-i2c";
  2390. phandle = <0x22>;
  2391. reg = <0x7ef09500 0x100 0x7ef05b00 0x300>;
  2392. reg-names = "bsc\0auto-i2c";
  2393. status = "disabled";
  2394. };
  2395.  
  2396. i2s@7e203000 {
  2397. #sound-dai-cells = <0x00>;
  2398. clocks = <0x08 0x1f>;
  2399. compatible = "brcm,bcm2835-i2s";
  2400. dma-names = "tx\0rx";
  2401. dmas = <0x0c 0x02 0x0c 0x03>;
  2402. phandle = <0x32>;
  2403. pinctrl-0 = <0x0d>;
  2404. pinctrl-names = "default";
  2405. reg = <0x7e203000 0x24>;
  2406. status = "disabled";
  2407. };
  2408.  
  2409. interrupt-controller@40041000 {
  2410. #interrupt-cells = <0x03>;
  2411. compatible = "arm,gic-400";
  2412. interrupt-controller;
  2413. interrupts = <0x01 0x09 0xf04>;
  2414. phandle = <0x01>;
  2415. reg = <0x40041000 0x1000 0x40042000 0x2000 0x40044000 0x2000 0x40046000 0x2000>;
  2416. };
  2417.  
  2418. interrupt-controller@7ef00100 {
  2419. #interrupt-cells = <0x01>;
  2420. compatible = "brcm,bcm2711-l2-intc\0brcm,l2-intc";
  2421. interrupt-controller;
  2422. interrupts = <0x00 0x60 0x01>;
  2423. phandle = <0x20>;
  2424. reg = <0x7ef00100 0x30>;
  2425. status = "disabled";
  2426. };
  2427.  
  2428. local_intc@40000000 {
  2429. compatible = "brcm,bcm2836-l1-intc";
  2430. phandle = <0xbc>;
  2431. reg = <0x40000000 0x100>;
  2432. };
  2433.  
  2434. mailbox@7e00b840 {
  2435. compatible = "brcm,bcm2711-vchiq";
  2436. interrupts = <0x00 0x22 0x04>;
  2437. phandle = <0xd5>;
  2438. reg = <0x7e00b840 0x3c>;
  2439.  
  2440. bcm2835_audio {
  2441. brcm,disable-headphones = <0x01>;
  2442. brcm,firmware = <0x06>;
  2443. brcm,pwm-channels = <0x08>;
  2444. compatible = "brcm,bcm2835-audio";
  2445. phandle = <0x36>;
  2446. pinctrl-0 = <0x24>;
  2447. pinctrl-names = "default";
  2448. status = "okay";
  2449. };
  2450. };
  2451.  
  2452. mailbox@7e00b880 {
  2453. #mbox-cells = <0x00>;
  2454. compatible = "brcm,bcm2835-mbox";
  2455. interrupts = <0x00 0x21 0x04>;
  2456. phandle = <0x23>;
  2457. reg = <0x7e00b880 0x40>;
  2458. };
  2459.  
  2460. mmc@7e202000 {
  2461. brcm,overclock-50 = <0x00>;
  2462. brcm,pio-limit = <0x01>;
  2463. bus-width = <0x04>;
  2464. clocks = <0x08 0x14>;
  2465. compatible = "brcm,bcm2835-sdhost";
  2466. dma-names = "rx-tx";
  2467. dmas = <0x0c 0x2000000d>;
  2468. firmware = <0x06>;
  2469. interrupts = <0x00 0x78 0x04>;
  2470. phandle = <0x39>;
  2471. reg = <0x7e202000 0x100>;
  2472. status = "disabled";
  2473. };
  2474.  
  2475. mmc@7e300000 {
  2476. brcm,overclock-50 = <0x00>;
  2477. bus-width = <0x04>;
  2478. clocks = <0x08 0x1c>;
  2479. compatible = "brcm,bcm2835-mmc\0brcm,bcm2835-sdhci";
  2480. dma-names = "rx-tx";
  2481. dmas = <0x0c 0x0b>;
  2482. interrupts = <0x00 0x7e 0x04>;
  2483. phandle = <0x3a>;
  2484. pinctrl-0 = <0x16>;
  2485. pinctrl-names = "default";
  2486. reg = <0x7e300000 0x100>;
  2487. status = "disabled";
  2488. };
  2489.  
  2490. mmcnr@7e300000 {
  2491. brcm,overclock-50 = <0x00>;
  2492. bus-width = <0x04>;
  2493. clocks = <0x08 0x1c>;
  2494. compatible = "brcm,bcm2835-mmc\0brcm,bcm2835-sdhci";
  2495. dma-names = "rx-tx";
  2496. dmas = <0x0c 0x0b>;
  2497. interrupts = <0x00 0x7e 0x04>;
  2498. non-removable;
  2499. phandle = <0x3b>;
  2500. pinctrl-0 = <0x25>;
  2501. pinctrl-names = "default";
  2502. reg = <0x7e300000 0x100>;
  2503. status = "okay";
  2504. };
  2505.  
  2506. pixelvalve@7e206000 {
  2507. compatible = "brcm,bcm2711-pixelvalve0";
  2508. interrupts = <0x00 0x6d 0x04>;
  2509. phandle = <0xca>;
  2510. reg = <0x7e206000 0x100>;
  2511. status = "disabled";
  2512. };
  2513.  
  2514. pixelvalve@7e207000 {
  2515. compatible = "brcm,bcm2711-pixelvalve1";
  2516. interrupts = <0x00 0x6e 0x04>;
  2517. phandle = <0xcb>;
  2518. reg = <0x7e207000 0x100>;
  2519. status = "disabled";
  2520. };
  2521.  
  2522. pixelvalve@7e20a000 {
  2523. compatible = "brcm,bcm2711-pixelvalve2";
  2524. interrupts = <0x00 0x65 0x04>;
  2525. phandle = <0xcc>;
  2526. reg = <0x7e20a000 0x100>;
  2527. status = "disabled";
  2528. };
  2529.  
  2530. pixelvalve@7e216000 {
  2531. compatible = "brcm,bcm2711-pixelvalve4";
  2532. interrupts = <0x00 0x6e 0x04>;
  2533. phandle = <0xce>;
  2534. reg = <0x7e216000 0x100>;
  2535. status = "disabled";
  2536. };
  2537.  
  2538. pixelvalve@7ec12000 {
  2539. compatible = "brcm,bcm2711-pixelvalve3";
  2540. interrupts = <0x00 0x6a 0x04>;
  2541. phandle = <0xcf>;
  2542. reg = <0x7ec12000 0x100>;
  2543. status = "disabled";
  2544. };
  2545.  
  2546. power {
  2547. #power-domain-cells = <0x01>;
  2548. compatible = "raspberrypi,bcm2835-power";
  2549. firmware = <0x06>;
  2550. phandle = <0x13>;
  2551. };
  2552.  
  2553. pwm@7e20c000 {
  2554. #pwm-cells = <0x02>;
  2555. assigned-clock-rates = <0x989680>;
  2556. assigned-clocks = <0x08 0x1e>;
  2557. clocks = <0x08 0x1e>;
  2558. compatible = "brcm,bcm2835-pwm";
  2559. phandle = <0xb9>;
  2560. reg = <0x7e20c000 0x28>;
  2561. status = "disabled";
  2562. };
  2563.  
  2564. pwm@7e20c800 {
  2565. #pwm-cells = <0x02>;
  2566. assigned-clock-rates = <0x989680>;
  2567. assigned-clocks = <0x08 0x1e>;
  2568. clocks = <0x08 0x1e>;
  2569. compatible = "brcm,bcm2835-pwm";
  2570. phandle = <0xcd>;
  2571. pinctrl-0 = <0x1b 0x1c>;
  2572. pinctrl-names = "default";
  2573. reg = <0x7e20c800 0x28>;
  2574. status = "disabled";
  2575. };
  2576.  
  2577. rng@7e104000 {
  2578. compatible = "brcm,bcm2711-rng200";
  2579. phandle = <0x38>;
  2580. reg = <0x7e104000 0x28>;
  2581. status = "okay";
  2582. };
  2583.  
  2584. serial@7e201000 {
  2585. arm,primecell-periphid = <0x241011>;
  2586. clock-names = "uartclk\0apb_pclk";
  2587. clocks = <0x08 0x13 0x08 0x14>;
  2588. compatible = "arm,pl011\0arm,primecell";
  2589. cts-event-workaround;
  2590. interrupts = <0x00 0x79 0x04>;
  2591. phandle = <0x30>;
  2592. pinctrl-0 = <0x09 0x0a>;
  2593. pinctrl-names = "default";
  2594. reg = <0x7e201000 0x200>;
  2595. skip-init;
  2596. status = "okay";
  2597. uart-has-rtscts;
  2598.  
  2599. bluetooth {
  2600. compatible = "brcm,bcm43438-bt";
  2601. max-speed = <0x2dc6c0>;
  2602. phandle = <0x2f>;
  2603. shutdown-gpios = <0x0b 0x00 0x00>;
  2604. status = "disabled";
  2605. };
  2606. };
  2607.  
  2608. serial@7e201400 {
  2609. arm,primecell-periphid = <0x241011>;
  2610. clock-names = "uartclk\0apb_pclk";
  2611. clocks = <0x08 0x13 0x08 0x14>;
  2612. compatible = "arm,pl011\0arm,primecell";
  2613. interrupts = <0x00 0x79 0x04>;
  2614. phandle = <0xbe>;
  2615. reg = <0x7e201400 0x200>;
  2616. status = "disabled";
  2617. };
  2618.  
  2619. serial@7e201600 {
  2620. arm,primecell-periphid = <0x241011>;
  2621. clock-names = "uartclk\0apb_pclk";
  2622. clocks = <0x08 0x13 0x08 0x14>;
  2623. compatible = "arm,pl011\0arm,primecell";
  2624. interrupts = <0x00 0x79 0x04>;
  2625. linux,rs485-enabled-at-boot-time;
  2626. phandle = <0xbf>;
  2627. pinctrl-0 = <0xf7>;
  2628. pinctrl-names = "default";
  2629. reg = <0x7e201600 0x200>;
  2630. status = "okay";
  2631. };
  2632.  
  2633. serial@7e201800 {
  2634. arm,primecell-periphid = <0x241011>;
  2635. clock-names = "uartclk\0apb_pclk";
  2636. clocks = <0x08 0x13 0x08 0x14>;
  2637. compatible = "arm,pl011\0arm,primecell";
  2638. interrupts = <0x00 0x79 0x04>;
  2639. phandle = <0xc0>;
  2640. reg = <0x7e201800 0x200>;
  2641. status = "disabled";
  2642. };
  2643.  
  2644. serial@7e201a00 {
  2645. arm,primecell-periphid = <0x241011>;
  2646. clock-names = "uartclk\0apb_pclk";
  2647. clocks = <0x08 0x13 0x08 0x14>;
  2648. compatible = "arm,pl011\0arm,primecell";
  2649. interrupts = <0x00 0x79 0x04>;
  2650. linux,rs485-enabled-at-boot-time;
  2651. phandle = <0xc1>;
  2652. pinctrl-0 = <0xf6>;
  2653. pinctrl-names = "default";
  2654. reg = <0x7e201a00 0x200>;
  2655. rs485-rts-active-low;
  2656. rs485-term-gpios = <0xef 0x04 0x01>;
  2657. status = "okay";
  2658. };
  2659.  
  2660. serial@7e215040 {
  2661. clocks = <0x14 0x00>;
  2662. compatible = "brcm,bcm2835-aux-uart";
  2663. interrupts = <0x00 0x5d 0x04>;
  2664. phandle = <0x31>;
  2665. pinctrl-0 = <0xf8>;
  2666. pinctrl-names = "default";
  2667. reg = <0x7e215040 0x40>;
  2668. skip-init;
  2669. status = "disabled";
  2670.  
  2671. bluetooth {
  2672. compatible = "brcm,bcm43438-bt";
  2673. max-speed = "\0\a\b";
  2674. phandle = <0xb6>;
  2675. shutdown-gpios = <0x0b 0x00 0x00>;
  2676. status = "disabled";
  2677. };
  2678. };
  2679.  
  2680. smi@7e600000 {
  2681. assigned-clock-rates = <0x7735940>;
  2682. assigned-clocks = <0x08 0x2a>;
  2683. clocks = <0x08 0x2a>;
  2684. compatible = "brcm,bcm2835-smi";
  2685. dma-names = "rx-tx";
  2686. dmas = <0x0c 0x04>;
  2687. interrupts = <0x00 0x70 0x04>;
  2688. phandle = <0xd7>;
  2689. reg = <0x7e600000 0x100>;
  2690. status = "disabled";
  2691. };
  2692.  
  2693. sound {
  2694. phandle = <0xdb>;
  2695. status = "disabled";
  2696. };
  2697.  
  2698. spi@7e204000 {
  2699. #address-cells = <0x01>;
  2700. #size-cells = <0x00>;
  2701. clocks = <0x08 0x14>;
  2702. compatible = "brcm,bcm2835-spi";
  2703. cs-gpios = <0x07 0x08 0x01 0x07 0x07 0x01>;
  2704. dma-names = "tx\0rx";
  2705. dmas = <0x0c 0x06 0x0c 0x07>;
  2706. interrupts = <0x00 0x76 0x04>;
  2707. phandle = <0x33>;
  2708. pinctrl-0 = <0x0e 0x0f>;
  2709. pinctrl-names = "default";
  2710. reg = <0x7e204000 0x200>;
  2711. status = "disabled";
  2712.  
  2713. spidev@0 {
  2714. #address-cells = <0x01>;
  2715. #size-cells = <0x00>;
  2716. compatible = "spidev";
  2717. phandle = <0xb1>;
  2718. reg = <0x00>;
  2719. spi-max-frequency = <0x7735940>;
  2720. };
  2721.  
  2722. spidev@1 {
  2723. #address-cells = <0x01>;
  2724. #size-cells = <0x00>;
  2725. compatible = "spidev";
  2726. phandle = <0xb2>;
  2727. reg = <0x01>;
  2728. spi-max-frequency = <0x7735940>;
  2729. };
  2730. };
  2731.  
  2732. spi@7e204600 {
  2733. #address-cells = <0x01>;
  2734. #size-cells = <0x00>;
  2735. clocks = <0x08 0x14>;
  2736. compatible = "brcm,bcm2835-spi";
  2737. interrupts = <0x00 0x76 0x04>;
  2738. phandle = <0xc2>;
  2739. reg = <0x7e204600 0x200>;
  2740. status = "disabled";
  2741. };
  2742.  
  2743. spi@7e204800 {
  2744. #address-cells = <0x01>;
  2745. #size-cells = <0x00>;
  2746. clocks = <0x08 0x14>;
  2747. compatible = "brcm,bcm2835-spi";
  2748. interrupts = <0x00 0x76 0x04>;
  2749. phandle = <0xc3>;
  2750. reg = <0x7e204800 0x200>;
  2751. status = "disabled";
  2752. };
  2753.  
  2754. spi@7e204a00 {
  2755. #address-cells = <0x01>;
  2756. #size-cells = <0x00>;
  2757. clocks = <0x08 0x14>;
  2758. compatible = "brcm,bcm2835-spi";
  2759. interrupts = <0x00 0x76 0x04>;
  2760. phandle = <0xc4>;
  2761. reg = <0x7e204a00 0x200>;
  2762. status = "disabled";
  2763. };
  2764.  
  2765. spi@7e204c00 {
  2766. #address-cells = <0x01>;
  2767. #size-cells = <0x00>;
  2768. clocks = <0x08 0x14>;
  2769. compatible = "brcm,bcm2835-spi";
  2770. interrupts = <0x00 0x76 0x04>;
  2771. phandle = <0xc5>;
  2772. reg = <0x7e204c00 0x200>;
  2773. status = "disabled";
  2774. };
  2775.  
  2776. spi@7e215080 {
  2777. #address-cells = <0x01>;
  2778. #size-cells = <0x00>;
  2779. clocks = <0x14 0x01>;
  2780. compatible = "brcm,bcm2835-aux-spi";
  2781. cs-gpios = <0x07 0x12 0x01>;
  2782. interrupts = <0x00 0x5d 0x04>;
  2783. phandle = <0xb7>;
  2784. pinctrl-0 = <0xf3 0xf4>;
  2785. pinctrl-names = "default";
  2786. reg = <0x7e215080 0x40>;
  2787. status = "okay";
  2788.  
  2789. tpm@0 {
  2790. #interrupt-cells = <0x02>;
  2791. compatible = "infineon,slb9670";
  2792. interrupt-parent = <0x07>;
  2793. interrupts = <0x0a 0x08>;
  2794. phandle = <0xf9>;
  2795. pinctrl-0 = <0xf5>;
  2796. pinctrl-names = "default";
  2797. reg = <0x00>;
  2798. spi-max-frequency = <0xf4240>;
  2799. status = "okay";
  2800. };
  2801. };
  2802.  
  2803. spi@7e2150c0 {
  2804. #address-cells = <0x01>;
  2805. #size-cells = <0x00>;
  2806. clocks = <0x14 0x02>;
  2807. compatible = "brcm,bcm2835-aux-spi";
  2808. interrupts = <0x00 0x5d 0x04>;
  2809. phandle = <0xb8>;
  2810. reg = <0x7e2150c0 0x40>;
  2811. status = "disabled";
  2812. };
  2813.  
  2814. timer@7e003000 {
  2815. clock-frequency = <0xf4240>;
  2816. compatible = "brcm,bcm2835-system-timer";
  2817. interrupts = <0x00 0x40 0x04 0x00 0x41 0x04 0x00 0x42 0x04 0x00 0x43 0x04>;
  2818. phandle = <0x48>;
  2819. reg = <0x7e003000 0x1000>;
  2820. };
  2821.  
  2822. txp@7e004000 {
  2823. compatible = "brcm,bcm2835-txp";
  2824. interrupts = <0x00 0x4b 0x04>;
  2825. phandle = <0x49>;
  2826. reg = <0x7e004000 0x20>;
  2827. status = "disabled";
  2828. };
  2829.  
  2830. usb@7e980000 {
  2831. #address-cells = <0x01>;
  2832. #size-cells = <0x00>;
  2833. clock-names = "otg";
  2834. clocks = <0x19>;
  2835. compatible = "brcm,bcm2835-usb";
  2836. dr_mode = "host";
  2837. g-np-tx-fifo-size = <0x20>;
  2838. g-rx-fifo-size = <0x22e>;
  2839. g-tx-fifo-size = <0x200 0x200 0x200 0x200 0x200 0x100 0x100>;
  2840. interrupt-names = "usb\0soft";
  2841. interrupts = <0x00 0x49 0x04 0x00 0x28 0x04>;
  2842. phandle = <0xbb>;
  2843. phy-names = "usb2-phy";
  2844. phys = <0x1a>;
  2845. power-domains = <0x13 0x06>;
  2846. reg = <0x7e980000 0x10000 0x7e00b200 0x200>;
  2847. status = "okay";
  2848. };
  2849.  
  2850. vec@7ec13000 {
  2851. clocks = <0x17 0x0f>;
  2852. compatible = "brcm,bcm2711-vec";
  2853. interrupts = <0x00 0x7b 0x04>;
  2854. phandle = <0xd0>;
  2855. power-domains = <0x13 0x07>;
  2856. reg = <0x7ec13000 0x1000>;
  2857. status = "disabled";
  2858. };
  2859.  
  2860. watchdog@7e100000 {
  2861. #power-domain-cells = <0x01>;
  2862. #reset-cells = <0x01>;
  2863. clock-names = "v3d\0peri_image\0h264\0isp";
  2864. clocks = <0x08 0x15 0x08 0x1d 0x08 0x17 0x08 0x16>;
  2865. compatible = "brcm,bcm2835-pm\0brcm,bcm2835-pm-wdt";
  2866. phandle = <0x37>;
  2867. reg = <0x7e100000 0x114 0x7e00a000 0x24 0x7ec11000 0x20>;
  2868. system-power-controller;
  2869. };
  2870. };
  2871.  
  2872. system {
  2873. linux,revision = <0xb03140>;
  2874. linux,serial = <0x10000000 0x595f98c2>;
  2875. };
  2876.  
  2877. thermal-zones {
  2878.  
  2879. cpu-thermal {
  2880. coefficients = <0xfffffe19 0x641b8>;
  2881. phandle = <0x46>;
  2882. polling-delay = <0x3e8>;
  2883. polling-delay-passive = <0x00>;
  2884. thermal-sensors = <0x02>;
  2885.  
  2886. cooling-maps {
  2887. };
  2888. };
  2889. };
  2890.  
  2891. timer {
  2892. arm,cpu-registers-not-fw-configured;
  2893. compatible = "arm,armv8-timer";
  2894. interrupts = <0x01 0x0d 0xf08 0x01 0x0e 0xf08 0x01 0x0b 0xf08 0x01 0x0a 0xf08>;
  2895. };
  2896.  
  2897. v3dbus {
  2898. #address-cells = <0x01>;
  2899. #size-cells = <0x02>;
  2900. compatible = "simple-bus";
  2901. dma-ranges = <0x00 0x00 0x00 0x04 0x00>;
  2902. phandle = <0xeb>;
  2903. ranges = <0x7c500000 0x00 0xfc500000 0x00 0x3300000 0x40000000 0x00 0xff800000 0x00 0x800000>;
  2904.  
  2905. v3d@7ec04000 {
  2906. clocks = <0x17 0x05>;
  2907. clocks-names = "v3d";
  2908. compatible = "brcm,2711-v3d";
  2909. interrupts = <0x00 0x4a 0x04>;
  2910. phandle = <0xec>;
  2911. power-domains = <0x37 0x01>;
  2912. reg = <0x7ec00000 0x00 0x4000 0x7ec04000 0x00 0x4000>;
  2913. reg-names = "hub\0core0";
  2914. resets = <0x37 0x00>;
  2915. status = "disabled";
  2916. };
  2917. };
  2918. };
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