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Singh7765

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Nov 17th, 2019
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  1. // Enable Port J&N clock control]
  2.  
  3. # define SYSCTL_RCGCGPIO_R (*((volatile unsigned long *) 0x400FE608))
  4. # define SYSCTL_RCGCGPIO_GPIOJN 0x00001100
  5. // GPIO Port N, pin 1
  6.  
  7. # define GPIO_PORTN_DIR_R (*((volatile unsigned long *) 0x40064400))
  8. # define GPIO_PORTN_DEN_R (*((volatile unsigned long *) 0x4006451C))
  9. # define GPIO_PORTN_DATA_WR (*((volatile unsigned long *) 0x40064008)) // Bit-Specific For Pin 1
  10.  
  11. // GPIO Port J, pin 0 (Pin 1 from template)
  12.  
  13. # define GPIO_PORTJ_DIR_R (*((volatile unsigned long *) 0x40060400))
  14. # define GPIO_PORTJ_DEN_R (*((volatile unsigned long *) 0x4006051C))
  15. # define GPIO_PORTJ_PUR_R (*((volatile unsigned long *) 0x40060510)) // Input
  16. # define GPIO_PORTJ_DATA_RD (*((volatile unsigned long *) 0x40060004)) // Input_ Bit Specific for Pin 0
  17.  
  18. // Port pin definitions
  19.  
  20. # define GPIO_PORTJ_PIN0 0x01
  21. # define GPIO_PORTN_PIN1 0x02
  22.  
  23. // Default clock frequency and delay definition
  24. # define SYSTEM_CLOCK_FREQUENCY 16000000
  25. # define DELAY_VALUE SYSTEM_CLOCK_FREQUENCY/1000
  26.  
  27. // IRQ 32 to 63 Set Enable Register
  28. # define NVIC_EN1_R (*((volatile unsigned long *) 0xE000E104)) // NVIC Interrupt Enable (32-63) (0x104)
  29.  
  30. // NVIC interrupt enable configuration constant for Interrupt #51
  31. # define NVIC_EN1_INT51 0x00010000 // ??
  32.  
  33. // IRQ 48 to 51 Priority Register
  34. # define NVIC_PRI12_R (*((volatile unsigned long *) 0xE000E430)) // NVIC Interrupt Priority (0x430)
  35.  
  36. // GPIO Port J Interrupt Configuration
  37. # define GPIO_PORTJ_IS_R (*((volatile unsigned long *) 0x40060404)) // GPIO Interrupt Sense (0x404)
  38. # define GPIO_PORTJ_IBE_R (*((volatile unsigned long *) 0x40060408)) // GPIO Interrupt Both Edges (0x408)
  39. # define GPIO_PORTJ_IEV_R (*((volatile unsigned long *) 0x4006040C)) // GPIO Interrupt Event (0x40C)
  40. # define GPIO_PORTJ_IM_R (*((volatile unsigned long *) 0x40060410)) // GPIO Interrupt Mask (0x410)
  41. # define GPIO_PORTJ_ICR_R (*((volatile unsigned long *) 0x4006041C)) // GPIO Interrupt Clear (0x41C)
  42.  
  43.  
  44. // Function prototypes
  45.  
  46. volatile unsigned char SW2;
  47. void Delay ( unsigned long counter );
  48. void GPIOJ_Handler ( void );
  49.  
  50.  
  51. // user main program
  52. int main()
  53. {
  54. // Enable the clock for port J and N (Combined together from template given)
  55. SYSCTL_RCGCGPIO_R |= SYSCTL_RCGCGPIO_GPIOJN;
  56.  
  57. // Enable Ports J and N
  58. GPIO_PORTJ_DEN_R |= GPIO_PORTJ_PIN0 ;
  59. GPIO_PORTN_DEN_R |= GPIO_PORTN_PIN1 ;
  60.  
  61. // Set Pull-Up Resistor for Port J ONLY (Pin 0 = 0x01)
  62. GPIO_PORTJ_PUR_R |= 0x01;
  63.  
  64. // Set Port N Pin 1 as an Output
  65. GPIO_PORTN_DIR_R |= (GPIO_PORTN_PIN1);
  66.  
  67. // Interrupt Register Settings
  68.  
  69. GPIO_PORTJ_IS_R &= ~0x10; // Port J is edge-sensitive
  70. GPIO_PORTJ_IBE_R &= ~0x10; // Port J is not both edge sensitive
  71. GPIO_PORTJ_IEV_R &= ~0x10; // Port J responds to a falling edge event
  72. GPIO_PORTJ_IM_R |= 0x10; // Enable Interrupt on Port J
  73. GPIO_PORTJ_ICR_R = 0x10; // Clear Port J
  74.  
  75.  
  76. while(1) {
  77. }
  78.  
  79. }
  80. // Interrupt service routine for Port J
  81. void GPIOJ_Handler ( void )
  82. {
  83. GPIO_PORTJ_ICR_R = 0x10;
  84. SW2 = 1;
  85. }
  86. // Function Delay implements the delay
  87. void Delay ( unsigned long counter )
  88. {
  89. unsigned long i = 0;
  90. for (i =0; i < counter ; i ++) ;
  91. }
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