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- Subject: [PATCH] pci: Enable overrides for missing ACS capabilities (4.14+)
- This an updated version of Alex Williamson's patch from:
- https://lkml.org/lkml/2013/5/30/513
- Original commit message follows:
- ---
- PCIe ACS (Access Control Services) is the PCIe 2.0+ feature that
- allows us to control whether transactions are allowed to be redirected
- in various subnodes of a PCIe topology. For instance, if two
- endpoints are below a root port or downsteam switch port, the
- downstream port may optionally redirect transactions between the
- devices, bypassing upstream devices. The same can happen internally
- on multifunction devices. The transaction may never be visible to the
- upstream devices.
- One upstream device that we particularly care about is the IOMMU. If
- a redirection occurs in the topology below the IOMMU, then the IOMMU
- cannot provide isolation between devices. This is why the PCIe spec
- encourages topologies to include ACS support. Without it, we have to
- assume peer-to-peer DMA within a hierarchy can bypass IOMMU isolation.
- Unfortunately, far too many topologies do not support ACS to make this
- a steadfast requirement. Even the latest chipsets from Intel are only
- sporadically supporting ACS. We have trouble getting interconnect
- vendors to include the PCIe spec required PCIe capability, let alone
- suggested features.
- Therefore, we need to add some flexibility. The pcie_acs_override=
- boot option lets users opt-in specific devices or sets of devices to
- assume ACS support. The "downstream" option assumes full ACS support
- on root ports and downstream switch ports. The "multifunction"
- option assumes the subset of ACS features available on multifunction
- endpoints and upstream switch ports are supported. The "id:nnnn:nnnn"
- option enables ACS support on devices matching the provided vendor
- and device IDs, allowing more strategic ACS overrides. These options
- may be combined in any order. A maximum of 16 id specific overrides
- are available. It's suggested to use the most limited set of options
- necessary to avoid completely disabling ACS across the topology.
- Note to hardware vendors, we have facilities to permanently quirk
- specific devices which enforce isolation but not provide an ACS
- capability. Please contact me to have your devices added and save
- your customers the hassle of this boot option.
- ---
- --- a/Documentation/admin-guide/kernel-parameters.txt
- +++ b/Documentation/admin-guide/kernel-parameters.txt
- @@ -3027,6 +3027,15 @@
- pcie_pme= [PCIE,PM] Native PCIe PME signaling options:
- nomsi Do not use MSI for native PCIe PME signaling (this makes
- all PCIe root ports use INTx for all services).
- + pcie_acs_override =
- + [PCIE] Override missing PCIe ACS support for:
- + downstream
- + All downstream ports - full ACS capabilties
- + multifunction
- + All multifunction devices - multifunction ACS subset
- + id:nnnn:nnnn
- + Specfic device - full ACS capabilities
- + Specified as vid:did (vendor/device ID) in hex
- pcmv= [HW,PCMCIA] BadgePAD 4
- --- a/drivers/pci/quirks.c
- +++ b/drivers/pci/quirks.c
- @@ -3674,6 +3674,112 @@
- fs_initcall_sync(pci_apply_final_quirks);
- /*
- + * Enable overrides for missing ACS capabilities
- + * https://lkml.org/lkml/2013/5/30/513
- + *
- + */
- +static bool acs_on_downstream;
- +static bool acs_on_multifunction;
- +
- +#define NUM_ACS_IDS 16
- +struct acs_on_id {
- + unsigned short vendor;
- + unsigned short device;
- +};
- +static struct acs_on_id acs_on_ids[NUM_ACS_IDS];
- +static u8 max_acs_id;
- +
- +static __init int pcie_acs_override_setup(char *p)
- +{
- + if (!p)
- + return -EINVAL;
- +
- + while (*p) {
- + if (!strncmp(p, "downstream", 10))
- + acs_on_downstream = true;
- + if (!strncmp(p, "multifunction", 13))
- + acs_on_multifunction = true;
- + if (!strncmp(p, "id:", 3)) {
- + char opt[5];
- + int ret;
- + long val;
- +
- + if (max_acs_id >= NUM_ACS_IDS - 1) {
- + pr_warn("Out of PCIe ACS override slots (%d)\n",
- + NUM_ACS_IDS);
- + goto next;
- + }
- +
- + p += 3;
- + snprintf(opt, 5, "%s", p);
- + ret = kstrtol(opt, 16, &val);
- + if (ret) {
- + pr_warn("PCIe ACS ID parse error %d\n", ret);
- + goto next;
- + }
- + acs_on_ids[max_acs_id].vendor = val;
- +
- + p += strcspn(p, ":");
- + if (*p != ':') {
- + pr_warn("PCIe ACS invalid ID\n");
- + goto next;
- + }
- +
- + p++;
- + snprintf(opt, 5, "%s", p);
- + ret = kstrtol(opt, 16, &val);
- + if (ret) {
- + pr_warn("PCIe ACS ID parse error %d\n", ret);
- + goto next;
- + }
- + acs_on_ids[max_acs_id].device = val;
- + max_acs_id++;
- + }
- +next:
- + p += strcspn(p, ",");
- + if (*p == ',')
- + p++;
- + }
- +
- + if (acs_on_downstream || acs_on_multifunction || max_acs_id)
- + pr_warn("Warning: PCIe ACS overrides enabled; This may allow non-IOMMU protected peer-to-peer DMA\n");
- +
- + return 0;
- +}
- +early_param("pcie_acs_override", pcie_acs_override_setup);
- +
- +static int pcie_acs_overrides(struct pci_dev *dev, u16 acs_flags)
- +{
- + int i;
- +
- + /* Never override ACS for legacy devices or devices with ACS caps */
- + if (!pci_is_pcie(dev) ||
- + pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ACS))
- + return -ENOTTY;
- +
- + for (i = 0; i < max_acs_id; i++)
- + if (acs_on_ids[i].vendor == dev->vendor &&
- + acs_on_ids[i].device == dev->device)
- + return 1;
- +
- + switch (pci_pcie_type(dev)) {
- + case PCI_EXP_TYPE_DOWNSTREAM:
- + case PCI_EXP_TYPE_ROOT_PORT:
- + if (acs_on_downstream)
- + return 1;
- + break;
- + case PCI_EXP_TYPE_ENDPOINT:
- + case PCI_EXP_TYPE_UPSTREAM:
- + case PCI_EXP_TYPE_LEG_END:
- + case PCI_EXP_TYPE_RC_END:
- + if (acs_on_multifunction && dev->multifunction)
- + return 1;
- + }
- +
- + return -ENOTTY;
- +}
- +
- +/*
- * Following are device-specific reset methods which can be used to
- * reset a single function if other methods (e.g. FLR, PM D0->D3) are
- * not available.
- @@ -4490,6 +4596,7 @@
- { PCI_VENDOR_ID_CAVIUM, PCI_ANY_ID, pci_quirk_cavium_acs },
- /* APM X-Gene */
- { PCI_VENDOR_ID_AMCC, 0xE004, pci_quirk_xgene_acs },
- + { PCI_ANY_ID, PCI_ANY_ID, pcie_acs_overrides },
- { 0 }
- };
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