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Contrebord Lenovo G505s - Build/Flash/Test

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Dec 25th, 2017
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  1. -----
  2. Coreboot build on Debian Stretch Virtual Machine
  3. -----
  4.  
  5. $ git clone https://review.coreboot.org/coreboot
  6. $ cd coreboot
  7. $ git submodule update --init --checkout
  8.  
  9. Moved my extracted option rom "vga.raw" in coreboot/
  10.  
  11. $ romheaders vga.raw
  12. Image 1:
  13. PCI Expansion ROM Header:
  14. Signature: 0x55aa (Ok)
  15. CPU unique data: 0x40 0xe9 0x71 0x02 0x00 0x00 0x00 0x00
  16. 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
  17. Pointer to PCI Data Structure: 0x0224
  18.  
  19. PCI Data Structure:
  20. Signature: 0x50434952 'PCIR' (Ok)
  21. Vendor ID: 0x1002
  22. Device ID: 0x6663
  23. Vital Product Data: 0x0000
  24. PCI Data Structure Length: 0x0018 (24 bytes)
  25. PCI Data Structure Revision: 0x00
  26. Class Code: 0x038000 (Display controller)
  27. Image Length: 0x0040 blocks (32768 bytes)
  28. Revision Level of Code/Data: 0x0f29
  29. Code Type: 0x00 (Intel x86)
  30. Last-Image Flag: 0x80 (last image in rom)
  31. Reserved: 0x0000
  32.  
  33. Platform specific data for x86 compliant option rom:
  34. Initialization Size: 0x40 (32768 bytes)
  35. Entry point for INIT function: 0x277
  36.  
  37. $ make menuconfig
  38. Mainboard
  39. Mainboard vendor (Lenovo)
  40. Mainboard model (AMD G505s)
  41. Devices
  42. [*] Add a VGA BIOS image
  43. (vga.raw) VGA BIOS path and filename
  44. (1002,6663) VGA device PCI IDs
  45.  
  46. $ make crossgcc
  47. $ make
  48. Intel ACPI Component Architecture
  49. ASL+ Optimizing Compiler version 20161222-64
  50. Copyright (c) 2000 - 2016 Intel Corporation
  51.  
  52. coreboot toolchain v1.50 October 15th, 2017
  53. dsdt.aml 593: CreateDWordField(Arg3,4,CDW2)
  54. Remark 2089 - Object is not referenced ^ (Name [CDW2] is within a method [_OSC])
  55.  
  56. dsdt.aml 594: CreateDWordField(Arg3,8,CDW3)
  57. Remark 2089 - Object is not referenced ^ (Name [CDW3] is within a method [_OSC])
  58.  
  59. dsdt.aml 1397: Method (_CRS, 0, NotSerialized)
  60. Remark 2120 - ^ Control Method should be made Serialized (due to creation of named objects within)
  61.  
  62. ASL Input: dsdt.aml - 1609 lines, 29714 bytes, 704 keywords
  63. AML Output: dsdt.aml - 9016 bytes, 373 named objects, 331 executable opcodes
  64.  
  65. Compilation complete. 0 Errors, 0 Warnings, 3 Remarks, 383 Optimizations, 2 Constants Folded
  66. IASL build/dsdt.aml disassembled correctly.
  67.  
  68. Name Offset Type Size Comp
  69. cbfs master header 0x0 cbfs header 32 none
  70. fallback/ramstage 0x80 stage 128508 none
  71. config 0x1f6c0 raw 162 none
  72. revision 0x1f7c0 raw 576 none
  73. payload_revision 0x1fa40 raw 239 none
  74. (empty) 0x1fb80 null 792 none
  75. apu/amdfw 0x1fec0 raw 4096 none
  76. fallback/romstage 0x20f00 stage 320172 none
  77. cmos_layout.bin 0x6f240 cmos_layout 1164 none
  78. pci1002,6663.rom 0x6f740 optionrom 32768 none
  79. fallback/postcar 0x777c0 stage 13268 none
  80. fallback/dsdt.aml 0x7ac00 raw 9016 none
  81. fallback/payload 0x7cf80 payload 67370 none
  82. payload_config 0x8d700 raw 1611 none
  83. (empty) 0x8ddc0 null 3547352 none
  84. s3nv 0x3efec0 raw 32768 none
  85. (empty) 0x3f7f00 null 31704 none
  86. bootblock 0x3ffb00 bootblock 928 none
  87.  
  88. ( full make output : https://ghostbin.com/paste/xwk2r )
  89.  
  90. -----
  91. Flashing on Windows using a Bus Pirate :
  92. -----
  93.  
  94. Bus Pirate v4 with Firmware v7 and Bootloader v4.10 - Driver v5.1.2600.0
  95. Flashrom v0.9.6.1
  96.  
  97. I dismounted the laptop to get access to the BIOS chip and disconnected all power input to the motherboard.
  98. Connected the bus pirate to the chip with the help of an appropriate test clip.
  99.  
  100. Bios Pin Connectors -> Bus Pirate
  101. (1) CS -> CS
  102. (2) DO -> MISO
  103. (3) WP
  104. (4) VSS -> GND
  105. (5) DI -> MOSI
  106. (6) CLK -> CLK
  107. (7) HOLD
  108. (8) VCC -> +3.3
  109.  
  110. Command Prompt in flashrom/ directory containing the coreboot.rom file :
  111. $ flashrom -p buspirate_spi:dev=COM6,spispeed=1M -w coreboot.rom -V
  112. Found Winbond flash chip "W25Q32.V" (4096 kB, SPI).
  113. This chip may contain one-time programmable memory. flashrom cannot read and may never be able to write it, hence it may not be able to completely clone the contents of this chip (see man page for details.
  114. Reading old flash chip contents... done.
  115. Erasing and writing flash chip... Trying erase function 0...
  116. Erase/write done.
  117. Verifying flash... VERIFIED.
  118. Raw bitbang mode version 1
  119. Bus Pirate shutdown completed.
  120.  
  121.  
  122. -----
  123. G505s Test
  124. -----
  125.  
  126. I remounted and started the laptop.
  127. Both front leds activate
  128. Webcam led blinks once during boot
  129. HDD is active
  130. Ventilator is running
  131. CPU heats up
  132. Keyboard numlock led works
  133. Keyboard Caps Lock led doesn't work
  134. USB Thumb Drive connected to the USB 2.0 port is powered up but no interractions with the system (led lights up but no blinking)
  135. USB Thumb Drive connected to any of the USB 3.0 ports doesn't power up (led stays off)
  136. Tried to ssh to the debian I installed earlier on the machine, doesn't work.
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