;*********************************************************************************************************
;**                                                 **
;**             Header Information                          **
;**                                                 **
;*********************************************************************************************************

        list        p-16F887, r=dec, w=-302
        include     <P16F887.INC>
        __config    _CONFIG1,_FCMEN_OFF & _IESO_OFF & _LVP_OFF & _BOR_OFF & _PWRTE_ON & _WDT_OFF & _INTOSCIO
        __config    _CONFIG2,_WRT_HALF & _BOR21V

;*********************************************************************************************************
;**                                                 **
;**             Variable Definitions                            **
;**                                                 **
;*********************************************************************************************************

        cblock      0x20
                COUNT1      ;delay counter 1
                COUNT2      ;delay counter 2
                COUNT3      ;delay counter 3
        endc

;*********************************************************************************************************
;**                                                 **
;**             Initialization Routine                          **
;**                                                 **
;*********************************************************************************************************

        org     0x00        ;reset vector
        goto        START

START       clrf        PORTA       ;clear port a
        clrf        PORTB       ;clear port b
        clrf        PORTC       ;clear port c
        clrf        PORTD       ;clear port d
        clrf        PORTE       ;clear port e
        banksel     ANSEL       ;switch to RAM bank 3
        movlw       b'00000000' ;clear all bits in ANSEL and ANSELH
        movwf       ANSEL       ;all ports digital I/O
        movwf       ANSELH
        banksel     TRISA       ;switch to RAM bank 1
        movlw       b'00000000' ;clear all bits in TRISA-TRISE
        movwf       TRISA       ;all ports in output mode
        movwf       TRISB
        movwf       TRISC
        movwf       TRISD
        movwf       TRISE
        banksel     PORTA       ;switch to RAM bank 0

        ;<Main code will go here>

        end