list	p=18F1220	    ;Set processor
		radix   hex
		config  WDT=OFF, LVP=OFF

#define		PORTB   0xF81
#define		TRISB   0xF93
#define		ADCON1  0xFC1
#define		STATUS  0xFD8

INPUTS_CURR	equ	0x080
INPUTS_PREV	equ	0x081
INPUTS_B1_B0	equ	0x082
RESULT		equ	0x083

		org 0x000

		CLRF	PORTB
		MOVLW	0x7F
		MOVWF	ADCON1
		MOVLW	0x0F
		MOVWF	TRISB
		CLRF	PORTB
		CLRF	INPUTS_PREV


Loop:		MOVFF	PORTB, INPUTS_CURR
		MOVF	INPUTS_PREV, W
		XORWF	INPUTS_CURR, W
		ANDLW	0x0F
		BTFSS	STATUS, 2
		CALL	Adder
		MOVFF	INPUTS_CURR, INPUTS_PREV
		BRA	Loop


Adder:		MOVF	INPUTS_CURR, W
		ANDLW	0x0C		    ;Isolating bits B1, B0, setting rest to 0
		MOVWF	INPUT_B1_B0
		RRNCF	INPUT_B1_B0	    ;Shifts bits to right (Rotate Right No Carry)
		RRNCF	INPUT_B1_B0

		MOVF	INPUTS_CURR, W
		ANDLW	0x03		    ;Isolates A1, A0

		ADDWF	INPUT_B1_B0, W	    ;Adding (B1, B0) with (A1, A0)
		MOVWF	RESULT

		RLNCF	RESULT
		RLNCF	RESULT
		RLNCF	RESULT
		RLNCF	RESULT
		RLNCF	RESULT

		MOVFF	RESULT, PORTB

		RETURN

		end