`timescale 1ns / 1ps

module tb_Mux_behavioral;

    // Inputs to be defned as registers
    reg s0;
    reg s1;
    reg i0;
    reg i1;
    reg i2;
    reg i3;

    // Outputs to be defined as wires
    wire d;

    // Instantiate the Unit Under Test (UUT)
    Mux_behavioral uut (
        .s0(s0),
        .s1(s1),
        .i0(i0),
        .i1(i1),
        .i2(i2),
        .i3(i3),
        .d(d)
    );

    initial begin
        // Initialize inputs
        s0 = 0;
        s1 = 0;
        i0 = 0;
        i1 = 0;
        i2 = 0;
        i3 = 0;

        // Wait 50ns for global reset to finish
        #50;

        // Stimulus - all input combinations followed by some wait time to observe the o/p

        // For when i0 is chosen
        s0 = 0;
        s1 = 0;
        i0 = 0;
        i1 = 0;
        i2 = 0;
        i3 = 0;
        #50;
        $display("TC00");
        if(d != 1'b0) $display("Result is wrong");

        s0 = 0;
        s1 = 0;
        i0 = 1;
        i1 = 0;
        i2 = 0;
        i3 = 0;
        #50;
        $display("TC01");
        if(d != 1'b1) $display("Result is wrong");

        // For when i1 is chosen
        s0 = 1;
        s1 = 0;
        i0 = 0;
        i1 = 0;
        i2 = 0;
        i3 = 0;
        #50;
        $display("TC10");
        if(d != 1'b0) $display("Result is wrong");

        s0 = 1;
        s1 = 0;
        i0 = 0;
        i1 = 1;
        i2 = 0;
        i3 = 0;
        #50;
        $display("TC11");
        if(d != 1'b1) $display("Result is wrong");

                // For when i2 is chosen
        s0 = 0;
        s1 = 1;
        i0 = 0;
        i1 = 0;
        i2 = 0;
        i3 = 0;
        #50;
        $display("TC20");
        if(d != 1'b0) $display("Result is wrong");

        s0 = 0;
        s1 = 1;
        i0 = 0;
        i1 = 0;
        i2 = 1;
        i3 = 0;
        #50;
        $display("TC21");
        if(d != 1'b1) $display("Result is wrong");

                // For when i3 is chosen
        s0 = 1;
        s1 = 1;
        i0 = 1;
        i1 = 0;
        i2 = 0;
        i3 = 0;
        #50;
        $display("TC30");
        if(d != 1'b0) $display("Result is wrong");

        s0 = 1;
        s1 = 1;
        i0 = 0;
        i1 = 0;
        i2 = 0;
        i3 = 1;
        #50;
        $display("TC31");
        if(d != 1'b1) $display("Result is wrong");

        // Note other combinations, eg. when i1 & i2 are 1 simultaneously
        // were ignored, as this does not have any influence on the output - which is
        // only influenced by the select bits that map the appropriate i/p (only one)
        // to the o/p

         end

endmodule