jintack

L1 kernel boot hvc calls

Feb 11th, 2016
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  1. PC: 400826d0, LR: 40081008 MRS REG EL2 SP: SCTLR_EL2 IMM/REG: 0, VAL: 8
  2. PC: 400826d8, LR: 40081008 MSR REG EL2 SP: SCTLR_EL2 IMM/REG: 0, VAL: 0
  3. PC: 400826fc, LR: 40081008 MSR REG EL2 SP: HCR_EL2 IMM/REG: 0, VAL: 80000000
  4. PC: 40082700, LR: 40081008 MRS REG EL2 SP: CNTHCTL_EL2 IMM/REG: 0, VAL: 80000000
  5. PC: 40082708, LR: 40081008 MSR REG EL2 SP: CNTHCTL_EL2 IMM/REG: 0, VAL: 3
  6. PC: 4008270c, LR: 40081008 MSR REG EL2 SP: CNTVOFF_EL2 IMM/REG: 31, VAL: 0
  7. PC: 40082744, LR: 40081008 MRS REG EL1 SP: 1 IMM/REG: 1, VAL: 40882080
  8. PC: 40082748, LR: 40081008 MSR REG EL2 SP: VPIDR_EL2 IMM/REG: 0, VAL: 500f0001
  9. PC: 4008274c, LR: 40081008 MSR REG EL2 SP: VMPIDR_EL2 IMM/REG: 1, VAL: 80000000
  10. PC: 40082758, LR: 40081008 MSR REG EL1 SP: 3 IMM/REG: 0, VAL: 30d00800
  11. PC: 40082760, LR: 40081008 MSR REG EL2 SP: CPTR_EL2 IMM/REG: 0, VAL: 33ff
  12. PC: 40082764, LR: 40081008 MSR REG EL2 SP: HSTR_EL2 IMM/REG: 31, VAL: 0
  13. PC: 40082770, LR: 40081008 MSR REG EL2 SP: MDCR_EL2 IMM/REG: 0, VAL: 0
  14. PC: 40082774, LR: 40081008 MSR REG EL2 SP: VTTBR_EL2 IMM/REG: 31, VAL: 0
  15. PC: 40082780, LR: 40081008 MSR REG EL2 SP: VBAR_EL2 IMM/REG: 0, VAL: 4008a800
  16. PC: 40082788, LR: 40081008 MSR REG EL2 SP: SPSR_EL2 IMM/REG: 0, VAL: 3c5
  17. PC: 4008278c, LR: 40081008 MSR REG EL2 SP: ELR_EL2 IMM/REG: 30, VAL: 40081008
  18. PC: 40082794, LR: 40081008 ERET: target pc: 40081008
  19. PC: 40616040, LR: 40616000 DEBUG: imm: 7081, x0: ffff800000081190
  20. PC: ffff8000008255e4, LR: 40616000 DEBUG: imm: 7082, x0: ffff800000081190
  21. PC: ffff80000008b9e4, LR: ffff8000008488f8 L0 HVC
  22. PC: ffff80000008b9e4, LR: ffff8000004e3578 L0 HVC
  23. PC: ffff8000000a07dc, LR: ffff800000099c80 DEBUG: imm: 7080, x0: 0
  24. PC: ffff8000000a0844, LR: ffff8000000a0840 DEBUG: imm: 7081, x0: ffff8003700d8000
  25. PC: ffff8000000a0854, LR: ffff8000000a0848 DEBUG: imm: 7070, x0: 0
  26. PC: ffff80000008b064, LR: ffff8000000a0878 INJECT to L1: target pc: ffff80000008ac00
  27. PC: ffff80000008b004, LR: ffff8000000a0878 MRS REG EL2 SP: ESR_EL2 IMM/REG: 1, VAL: 0
  28. PC: ffff80000008b020, LR: ffff8000000a0878 MRS REG EL2 SP: VBAR_EL2 IMM/REG: 0, VAL: 0
  29. PC: ffff80000008b024, LR: ffff8000000a0878 DEBUG: imm: 7091, x0: 4008a800
  30. PC: ffff80000008b028, LR: ffff8000000a0878 ERET: target pc: ffff80000008b064
  31. PC: ffff8000000a0a04, LR: ffff8000000a0a00 DEBUG: imm: 7010, x0: 21
  32. PC: ffff80000009f710, LR: ffff800000115308 DEBUG: imm: 7777, x0: 0
  33. DEBUG SAVE: sp: ffff8003700e3ca0
  34. PC: ffff80000009f714, LR: ffff800000115308 DEBUG: imm: 7020, x0: 0
  35. PC: ffff8000000a3548, LR: ffff80000009f718 DEBUG: imm: 7030, x0: 40612000
  36. PC: ffff80000008b064, LR: ffff80000009f71c INJECT to L1: target pc: ffff80000008ac00
  37. PC: ffff80000008b004, LR: ffff80000009f71c MRS REG EL2 SP: ESR_EL2 IMM/REG: 1, VAL: 40612000
  38. PC: ffff80000008b018, LR: ffff80000009f71c MSR REG EL2 SP: VBAR_EL2 IMM/REG: 0, VAL: 40612000
  39. PC: ffff80000008b024, LR: ffff80000009f71c DEBUG: imm: 7091, x0: 40612000
  40. PC: ffff80000008b028, LR: ffff80000009f71c ERET: target pc: ffff80000008b064
  41. PC: ffff80000009f720, LR: ffff80000009f71c DEBUG: imm: 7021, x0: 40612000
  42. PC: ffff8000000a4894, LR: ffff80000009f754 INJECT to L1: target pc: ffff800000612400
  43. PC: ffff80000061278c, LR: ffff80000009f754 DEBUG: imm: 7111, x0: 3af97d000
  44. PC: ffff800000612790, LR: ffff80000009f754 MSR REG EL2 SP: TTBR0_EL2 IMM/REG: 0, VAL: 3af97d000
  45. PC: ffff800000612794, LR: ffff80000009f754 MRS REG EL1 SP: 8 IMM/REG: 4, VAL: 1
  46. PC: ffff8000006127a8, LR: ffff80000009f754 MSR REG EL2 SP: TCR_EL2 IMM/REG: 4, VAL: 80823510
  47. PC: ffff8000006127c8, LR: ffff80000009f754 MSR REG EL2 SP: VTCR_EL2 IMM/REG: 4, VAL: 80033558
  48. PC: ffff8000006127cc, LR: ffff80000009f754 MRS REG EL1 SP: 13 IMM/REG: 4, VAL: 80033558
  49. PC: ffff8000006127d0, LR: ffff80000009f754 MSR REG EL2 SP: MAIR_EL2 IMM/REG: 4, VAL: bbff440c0400
  50. PC: ffff8000006127d8, LR: ffff80000009f754 TLBI
  51. PC: ffff8000006127e0, LR: ffff80000009f754 MRS REG EL2 SP: SCTLR_EL2 IMM/REG: 4, VAL: bbff440c0400
  52. PC: ffff8000006127f0, LR: ffff80000009f754 MSR REG EL2 SP: SCTLR_EL2 IMM/REG: 4, VAL: 100f
  53. PC: ffff8000006127f8, LR: ffff80000009f754 DEBUG: imm: 7001, x0: 3af97d000
  54. PC: ffff800000612800, LR: ffff80000009f754 DEBUG: imm: 7002, x0: 3af97d000
  55. PC: ffff800000612808, LR: ffff80000009f754 DEBUG: imm: 7003, x0: 3af97d000
  56. PC: ffff800000612810, LR: ffff80000009f754 DEBUG: imm: 7004, x0: 3af97d000
  57. PC: ffff800000612818, LR: ffff80000009f754 DEBUG: imm: 7005, x0: 3af97d000
  58. PC: ffff800000612824, LR: ffff80000009f754 DEBUG: imm: 7006, x0: fffffffff828
  59. PC: ffff800000612828, LR: ffff80000009f754 DEBUG: imm: 7007, x0: fffffffff828
  60. PC: ffff80000061282c, LR: ffff80000009f754 DEBUG: imm: 7008, x0: fffffffff828
  61. PC: ffff800000612830, LR: ffff80000009f754 MSR REG EL2 SP: TTBR0_EL2 IMM/REG: 1, VAL: 3af97a000
  62. PC: ffff800000612838, LR: ffff80000009f754 TLBI
  63. PC: ffff800000612840, LR: ffff80000009f754 DEBUG: imm: 7009, x0: fffffffff828
  64. PC: ffff800000612850, LR: ffff80000009f754 MSR REG EL2 SP: VBAR_EL2 IMM/REG: 3, VAL: 800000615000
  65. PC: ffff800000612854, LR: ffff80000009f754 ERET: target pc: ffff8000000a4894
  66. PC: ffff80000009f758, LR: ffff80000009f754 DEBUG: imm: 7720, x0: fffffffff828
  67. PC: ffff80000009f75c, LR: ffff80000009f754 DEBUG: imm: 7778, x0: fffffffff828
  68. DEBUG RESTORE: sp: ffff8003700e3ca0
  69. PC: ffff8000000a4884, LR: ffff8000000a51cc L0 HVC
  70. PC: ffff8000000a0a1c, LR: ffff8000000a0a18 DEBUG: imm: 7999, x0: 0
  71. PC: ffff8000000a0a3c, LR: ffff8000000a0a38 DEBUG: imm: 7012, x0: 20
  72. PC: ffff8000000a0a68, LR: ffff8000000a0a48 DEBUG: imm: 7013, x0: ffff800000883000
  73. PC: ffff8000000a0aa4, LR: ffff8000000a0aa0 DEBUG: imm: 7085, x0: 2a
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