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- //SW[3:0] data inputs
- //HEX0[] output display
- module decoder(HEX0, SW);
- input [3:0] SW;
- output [6:0] HEX0;
- hex0 h0(
- .c0(SW[0]),
- .c1(SW[1]),
- .c2(SW[2]),
- .c3(SW[3]),
- .m(HEX0[0])
- );
- hex1 h1(
- .c0(SW[0]),
- .c1(SW[1]),
- .c2(SW[2]),
- .c3(SW[3]),
- .m(HEX0[1])
- );
- hex2 h2(
- .c0(SW[0]),
- .c1(SW[1]),
- .c2(SW[2]),
- .c3(SW[3]),
- .m(HEX0[2])
- );
- hex3 h3(
- .c0(SW[0]),
- .c1(SW[1]),
- .c2(SW[2]),
- .c3(SW[3]),
- .m(HEX0[3])
- );
- hex4 h4(
- .c0(SW[0]),
- .c1(SW[1]),
- .c2(SW[2]),
- .c3(SW[3]),
- .m(HEX0[4])
- );
- hex5 h5(
- .c0(SW[0]),
- .c1(SW[1]),
- .c2(SW[2]),
- .c3(SW[3]),
- .m(HEX0[5])
- );
- hex6 h6(
- .c0(SW[0]),
- .c1(SW[1]),
- .c2(SW[2]),
- .c3(SW[3]),
- .m(HEX0[6])
- );
- endmodule
- module hex0(c0, c1, c2, c3, m);
- input c0;
- input c1;
- input c2;
- input c3;
- output m;
- assign m = (c3 & c2 & ~c1 & c0) | (c3 & ~c2 & c1 & c0) | (~c3 & ~c2 & ~c1 & c0) + | (~c3 & c2 & ~c1 & ~c0);
- endmodule
- module hex1(c0, c1, c2, c3, m);
- input c0;
- input c1;
- input c2;
- input c3;
- output m;
- assign m = (c3 & c1 & c0) | (c2 & c1 & ~c0) | (c3 & c2 & ~c0) + | (~c3 & c2 & ~c1 & c0);
- endmodule
- module hex2(c0, c1, c2, c3, m);
- input c0;
- input c1;
- input c2;
- input c3;
- output m;
- assign m = (c3 & c2 & ~c0) | (c3 & c2 & c1) | (~c3 & ~c2 & c1 & ~c0);
- endmodule
- module hex3(c0, c1, c2, c3, m);
- input c0;
- input c1;
- input c2;
- input c3;
- output m;
- assign m = (c2 & c1 & c0) | (~c3 & c2 & ~c1 & ~c0) | (c3 & ~c2 & c1 & ~c0) + | (~c2 & ~c1 & c0);
- endmodule
- module hex4(c0, c1, c2, c3, m);
- input c0;
- input c1;
- input c2;
- input c3;
- output m;
- assign m = (~c3 & c0) | (~c2 & ~c1 & c0) | (~c3 & c2 & ~c1);
- endmodule
- module hex5(c0, c1, c2, c3, m);
- input c0;
- input c1;
- input c2;
- input c3;
- output m;
- assign m = (~c3 & ~c2 & c1) | (~c3 & ~c2 & c0) | (c3 & c2 & ~c1 & c0) + | (~c3 & c1 & c0);
- endmodule
- module hex6(c0, c1, c2, c3, m);
- input c0;
- input c1;
- input c2;
- input c3;
- output m;
- assign m = (~c3 & ~c2 & ~c1) | (c3 & c2 & ~c1 & ~c0) | (~c3 & c2 & c1 & c0);
- endmodule
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