ALUS - ALU de un bit

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity ALUS is
Port  (  A, B: in std_logic;
         Cin: in std_logic;
         Cout: out std_logic;
         Bnegado: in std_logic;
         Puntaje: out std_logic);
end ALUS;

architecture Behavioral of ALUS is

    signal puntos: std_logic;
    signal notB: std_logic;
    signal Muxo: std_logic;

    component elmux
          Port (D0: in std_logic;
                D1: in std_logic;
                Bneg: in std_logic;
                nout: out std_logic);
    end component;

    component operaciones
          Port ( x : in std_logic;
                 y : in std_logic;
                 Carry_in : in std_logic;
                 Sum : out std_logic;
                 Carry_out : out std_logic);
    end component;

begin

    notB <= not B;

 Negador: elmux port map( D0 => B,
                        D1 => notB,
                        Bneg => Bnegado,
                        nout=> Muxo);

 Calculadora: operaciones port map( x => A,
                                    y => Muxo,
                                    Carry_in => Cin,
                                    Sum => Puntaje,
                                    Carry_out =>Cout);
end Behavioral;