UCF
NET "sw0"          LOC=J15 | IOSTANDARD=LVCMOS33;
NET "sw1"          LOC=L16 | IOSTANDARD=LVCMOS33;
NET "sw2"          LOC=M13 | IOSTANDARD=LVCMOS33;
NET "sw3"          LOC=R15 | IOSTANDARD=LVCMOS33;
NET "sw4"          LOC=R17 | IOSTANDARD=LVCMOS33;
NET "sw5"          LOC=T18 | IOSTANDARD=LVCMOS33;
NET "sw6"          LOC=U18 | IOSTANDARD=LVCMOS33;
NET "sw7"          LOC=R13 | IOSTANDARD=LVCMOS33;

NET "led0"         LOC=H17 | IOSTANDARD=LVCMOS33;
NET "led1"         LOC=K15 | IOSTANDARD=LVCMOS33;
NET "led2"         LOC=J13 | IOSTANDARD=LVCMOS33;
NET "led3"         LOC=N14 | IOSTANDARD=LVCMOS33;
NET "led4"         LOC=R18 | IOSTANDARD=LVCMOS33;
NET "led5"         LOC=V17 | IOSTANDARD=LVCMOS33;
NET "led6"         LOC=U17 | IOSTANDARD=LVCMOS33;
NET "led7"         LOC=U16 | IOSTANDARD=LVCMOS33;


verilog
input sw0, input sw1,input sw2,input sw3,
	 input sw4,input sw5,input sw6,input sw7,
    output led0,output led1,output led2,output led3,
	 output led4,output led5,output led6,output led7

	 );

assign led0 =sw0;
assign led1 =sw1;
assign led2 =sw2;
assign led3 =sw3;
assign led4 =sw4;
assign led5 =sw5;
assign led6 =sw6;
assign led7 =sw7;

endmodule