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  1. SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:F;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
  2. bl2_stage_init 0x01
  3. bl2_stage_init 0x81
  4. hw id: 0x0000 - pwm id 0x01
  5. bl2_stage_init 0xc1
  6. bl2_stage_init 0x02
  7.  
  8. L0:00000000
  9. L1:00000703
  10. L2:00008067
  11. L3:15000000
  12. S1:00000000
  13. B2:20282000
  14. B1:a0f83180
  15.  
  16. TE: 183192
  17.  
  18. BL2 Built : 19:17:49, Jul 31 2019. g12a ge9a9000 - zhiguang.ouyang@droid07-sz
  19.  
  20. Board ID = 8
  21. Set cpu clk to 24M
  22. Set clk81 to 24M
  23. Use GP1_pll as DSU clk.
  24. DSU clk: 1200 Mhz
  25. CPU clk: 1200 MHz
  26. Set clk81 to 166.6M
  27. eMMC boot @ 0
  28. sw8 s
  29. DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Jul 31 2019 19:17:43
  30. board id: 8
  31. Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
  32. fw parse done
  33. Load ddrfw from eMMC, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part: 0
  34. Load ddrfw from eMMC, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part: 0
  35. PIEI prepare done
  36. fastboot data load
  37. 00000000
  38. emmc switch 1 ok
  39. ddr saved addr:00016000
  40. Load ddr parameter from eMMC, src: 0x02c00000, des: 0xfffd0000, size: 0x00001000, part: 0
  41. 00000000
  42. emmc switch 0 ok
  43. fastboot data verify
  44. verify result: 265
  45. Cfg max: 4, cur: 1. Board id: 255. Force loop cfg
  46. LPDDR4 probe
  47. ddr clk to 1608MHz
  48. Load ddrfw from eMMC, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part: 0
  49.  
  50. dmc_version 0001
  51. Check phy result
  52. INFO : ERROR : Training has failed!
  53. 1D training failed
  54. Cfg max: 4, cur: 2. Board id: 255. Force loop cfg
  55. LPDDR4 probe
  56. ddr clk to 1608MHz
  57. Load ddrfw from eMMC, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part: 0
  58.  
  59. dmc_version 0001
  60. Check phy result
  61. INFO : End of CA training
  62. INFO : End of initialization
  63. INFO : Training has run successfully!
  64. Check phy result
  65. INFO : End of initialization
  66. INFO : End of read enable training
  67. INFO : End of fine write leveling
  68. INFO : End of Write leveling coarse delay
  69. INFO : Training has run successfully!
  70. Check phy result
  71. INFO : End of initialization
  72. INFO : End of read dq deskew training
  73. INFO : End of MPR read delay center optimization
  74. INFO : End of write delay center optimization
  75. INFO : End of read delay center optimization
  76. INFO : End of max read latency training
  77. INFO : Training has run successfully!
  78. 1D training succeed
  79. Load ddrfw from eMMC, src: 0x00048200, des: 0xfffd0000, size: 0x0000c000, part: 0
  80. Check phy result
  81. INFO : End of initialization
  82. INFO : End of 2D read delay Voltage center optimization
  83. INFO : End of 2D read delay Voltage center optimization
  84. INFO : End of 2D write delay Voltage center optimization
  85. INFO : End of 2D write delay Voltage center optimization
  86. INFO : Training has run successfully!
  87.  
  88. channel==0
  89. RxClkDly_Margin_A0==97 ps 10
  90. TxDqDly_Margin_A0==106 ps 11
  91. RxClkDly_Margin_A1==0 ps 0
  92. TxDqDly_Margin_A1==0 ps 0
  93. TrainedVREFDQ_A0==29
  94. TrainedVREFDQ_A1==0
  95. VrefDac_Margin_A0==29
  96. DeviceVref_Margin_A0==29
  97. VrefDac_Margin_A1==0
  98. DeviceVref_Margin_A1==0
  99.  
  100.  
  101. channel==1
  102. RxClkDly_Margin_A0==87 ps 9
  103. TxDqDly_Margin_A0==106 ps 11
  104. RxClkDly_Margin_A1==0 ps 0
  105. TxDqDly_Margin_A1==0 ps 0
  106. TrainedVREFDQ_A0==29
  107. TrainedVREFDQ_A1==0
  108. VrefDac_Margin_A0==28
  109. DeviceVref_Margin_A0==28
  110. VrefDac_Margin_A1==0
  111. DeviceVref_Margin_A1==0
  112.  
  113. dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
  114.  
  115. soc_vref_reg_value 0x 00000026 00000026 00000026 00000026 00000027 0000002a 00000026 00000022
  116. 2D training succeed
  117. aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Jul 31 2019 19:17:53
  118. auto size-- 65535DDR cs0 size: 2048MB
  119. DDR cs1 size: 0MB
  120. DMC_DDR_CTRL: 00c0002cDDR size: 2048MB
  121. cs0 DataBus test pass
  122. cs0 AddrBus test pass
  123.  
  124. 100bdlr_step_size ps== 471
  125. result report
  126. boot times 0Enable ddr reg access
  127. 00000000
  128. emmc switch 3 ok
  129. Authentication key not yet programmed
  130. get rpmb counter error 0x00000007
  131. 00000000
  132. emmc switch 0 ok
  133. Load FIP HDR from eMMC, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0
  134. Load BL3X from eMMC, src: 0x00078200, des: 0x01768000, size: 0x000da000, part: 0
  135. 0.0;M3 CHK:0;cm4_sp_mode 0
  136. MVN_1=0x00000000
  137. MVN_2=0x00000000
  138. [Image: g12a_v1.1.3389-92241b5 2019-07-02 17:22:49 luan.yuan@droid15-sz]
  139. OPS=0x04
  140. ring efuse init
  141. 2b 0c 04 00 01 14 1c 00 00 06 34 39 39 46 38 50
  142. [0.017355 Inits done]
  143. secure task start!
  144. high task start!
  145. low task start!
  146. run into bl31
  147. NOTICE: BL31: v1.3(release):4fc40b1
  148. NOTICE: BL31: Built : 15:57:33, May 22 2019
  149. NOTICE: BL31: G12A normal boot!
  150. NOTICE: BL31: BL33 decompress pass
  151. ERROR: Error initializing runtime service opteed_fast
  152.  
  153.  
  154. U-Boot 2015.01-ga4bb005-dirty (Oct 30 2019 - 11:01:37)
  155.  
  156. DRAM: 2 GiB
  157. Relocation Offset is: 76e29000
  158. spi_post_bind(spifc): req_seq = 0
  159. register usb cfg[0][1] = 0000000077f2b510
  160. aml_i2c_init_port init regs for 0
  161. NAND: get_sys_clk_rate_mtd() 290, clock setting 200!
  162. NAND device id: 0 9f ff ff ff ff
  163. No NAND device found!!!
  164. nand init failed: -6
  165. get_sys_clk_rate_mtd() 290, clock setting 200!
  166. NAND device id: 0 9f ff ff ff ff
  167. No NAND device found!!!
  168. nand init failed: -6
  169. MMC: aml_priv->desc_buf = 0x0000000073e19e50
  170. aml_priv->desc_buf = 0x0000000073e1c190
  171. SDIO Port B: 0, SDIO Port C: 1
  172. co-phase 0x2, tx-dly 0, clock 400000
  173. co-phase 0x2, tx-dly 0, clock 400000
  174. co-phase 0x2, tx-dly 0, clock 400000
  175. emmc/sd response timeout, cmd8, status=0x3ff2800
  176. emmc/sd response timeout, cmd55, status=0x3ff2800
  177. co-phase 0x2, tx-dly 0, clock 400000
  178. co-phase 0x2, tx-dly 0, clock 40000000
  179. aml_sd_retry_refix[983]:delay = 0x0,gadjust =0x172000
  180. [mmc_startup] mmc refix success
  181. init_part() 297: PART_TYPE_AML
  182. [mmc_init] mmc init success
  183. start dts,buffer=0000000073e1ea00,dt_addr=0000000073e1ea00
  184. get_partition_from_dts() 91: ret 0
  185. parts: 17
  186. 00: logo 0000000000800000 1
  187. 01: recovery 0000000001800000 1
  188. 02: misc 0000000000800000 1
  189. 03: dtbo 0000000000800000 1
  190. 04: cri_data 0000000000800000 2
  191. 05: param 0000000001000000 2
  192. 06: boot 0000000001000000 1
  193. set has_boot_slot = 0
  194. 07: rsv 0000000001000000 1
  195. 08: metadata 0000000001000000 1
  196. 09: vbmeta 0000000000200000 1
  197. 10: tee 0000000002000000 1
  198. 11: vendor 0000000014000000 1
  199. 12: odm 0000000008000000 1
  200. 13: system 0000000050000000 1
  201. 14: product 0000000008000000 1
  202. 15: cache 0000000046000000 2
  203. 16: data ffffffffffffffff 4
  204. init_part() 297: PART_TYPE_AML
  205. eMMC/TSD partition table have been checked OK!
  206. crc32_s:0x1577dad == storage crc_pattern:0x1577dad!!!
  207. crc32_s:0xee152b83 == storage crc_pattern:0xee152b83!!!
  208. crc32_s:0x79f50f07 == storage crc_pattern:0x79f50f07!!!
  209. mmc env offset: 0x4d400000
  210. In: serial
  211. Out: serial
  212. Err: serial
  213. reboot_mode=cold_boot
  214. [store]To run cmd[emmc dtb_read 0x1000000 0x40000]
  215. _verify_dtb_checksum()-3406: calc 33a7c73c, store 33a7c73c
  216. _verify_dtb_checksum()-3406: calc 33a7c73c, store 33a7c73c
  217. dtb_read()-3623: total valid 2
  218. update_old_dtb()-3604: do nothing
  219. aml_i2c_init_port init regs for 0
  220. fusb302_init: Device ID: 0x91
  221. CC connected in 0 as UFP
  222. fusb302 detect chip.port_num = 0
  223. amlkey_init() enter!
  224. [EFUSE_MSG]keynum is 1
  225. vpu: clk_level in dts: 7
  226. vpu: vpu_power_on
  227. vpu: set clk: 666667000Hz, readback: 666666667Hz(0x100)
  228. vpu: vpu_module_init_config
  229. vpp: vpp_init
  230. vpp: vpp osd2 matrix rgb2yuv..............
  231. cvbs: cpuid:0x2b
  232. lcd: detect mode: tablet, key_valid: 0
  233. lcd: load config from dts
  234. lcd: pinctrl_version: 2
  235. lcd: use panel_type=lcd_1
  236. lcd extern: load config from dts
  237. lcd extern: error: dts: not find node /lcd_extern/extern_5
  238. lcd extern: aml_lcd_extern_probe failed
  239. lcd: bl: status disabled
  240. lcd: bl: invalid backlight config
  241. Net: dwmac.ff3f0000amlkey_init() enter!
  242. amlkey_init() 71: already init!
  243. [EFUSE_MSG]keynum is 1
  244. MACADDR:02:00:00:1c:14:01(from chipid)
  245.  
  246. CONFIG_AVB2: null
  247. Start read misc partition datas!
  248. info->magic =
  249. info->version_major = 1
  250. info->version_minor = 0
  251. info->slots[0].priority = 15
  252. info->slots[0].tries_remaining = 7
  253. info->slots[0].successful_boot = 0
  254. info->slots[1].priority = 14
  255. info->slots[1].tries_remaining = 7
  256. info->slots[1].successful_boot = 0
  257. info->crc32 = -1075449479
  258. active slot = 0
  259.  
  260. wipe_data=successful
  261. wipe_cache=successful
  262. upgrade_step=2
  263. reboot_mode:::: cold_boot
  264. amlkey_init() enter!
  265. amlkey_init() 71: already init!
  266. [EFUSE_MSG]keynum is 1
  267.  
  268. usid: c86314704ce9
  269.  
  270. mac address: c8:63:14:70:4c:e9
  271. [KM]Error:f[key_manage_query_size]L515:key[deviceid] not programed yet
  272. [KM]Error:f[key_manage_query_size]L515:key[region_code] not programed yet
  273. lcd: error: outputmode[1080p60hz] is not support
  274. hpd_state=1
  275. edid preferred_mode is 1080p60hz[16]
  276. hdr mode is 0
  277. dv mode is ver:0 len: 0
  278. hdr10+ mode is 0
  279. [OSD]load fb addr from dts:/meson-fb
  280. [OSD]load fb addr from dts:/fb
  281. [OSD]set initrd_high: 0x7f800000
  282. [OSD]fb_addr for logo: 0x7f800000
  283. [OSD]load fb addr from dts:/meson-fb
  284. [OSD]load fb addr from dts:/fb
  285. [OSD]fb_addr for logo: 0x7f800000
  286. [OSD]VPP_OFIFO_SIZE:0xfff01fff
  287. [CANVAS]canvas init
  288. [CANVAS]addr=0x7f800000 width=3840, height=2160
  289. [OSD]osd_hw.free_dst_data: 0,1919,0,1079
  290. [OSD]osd1_update_disp_freescale_enable
  291. cvbs: outputmode[1080p60hz] is invalid
  292. vpp: vpp_matrix_update: 2
  293. set hdmitx VIC = 16
  294. config HPLL = 5940000 frac_rate = 1
  295. HPLL: 0x3b3a04f7
  296. HPLL: 0x1b3a04f7
  297. HPLLv1: 0xdb3a04f7
  298. config HPLL done
  299. j = 6 vid_clk_div = 1
  300. hdmitx: set enc for VIC: 16
  301. hdmitx phy setting done
  302. enc_vpu_bridge_reset[1249]
  303. rx version is 1.4 or below div=10
  304. vpp: sdr_mode = 2
  305. vpp: Rx hdr_info.hdr_sup_eotf_smpte_st_2084 = 0
  306. normal power on
  307. boot wol: disable
  308. saradc: 0x288, hw_ver: 0x32 (VIM3.V12)
  309. amlkey_init() enter!
  310. amlkey_init() 71: already init!
  311. [EFUSE_MSG]keynum is 1
  312.  
  313. usid: c86314704ce9
  314.  
  315. mac address: c8:63:14:70:4c:e9
  316. [KM]Error:f[key_manage_query_size]L515:key[deviceid] not programed yet
  317. [KM]Error:f[key_manage_query_size]L515:key[region_code] not programed yet
  318. gpio: pin GPIOAO_7 (gpio 7) value is 1
  319. port mode is usb3.0
  320. Command: bcb uboot-command
  321. Start read misc partition datas!
  322. BCB hasn't any datas,exit!
  323. amlkey_init() enter!
  324. amlkey_init() 71: already init!
  325. [EFUSE_MSG]keynum is 1
  326.  
  327. usid: c86314704ce9
  328.  
  329. mac address: c8:63:14:70:4c:e9
  330. [KM]Error:f[key_manage_query_size]L515:key[deviceid] not programed yet
  331. [KM]Error:f[key_manage_query_size]L515:key[region_code] not programed yet
  332. Hit Enter or space or Ctrl+C key to stop autoboot -- : 0
  333. card in
  334. co-phase 0x2, tx-dly 0, clock 400000
  335. co-phase 0x2, tx-dly 0, clock 400000
  336. co-phase 0x2, tx-dly 0, clock 400000
  337. co-phase 0x2, tx-dly 0, clock 400000
  338. co-phase 0x2, tx-dly 0, clock 40000000
  339. aml_sd_retry_refix[983]:delay = 0x0,gadjust =0x182000
  340. [mmc_startup] mmc refix success
  341. init_part() 282: PART_TYPE_DOS
  342. [mmc_init] mmc init success
  343. Device: SDIO Port B
  344. Manufacturer ID: 3
  345. OEM: 5344
  346. Name: SS16G
  347. Tran Speed: 50000000
  348. Rd Block Len: 512
  349. SD version 3.0
  350. High Capacity: Yes
  351. Capacity: 14.8 GiB
  352. mmc clock: 40000000
  353. Bus Width: 4-bit
  354. reading s905_autoscript
  355. 1351 bytes read in 4 ms (329.1 KiB/s)
  356. ## Executing script at 01020000
  357. start amlogic old u-boot
  358. reading boot_android
  359. ** Unable to read file boot_android **
  360. ** Bad device usb 0 **
  361. reading u-boot.ext
  362. 709768 bytes read in 44 ms (15.4 MiB/s)
  363. ## Starting application at 0x01000000 ...
  364.  
  365.  
  366. U-Boot 2015.01 (Dec 09 2019 - 14:41:16)
  367.  
  368. DRAM: 2 GiB
  369. Relocation Offset is: 76ef4000
  370. spi_post_bind(spifc): req_seq = 0
  371. register usb cfg[0][1] = 0000000077f84d28
  372. MMC: aml_priv->desc_buf = 0x0000000073ee47c0
  373. aml_priv->desc_buf = 0x0000000073ee6b00
  374. SDIO Port C: 0, SDIO Port B: 1
  375. Using default environment
  376.  
  377. In: serial
  378. Out: serial
  379. Err: serial
  380. vpu: error: vpu: check dts: FDT_ERR_BADMAGIC, load default parameters
  381. vpu: driver version: v20190313
  382. vpu: detect chip type: 12
  383. vpu: clk_level default: 7(666667000Hz), max: 7(666667000Hz)
  384. vpu: clk_level = 7
  385. vpu: vpu_power_on
  386. vpu: set_vpu_clk
  387. vpu: set clk: 666667000Hz, readback: 666666667Hz(0x100)
  388. vpu: set_vpu_clk finish
  389. vpu: vpu_module_init_config
  390. vpp: vpp_init
  391. cvbs: cpuid:0x2b
  392. cvbs_config_hdmipll_g12a
  393. cvbs_set_vid2_clk
  394. co-phase 0x3, tx-dly 0, clock 400000
  395. co-phase 0x3, tx-dly 0, clock 400000
  396. co-phase 0x3, tx-dly 0, clock 400000
  397. emmc/sd response timeout, cmd8, status=0x3ff2800
  398. emmc/sd response timeout, cmd55, status=0x3ff2800
  399. co-phase 0x3, tx-dly 0, clock 400000
  400. co-phase 0x1, tx-dly 0, clock 40000000
  401. aml_sd_retry_refix[983]:delay = 0x0,gadjust =0x172000
  402. [mmc_startup] mmc refix success
  403. [mmc_init] mmc init success
  404. Failed to mount ext2 filesystem...
  405. ** Unrecognized filesystem type **
  406. Failed to mount ext2 filesystem...
  407. ** Unrecognized filesystem type **
  408. movi: not registered partition name, logo
  409. movi - Read/write command from/to SD/MMC for ODROID board
  410.  
  411. Usage:
  412. movi <read|write> <partition|sector> <offset> <address> [<length>]
  413. - <read|write> the command to access the storage
  414. - <offset> the offset from the start of given partiton in lba
  415. - <address> the memory address to load/store from/to the storage device
  416. - [<length>] the size of the block to read/write in bytes
  417. - all parameters must be hexa-decimal only
  418.  
  419. [OSD]check dts: FDT_ERR_BADMAGIC, load default fb_addr parameters
  420. [OSD]set initrd_high: 0x3d800000
  421. [OSD]fb_addr for logo: 0x3d800000
  422. [OSD]check dts: FDT_ERR_BADMAGIC, load default fb_addr parameters
  423. [OSD]fb_addr for logo: 0x3d800000
  424. [OSD]VPP_OFIFO_SIZE:0xfff01fff
  425. [CANVAS]canvas init
  426. [CANVAS]addr=0x3d800000 width=5760, height=2160
  427. [OSD]wait_vsync_wakeup exit
  428. cvbs: outputmode[1080p60hz] is invalid
  429. vpp: vpp_matrix_update: 2
  430. set hdmitx VIC = 16
  431. config HPLL = 5940000 frac_rate = 1
  432. HPLL: 0x3b3a04f7
  433. HPLL: 0x1b3a04f7
  434. HPLLv1: 0xdb3a04f7
  435. config HPLL done
  436. j = 6 vid_clk_div = 1
  437. hdmitx phy setting done
  438. hdmitx: set enc for VIC: 16
  439. enc_vpu_bridge_reset[1312]
  440. rx version is 1.4 or below div=10
  441. "Synchronous Abort" handler, esr 0x96000010
  442. ELR: 77f49e0c
  443. LR: 77f49dac
  444. x0 : 0000000077f84d28 x1 : 0000000000000002
  445. x2 : 0000000077fbcb88 x3 : 0000000077fbcb80
  446. x4 : 0000000000000002 x5 : 00000000ff63a000
  447. x6 : 0000000077f87d30 x7 : 0000000077f87d40
  448. x8 : 0000000000000370 x9 : 0000000076ef4000
  449. x10: 000000000000000f x11: 0000000077f64378
  450. x12: 0000000000000000 x13: 0000000000004000
  451. x14: 0000000001131b0c x15: 0000000001c81dc6
  452. x16: 0000000073e23360 x17: 0000000073e23d70
  453. x18: 0000000073ee3e28 x19: 00000000ff500000
  454. x20: 00000000ff50c000 x21: 0000000077fb67c0
  455. x22: 0000000077fbc000 x23: 0000000073ee3ac0
  456. x24: 0000000077f741c3 x25: 0000000077f74218
  457. x26: 0000000073ee3a58 x27: 0000000073ee9180
  458. x28: 0000000000000000 x29: 0000000073ee39a0
  459.  
  460. Resetting CPU ...
  461.  
  462. resetting ...
  463.  
  464. SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:F;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
  465. bl2_stage_init 0x01
  466. bl2_stage_init 0x81
  467. hw id: 0x0000 - pwm id 0x01
  468. bl2_stage_init 0xc1
  469. bl2_stage_init 0x02
  470.  
  471. L0:00000000
  472. L1:00000703
  473. L2:00008067
  474. L3:15000000
  475. S1:00000000
  476. B2:20282000
  477. B1:a0f83180
  478.  
  479. TE: 183192
  480.  
  481. BL2 Built : 19:17:49, Jul 31 2019. g12a ge9a9000 - zhiguang.ouyang@droid07-sz
  482.  
  483. Board ID = 8
  484. Set cpu clk to 24M
  485. Set clk81 to 24M
  486. Use GP1_pll as DSU clk.
  487. DSU clk: 1200 Mhz
  488. CPU clk: 1200 MHz
  489. Set clk81 to 166.6M
  490. eMMC boot @ 0
  491. sw8 s
  492. DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Jul 31 2019 19:17:43
  493. board id: 8
  494. Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0
  495. fw parse done
  496. Load ddrfw from eMMC, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part: 0
  497. Load ddrfw from eMMC, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part: 0
  498. PIEI prepare done
  499. fastboot data load
  500. 00000000
  501. emmc switch 1 ok
  502. ddr saved addr:00016000
  503. Load ddr parameter from eMMC, src: 0x02c00000, des: 0xfffd0000, size: 0x00001000, part: 0
  504. 00000000
  505. emmc switch 0 ok
  506. fastboot data verify
  507. verify result: 265
  508. Cfg max: 4, cur: 1. Board id: 255. Force loop cfg
  509. LPDDR4 probe
  510. ddr clk to 1608MHz
  511. Load ddrfw from eMMC, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part: 0
  512.  
  513. dmc_version 0001
  514. Check phy result
  515. INFO : ERROR : Training has failed!
  516. 1D training failed
  517. Cfg max: 4, cur: 2. Board id: 255. Force loop cfg
  518. LPDDR4 probe
  519. ddr clk to 1608MHz
  520. Load ddrfw from eMMC, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part: 0
  521.  
  522. dmc_version 0001
  523. Check phy result
  524. INFO : End of CA training
  525. INFO : End of initialization
  526. INFO : Training has run successfully!
  527. Check phy result
  528. INFO : End of initialization
  529. INFO : End of read enable training
  530. INFO : End of fine write leveling
  531. INFO : End of Write leveling coarse delay
  532. INFO : Training has run successfully!
  533. Check phy result
  534. INFO : End of initialization
  535. INFO : End of read dq deskew training
  536. INFO : End of MPR read delay center optimization
  537. INFO : End of write delay center optimization
  538. INFO : End of read delay center optimization
  539. INFO : End of max read latency training
  540. INFO : Training has run successfully!
  541. 1D training succeed
  542. Load ddrfw from eMMC, src: 0x00048200, des: 0xfffd0000, size: 0x0000c000, part: 0
  543. Check phy result
  544. INFO : End of initialization
  545. INFO : End of 2D read delay Voltage center optimization
  546. INFO : End of 2D read delay Voltage center optimization
  547. INFO : End of 2D write delay Voltage center optimization
  548. INFO : End of 2D write delay Voltage center optimization
  549. INFO : Training has run successfully!
  550.  
  551. channel==0
  552. RxClkDly_Margin_A0==97 ps 10
  553. TxDqDly_Margin_A0==106 ps 11
  554. RxClkDly_Margin_A1==0 ps 0
  555. TxDqDly_Margin_A1==0 ps 0
  556. TrainedVREFDQ_A0==29
  557. TrainedVREFDQ_A1==0
  558. VrefDac_Margin_A0==29
  559. DeviceVref_Margin_A0==29
  560. VrefDac_Margin_A1==0
  561. DeviceVref_Margin_A1==0
  562.  
  563.  
  564. channel==1
  565. RxClkDly_Margin_A0==87 ps 9
  566. TxDqDly_Margin_A0==106 ps 11
  567. RxClkDly_Margin_A1==0 ps 0
  568. TxDqDly_Margin_A1==0 ps 0
  569. TrainedVREFDQ_A0==29
  570. TrainedVREFDQ_A1==0
  571. VrefDac_Margin_A0==28
  572. DeviceVref_Margin_A0==28
  573. VrefDac_Margin_A1==0
  574. DeviceVref_Margin_A1==0
  575.  
  576. dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
  577.  
  578. soc_vref_reg_value 0x 00000026 00000026 00000026 00000026 00000027 0000002a 00000026 00000022
  579. 2D training succeed
  580. aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Jul 31 2019 19:17:53
  581. auto size-- 65535DDR cs0 size: 2048MB
  582. DDR cs1 size: 0MB
  583. DMC_DDR_CTRL: 00c0002cDDR size: 2048MB
  584. cs0 DataBus test pass
  585. cs0 AddrBus test pass
  586.  
  587. 100bdlr_step_size ps== 471
  588. result report
  589. boot times 0Enable ddr reg access
  590. 00000000
  591. emmc switch 3 ok
  592. Authentication key not yet programmed
  593. get rpmb counter error 0x00000007
  594. 00000000
  595. emmc switch 0 ok
  596. Load FIP HDR from eMMC, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0
  597. Load BL3X from eMMC, src: 0x00078200, des: 0x01768000, size: 0x000da000, part: 0
  598. 0.0;M3 CHK:0;cm4_sp_mode 0
  599. MVN_1=0x00000000
  600. MVN_2=0x00000000
  601. [Image: g12a_v1.1.3389-92241b5 2019-07-02 17:22:49 luan.yuan@droid15-sz]
  602. OPS=0x04
  603. ring efuse init
  604. 2b 0c 04 00 01 14 1c 00 00 06 34 39 39 46 38 50
  605. [0.017355 Inits done]
  606. secure task start!
  607. high task start!
  608. low task start!
  609. run into bl31
  610. NOTICE: BL31: v1.3(release):4fc40b1
  611. NOTICE: BL31: Built : 15:57:33, May 22 2019
  612. NOTICE: BL31: G12A normal boot!
  613. NOTICE: BL31: BL33 decompress pass
  614. ERROR: Error initializing runtime service opteed_fast
  615.  
  616.  
  617. U-Boot 2015.01-ga4bb005-dirty (Oct 30 2019 - 11:01:37)
  618.  
  619. DRAM: 2 GiB
  620. Relocation Offset is: 76e29000
  621. spi_post_bind(spifc): req_seq = 0
  622. register usb cfg[0][1] = 0000000077f2b510
  623. aml_i2c_init_port init regs for 0
  624. NAND: get_sys_clk_rate_mtd() 290, clock setting 200!
  625. NAND device id: 0 9f ff ff ff ff
  626. No NAND device found!!!
  627. nand init failed: -6
  628. get_sys_clk_rate_mtd() 290, clock setting 200!
  629. NAND device id: 0 9f ff ff ff ff
  630. No NAND device found!!!
  631. nand init failed: -6
  632. MMC: aml_priv->desc_buf = 0x0000000073e19e50
  633. aml_priv->desc_buf = 0x0000000073e1c190
  634. SDIO Port B: 0, SDIO Port C: 1
  635. co-phase 0x2, tx-dly 0, clock 400000
  636. co-phase 0x2, tx-dly 0, clock 400000
  637. co-phase 0x2, tx-dly 0, clock 400000
  638. emmc/sd response timeout, cmd8, status=0x3ff2800
  639. emmc/sd response timeout, cmd55, status=0x3ff2800
  640. co-phase 0x2, tx-dly 0, clock 400000
  641. co-phase 0x2, tx-dly 0, clock 40000000
  642. aml_sd_retry_refix[983]:delay = 0x0,gadjust =0x172000
  643. [mmc_startup] mmc refix success
  644. init_part() 297: PART_TYPE_AML
  645. [mmc_init] mmc init success
  646. start dts,buffer=0000000073e1ea00,dt_addr=0000000073e1ea00
  647. get_partition_from_dts() 91: ret 0
  648. parts: 17
  649. 00: logo 0000000000800000 1
  650. 01: recovery 0000000001800000 1
  651. 02: misc 0000000000800000 1
  652. 03: dtbo 0000000000800000 1
  653. 04: cri_data 0000000000800000 2
  654. 05: param 0000000001000000 2
  655. 06: boot 0000000001000000 1
  656. set has_boot_slot = 0
  657. 07: rsv 0000000001000000 1
  658. 08: metadata 0000000001000000 1
  659. 09: vbmeta 0000000000200000 1
  660. 10: tee 0000000002000000 1
  661. 11: vendor 0000000014000000 1
  662. 12: odm 0000000008000000 1
  663. 13: system 0000000050000000 1
  664. 14: product 0000000008000000 1
  665. 15: cache 0000000046000000 2
  666. 16: data ffffffffffffffff 4
  667. init_part() 297: PART_TYPE_AML
  668. eMMC/TSD partition table have been checked OK!
  669. crc32_s:0x1577dad == storage crc_pattern:0x1577dad!!!
  670. crc32_s:0xee152b83 == storage crc_pattern:0xee152b83!!!
  671. crc32_s:0x79f50f07 == storage crc_pattern:0x79f50f07!!!
  672. mmc env offset: 0x4d400000
  673. In: serial
  674. Out: serial
  675. Err: serial
  676. reboot_mode=cold_boot
  677. [store]To run cmd[emmc dtb_read 0x1000000 0x40000]
  678. _verify_dtb_checksum()-3406: calc 33a7c73c, store 33a7c73c
  679. _verify_dtb_checksum()-3406: calc 33a7c73c, store 33a7c73c
  680. dtb_read()-3623: total valid 2
  681. update_old_dtb()-3604: do nothing
  682. aml_i2c_init_port init regs for 0
  683. fusb302_init: Device ID: 0x91
  684. CC connected in 0 as UFP
  685. fusb302 detect chip.port_num = 0
  686. amlkey_init() enter!
  687. [EFUSE_MSG]keynum is 1
  688. vpu: clk_level in dts: 7
  689. vpu: vpu_power_on
  690. vpu: set clk: 666667000Hz, readback: 666666667Hz(0x100)
  691. vpu: vpu_module_init_config
  692. vpp: vpp_init
  693. vpp: vpp osd2 matrix rgb2yuv..............
  694. cvbs: cpuid:0x2b
  695. lcd: detect mode: tablet, key_valid: 0
  696. lcd: load config from dts
  697. lcd: pinctrl_version: 2
  698. lcd: use panel_type=lcd_1
  699. lcd extern: load config from dts
  700. lcd extern: error: dts: not find node /lcd_extern/extern_5
  701. lcd extern: aml_lcd_extern_probe failed
  702. lcd: bl: status disabled
  703. lcd: bl: invalid backlight config
  704. Net: dwmac.ff3f0000amlkey_init() enter!
  705. amlkey_init() 71: already init!
  706. [EFUSE_MSG]keynum is 1
  707. MACADDR:02:00:00:1c:14:01(from chipid)
  708.  
  709. CONFIG_AVB2: null
  710. Start read misc partition datas!
  711. info->magic =
  712. info->version_major = 1
  713. info->version_minor = 0
  714. info->slots[0].priority = 15
  715. info->slots[0].tries_remaining = 7
  716. info->slots[0].successful_boot = 0
  717. info->slots[1].priority = 14
  718. info->slots[1].tries_remaining = 7
  719. info->slots[1].successful_boot = 0
  720. info->crc32 = -1075449479
  721. active slot = 0
  722.  
  723. wipe_data=successful
  724. wipe_cache=successful
  725. upgrade_step=2
  726. reboot_mode:::: cold_boot
  727. amlkey_init() enter!
  728. amlkey_init() 71: already init!
  729. [EFUSE_MSG]keynum is 1
  730.  
  731. usid: c86314704ce9
  732.  
  733. mac address: c8:63:14:70:4c:e9
  734. [KM]Error:f[key_manage_query_size]L515:key[deviceid] not programed yet
  735. [KM]Error:f[key_manage_query_size]L515:key[region_code] not programed yet
  736. lcd: error: outputmode[1080p60hz] is not support
  737. hpd_state=1
  738. edid preferred_mode is 1080p60hz[16]
  739. hdr mode is 0
  740. dv mode is ver:0 len: 0
  741. hdr10+ mode is 0
  742. [OSD]load fb addr from dts:/meson-fb
  743. [OSD]load fb addr from dts:/fb
  744. [OSD]set initrd_high: 0x7f800000
  745. [OSD]fb_addr for logo: 0x7f800000
  746. [OSD]load fb addr from dts:/meson-fb
  747. [OSD]load fb addr from dts:/fb
  748. [OSD]fb_addr for logo: 0x7f800000
  749. [OSD]VPP_OFIFO_SIZE:0xfff01fff
  750. [CANVAS]canvas init
  751. [CANVAS]addr=0x7f800000 width=3840, height=2160
  752. [OSD]osd_hw.free_dst_data: 0,1919,0,1079
  753. [OSD]osd1_update_disp_freescale_enable
  754. cvbs: outputmode[1080p60hz] is invalid
  755. vpp: vpp_matrix_update: 2
  756. set hdmitx VIC = 16
  757. config HPLL = 5940000 frac_rate = 1
  758. HPLL: 0x3b3a04f7
  759. HPLL: 0x1b3a04f7
  760. HPLLv1: 0xdb3a04f7
  761. config HPLL done
  762. j = 6 vid_clk_div = 1
  763. hdmitx: set enc for VIC: 16
  764. hdmitx phy setting done
  765. enc_vpu_bridge_reset[1249]
  766. rx version is 1.4 or below div=10
  767. vpp: sdr_mode = 2
  768. vpp: Rx hdr_info.hdr_sup_eotf_smpte_st_2084 = 0
  769. normal power on
  770. boot wol: disable
  771. saradc: 0x288, hw_ver: 0x32 (VIM3.V12)
  772. amlkey_init() enter!
  773. amlkey_init() 71: already init!
  774. [EFUSE_MSG]keynum is 1
  775.  
  776. usid: c86314704ce9
  777.  
  778. mac address: c8:63:14:70:4c:e9
  779. [KM]Error:f[key_manage_query_size]L515:key[deviceid] not programed yet
  780. [KM]Error:f[key_manage_query_size]L515:key[region_code] not programed yet
  781. gpio: pin GPIOAO_7 (gpio 7) value is 1
  782. port mode is usb3.0
  783. Command: bcb uboot-command
  784. Start read misc partition datas!
  785. BCB hasn't any datas,exit!
  786. amlkey_init() enter!
  787. amlkey_init() 71: already init!
  788. [EFUSE_MSG]keynum is 1
  789.  
  790. usid: c86314704ce9
  791.  
  792. mac address: c8:63:14:70:4c:e9
  793. [KM]Error:f[key_manage_query_size]L515:key[deviceid] not programed yet
  794. [KM]Error:f[key_manage_query_size]L515:key[region_code] not programed yet
  795. Hit Enter or space or Ctrl+C key to stop autoboot -- : 0
  796. card in
  797. co-phase 0x2, tx-dly 0, clock 400000
  798. co-phase 0x2, tx-dly 0, clock 400000
  799. co-phase 0x2, tx-dly 0, clock 400000
  800. co-phase 0x2, tx-dly 0, clock 400000
  801. co-phase 0x2, tx-dly 0, clock 40000000
  802. aml_sd_retry_refix[983]:delay = 0x0,gadjust =0x182000
  803. [mmc_startup] mmc refix success
  804. init_part() 282: PART_TYPE_DOS
  805. [mmc_init] mmc init success
  806. Device: SDIO Port B
  807. Manufacturer ID: 3
  808. OEM: 5344
  809. Name: SS16G
  810. Tran Speed: 50000000
  811. Rd Block Len: 512
  812. SD version 3.0
  813. High Capacity: Yes
  814. Capacity: 14.8 GiB
  815. mmc clock: 40000000
  816. Bus Width: 4-bit
  817. reading s905_autoscript
  818. 1351 bytes read in 4 ms (329.1 KiB/s)
  819. ## Executing script at 01020000
  820. start amlogic old u-boot
  821. reading boot_android
  822. ** Unable to read file boot_android **
  823. ** Bad device usb 0 **
  824. reading u-boot.ext
  825. 709768 bytes read in 44 ms (15.4 MiB/s)
  826. ## Starting application at 0x01000000 ...
  827.  
  828.  
  829. U-Boot 2015.01 (Dec 09 2019 - 14:41:16)
  830.  
  831. DRAM: 2 GiB
  832. Relocation Offset is: 76ef4000
  833. spi_post_bind(spifc): req_seq = 0
  834. register usb cfg[0][1] = 0000000077f84d28
  835. MMC: aml_priv->desc_buf = 0x0000000073ee47c0
  836. aml_priv->desc_buf = 0x0000000073ee6b00
  837. SDIO Port C: 0, SDIO Port B: 1
  838. Using default environment
  839.  
  840. In: serial
  841. Out: serial
  842. Err: serial
  843. vpu: error: vpu: check dts: FDT_ERR_BADMAGIC, load default parameters
  844. vpu: driver version: v20190313
  845. vpu: detect chip type: 12
  846. vpu: clk_level default: 7(666667000Hz), max: 7(666667000Hz)
  847. vpu: clk_level = 7
  848. vpu: vpu_power_on
  849. vpu: set_vpu_clk
  850. vpu: set clk: 666667000Hz, readback: 666666667Hz(0x100)
  851. vpu: set_vpu_clk finish
  852. vpu: vpu_module_init_config
  853. vpp: vpp_init
  854. cvbs: cpuid:0x2b
  855. cvbs_config_hdmipll_g12a
  856. cvbs_set_vid2_clk
  857. co-phase 0x3, tx-dly 0, clock 400000
  858. co-phase 0x3, tx-dly 0, clock 400000
  859. co-phase 0x3, tx-dly 0, clock 400000
  860. emmc/sd response timeout, cmd8, status=0x3ff2800
  861. emmc/sd response timeout, cmd55, status=0x3ff2800
  862. co-phase 0x3, tx-dly 0, clock 400000
  863. co-phase 0x1, tx-dly 0, clock 40000000
  864. aml_sd_retry_refix[983]:delay = 0x0,gadjust =0x172000
  865. [mmc_startup] mmc refix success
  866. [mmc_init] mmc init success
  867. Failed to mount ext2 filesystem...
  868. ** Unrecognized filesystem type **
  869. Failed to mount ext2 filesystem...
  870. ** Unrecognized filesystem type **
  871. movi: not registered partition name, logo
  872. movi - Read/write command from/to SD/MMC for ODROID board
  873.  
  874. Usage:
  875. movi <read|write> <partition|sector> <offset> <address> [<length>]
  876. - <read|write> the command to access the storage
  877. - <offset> the offset from the start of given partiton in lba
  878. - <address> the memory address to load/store from/to the storage device
  879. - [<length>] the size of the block to read/write in bytes
  880. - all parameters must be hexa-decimal only
  881.  
  882. [OSD]check dts: FDT_ERR_BADMAGIC, load default fb_addr parameters
  883. [OSD]set initrd_high: 0x3d800000
  884. [OSD]fb_addr for logo: 0x3d800000
  885. [OSD]check dts: FDT_ERR_BADMAGIC, load default fb_addr parameters
  886. [OSD]fb_addr for logo: 0x3d800000
  887. [OSD]VPP_OFIFO_SIZE:0xfff01fff
  888. [CANVAS]canvas init
  889. [CANVAS]addr=0x3d800000 width=5760, height=2160
  890. [OSD]wait_vsync_wakeup exit
  891. cvbs: outputmode[1080p60hz] is invalid
  892. vpp: vpp_matrix_update: 2
  893. set hdmitx VIC = 16
  894. config HPLL = 5940000 frac_rate = 1
  895. HPLL: 0x3b3a04f7
  896. HPLL: 0x1b3a04f7
  897. HPLLv1: 0xdb3a04f7
  898. config HPLL done
  899. j = 6 vid_clk_div = 1
  900. hdmitx phy setting done
  901. hdmitx: set enc for VIC: 16
  902. enc_vpu_bridge_reset[1312]
  903. rx version is 1.4 or below div=10
  904. "Synchronous Abort" handler, esr 0x96000010
  905. ELR: 77f49e0c
  906. LR: 77f49dac
  907. x0 : 0000000077f84d28 x1 : 0000000000000002
  908. x2 : 0000000077fbcb88 x3 : 0000000077fbcb80
  909. x4 : 0000000000000002 x5 : 00000000ff63a000
  910. x6 : 0000000077f87d30 x7 : 0000000077f87d40
  911. x8 : 0000000000000370 x9 : 0000000076ef4000
  912. x10: 000000000000000f x11: 0000000077f64378
  913. x12: 0000000000000000 x13: 0000000000004000
  914. x14: 0000000001131b0c x15: 0000000001c81dc6
  915. x16: 0000000073e23360 x17: 0000000073e23d70
  916. x18: 0000000073ee3e28 x19: 00000000ff500000
  917. x20: 00000000ff50c000 x21: 0000000077fb67c0
  918. x22: 0000000077fbc000 x23: 0000000073ee3ac0
  919. x24: 0000000077f741c3 x25: 0000000077f74218
  920. x26: 0000000073ee3a58 x27: 0000000073ee9180
  921. x28: 0000000000000000 x29: 0000000073ee39a0
  922.  
  923. Resetting CPU ...
  924.  
  925. resetting ...
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