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- root@odroid:/usr/local/src/tinymembench# taskset -c 4-7 ./tinymembench
- tinymembench v0.4.9 (simple benchmark for memory throughput and latency)
- ==========================================================================
- == Memory bandwidth tests ==
- == ==
- == Note 1: 1MB = 1000000 bytes ==
- == Note 2: Results for 'copy' tests show how many bytes can be ==
- == copied per second (adding together read and writen ==
- == bytes would have provided twice higher numbers) ==
- == Note 3: 2-pass copy means that we are using a small temporary buffer ==
- == to first fetch data into it, and only then write it to the ==
- == destination (source -> L1 cache, L1 cache -> destination) ==
- == Note 4: If sample standard deviation exceeds 0.1%, it is shown in ==
- == brackets ==
- ==========================================================================
- C copy backwards : 1172.9 MB/s (0.7%)
- C copy backwards (32 byte blocks) : 1155.9 MB/s
- C copy backwards (64 byte blocks) : 2331.3 MB/s (2.3%)
- C copy : 2502.8 MB/s (2.6%)
- C copy prefetched (32 bytes step) : 2800.5 MB/s
- C copy prefetched (64 bytes step) : 2876.1 MB/s (2.9%)
- C 2-pass copy : 1347.3 MB/s
- C 2-pass copy prefetched (32 bytes step) : 1614.7 MB/s (1.3%)
- C 2-pass copy prefetched (64 bytes step) : 1631.4 MB/s
- C fill : 4930.6 MB/s (1.4%)
- C fill (shuffle within 16 byte blocks) : 1832.8 MB/s
- C fill (shuffle within 32 byte blocks) : 1832.9 MB/s (0.8%)
- C fill (shuffle within 64 byte blocks) : 1936.2 MB/s (0.9%)
- ---
- standard memcpy : 2303.7 MB/s (3.7%)
- standard memset : 4929.3 MB/s (1.7%)
- ---
- NEON read : 3379.4 MB/s
- NEON read prefetched (32 bytes step) : 4283.2 MB/s (1.1%)
- NEON read prefetched (64 bytes step) : 4295.5 MB/s (1.0%)
- NEON read 2 data streams : 3440.3 MB/s
- NEON read 2 data streams prefetched (32 bytes step) : 4419.4 MB/s (1.6%)
- NEON read 2 data streams prefetched (64 bytes step) : 4426.1 MB/s (0.9%)
- NEON copy : 2635.6 MB/s (2.1%)
- NEON copy prefetched (32 bytes step) : 2925.9 MB/s
- NEON copy prefetched (64 bytes step) : 2917.7 MB/s (2.5%)
- NEON unrolled copy : 2266.2 MB/s
- NEON unrolled copy prefetched (32 bytes step) : 3245.2 MB/s (2.2%)
- NEON unrolled copy prefetched (64 bytes step) : 3267.7 MB/s (3.0%)
- NEON copy backwards : 1222.9 MB/s
- NEON copy backwards prefetched (32 bytes step) : 1431.0 MB/s (0.9%)
- NEON copy backwards prefetched (64 bytes step) : 1430.2 MB/s
- NEON 2-pass copy : 2094.1 MB/s (1.5%)
- NEON 2-pass copy prefetched (32 bytes step) : 2277.8 MB/s (1.0%)
- NEON 2-pass copy prefetched (64 bytes step) : 2279.7 MB/s (1.0%)
- NEON unrolled 2-pass copy : 1397.4 MB/s
- NEON unrolled 2-pass copy prefetched (32 bytes step) : 1734.3 MB/s (1.2%)
- NEON unrolled 2-pass copy prefetched (64 bytes step) : 1749.9 MB/s
- NEON fill : 4914.0 MB/s (1.2%)
- NEON fill backwards : 1842.1 MB/s
- VFP copy : 2462.7 MB/s (1.8%)
- VFP 2-pass copy : 1340.5 MB/s
- ARM fill (STRD) : 4927.1 MB/s (1.7%)
- ARM fill (STM with 8 registers) : 4913.2 MB/s (1.0%)
- ARM fill (STM with 4 registers) : 4921.0 MB/s (1.1%)
- ARM copy prefetched (incr pld) : 2949.9 MB/s (2.3%)
- ARM copy prefetched (wrap pld) : 2780.9 MB/s
- ARM 2-pass copy prefetched (incr pld) : 1681.3 MB/s (1.0%)
- ARM 2-pass copy prefetched (wrap pld) : 1637.1 MB/s
- ==========================================================================
- == Memory latency test ==
- == ==
- == Average time is measured for random memory accesses in the buffers ==
- == of different sizes. The larger is the buffer, the more significant ==
- == are relative contributions of TLB, L1/L2 cache misses and SDRAM ==
- == accesses. For extremely large buffer sizes we are expecting to see ==
- == page table walk with several requests to SDRAM for almost every ==
- == memory access (though 64MiB is not nearly large enough to experience ==
- == this effect to its fullest). ==
- == ==
- == Note 1: All the numbers are representing extra time, which needs to ==
- == be added to L1 cache latency. The cycle timings for L1 cache ==
- == latency can be usually found in the processor documentation. ==
- == Note 2: Dual random read means that we are simultaneously performing ==
- == two independent memory accesses at a time. In the case if ==
- == the memory subsystem can't handle multiple outstanding ==
- == requests, dual random read has the same timings as two ==
- == single reads performed one after another. ==
- ==========================================================================
- block size : single random read / dual random read
- 1024 : 0.0 ns / 0.0 ns
- 2048 : 0.0 ns / 0.0 ns
- 4096 : 0.0 ns / 0.0 ns
- 8192 : 0.0 ns / 0.0 ns
- 16384 : 0.0 ns / 0.0 ns
- 32768 : 0.0 ns / 0.0 ns
- 65536 : 4.4 ns / 6.5 ns
- 131072 : 6.7 ns / 8.7 ns
- 262144 : 9.6 ns / 11.6 ns
- 524288 : 11.1 ns / 13.3 ns
- 1048576 : 12.0 ns / 14.3 ns
- 2097152 : 23.0 ns / 30.7 ns
- 4194304 : 95.6 ns / 143.8 ns
- 8388608 : 134.6 ns / 182.5 ns
- 16777216 : 154.2 ns / 197.8 ns
- 33554432 : 169.9 ns / 217.8 ns
- 67108864 : 179.8 ns / 230.8 ns
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