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- ```
- ===================================================================
- MT7621 stage1 code Mar 12 2015 14:43:30 (ASIC)
- CPU=500000000 HZ BUS=125000000 HZ
- ==================================================================
- Change MPLL source from XTAL to CR...
- do MEMPLL setting..
- MEMPLL Config : 0x11000000
- 3PLL mode + External loopback
- === XTAL-40Mhz === DDR-800Mhz ===
- PLL2 FB_DL: 0xc, 1/0 = 585/439 31000000
- PLL3 FB_DL: 0xc, 1/0 = 622/402 31000000
- PLL4 FB_DL: 0xc, 1/0 = 513/511 31000000
- do DDR setting..[01F40000]
- Apply DDR2 Setting...(use default AC)
- 0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120
- --------------------------------------------------------------------------------
- 0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1
- 0007:| 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1
- 0008:| 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0
- 0009:| 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0
- 000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 000E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 000F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0010:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0011:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0012:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0013:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0014:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- DRAMC_DQSCTL1[0e0]=1A000000
- DRAMC_DQSGCTL[124]=80000000
- rank 0 coarse = 8
- rank 0 fine = 48
- B:| 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0
- opt_dle value:5
- DRAMC_DDR2CTL[07c]=40001253
- DRAMC_PADCTL4[0e4]=00000005
- DRAMC_DQIDLY1[210]=0A0D090C
- DRAMC_DQIDLY2[214]=070C0A0B
- DRAMC_DQIDLY3[218]=0B090807
- DRAMC_DQIDLY4[21c]=07090A05
- DRAMC_R0DELDLY[018]=00002C2C
- ==================================================================
- RX DQS perbit delay software calibration
- ==================================================================
- 1.0-15 bit dq delay value
- ==================================================================
- bit| 0 1 2 3 4 5 6 7 8 9
- --------------------------------------
- 0 | 10 7 11 10 9 7 11 5 5 5
- 10 | 6 9 3 8 7 7
- --------------------------------------
- ==================================================================
- 2.dqs window
- x=pass dqs delay value (min~max)center
- y=0-7bit DQ of every group
- input delay:DQS0 =44 DQS1 = 44
- ==================================================================
- bit DQS0 bit DQS1
- 0 (1~83)42 8 (1~84)42
- 1 (1~83)42 9 (1~81)41
- 2 (1~83)42 10 (1~82)41
- 3 (1~87)44 11 (1~83)42
- 4 (1~83)42 12 (1~83)42
- 5 (1~81)41 13 (1~83)42
- 6 (1~86)43 14 (1~84)42
- 7 (1~83)42 15 (1~87)44
- ==================================================================
- 3.dq delay value last
- ==================================================================
- bit| 0 1 2 3 4 5 6 7 8 9
- --------------------------------------
- 0 | 12 9 13 10 11 10 12 7 7 8
- 10 | 9 11 5 10 9 7
- ==================================================================
- ==================================================================
- TX perbyte calibration
- ==================================================================
- DQS loop = 15, cmp_err_1 = ffff0000
- dqs_perbyte_dly.last_dqsdly_pass[0]=15, finish count=1
- dqs_perbyte_dly.last_dqsdly_pass[1]=15, finish count=2
- DQ loop=15, cmp_err_1 = ffff0000
- dqs_perbyte_dly.last_dqdly_pass[0]=15, finish count=1
- dqs_perbyte_dly.last_dqdly_pass[1]=15, finish count=2
- byte:0, (DQS,DQ)=(8,8)
- byte:1, (DQS,DQ)=(8,8)
- DRAMC_DQODLY1[200]=88888888
- DRAMC_DQODLY2[204]=88888888
- 20,data:88
- [EMI] DRAMC calibration passed
- ===================================================================
- MT7621 stage1 code done
- CPU=500000000 HZ BUS=125000000 HZ
- ===================================================================
- U-Boot 1.1.3 (Apr 1 2022 - 15:07:38)
- Board: Ralink APSoC DRAM: 64 MB
- relocate_code Pointer at: 83fb8000
- Config XHCI 40M PLL
- flash manufacture id: 20, device id 70 17
- Warning: un-recognized chip ID, please update bootloader!
- *** Warning - bad CRC, using default environment
- ===========================TL-WPA8631Pv3 PERSET GPIO init in uboot=========================
- read register GPIO_MODE(0xbe000060), value = 0x0004d52c
- set register GPIO_MODE(0xbe000060), value = 0x0004d52c
- read register GPIO_CTRL_0(0xbe000600), value = 0x35c00000
- set register GPIO_CTRL_0(0xbe000600), value = 0x35c80000
- read register GPIO_DATA_0(0xbe000620), value = 0xc83de81e
- set register GPIO_DATA_0(0xbe000620), value = 0xc835e81e
- =========================TL-WPA8631Pv3 PERSET GPIO init in uboot done==========================
- ============================================
- Ralink UBoot Version: 4.3.0.0
- --------------------------------------------
- ASIC MT7621A DualCore (MAC to MT7530 Mode)
- DRAM_CONF_FROM: Auto-Detection
- DRAM_TYPE: DDR2
- DRAM bus: 16 bit
- Xtal Mode=3 OCP Ratio=1/4
- Flash component: SPI Flash
- Date:Apr 1 2022 Time:15:07:38
- ============================================
- icache: sets:256, ways:4, linesz:32 ,total:32768
- dcache: sets:256, ways:4, linesz:32 ,total:32768
- ##### The CPU freq = 880 MHZ ####
- estimate memory size =64 Mbytes
- #Reset_MT7530
- =========TL-WPA8631Pv3 GPIO init in uboot=========
- RALINK_PIO_BASE(0xbe000600) Reg: 0x4852c
- RALINK_PIO_BASE + 4(0xbe000604) Reg: 0x0
- RALINK_GPIOMODE_REG(0xbe000060) Reg: 0x4852c
- =========TL-WPA8631Pv3 GPIO init in uboot done=========
- Please choose the operation:
- 1: Load system code to SDRAM via TFTP.
- 2: Load system code then write to Flash via TFTP.
- 3: Boot system code via Flash (default).
- 4: Entr boot command line interface.
- 7: Load Boot Loader code then write to Flash via Serial.
- 9: Load Boot Loader code then write to Flash via TFTP.
- 0
- 3: System Boot system code via Flash.
- (ntohs(targetModel[0]) : 0x0376, ntohs(value[0]) : 0x0376
- (ntohs(targetModel[1]) : 0x6376, ntohs(value[1]) : 0x6376
- ## Booting image at bfc20000 ...
- text base: 80001000
- entry point: 80001000
- Uncompressing Kernel Image ... OK
- No initrd
- ## Transferring control to Linux (at address 80001000) ...
- ## Giving linux memsize in MB, 64
- Starting kernel ...
- [ 0.000000] Linux version 5.15.162 (builder@buildhost) (mipsel-openwrt-linux-musl-gcc (OpenWrt GCC 12.3.0 r24012-d8dd03c46f) 12.3.0, GNU ld (GNU Binutils) 2.40.0) #0 SMP Mon Jul 15 22:14:18 2024
- [ 0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3
- [ 0.000000] printk: bootconsole [early0] enabled
- [ 0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
- [ 0.000000] MIPS: machine is TP-Link TL-WPA8631P v3
- [ 0.000000] Initrd not found or empty - disabling initrd
- [ 0.000000] VPE topology {2,2} total 4
- [ 0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
- [ 0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
- [ 0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
- [ 0.000000] Zone ranges:
- [ 0.000000] Normal [mem 0x0000000000000000-0x0000000003ffffff]
- [ 0.000000] Movable zone start for each node
- [ 0.000000] Early memory node ranges
- [ 0.000000] node 0: [mem 0x0000000000000000-0x0000000003ffffff]
- [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000003ffffff]
- [ 0.000000] percpu: Embedded 12 pages/cpu s17808 r8192 d23152 u49152
- [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 16240
- [ 0.000000] Kernel command line: console=ttyS0,57600 rootfstype=squashfs,jffs2
- [ 0.000000] Dentry cache hash table entries: 8192 (order: 3, 32768 bytes, linear)
- [ 0.000000] Inode-cache hash table entries: 4096 (order: 2, 16384 bytes, linear)
- [ 0.000000] Writing ErrCtl register=00010564
- [ 0.000000] Readback ErrCtl register=00010564
- [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
- [ 0.000000] Memory: 54304K/65536K available (7317K kernel code, 628K rwdata, 884K rodata, 1272K init, 225K bss, 11232K reserved, 0K cma-reserved)
- [ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
- [ 0.000000] rcu: Hierarchical RCU implementation.
- [ 0.000000] Tracing variant of Tasks RCU enabled.
- [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
- [ 0.000000] NR_IRQS: 256
- [ 0.000000] clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns
- [ 0.000004] sched_clock: 64 bits at 880MHz, resolution 1ns, wraps every 4398046511103ns
- [ 0.016022] Calibrating delay loop... 586.13 BogoMIPS (lpj=2930688)
- [ 0.088311] pid_max: default: 32768 minimum: 301
- [ 0.098276] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
- [ 0.112691] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
- [ 0.131979] rcu: Hierarchical SRCU implementation.
- [ 0.142220] smp: Bringing up secondary CPUs ...
- [ 0.151998] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
- [ 0.152025] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
- [ 0.152040] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
- [ 0.152088] CPU1 revision is: 0001992f (MIPS 1004Kc)
- [ 0.211721] Synchronize counters for CPU 1: done.
- [ 0.273646] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
- [ 0.273668] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
- [ 0.273680] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
- [ 0.273707] CPU2 revision is: 0001992f (MIPS 1004Kc)
- [ 0.332775] Synchronize counters for CPU 2: done.
- [ 0.393195] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
- [ 0.393216] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
- [ 0.393228] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
- [ 0.393261] CPU3 revision is: 0001992f (MIPS 1004Kc)
- [ 0.452353] Synchronize counters for CPU 3: done.
- [ 0.511955] smp: Brought up 1 node, 4 CPUs
- [ 0.525259] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
- [ 0.544758] futex hash table entries: 1024 (order: 3, 32768 bytes, linear)
- [ 0.558679] pinctrl core: initialized pinctrl subsystem
- [ 0.570600] NET: Registered PF_NETLINK/PF_ROUTE protocol family
- [ 0.583049] thermal_sys: Registered thermal governor 'step_wise'
- [ 0.614329] clocksource: Switched to clocksource GIC
- [ 0.625646] NET: Registered PF_INET protocol family
- [ 0.635434] IP idents hash table entries: 2048 (order: 2, 16384 bytes, linear)
- [ 0.650721] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 4096 bytes, linear)
- [ 0.667294] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
- [ 0.682623] TCP established hash table entries: 1024 (order: 0, 4096 bytes, linear)
- [ 0.697834] TCP bind hash table entries: 1024 (order: 1, 8192 bytes, linear)
- [ 0.711841] TCP: Hash tables configured (established 1024 bind 1024)
- [ 0.724612] UDP hash table entries: 256 (order: 1, 8192 bytes, linear)
- [ 0.737531] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes, linear)
- [ 0.751740] NET: Registered PF_UNIX/PF_LOCAL protocol family
- [ 0.762944] PCI: CLS 0 bytes, default 32
- [ 0.773597] workingset: timestamp_bits=14 max_order=14 bucket_order=0
- [ 0.791741] squashfs: version 4.0 (2009/01/31) Phillip Lougher
- [ 0.803330] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
- [ 0.824383] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 251)
- [ 0.843457] mt7621_gpio 1e000600.gpio: registering 32 gpios
- [ 0.854966] mt7621_gpio 1e000600.gpio: registering 32 gpios
- [ 0.866420] mt7621_gpio 1e000600.gpio: registering 32 gpios
- [ 0.878050] mt7621-pci 1e140000.pcie: host bridge /pcie@1e140000 ranges:
- [ 0.891334] mt7621-pci 1e140000.pcie: No bus range found for /pcie@1e140000, using [bus 00-ff]
- [ 0.908804] mt7621-pci 1e140000.pcie: MEM 0x0060000000..0x006fffffff -> 0x0060000000
- [ 0.925028] mt7621-pci 1e140000.pcie: IO 0x001e160000..0x001e16ffff -> 0x0000000000
- [ 1.294325] mt7621-pci 1e140000.pcie: pcie2 no card, disable it (RST & CLK)
- [ 1.308099] mt7621-pci 1e140000.pcie: PCIE0 enabled
- [ 1.317750] mt7621-pci 1e140000.pcie: PCIE1 enabled
- [ 1.327446] PCI coherence region base: 0x60000000, mask/settings: 0xf0000002
- [ 1.341645] mt7621-pci 1e140000.pcie: PCI host bridge to bus 0000:00
- [ 1.354171] pci_bus 0000:00: root bus resource [bus 00-ff]
- [ 1.365048] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
- [ 1.378691] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]
- [ 1.391009] pci 0000:00:00.0: [0e8d:0801] type 01 class 0x060400
- [ 1.402898] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x7fffffff]
- [ 1.415337] pci 0000:00:00.0: reg 0x14: [mem 0x00000000-0x0000ffff]
- [ 1.427841] pci 0000:00:00.0: supports D1
- [ 1.435715] pci 0000:00:00.0: PME# supported from D0 D1 D3hot
- [ 1.448065] pci 0000:00:01.0: [0e8d:0801] type 01 class 0x060400
- [ 1.459988] pci 0000:00:01.0: reg 0x10: [mem 0x00000000-0x7fffffff]
- [ 1.472388] pci 0000:00:01.0: reg 0x14: [mem 0x00000000-0x0000ffff]
- [ 1.484917] pci 0000:00:01.0: supports D1
- [ 1.492740] pci 0000:00:01.0: PME# supported from D0 D1 D3hot
- [ 1.506122] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
- [ 1.521983] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring
- [ 1.538129] pci 0000:01:00.0: [14c3:7603] type 00 class 0x028000
- ===================================================================
- MT7621 stage1 code Mar 12 2015 14:43:30 (ASIC)
- CPU=500000000 HZ BUS=125000000 HZ
- ==================================================================
- Change MPLL source from XTAL to CR...
- do MEMPLL setting..
- MEMPLL Config : 0x11000000
- 3PLL mode + External loopback
- === XTAL-40Mhz === DDR-800Mhz ===
- PLL2 FB_DL: 0xc, 1/0 = 519/505 31000000
- PLL3 FB_DL: 0xc, 1/0 = 630/394 31000000
- PLL4 FB_DL: 0xc, 1/0 = 530/494 31000000
- do DDR setting..[01F40000]
- Apply DDR2 Setting...(use default AC)
- 0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120
- --------------------------------------------------------------------------------
- 0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1
- 0007:| 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1
- 0008:| 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0
- 0009:| 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0
- 000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 000E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 000F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0010:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0011:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0012:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0013:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0014:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- 001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- DRAMC_DQSCTL1[0e0]=1A000000
- DRAMC_DQSGCTL[124]=80000000
- rank 0 coarse = 8
- rank 0 fine = 48
- B:| 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0
- opt_dle value:5
- DRAMC_DDR2CTL[07c]=40001253
- DRAMC_PADCTL4[0e4]=00000005
- DRAMC_DQIDLY1[210]=0A0C080B
- DRAMC_DQIDLY2[214]=070B0A0A
- DRAMC_DQIDLY3[218]=0B080806
- DRAMC_DQIDLY4[21c]=07070804
- DRAMC_R0DELDLY[018]=00002B2C
- ==================================================================
- RX DQS perbit delay software calibration
- ==================================================================
- 1.0-15 bit dq delay value
- ==================================================================
- bit| 0 1 2 3 4 5 6 7 8 9
- --------------------------------------
- 0 | 10 7 11 10 7 7 11 5 6 6
- 10 | 6 9 3 8 7 7
- --------------------------------------
- ==================================================================
- 2.dqs window
- x=pass dqs delay value (min~max)center
- y=0-7bit DQ of every group
- input delay:DQS0 =44 DQS1 = 43
- ==================================================================
- bit DQS0 bit DQS1
- 0 (1~85)43 8 (1~86)43
- 1 (1~85)43 9 (1~82)41
- 2 (1~85)43 10 (1~82)41
- 3 (1~87)44 11 (1~82)41
- 4 (0~82)41 12 (1~84)42
- 5 (1~82)41 13 (1~85)43
- 6 (2~86)44 14 (1~85)43
- 7 (1~84)42 15 (1~86)43
- ==================================================================
- 3.dq delay value last
- ==================================================================
- bit| 0 1 2 3 4 5 6 7 8 9
- --------------------------------------
- 0 | 11 8 12 10 10 10 11 7 6 8
- 10 | 8 11 4 8 7 7
- ==================================================================
- ==================================================================
- TX perbyte calibration
- ==================================================================
- DQS loop = 15, cmp_err_1 = ffff0000
- dqs_perbyte_dly.last_dqsdly_pass[0]=15, finish count=1
- dqs_perbyte_dly.last_dqsdly_pass[1]=15, finish count=2
- DQ loop=15, cmp_err_1 = ffff0000
- dqs_perbyte_dly.last_dqdly_pass[0]=15, finish count=1
- dqs_perbyte_dly.last_dqdly_pass[1]=15, finish count=2
- byte:0, (DQS,DQ)=(8,8)
- byte:1, (DQS,DQ)=(8,8)
- DRAMC_DQODLY1[200]=88888888
- DRAMC_DQODLY2[204]=88888888
- 20,data:88
- [EMI] DRAMC calibration passed
- ===================================================================
- MT7621 stage1 code done
- CPU=500000000 HZ BUS=125000000 HZ
- ===================================================================
- U-Boot 1.1.3 (Apr 1 2022 - 15:07:38)
- Board: Ralink APSoC DRAM: 64 MB
- relocate_code Pointer at: 83fb8000
- Config XHCI 40M PLL
- flash manufacture id: 20, device id 70 17
- Warning: un-recognized chip ID, please update bootloader!
- *** Warning - bad CRC, using default environment
- ===========================TL-WPA8631Pv3 PERSET GPIO init in uboot=========================
- read register GPIO_MODE(0xbe000060), value = 0x0004d52c
- set register GPIO_MODE(0xbe000060), value = 0x0004d52c
- read register GPIO_CTRL_0(0xbe000600), value = 0x35c00000
- set register GPIO_CTRL_0(0xbe000600), value = 0x35c80000
- read register GPIO_DATA_0(0xbe000620), value = 0x883de81e
- set register GPIO_DATA_0(0xbe000620), value = 0x8835e81e
- =========================TL-WPA8631Pv3 PERSET GPIO init in uboot done==========================
- ============================================
- Ralink UBoot Version: 4.3.0.0
- --------------------------------------------
- ASIC MT7621A DualCore (MAC to MT7530 Mode)
- DRAM_CONF_FROM: Auto-Detection
- DRAM_TYPE: DDR2
- DRAM bus: 16 bit
- Xtal Mode=3 OCP Ratio=1/4
- Flash component: SPI Flash
- Date:Apr 1 2022 Time:15:07:38
- ============================================
- icache: sets:256, ways:4, linesz:32 ,total:32768
- dcache: sets:256, ways:4, linesz:32 ,total:32768
- ##### The CPU freq = 880 MHZ ####
- estimate memory size =64 Mbytes
- #Reset_MT7530
- =========TL-WPA8631Pv3 GPIO init in uboot=========
- RALINK_PIO_BASE(0xbe000600) Reg: 0x4852c
- RALINK_PIO_BASE + 4(0xbe000604) Reg: 0x0
- RALINK_GPIOMODE_REG(0xbe000060) Reg: 0x4852c
- =========TL-WPA8631Pv3 GPIO init in uboot done=========
- Please choose the operation:
- 1: Load system code to SDRAM via TFTP.
- 2: Load system code then write to Flash via TFTP.
- 3: Boot system code via Flash (default).
- 4: Entr boot command line interface.
- 7: Load Boot Loader code then write to Flash via Serial.
- 9: Load Boot Loader code then write to Flash via TFTP.
- 0
- 3: System Boot system code via Flash.
- (ntohs(targetModel[0]) : 0x0376, ntohs(value[0]) : 0x0376
- (ntohs(targetModel[1]) : 0x6376, ntohs(value[1]) : 0x6376
- ## Booting image at bfc20000 ...
- text base: 80001000
- entry point: 80001000
- Uncompressing Kernel Image ... OK
- No initrd
- ## Transferring control to Linux (at address 80001000) ...
- ## Giving linux memsize in MB, 64
- Starting kernel ...
- [ 0.000000] Linux version 5.15.162 (builder@buildhost) (mipsel-openwrt-linux-musl-gcc (OpenWrt GCC 12.3.0 r24012-d8dd03c46f) 12.3.0, GNU ld (GNU Binutils) 2.40.0) #0 SMP Mon Jul 15 22:14:18 2024
- [ 0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3
- [ 0.000000] printk: bootconsole [early0] enabled
- [ 0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
- [ 0.000000] MIPS: machine is TP-Link TL-WPA8631P v3
- [ 0.000000] Initrd not found or empty - disabling initrd
- [ 0.000000] VPE topology {2,2} total 4
- [ 0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
- [ 0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
- [ 0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
- [ 0.000000] Zone ranges:
- [ 0.000000] Normal [mem 0x0000000000000000-0x0000000003ffffff]
- [ 0.000000] Movable zone start for each node
- [ 0.000000] Early memory node ranges
- [ 0.000000] node 0: [mem 0x0000000000000000-0x0000000003ffffff]
- [ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000003ffffff]
- [ 0.000000] percpu: Embedded 12 pages/cpu s17808 r8192 d23152 u49152
- [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 16240
- [ 0.000000] Kernel command line: console=ttyS0,57600 rootfstype=squashfs,jffs2
- [ 0.000000] Dentry cache hash table entries: 8192 (order: 3, 32768 bytes, linear)
- [ 0.000000] Inode-cache hash table entries: 4096 (order: 2, 16384 bytes, linear)
- [ 0.000000] Writing ErrCtl register=00010564
- [ 0.000000] Readback ErrCtl register=00010564
- [ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
- [ 0.000000] Memory: 54304K/65536K available (7317K kernel code, 628K rwdata, 884K rodata, 1272K init, 225K bss, 11232K reserved, 0K cma-reserved)
- [ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
- [ 0.000000] rcu: Hierarchical RCU implementation.
- [ 0.000000] Tracing variant of Tasks RCU enabled.
- [ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
- [ 0.000000] NR_IRQS: 256
- [ 0.000000] clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns
- [ 0.000004] sched_clock: 64 bits at 880MHz, resolution 1ns, wraps every 4398046511103ns
- [ 0.016023] Calibrating delay loop... 586.13 BogoMIPS (lpj=2930688)
- [ 0.088312] pid_max: default: 32768 minimum: 301
- [ 0.098278] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
- [ 0.112693] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
- [ 0.131991] rcu: Hierarchical SRCU implementation.
- [ 0.142230] smp: Bringing up secondary CPUs ...
- [ 0.152018] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
- [ 0.152045] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
- [ 0.152060] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
- [ 0.152111] CPU1 revision is: 0001992f (MIPS 1004Kc)
- [ 0.211732] Synchronize counters for CPU 1: done.
- [ 0.273660] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
- [ 0.273682] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
- [ 0.273694] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
- [ 0.273721] CPU2 revision is: 0001992f (MIPS 1004Kc)
- [ 0.332791] Synchronize counters for CPU 2: done.
- [ 0.393208] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
- [ 0.393228] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
- [ 0.393239] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
- [ 0.393271] CPU3 revision is: 0001992f (MIPS 1004Kc)
- [ 0.452370] Synchronize counters for CPU 3: done.
- [ 0.511974] smp: Brought up 1 node, 4 CPUs
- [ 0.525264] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
- [ 0.544764] futex hash table entries: 1024 (order: 3, 32768 bytes, linear)
- [ 0.558687] pinctrl core: initialized pinctrl subsystem
- [ 0.570608] NET: Registered PF_NETLINK/PF_ROUTE protocol family
- [ 0.583056] thermal_sys: Registered thermal governor 'step_wise'
- [ 0.614380] clocksource: Switched to clocksource GIC
- [ 0.625700] NET: Registered PF_INET protocol family
- [ 0.635490] IP idents hash table entries: 2048 (order: 2, 16384 bytes, linear)
- [ 0.650772] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 4096 bytes, linear)
- [ 0.667347] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
- [ 0.682673] TCP established hash table entries: 1024 (order: 0, 4096 bytes, linear)
- [ 0.697886] TCP bind hash table entries: 1024 (order: 1, 8192 bytes, linear)
- [ 0.711892] TCP: Hash tables configured (established 1024 bind 1024)
- [ 0.724668] UDP hash table entries: 256 (order: 1, 8192 bytes, linear)
- [ 0.737587] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes, linear)
- [ 0.751795] NET: Registered PF_UNIX/PF_LOCAL protocol family
- [ 0.762999] PCI: CLS 0 bytes, default 32
- [ 0.773718] workingset: timestamp_bits=14 max_order=14 bucket_order=0
- [ 0.791892] squashfs: version 4.0 (2009/01/31) Phillip Lougher
- [ 0.803465] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
- [ 0.824459] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 251)
- [ 0.843310] mt7621_gpio 1e000600.gpio: registering 32 gpios
- [ 0.854909] mt7621_gpio 1e000600.gpio: registering 32 gpios
- [ 0.866284] mt7621_gpio 1e000600.gpio: registering 32 gpios
- [ 0.877875] mt7621-pci 1e140000.pcie: host bridge /pcie@1e140000 ranges:
- [ 0.891130] mt7621-pci 1e140000.pcie: No bus range found for /pcie@1e140000, using [bus 00-ff]
- [ 0.908597] mt7621-pci 1e140000.pcie: MEM 0x0060000000..0x006fffffff -> 0x0060000000
- [ 0.924874] mt7621-pci 1e140000.pcie: IO 0x001e160000..0x001e16ffff -> 0x0000000000
- [ 1.294386] mt7621-pci 1e140000.pcie: pcie2 no card, disable it (RST & CLK)
- [ 1.308169] mt7621-pci 1e140000.pcie: PCIE0 enabled
- [ 1.317814] mt7621-pci 1e140000.pcie: PCIE1 enabled
- [ 1.327510] PCI coherence region base: 0x60000000, mask/settings: 0xf0000002
- [ 1.341652] mt7621-pci 1e140000.pcie: PCI host bridge to bus 0000:00
- [ 1.354178] pci_bus 0000:00: root bus resource [bus 00-ff]
- [ 1.365071] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
- [ 1.378706] pci_bus 0000:00: root bus resource [io 0x0000-0xffff]
- [ 1.391027] pci 0000:00:00.0: [0e8d:0801] type 01 class 0x060400
- [ 1.402918] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x7fffffff]
- [ 1.415360] pci 0000:00:00.0: reg 0x14: [mem 0x00000000-0x0000ffff]
- [ 1.427860] pci 0000:00:00.0: supports D1
- [ 1.435731] pci 0000:00:00.0: PME# supported from D0 D1 D3hot
- [ 1.448039] pci 0000:00:01.0: [0e8d:0801] type 01 class 0x060400
- [ 1.459953] pci 0000:00:01.0: reg 0x10: [mem 0x00000000-0x7fffffff]
- [ 1.472350] pci 0000:00:01.0: reg 0x14: [mem 0x00000000-0x0000ffff]
- [ 1.484879] pci 0000:00:01.0: supports D1
- [ 1.492705] pci 0000:00:01.0: PME# supported from D0 D1 D3hot
- [ 1.506229] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
- [ 1.522093] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring
- [ 1.538305] pci 0000:01:00.0: [14c3:7603] type 00 class 0x028000
- [ 1.550211] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x000fffff]
- [ 1.562734] pci 0000:01:00.0: PME# supported from D0 D3hot D3cold
- [ 1.576238] pci 0000:00:00.0: PCI bridge to [bus 01-ff]
- [ 1.586562] pci 0000:00:00.0: bridge window [io 0x0000-0x0fff]
- [ 1.598627] pci 0000:00:00.0: bridge window [mem 0x00000000-0x000fffff]
- [ 1.612124] pci 0000:00:00.0: bridge window [mem 0x00000000-0x000fffff pref]
- [ 1.626453] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
- [ 1.639860] pci 0000:02:00.0: [14c3:7663] type 00 class 0x000280
- [ 1.651767] pci 0000:02:00.0: reg 0x10: [mem 0x00000000-0x000fffff 64bit pref]
- [ 1.666071] pci 0000:02:00.0: reg 0x18: [mem 0x00000000-0x00003fff 64bit pref]
- [ 1.680404] pci 0000:02:00.0: reg 0x20: [mem 0x00000000-0x00000fff 64bit pref]
- [ 1.694852] pci 0000:02:00.0: supports D1 D2
- [ 1.703186] pci 0000:02:00.0: PME# supported from D0 D1 D2 D3hot D3cold
- [ 1.716391] pci 0000:02:00.0: 2.000 Gb/s available PCIe bandwidth, limited by 2.5 GT/s PCIe x1 link at 0000:00:01.0 (capable of 4.000 Gb/s with 5.0 GT/s PCIe x1 link)
- [ 1.747379] pci 0000:00:01.0: PCI bridge to [bus 02-ff]
- [ 1.757712] pci 0000:00:01.0: bridge window [io 0x0000-0x0fff]
- [ 1.769767] pci 0000:00:01.0: bridge window [mem 0x00000000-0x000fffff]
- [ 1.783253] pci 0000:00:01.0: bridge window [mem 0x00000000-0x000fffff pref]
- [ 1.797603] pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to 02
- [ 1.810784] pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000]
- [ 1.823852] pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000]
- [ 1.837682] pci 0000:00:01.0: BAR 0: no space for [mem size 0x80000000]
- [ 1.850814] pci 0000:00:01.0: BAR 0: failed to assign [mem size 0x80000000]
- [ 1.864652] pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
- [ 1.878121] pci 0000:00:00.0: BAR 9: assigned [mem 0x60100000-0x601fffff pref]
- [ 1.892457] pci 0000:00:01.0: BAR 8: assigned [mem 0x60200000-0x602fffff]
- [ 1.905939] pci 0000:00:01.0: BAR 9: assigned [mem 0x60300000-0x604fffff pref]
- [ 1.920291] pci 0000:00:00.0: BAR 1: assigned [mem 0x60500000-0x6050ffff]
- [ 1.933772] pci 0000:00:01.0: BAR 1: assigned [mem 0x60510000-0x6051ffff]
- [ 1.947240] pci 0000:00:00.0: BAR 7: assigned [io 0x0000-0x0fff]
- [ 1.959337] pci 0000:00:01.0: BAR 7: assigned [io 0x1000-0x1fff]
- [ 1.971434] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff]
- [ 1.984920] pci 0000:01:00.0: BAR 0: error updating (0x60000000 != 0xffffffff)
- [ 1.999252] pci 0000:00:00.0: PCI bridge to [bus 01]
- [ 2.009095] pci 0000:00:00.0: bridge window [io 0x0000-0x0fff]
- [ 2.021199] pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff]
- [ 2.034678] pci 0000:00:00.0: bridge window [mem 0x60100000-0x601fffff pref]
- [ 2.049036] pci 0000:02:00.0: BAR 0: assigned [mem 0x60300000-0x603fffff 64bit pref]
- [ 2.064412] pci 0000:02:00.0: BAR 2: assigned [mem 0x60400000-0x60403fff 64bit pref]
- [ 2.079791] pci 0000:02:00.0: BAR 4: assigned [mem 0x60404000-0x60404fff 64bit pref]
- [ 2.095170] pci 0000:00:01.0: PCI bridge to [bus 02]
- [ 2.105015] pci 0000:00:01.0: bridge window [io 0x1000-0x1fff]
- [ 2.117095] pci 0000:00:01.0: bridge window [mem 0x60200000-0x602fffff]
- [ 2.130579] pci 0000:00:01.0: bridge window [mem 0x60300000-0x604fffff pref]
- [ 2.147854] Serial: 8250/16550 driver, 16 ports, IRQ sharing enabled
- [ 2.165985] printk: console [ttyS0] disabled
- [ 2.174538] 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 19, base_baud = 3125000) is a 16550A
- [ 2.192467] printk: console [ttyS0] enabled
- [ 2.192467] printk: console [ttyS0] enabled
- [ 2.209012] printk: bootconsole [early0] disabled
- [ 2.209012] printk: bootconsole [early0] disabled
- [ 2.231607] spi-mt7621 1e000b00.spi: sys_freq: 220000000
- [ 2.243924] spi-nor spi0.0: XM25QH64A (8192 Kbytes)
- [ 2.253778] 4 fixed-partitions partitions found on MTD device spi0.0
- [ 2.266479] OF: Bad cell count for /palmbus@1e000000/spi@b00/flash@0/partitions
- [ 2.281077] OF: Bad cell count for /palmbus@1e000000/spi@b00/flash@0/partitions
- [ 2.295966] OF: Bad cell count for /palmbus@1e000000/spi@b00/flash@0/partitions
- [ 2.310597] OF: Bad cell count for /palmbus@1e000000/spi@b00/flash@0/partitions
- [ 2.326055] Creating 4 MTD partitions on "spi0.0":
- [ 2.335671] 0x000000000000-0x000000020000 : "u-boot"
- [ 2.347024] 0x000000020000-0x000000730000 : "firmware"
- [ 2.359670] 2 tplink-fw partitions found on MTD device firmware
- [ 2.371532] Creating 2 MTD partitions on "firmware":
- [ 2.381433] 0x000000000000-0x0000002acf6e : "kernel"
- [ 2.391327] mtd: partition "kernel" doesn't end on an erase/write block -- force read-only
- [ 2.409075] 0x0000002b0000-0x000000710000 : "rootfs"
- [ 2.419993] mtd: setting mtd3 (rootfs) as root device
- [ 2.430236] 1 squashfs-split partitions found on MTD device rootfs
- [ 2.442568] 0x0000006a0000-0x000000710000 : "rootfs_data"
- [ 2.454609] 0x000000730000-0x0000007f0000 : "config"
- [ 2.465779] 0x0000007f0000-0x000000800000 : "radio"
- [ 2.617484] mt7530-mdio mdio-bus:1f: MT7530 adapts as multi-chip module
- [ 2.640492] mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 21
- [ 2.659227] i2c_dev: i2c /dev entries driver
- [ 2.671248] NET: Registered PF_INET6 protocol family
- [ 2.683721] Segment Routing with IPv6
- [ 2.691164] In-situ OAM (IOAM) with IPv6
- [ 2.699097] NET: Registered PF_PACKET protocol family
- [ 2.709284] bridge: filtering via arp/ip/ip6tables is no longer available by default. Update your scripts to load br_netfilter if you need this.
- [ 2.735661] 8021q: 802.1Q VLAN Support v1.8
- [ 2.750534] gpio-export gpio-export: 1 gpio(s) exported
- [ 2.761588] mt7530-mdio mdio-bus:1f: MT7530 adapts as multi-chip module
- [ 2.798424] mt7530-mdio mdio-bus:1f: configuring for fixed/rgmii link mode
- [ 2.813014] mt7530-mdio mdio-bus:1f: Link is Up - 1Gbps/Full - flow control rx/tx
- [ 2.815173] mt7530-mdio mdio-bus:1f plc0 (uninitialized): PHY [mt7530-0:00] driver [MediaTek MT7530 PHY] (irq=23)
- [ 2.851463] mt7530-mdio mdio-bus:1f lan1 (uninitialized): PHY [mt7530-0:01] driver [MediaTek MT7530 PHY] (irq=24)
- [ 2.874592] mt7530-mdio mdio-bus:1f lan2 (uninitialized): PHY [mt7530-0:02] driver [MediaTek MT7530 PHY] (irq=26)
- [ 2.897519] mt7530-mdio mdio-bus:1f lan3 (uninitialized): PHY [mt7530-0:03] driver [MediaTek MT7530 PHY] (irq=27)
- [ 2.920315] DSA: tree 0 setup
- [ 2.927787] clk: Disabling unused clocks
- [ 2.943100] VFS: Mounted root (squashfs filesystem) readonly on device 31:3.
- [ 2.961669] Freeing unused kernel image (initmem) memory: 1272K
- [ 2.973562] This architecture does not have kernel memory protection.
- [ 2.986425] Run /sbin/init as init process
- [ 3.505259] init: Console is alive
- [ 3.512454] init: - watchdog -
- [ 4.313856] kmodloader: loading kernel modules from /etc/modules-boot.d/*
- [ 4.383143] kmodloader: done loading kernel modules from /etc/modules-boot.d/*
- [ 4.399196] init: - preinit -
- [ 5.332817] random: jshn: uninitialized urandom read (4 bytes read)
- [ 5.464109] random: jshn: uninitialized urandom read (4 bytes read)
- [ 5.509492] random: jshn: uninitialized urandom read (4 bytes read)
- [ 5.820990] mtk_soc_eth 1e100000.ethernet eth0: configuring for fixed/rgmii link mode
- [ 5.842342] mtk_soc_eth 1e100000.ethernet eth0: Link is Up - 1Gbps/Full - flow control rx/tx
- [ 5.844838] mt7530-mdio mdio-bus:1f lan1: configuring for phy/gmii link mode
- [ 5.873686] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
- Press the [f] key and hit [enter] to enter failsafe mode
- Press the [1], [2], [3] or [4] key and hit [enter] to select the debug level
- - failsafe button lights_toggle was pressed -
- - failsafe -
- Waiting for kernel randomness to be initialised...
- [ 11.254381] random: crng init done
- [ 11.261190] random: 7 urandom warning(s) missed due to ratelimiting
- Generating 1024 bit rsa key, this may take a while...
- Public key portion is:
- ssh-rsa AAAAB3NzaC1yc2EAAAADAQABAAAAgQDM7JdTzdkxnLn65ktJrU1g0YBAI6xBFLtSdnr/cWjGYAftdCNcWvjj00DxShCGzkZBwTURBJ2bA1TZJTN3YNYOo/TYdyEoIqW6jA6KeU0+wH3ebrnUqe5NfrWmc/9tlW0TsQyUGNpGaFKEaJmMEfZoOcdmRHVOsm7QN)
- Fingerprint: SHA256:lkSyiU2c5yGayeuLdT9T7+lNTTJQoex86dwJMzPlFgQ
- Generating 256 bit ed25519 key, this may take a while...
- Public key portion is:
- ssh-ed25519 AAAAC3NzaC1lZDI1NTE5AAAAIBjvULqkgypdl7gW85wrWzhPXTxlCLB8BNMtslhwh67A root@(none)
- Fingerprint: SHA256:iCSIZ+al10SYu+cjyNe1sboe0FC0i0U85mDWenSMRr8
- BusyBox v1.36.1 (2024-07-15 22:14:18 UTC) built-in shell (ash)
- ash: can't access tty; job control turned off
- _______ ________ __
- | |.-----.-----.-----.| | | |.----.| |_
- | - || _ | -__| || | | || _|| _|
- |_______|| __|_____|__|__||________||__| |____|
- |__| W I R E L E S S F R E E D O M
- -----------------------------------------------------
- OpenWrt 23.05.4, r24012-d8dd03c46f
- -----------------------------------------------------
- ================= FAILSAFE MODE active ================
- special commands:
- * firstboot reset settings to factory defaults
- * mount_root mount root-partition with config files
- after mount_root:
- * passwd change root's password
- * /etc/config directory with config files
- for more help see:
- https://openwrt.org/docs/guide-user/troubleshooting/
- - failsafe_and_factory_reset
- - root_password_reset
- =======================================================
- root@(none):/#
- ```
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