lofty@ramen:~/LITEX$     litex/litex/boards/targets/versa_ecp5.py \
>       --gateware-toolchain trellis --yosys-nowidelut \
>       --csr-csv ./csr_ecp5versa.csv \
>       --with-ethernet --sys-clk-freq=60e6 \
>       --cpu-type rocket --cpu-variant linux
fatal: not a git repository (or any of the parent directories): .git
fatal: not a git repository (or any of the parent directories): .git
fatal: not a git repository (or any of the parent directories): .git
fatal: not a git repository (or any of the parent directories): .git
fatal: not a git repository (or any of the parent directories): .git
make: Entering directory '/home/lofty/LITEX/soc_ethernetsoc_versa_ecp5/software/libcompiler_rt'
 CC       fixsfsi.o
/home/lofty/LITEX/litex/litex/soc/software/compiler_rt/lib/builtins/fixsfsi.c:13:9: error: unknown type name 'si_int'
   13 | typedef si_int fixint_t;
      |         ^~~~~~
/home/lofty/LITEX/litex/litex/soc/software/compiler_rt/lib/builtins/fixsfsi.c:14:9: error: unknown type name 'su_int'
   14 | typedef su_int fixuint_t;
      |         ^~~~~~
/home/lofty/LITEX/litex/litex/soc/software/compiler_rt/lib/builtins/fixsfsi.c:17:1: warning: return type defaults to 'int' [-Wimplicit-int]
   17 | ARM_EABI_FNALIAS(f2iz, fixsfsi)
      | ^~~~~~~~~~~~~~~~
/home/lofty/LITEX/litex/litex/soc/software/compiler_rt/lib/builtins/fixsfsi.c:17:1: warning: function declaration isn't a prototype [-Wstrict-prototypes]
/home/lofty/LITEX/litex/litex/soc/software/compiler_rt/lib/builtins/fixsfsi.c: In function 'ARM_EABI_FNALIAS':
/home/lofty/LITEX/litex/litex/soc/software/compiler_rt/lib/builtins/fixsfsi.c:19:1: error: unknown type name 'COMPILER_RT_ABI'
   19 | COMPILER_RT_ABI si_int
      | ^~~~~~~~~~~~~~~
/home/lofty/LITEX/litex/litex/soc/software/compiler_rt/lib/builtins/fixsfsi.c:20:1: error: expected '=', ',', ';', 'asm' or '__attribute__' before '__fixsfsi'
   20 | __fixsfsi(fp_t a) {
      | ^~~~~~~~~
/home/lofty/LITEX/litex/litex/soc/software/compiler_rt/lib/builtins/fixsfsi.c:17:1: warning: old-style function definition [-Wold-style-definition]
   17 | ARM_EABI_FNALIAS(f2iz, fixsfsi)
      | ^~~~~~~~~~~~~~~~
/home/lofty/LITEX/litex/litex/soc/software/compiler_rt/lib/builtins/fixsfsi.c:17:1: warning: type of 'f2iz' defaults to 'int' [-Wimplicit-int]
/home/lofty/LITEX/litex/litex/soc/software/compiler_rt/lib/builtins/fixsfsi.c:17:1: warning: type of 'fixsfsi' defaults to 'int' [-Wimplicit-int]
/home/lofty/LITEX/litex/litex/soc/software/compiler_rt/lib/builtins/fixsfsi.c:22: error: expected '{' at end of input
   22 | }
      |
/home/lofty/LITEX/litex/litex/soc/software/compiler_rt/lib/builtins/fixsfsi.c:22:1: warning: control reaches end of non-void function [-Wreturn-type]
   22 | }
      | ^
make: *** [/home/lofty/LITEX/litex/litex/soc/software/libcompiler_rt/Makefile:27: fixsfsi.o] Error 1
make: Leaving directory '/home/lofty/LITEX/soc_ethernetsoc_versa_ecp5/software/libcompiler_rt'
Traceback (most recent call last):
  File "litex/litex/boards/targets/versa_ecp5.py", line 151, in <module>
    main()
  File "litex/litex/boards/targets/versa_ecp5.py", line 148, in main
    builder.build(**trellis_argdict(args))
  File "/home/lofty/LITEX/litex/litex/soc/integration/builder.py", line 172, in build
    self._generate_software(not self.soc.integrated_rom_initialized)
  File "/home/lofty/LITEX/litex/litex/soc/integration/builder.py", line 155, in _generate_software
    subprocess.check_call(["make", "-C", dst_dir, "-f", makefile])
  File "/usr/lib/python3.7/subprocess.py", line 347, in check_call
    raise CalledProcessError(retcode, cmd)
subprocess.CalledProcessError: Command '['make', '-C', '/home/lofty/LITEX/soc_ethernetsoc_versa_ecp5/software/libcompiler_rt', '-f', '/home/lofty/LITEX/litex/litex/soc/software/libcompiler_rt/Makefile']' returned non-zero exit status 2.