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  1. diff --git a/arch/arm/boot/compressed/misc.c b/arch/arm/boot/compressed/misc.c
  2. index d4f891f..fa9876a 100644
  3. --- a/arch/arm/boot/compressed/misc.c
  4. +++ b/arch/arm/boot/compressed/misc.c
  5. @@ -25,6 +25,14 @@ unsigned int __machine_arch_type;
  6. static void putstr(const char *ptr);
  7. extern void error(char *x);
  8.  
  9. +
  10. +#define MEMIO32_WRITE(addr, data) \
  11. + ((*((volatile unsigned int *)(addr))) = ((unsigned int)(data)))
  12. +
  13. +#define MEMIO32_READ(addr) \
  14. + ((*((volatile unsigned int *)(addr))))
  15. +
  16. +
  17. #include CONFIG_UNCOMPRESS_INCLUDE
  18.  
  19. #ifdef CONFIG_DEBUG_ICEDCC
  20. @@ -141,6 +149,21 @@ void __stack_chk_fail(void)
  21.  
  22. extern int do_decompress(u8 *input, int len, u8 *output, void (*error)(char *x));
  23.  
  24. +void sleep1(int sec)
  25. +{
  26. + unsigned int init_time = MEMIO32_READ(0xf10a380c);
  27. + unsigned int cur_time = 0;
  28. + unsigned long i = 0;
  29. + for (i = 0; i < 12000000; i++) // 5000000: nearly 3 seconds, 9000000: almost 5 seconds
  30. + {
  31. + cur_time = MEMIO32_READ(0xf10a380c);
  32. + if ((cur_time - init_time) > sec)
  33. + break;
  34. + }
  35. +
  36. + if (i == 12000000)
  37. + putstr("over 12000000 loops\n");
  38. +}
  39.  
  40. void
  41. decompress_kernel(unsigned long output_start, unsigned long free_mem_ptr_p,
  42. @@ -149,6 +172,38 @@ decompress_kernel(unsigned long output_start, unsigned long free_mem_ptr_p,
  43. {
  44. int ret;
  45.  
  46. +#define REG_GPIO_LOW_DATA_OUT 0xF1018100 // GPIO[31,0]
  47. +#define REG_GPIO_HIGH_DATA_OUT 0xF1018140 // GPIO[59,32]
  48. +
  49. +#define REG_GPIO_DATA_OUT(gpio_bit) ((gpio_bit > 31) ? REG_GPIO_HIGH_DATA_OUT : REG_GPIO_LOW_DATA_OUT)
  50. +
  51. +#define GPIO_POWER_ON_HDD1 45
  52. +#define GPIO_POWER_ON_HDD2 29
  53. +#define GPIO_POWER_ON_USB 43
  54. +
  55. +#define VALUE_POWER_ON_HDD1 0x00002000 // GPIO45 reg high
  56. +#define VALUE_POWER_ON_HDD2 0x20000000 // GPIO29 reg low
  57. +#define VALUE_POWER_ON_USB 0x00000800 // GPIO43 reg high
  58. +
  59. + unsigned int regvalue = 0;
  60. +
  61. + // power on HDD1
  62. + putstr("Power on HDD1 ...\n");
  63. + regvalue = MEMIO32_READ(REG_GPIO_DATA_OUT(GPIO_POWER_ON_HDD1)); // get original reg value
  64. + MEMIO32_WRITE(REG_GPIO_DATA_OUT(GPIO_POWER_ON_HDD1), regvalue|VALUE_POWER_ON_HDD1);
  65. + sleep1(6);
  66. +
  67. + // power on HDD2
  68. + putstr("Power on HDD2 ...\n");
  69. + regvalue = MEMIO32_READ(REG_GPIO_DATA_OUT(GPIO_POWER_ON_HDD2)); // get original reg value
  70. + MEMIO32_WRITE(REG_GPIO_DATA_OUT(GPIO_POWER_ON_HDD2), regvalue|VALUE_POWER_ON_HDD2);
  71. + sleep1(6);
  72. +
  73. + // power on USB
  74. + putstr("Power on USB ...\n\n");
  75. + regvalue = MEMIO32_READ(REG_GPIO_DATA_OUT(GPIO_POWER_ON_USB)); // get original reg value
  76. + MEMIO32_WRITE(REG_GPIO_DATA_OUT(GPIO_POWER_ON_USB), regvalue|VALUE_POWER_ON_USB);
  77. +
  78. __stack_chk_guard_setup();
  79.  
  80. output_data = (unsigned char *)output_start;
  81. diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
  82. index faacd52..580e270 100644
  83. --- a/arch/arm/boot/dts/Makefile
  84. +++ b/arch/arm/boot/dts/Makefile
  85. @@ -882,6 +882,7 @@ dtb-$(CONFIG_MACH_ARMADA_370) += \
  86. dtb-$(CONFIG_MACH_ARMADA_375) += \
  87. armada-375-db.dtb
  88. dtb-$(CONFIG_MACH_ARMADA_38X) += \
  89. + armada-380-zyxel-nas326.dtb \
  90. armada-385-db-ap.dtb \
  91. armada-385-linksys-caiman.dtb \
  92. armada-385-linksys-cobra.dtb \
  93. diff --git a/arch/arm/boot/dts/armada-380-zyxel-nas326.dts b/arch/arm/boot/dts/armada-380-zyxel-nas326.dts
  94. new file mode 100644
  95. index 0000000..d70407a
  96. --- /dev/null
  97. +++ b/arch/arm/boot/dts/armada-380-zyxel-nas326.dts
  98. @@ -0,0 +1,169 @@
  99. +/*
  100. + * Device Tree file for Marvell Armada 385 evaluation board
  101. + * (DB-88F6820)
  102. + *
  103. + * Copyright (C) 2013 Marvell
  104. + *
  105. + * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  106. + *
  107. + * This file is licensed under the terms of the GNU General Public
  108. + * License version 2. This program is licensed "as is" without any
  109. + * warranty of any kind, whether express or implied.
  110. + */
  111. +
  112. +/dts-v1/;
  113. +#include "armada-380.dtsi"
  114. +
  115. +/ {
  116. + model = "Marvell Armada 380 STG-328";
  117. + compatible = "marvell,armada380", "marvell,armada38x";
  118. +
  119. + chosen {
  120. + bootargs = "console=ttyS0,115200";
  121. + };
  122. +
  123. + memory {
  124. + device_type = "memory";
  125. + reg = <0x00000000 0x10000000>; /* 256 MB */
  126. + };
  127. +
  128. + soc {
  129. + ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
  130. + MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
  131. + MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000 /* CESA0: PHYS=0xf1100000
  132. + size 64K */
  133. + MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000>; /* CESA1: PHYS=0xf1110000
  134. + size 64K */
  135. +
  136. + internal-regs {
  137. + ethernet@70000 {
  138. + status = "okay";
  139. + phy-mode = "rgmii";
  140. + fixed-link {
  141. + speed = <1000>;
  142. + full-duplex;
  143. + };
  144. + };
  145. +
  146. + i2c0: i2c@11000 {
  147. + status = "okay";
  148. + clock-frequency = <100000>;
  149. + };
  150. +
  151. + i2c1: i2c@11100 {
  152. + status = "okay";
  153. + clock-frequency = <100000>;
  154. + };
  155. +
  156. + mdio {
  157. + status = "okay";
  158. + };
  159. +
  160. + sata@a8000 {
  161. + status = "okay";
  162. + };
  163. +
  164. +
  165. + sdhci@d8000 {
  166. + broken-cd;
  167. + wp-inverted;
  168. + bus-width = <8>;
  169. + status = "okay";
  170. + };
  171. +
  172. + serial@12000 {
  173. + status = "okay";
  174. + };
  175. +
  176. + spi0: spi@10600 {
  177. + status = "okay";
  178. +
  179. + spi-flash@0 {
  180. + #address-cells = <1>;
  181. + #size-cells = <1>;
  182. + compatible = "w25q32";
  183. + reg = <0>; /* Chip select 0 */
  184. + spi-max-frequency = <108000000>;
  185. + };
  186. + };
  187. +
  188. + usb@58000 {
  189. + status = "okay";
  190. + };
  191. +
  192. + /*
  193. + * 1GB Flash via NFC NAND controller
  194. + * by defeault disabled, because NFC
  195. + * shares same pins with SPI0 and
  196. + * requires SLM-1358 jumper
  197. + */
  198. + nfc: nand@d0000 {
  199. + #address-cells = <1>;
  200. + #size-cells = <1>;
  201. + clock-frequency = <200000000>;
  202. + status = "okay"; //BLUE_ADD...
  203. +
  204. + nfc,nfc-mode = "normal"; /* normal or ganged */
  205. + nfc,nfc-dma = <0>; /* 0 for no, 1 for dma */
  206. + nfc,nfc-width = <8>;
  207. + nfc,ecc-type = <1>; /* 4 bit */
  208. + nfc,num-cs = <1>;
  209. +
  210. + mtd0@00000000 {
  211. + label = "U-Boot";
  212. + reg = <0x00000000 0x00200000>; /* 2 MB */
  213. + };
  214. +
  215. + mtd1@00200000 {
  216. + label = "U-Boot env";
  217. + reg = <0x00200000 0x00200000>; /* 2 MB */
  218. + };
  219. +
  220. + mtd2@00400000 {
  221. + label = "Config";
  222. + reg = <0x00400000 0x00A00000>; /* 10 MB */
  223. + };
  224. +
  225. + mtd3@00600000 {
  226. + label = "Kernel-1";
  227. + reg = <0x00E00000 0x00F00000>; /* 15 MB */
  228. + };
  229. +
  230. + mtd4@01500000 {
  231. + label = "RootFS-1";
  232. + reg = <0x01D00000 0x06A00000>; /* 106 MB */
  233. + };
  234. +
  235. + mtd5@08300000 {
  236. + label = "Kernel-2";
  237. + reg = <0x08700000 0x00F00000>; /* 15 MB */
  238. + };
  239. +
  240. + mtd6@09200000 {
  241. + label = "RootFS-2";
  242. + reg = <0x09600000 0x06A00000>; /* 106 MB */
  243. + };
  244. + };
  245. +
  246. + crypto@9D000 {
  247. + status = "okay";
  248. + };
  249. + };
  250. +
  251. + pcie-controller {
  252. + status = "okay";
  253. + /*
  254. + * The two PCIe units are accessible through
  255. + * standard PCIe slots on the board.
  256. + */
  257. + pcie@1,0 {
  258. + /* Port 0, Lane 0 */
  259. + status = "okay";
  260. + };
  261. + pcie@2,0 {
  262. + /* Port 1, Lane 0 */
  263. + status = "okay";
  264. + };
  265. + };
  266. + };
  267. +};
  268. diff --git a/arch/arm/configs/nas326_defconfig b/arch/arm/configs/nas326_defconfig
  269. new file mode 100644
  270. index 0000000..11c3031
  271. --- /dev/null
  272. +++ b/arch/arm/configs/nas326_defconfig
  273. @@ -0,0 +1,198 @@
  274. +CONFIG_AEABI=y
  275. +CONFIG_AHCI_MVEBU=y
  276. +CONFIG_ARCH_MVEBU=y
  277. +CONFIG_ARMADA_THERMAL=y
  278. +CONFIG_ARM_APPENDED_DTB=y
  279. +CONFIG_ARM_ATAG_DTB_COMPAT=y
  280. +CONFIG_ARM_MVEBU_V7_CPUIDLE=y
  281. +CONFIG_ATA=y
  282. +CONFIG_AUTOFS4_FS=y
  283. +CONFIG_BLK_DEV_INITRD=y
  284. +CONFIG_BLK_DEV_SD=y
  285. +CONFIG_BLK_DEV_MD=y
  286. +CONFIG_BLK_DEV_DM=y
  287. +CONFIG_CFG80211=y
  288. +CONFIG_CGROUPS=y
  289. +CONFIG_CGROUP_CPUACCT=y
  290. +CONFIG_CGROUP_DEBUG=y
  291. +CONFIG_CGROUP_DEVICE=y
  292. +CONFIG_CGROUP_FREEZER=y
  293. +CONFIG_CGROUP_PIDS=y
  294. +CONFIG_CPUFREQ_DT=y
  295. +CONFIG_CPU_FREQ=y
  296. +CONFIG_CPU_IDLE=y
  297. +CONFIG_CRYPTO_DEV_MARVELL_CESA=y
  298. +CONFIG_DEBUG_FS=y
  299. +CONFIG_DEBUG_INFO=y
  300. +CONFIG_DEBUG_USER=y
  301. +CONFIG_DEVTMPFS=y
  302. +CONFIG_DEVTMPFS_MOUNT=y
  303. +CONFIG_DM=y
  304. +CONFIG_DM_CRYPT=y
  305. +CONFIG_DM_MIRROR=y
  306. +CONFIG_DM_UEVENT=y
  307. +CONFIG_DMADEVICES=y
  308. +CONFIG_EEPROM_AT24=y
  309. +CONFIG_EXPERT=y
  310. +CONFIG_EXT4_FS=y
  311. +CONFIG_FHANDLE=y
  312. +CONFIG_FIXED_PHY=y
  313. +CONFIG_GPIO_PCA953X=y
  314. +CONFIG_GPIO_SYSFS=y
  315. +CONFIG_HIGHMEM=y
  316. +CONFIG_HIGH_RES_TIMERS=y
  317. +CONFIG_I2C=y
  318. +CONFIG_I2C_BOARDINFO=y
  319. +CONFIG_I2C_CHARDEV=y
  320. +CONFIG_I2C_COMPAT=y
  321. +CONFIG_I2C_HELPER_AUTO=y
  322. +CONFIG_I2C_MV64XXX=y
  323. +CONFIG_INET=y
  324. +CONFIG_INPUT_EVDEV=y
  325. +CONFIG_IP_PNP=y
  326. +CONFIG_IP_PNP_BOOTP=y
  327. +CONFIG_IP_PNP_DHCP=y
  328. +CONFIG_IRQ_DOMAIN_DEBUG=y
  329. +CONFIG_ISO9660_FS=y
  330. +CONFIG_JOLIET=y
  331. +CONFIG_KEYBOARD_GPIO=y
  332. +CONFIG_LEDS_CLASS=y
  333. +CONFIG_LEDS_GPIO=y
  334. +CONFIG_LEDS_TRIGGERS=y
  335. +CONFIG_LEDS_TRIGGER_HEARTBEAT=y
  336. +CONFIG_LEDS_TRIGGER_TIMER=y
  337. +CONFIG_LOG_BUF_SHIFT=14
  338. +CONFIG_MACH_ARMADA_370=y
  339. +CONFIG_MACH_ARMADA_375=y
  340. +CONFIG_MACH_ARMADA_38X=y
  341. +CONFIG_MACH_ARMADA_39X=y
  342. +CONFIG_MACH_ARMADA_XP=y
  343. +CONFIG_MACH_DOVE=y
  344. +CONFIG_MAGIC_SYSRQ=y
  345. +CONFIG_MARVELL_PHY=y
  346. +CONFIG_MD=y
  347. +CONFIG_MD_AUTODETECT=y
  348. +CONFIG_MD_LINEAR=y
  349. +CONFIG_MD_RAID0=y
  350. +CONFIG_MD_RAID1=y
  351. +CONFIG_MD_RAID456=y
  352. +CONFIG_MEMORY=y
  353. +CONFIG_MMC=y
  354. +CONFIG_MMC_MVSDIO=y
  355. +CONFIG_MMC_SDHCI=y
  356. +CONFIG_MMC_SDHCI_DOVE=y
  357. +CONFIG_MMC_SDHCI_PLTFM=y
  358. +CONFIG_MMC_SDHCI_PXAV3=y
  359. +CONFIG_MODULES=y
  360. +CONFIG_MODULE_UNLOAD=y
  361. +CONFIG_MSDOS_FS=y
  362. +CONFIG_MTD=y
  363. +CONFIG_MTD_BLOCK=y
  364. +CONFIG_MTD_CFI=y
  365. +CONFIG_MTD_CFI_AMDSTD=y
  366. +CONFIG_MTD_CFI_INTELEXT=y
  367. +CONFIG_MTD_CFI_STAA=y
  368. +CONFIG_MTD_M25P80=y
  369. +CONFIG_MTD_NAND=y
  370. +CONFIG_MTD_NAND_PXA3xx=y
  371. +CONFIG_MTD_PHYSMAP_OF=y
  372. +CONFIG_MTD_SPI_NOR=y
  373. +CONFIG_MTD_UBI=y
  374. +CONFIG_MTD_UBI_WL_THRESHOLD=4096
  375. +CONFIG_MV643XX_ETH=y
  376. +CONFIG_MVNETA=y
  377. +CONFIG_MVPP2=y
  378. +CONFIG_MV_XOR=y
  379. +CONFIG_MWIFIEX=y
  380. +CONFIG_MWIFIEX_SDIO=y
  381. +CONFIG_NEON=y
  382. +CONFIG_NET=y
  383. +CONFIG_NETDEVICES=y
  384. +CONFIG_NET_DSA_MV88E6XXX=y
  385. +CONFIG_NEW_LEDS=y
  386. +CONFIG_NFSD_V3=y
  387. +CONFIG_NFSD_V4=y
  388. +CONFIG_NFS_COMMON=y
  389. +CONFIG_NFS_FS=y
  390. +CONFIG_NFS_USE_KERNEL_DNS=y
  391. +CONFIG_NFS_V2=y
  392. +CONFIG_NFS_V3=y
  393. +CONFIG_NFS_V4=y
  394. +CONFIG_NLS_CODEPAGE_437=y
  395. +CONFIG_NLS_CODEPAGE_850=y
  396. +CONFIG_NLS_ISO8859_1=y
  397. +CONFIG_NLS_ISO8859_2=y
  398. +CONFIG_NLS_UTF8=y
  399. +CONFIG_NOP_USB_XCEIV=y
  400. +CONFIG_ORION_WATCHDOG=y
  401. +CONFIG_PACKET=y
  402. +CONFIG_PCI=y
  403. +CONFIG_PCI_MSI=y
  404. +CONFIG_PCI_MVEBU=y
  405. +CONFIG_PERF_EVENTS=y
  406. +CONFIG_PM=y
  407. +CONFIG_PM_CLK=y
  408. +CONFIG_PM_SLEEP=y
  409. +CONFIG_POWER_RESET=y
  410. +CONFIG_POWER_RESET_GPIO=y
  411. +CONFIG_POWER_SUPPLY=y
  412. +CONFIG_PRINTK_TIME=y
  413. +CONFIG_REGULATOR=y
  414. +CONFIG_REGULATOR_FIXED_VOLTAGE=y
  415. +CONFIG_ROOT_NFS=y
  416. +CONFIG_RTC_CLASS=y
  417. +CONFIG_RTC_DRV_ARMADA38X=y
  418. +CONFIG_RTC_DRV_DS1307=y
  419. +CONFIG_RTC_DRV_MV=y
  420. +CONFIG_RTC_DRV_PCF8563=y
  421. +CONFIG_RTC_DRV_S35390A=y
  422. +CONFIG_RTC_HCTOSYS=y
  423. +CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
  424. +CONFIG_RTC_INTF_DEV=y
  425. +CONFIG_RTC_INTF_PROC=y
  426. +CONFIG_RTC_INTF_SYSFS=y
  427. +CONFIG_RTC_LIB=y
  428. +CONFIG_RTC_SYSTOHC=y
  429. +CONFIG_SATA_AHCI=y
  430. +CONFIG_SATA_MV=y
  431. +CONFIG_SATA_PMP=y
  432. +CONFIG_SENSORS_GPIO_FAN=y
  433. +CONFIG_SCSI=y
  434. +CONFIG_SCSI_DMA=y
  435. +CONFIG_SCSI_LOWLEVEL=y
  436. +CONFIG_SCSI_MOD=y
  437. +CONFIG_SCSI_PROC_FS=y
  438. +CONFIG_SERIAL_8250=y
  439. +CONFIG_SERIAL_8250_CONSOLE=y
  440. +CONFIG_SERIAL_8250_DW=y
  441. +CONFIG_SERIAL_OF_PLATFORM=y
  442. +CONFIG_SLAB=y
  443. +CONFIG_SMP=y
  444. +CONFIG_SPI=y
  445. +CONFIG_SPI_ORION=y
  446. +CONFIG_SRAM=y
  447. +CONFIG_SYSVIPC=y
  448. +CONFIG_THERMAL=y
  449. +CONFIG_TIMER_STATS=y
  450. +CONFIG_TMPFS=y
  451. +CONFIG_TMPFS_XATTR=y
  452. +CONFIG_UBIFS_FS=y
  453. +CONFIG_UBIFS_FS_LZO=y
  454. +CONFIG_UBIFS_FS_ZLIB=y
  455. +CONFIG_UDF_FS=y
  456. +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
  457. +CONFIG_UNIX=y
  458. +CONFIG_USB=y
  459. +CONFIG_USB_EHCI_HCD=y
  460. +CONFIG_USB_EHCI_ROOT_HUB_TT=y
  461. +CONFIG_USB_HIDDEV=y
  462. +CONFIG_USB_PRINTER=y
  463. +CONFIG_USB_STORAGE=y
  464. +CONFIG_USB_XHCI_HCD=y
  465. +CONFIG_USB_XHCI_MVEBU=y
  466. +CONFIG_VFAT_FS=y
  467. +CONFIG_VFP=y
  468. +CONFIG_VLAN_8021Q=y
  469. +CONFIG_WATCHDOG=y
  470. +CONFIG_ZBOOT_ROM_BSS=0x0
  471. +CONFIG_ZBOOT_ROM_TEXT=0x0
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