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- diff --git a/rtl/tf530ram/tf530_ram.v b/rtl/tf530ram/tf530_ram.v
- index ce97d79..4e27cfd 100644
- --- a/rtl/tf530ram/tf530_ram.v
- +++ b/rtl/tf530ram/tf530_ram.v
- @@ -64,7 +64,7 @@ reg STERM_D = 1'b1;
- wire BUS_CYCLE = (~DS20_D | DS20);
- -reg configured = 'b0;
- +reg configured = 'b1;
- reg shutup = 'b0;
- reg [7:0] data_out = 'h00;
- reg [7:0] base = 'h40;
- @@ -102,7 +102,7 @@ wire Z2_ACCESS = ({A[23:16]} != {8'hE8}) | AS20 | DS20 | shutup | configured;
- wire Z2_READ = (Z2_ACCESS | ~RW20);
- wire Z2_WRITE = (Z2_ACCESS | RW20);
- -wire RAM_ACCESS = ({A[23:21]} != {base[7:5]}) | AS20 | DS20 | ~configured;
- +wire RAM_ACCESS = ({A[23:21]} != {3'b110} | AS20 | DS20 | ~configured;
- wire [6:0] zaddr = {AB[7:2],A1};
- always @(posedge CLKCPU) begin
- @@ -112,7 +112,7 @@ always @(posedge CLKCPU) begin
- STERM_D <= INTCYCLE | ~STERM_D;
- if (RESET == 1'b0) begin
- - configured <= 1'b0;
- + configured <= 1'b1;
- shutup <= 1'b0;
- STERM_D <= 1'b1;
- end else begin
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