LAB05 - Calculatoare Numerice

module XOR(a, b, w1);

  input a, b;
  output reg w1;

  always @(a or b)
  begin
    w1 = a ^ b;
  end

endmodule

module AND(w1, cin,w2);

  input w1, cin;
  output reg w2;

  always @(w1 or cin)
  begin
    w2 = w1 & cin;
  end
endmodule

module OR(w2, w3, cout);

  input w2, w3;
  output reg cout;

  always @(w2 or w3)
  begin
    cout = w2 | w3;
  end
endmodule

module full_adder(a, b, cin, s, cout);

  input a, b, cin;
  output s, cout;

  XOR xor1(a, b, w1);
  XOR xor2(w1, cin, s);
  AND and1(w1, cin, w2);
  AND and2(a, b, w3);
  OR or1(w2, w3, cout);


endmodule

module Testbench;
  reg a, b, cin;
  wire s, cout;

  full_adder p(a, b, cin, s, cout);
 initial
  begin
   a = 0;
    b = 0;
    cin = 0;
    #1 $display("S=%b, C=%b\n", s, cout);

    a = 0;
    b = 1;
    #1 $display("S=%b, C=%b\n", s, cout);

    a=1;
    b=0;
    #1 $display("S=%b, C=%b\n", s, cout);

    a=1;
    b=1;
    #1 $display("S=%b, C=%b\n", s, cout);

    a = 0;
    b = 0;
    cin = 1;
    #1 $display("S=%b, C=%b\n", s, cout);

    a = 0;
    b = 1;
    #1 $display("S=%b, C=%b\n", s, cout);

    a=1;
    b=0;
    #1 $display("S=%b, C=%b\n", s, cout);

    a=1;
    b=1;
    #1 $display("S=%b, C=%b\n", s, cout);
end
 endmodule




FULL ADDER CU NAND-URI


module NAND(a, b, w);

  input a, b;
  output reg w;

  always @(a or b)
  begin
    w = a ~& b;
  end
endmodule

module full_adder(a, b, cin, s, cout);

  input a, b, cin;
  output s, cout;

  NAND nand1(b, cin, w3);
  NAND nand2(b, w3, w4);
  NAND nand3(w3, cin, w5);
  NAND nand4(w4, w5, w6);
  NAND nand5(a, w6, w7);
  NAND nand6(a, w7, w1);
  NAND nand7(w7, w6, w8);
  NAND nand8(w7, w3, cout);
  NAND nand9(w1, w8, s);

endmodule

module Testbench;
  reg a, b, cin;
  wire s, cout;

  full_adder p(a, b, cin, s, cout);
 initial
  begin
   a = 0;
    b = 0;
    cin = 0;
    #1 $display("S=%b, C=%b\n", s, cout);

    a = 0;
    b = 1;
    #1 $display("S=%b, C=%b\n", s, cout);

    a=1;
    b=0;
    #1 $display("S=%b, C=%b\n", s, cout);

    a=1;
    b=1;
    #1 $display("S=%b, C=%b\n", s, cout);

    a = 0;
    b = 0;
    cin = 1;
    #1 $display("S=%b, C=%b\n", s, cout);

    a = 0;
    b = 1;
    #1 $display("S=%b, C=%b\n", s, cout);

    a=1;
    b=0;
    #1 $display("S=%b, C=%b\n", s, cout);

    a=1;
    b=1;
    #1 $display("S=%b, C=%b\n", s, cout);
end
 endmodule


FULL ADDER 4 BIT


module NAND(a, b, w);

  input a, b;
  output reg w;

  always @(a or b)
  begin
    w = a ~& b;
  end
endmodule

module full_adder(a, b, cin, s, cout);

  input a, b, cin;
  output s, cout;

  NAND nand1(b, cin, w3);
  NAND nand2(b, w3, w4);
  NAND nand3(w3, cin, w5);
  NAND nand4(w4, w5, w6);
  NAND nand5(a, w6, w7);
  NAND nand6(a, w7, w1);
  NAND nand7(w7, w6, w8);
  NAND nand8(w7, w3, cout);
  NAND nand9(w1, w8, s);

endmodule

module bit4_full_adder(cin, a0, a1, a2, a3, b0, b1, b2, b3, s0, s1, s2, s3, cout);

  input cin, a0, a1, a2, a3, b0, b1, b2, b3;
  output s0, s1, s2, s3, cout;

  full_adder(a0, b0, cin

endmodule

module Testbench;
  reg a, b, cin;
  wire s, cout;

  full_adder p(a, b, cin, s, cout);

 initial
  begin
   a = 0;
    b = 0;
    cin = 0;
    #1 $display("S=%b, C=%b\n", s, cout);

    a = 0;
    b = 1;
    #1 $display("S=%b, C=%b\n", s, cout);

    a=1;
    b=0;
    #1 $display("S=%b, C=%b\n", s, cout);

    a=1;
    b=1;
    #1 $display("S=%b, C=%b\n", s, cout);

    a = 0;
    b = 0;
    cin = 1;
    #1 $display("S=%b, C=%b\n", s, cout);

    a = 0;
    b = 1;
    #1 $display("S=%b, C=%b\n", s, cout);

    a=1;
    b=0;
    #1 $display("S=%b, C=%b\n", s, cout);

    a=1;
    b=1;
    #1 $display("S=%b, C=%b\n", s, cout);
end
 endmodule