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stm32f4xx_vector_table_001.S

gbulmer
Mar 27th, 2012
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  1. /**
  2. * This file was created by 'merging' an original startup_stm32f4xx.s
  3. * (see the next comment for details)
  4. * and files found in an in-work STM32F4 libmaple which I believe was
  5. * derived from CodeSourcery startup code, though there was no comment.
  6. * I think it was CodeSourcery because it was called cs3.
  7. *
  8. * All the vector table labels come from ST Micro,
  9. * except
  10. * __cs3_stm32_vector_table - the name of the vector table
  11. * __cs3_stack - initial stack pointer value
  12. * __cs3_reset - reset vector
  13. * __default_handler - the deafult exception and interrupt handler
  14. *
  15. * G Bulmer 2012/02/09
  16. */
  17.  
  18. /**
  19. ******************************************************************************
  20. * @file startup_stm32f4xx.s
  21. * @author MCD Application Team
  22. * @version V1.0.0
  23. * @date 30-September-2011
  24. * @brief STM32F4xx Devices vector table for RIDE7 toolchain.
  25. * This module performs:
  26. * - Set the initial SP
  27. * - Set the initial PC == Reset_Handler,
  28. * - Set the vector table entries with the exceptions ISR address
  29. * - Configure the clock system and the external SRAM mounted on
  30. * STM324xG-EVAL board to be used as data memory (optional,
  31. * to be enabled by user)
  32. * - Branches to main in the C library (which eventually
  33. * calls main()).
  34. * After Reset the Cortex-M4 processor is in Thread mode,
  35. * priority is Privileged, and the Stack is set to Main.
  36. ******************************************************************************
  37. * @attention
  38. *
  39. * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  40. * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  41. * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
  42. * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  43. * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  44. * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  45. *
  46. * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
  47. ******************************************************************************
  48. */
  49.  
  50. .syntax unified
  51. .cpu cortex-m3
  52. .fpu softvfp
  53. .thumb
  54.  
  55. /******************************************************************************
  56. *
  57. * The minimal vector table for a Cortex M4. Note that the proper constructs
  58. * must be placed on this to ensure that it ends up at physical address
  59. * 0x0000.0000.
  60. *
  61. *******************************************************************************/
  62. /* Original ST Micro:
  63. .section .isr_vector,"a",%progbits
  64. .type g_pfnVectors, %object
  65. .size g_pfnVectors, .-g_pfnVectors
  66. */
  67.  
  68. /* Original ST Micro:
  69. g_pfnVectors:
  70. .word _estack
  71. .word Reset_Handler
  72. */
  73.  
  74. /* Start of 1.Inserted stm32f4_vector_table */
  75. .section ".stm32.interrupt_vector"
  76.  
  77. .globl __cs3_stm32_vector_table
  78. .type __cs3_stm32_vector_table, %object
  79.  
  80. __cs3_stm32_vector_table:
  81. /* CM4 core interrupts */
  82. .word __cs3_stack
  83. .word __cs3_reset
  84. /* end of 1.Inserted stm32f4_vector_table */
  85. .word NMI_Handler
  86. .word HardFault_Handler
  87. .word MemManage_Handler
  88. .word BusFault_Handler
  89. .word UsageFault_Handler
  90. .word 0
  91. .word 0
  92. .word 0
  93. .word 0
  94. .word SVC_Handler
  95. .word DebugMon_Handler
  96. .word 0
  97. .word PendSV_Handler
  98. .word SysTick_Handler
  99.  
  100. /* External Interrupts */
  101. .word WWDG_IRQHandler /* Window WatchDog */
  102. .word PVD_IRQHandler /* PVD through EXTI Line detection */
  103. .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
  104. .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
  105. .word FLASH_IRQHandler /* FLASH */
  106. .word RCC_IRQHandler /* RCC */
  107. .word EXTI0_IRQHandler /* EXTI Line0 */
  108. .word EXTI1_IRQHandler /* EXTI Line1 */
  109. .word EXTI2_IRQHandler /* EXTI Line2 */
  110. .word EXTI3_IRQHandler /* EXTI Line3 */
  111. .word EXTI4_IRQHandler /* EXTI Line4 */
  112. .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
  113. .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
  114. .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
  115. .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
  116. .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
  117. .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
  118. .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
  119. .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
  120. .word CAN1_TX_IRQHandler /* CAN1 TX */
  121. .word CAN1_RX0_IRQHandler /* CAN1 RX0 */
  122. .word CAN1_RX1_IRQHandler /* CAN1 RX1 */
  123. .word CAN1_SCE_IRQHandler /* CAN1 SCE */
  124. .word EXTI9_5_IRQHandler /* External Line[9:5]s */
  125. .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
  126. .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
  127. .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
  128. .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
  129. .word TIM2_IRQHandler /* TIM2 */
  130. .word TIM3_IRQHandler /* TIM3 */
  131. .word TIM4_IRQHandler /* TIM4 */
  132. .word I2C1_EV_IRQHandler /* I2C1 Event */
  133. .word I2C1_ER_IRQHandler /* I2C1 Error */
  134. .word I2C2_EV_IRQHandler /* I2C2 Event */
  135. .word I2C2_ER_IRQHandler /* I2C2 Error */
  136. .word SPI1_IRQHandler /* SPI1 */
  137. .word SPI2_IRQHandler /* SPI2 */
  138. .word USART1_IRQHandler /* USART1 */
  139. .word USART2_IRQHandler /* USART2 */
  140. .word USART3_IRQHandler /* USART3 */
  141. .word EXTI15_10_IRQHandler /* External Line[15:10]s */
  142. .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
  143. .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
  144. .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
  145. .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
  146. .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
  147. .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
  148. .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
  149. .word FSMC_IRQHandler /* FSMC */
  150. .word SDIO_IRQHandler /* SDIO */
  151. .word TIM5_IRQHandler /* TIM5 */
  152. .word SPI3_IRQHandler /* SPI3 */
  153. .word UART4_IRQHandler /* UART4 */
  154. .word UART5_IRQHandler /* UART5 */
  155. .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
  156. .word TIM7_IRQHandler /* TIM7 */
  157. .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
  158. .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
  159. .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
  160. .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
  161. .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
  162. .word ETH_IRQHandler /* Ethernet */
  163. .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */
  164. .word CAN2_TX_IRQHandler /* CAN2 TX */
  165. .word CAN2_RX0_IRQHandler /* CAN2 RX0 */
  166. .word CAN2_RX1_IRQHandler /* CAN2 RX1 */
  167. .word CAN2_SCE_IRQHandler /* CAN2 SCE */
  168. .word OTG_FS_IRQHandler /* USB OTG FS */
  169. .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
  170. .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
  171. .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
  172. .word USART6_IRQHandler /* USART6 */
  173. .word I2C3_EV_IRQHandler /* I2C3 event */
  174. .word I2C3_ER_IRQHandler /* I2C3 error */
  175. .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
  176. .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
  177. .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
  178. .word OTG_HS_IRQHandler /* USB OTG HS */
  179. .word DCMI_IRQHandler /* DCMI */
  180. .word CRYP_IRQHandler /* CRYP crypto */
  181. .word HASH_RNG_IRQHandler /* Hash and Rng */
  182. .word FPU_IRQHandler /* FPU */
  183.  
  184. /* start of 2.Inserted stm32f4_vector_table*/
  185. .size __cs3_stm32_vector_table, . - __cs3_stm32_vector_table
  186. /* end of 2.Inserted stm32f4_vector_table*/
  187.  
  188.  
  189. /*******************************************************************************
  190. *
  191. * Provide weak aliases for each Exception handler to the __default_handler.
  192. * As they are weak aliases, any function with the same name will override
  193. * this definition.
  194. *
  195. *******************************************************************************/
  196. /* Changed name of handler */
  197.  
  198. /* start of 3.Inserted stm32f4_isrs */
  199. .thumb
  200.  
  201. /* Default handler for all non-overridden interrupts and exceptions */
  202. .globl __default_handler
  203. .type __default_handler, %function
  204.  
  205. __default_handler:
  206. b . /* branch to current address. A very tight loop */
  207. /* end of 3.Inserted stm32f4_isrs */
  208.  
  209. .weak NMI_Handler
  210. .thumb_set NMI_Handler,__default_handler
  211.  
  212. .weak HardFault_Handler
  213. .thumb_set HardFault_Handler,__default_handler
  214.  
  215. .weak MemManage_Handler
  216. .thumb_set MemManage_Handler,__default_handler
  217.  
  218. .weak BusFault_Handler
  219. .thumb_set BusFault_Handler,__default_handler
  220.  
  221. .weak UsageFault_Handler
  222. .thumb_set UsageFault_Handler,__default_handler
  223.  
  224. .weak SVC_Handler
  225. .thumb_set SVC_Handler,__default_handler
  226.  
  227. .weak DebugMon_Handler
  228. .thumb_set DebugMon_Handler,__default_handler
  229.  
  230. .weak PendSV_Handler
  231. .thumb_set PendSV_Handler,__default_handler
  232.  
  233. .weak SysTick_Handler
  234. .thumb_set SysTick_Handler,__default_handler
  235.  
  236. .weak WWDG_IRQHandler
  237. .thumb_set WWDG_IRQHandler,__default_handler
  238.  
  239. .weak PVD_IRQHandler
  240. .thumb_set PVD_IRQHandler,__default_handler
  241.  
  242. .weak TAMP_STAMP_IRQHandler
  243. .thumb_set TAMP_STAMP_IRQHandler,__default_handler
  244.  
  245. .weak RTC_WKUP_IRQHandler
  246. .thumb_set RTC_WKUP_IRQHandler,__default_handler
  247.  
  248. .weak FLASH_IRQHandler
  249. .thumb_set FLASH_IRQHandler,__default_handler
  250.  
  251. .weak RCC_IRQHandler
  252. .thumb_set RCC_IRQHandler,__default_handler
  253.  
  254. .weak EXTI0_IRQHandler
  255. .thumb_set EXTI0_IRQHandler,__default_handler
  256.  
  257. .weak EXTI1_IRQHandler
  258. .thumb_set EXTI1_IRQHandler,__default_handler
  259.  
  260. .weak EXTI2_IRQHandler
  261. .thumb_set EXTI2_IRQHandler,__default_handler
  262.  
  263. .weak EXTI3_IRQHandler
  264. .thumb_set EXTI3_IRQHandler,__default_handler
  265.  
  266. .weak EXTI4_IRQHandler
  267. .thumb_set EXTI4_IRQHandler,__default_handler
  268.  
  269. .weak DMA1_Stream0_IRQHandler
  270. .thumb_set DMA1_Stream0_IRQHandler,__default_handler
  271.  
  272. .weak DMA1_Stream1_IRQHandler
  273. .thumb_set DMA1_Stream1_IRQHandler,__default_handler
  274.  
  275. .weak DMA1_Stream2_IRQHandler
  276. .thumb_set DMA1_Stream2_IRQHandler,__default_handler
  277.  
  278. .weak DMA1_Stream3_IRQHandler
  279. .thumb_set DMA1_Stream3_IRQHandler,__default_handler
  280.  
  281. .weak DMA1_Stream4_IRQHandler
  282. .thumb_set DMA1_Stream4_IRQHandler,__default_handler
  283.  
  284. .weak DMA1_Stream5_IRQHandler
  285. .thumb_set DMA1_Stream5_IRQHandler,__default_handler
  286.  
  287. .weak DMA1_Stream6_IRQHandler
  288. .thumb_set DMA1_Stream6_IRQHandler,__default_handler
  289.  
  290. .weak ADC_IRQHandler
  291. .thumb_set ADC_IRQHandler,__default_handler
  292.  
  293. .weak CAN1_TX_IRQHandler
  294. .thumb_set CAN1_TX_IRQHandler,__default_handler
  295.  
  296. .weak CAN1_RX0_IRQHandler
  297. .thumb_set CAN1_RX0_IRQHandler,__default_handler
  298.  
  299. .weak CAN1_RX1_IRQHandler
  300. .thumb_set CAN1_RX1_IRQHandler,__default_handler
  301.  
  302. .weak CAN1_SCE_IRQHandler
  303. .thumb_set CAN1_SCE_IRQHandler,__default_handler
  304.  
  305. .weak EXTI9_5_IRQHandler
  306. .thumb_set EXTI9_5_IRQHandler,__default_handler
  307.  
  308. .weak TIM1_BRK_TIM9_IRQHandler
  309. .thumb_set TIM1_BRK_TIM9_IRQHandler,__default_handler
  310.  
  311. .weak TIM1_UP_TIM10_IRQHandler
  312. .thumb_set TIM1_UP_TIM10_IRQHandler,__default_handler
  313.  
  314. .weak TIM1_TRG_COM_TIM11_IRQHandler
  315. .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,__default_handler
  316.  
  317. .weak TIM1_CC_IRQHandler
  318. .thumb_set TIM1_CC_IRQHandler,__default_handler
  319.  
  320. .weak TIM2_IRQHandler
  321. .thumb_set TIM2_IRQHandler,__default_handler
  322.  
  323. .weak TIM3_IRQHandler
  324. .thumb_set TIM3_IRQHandler,__default_handler
  325.  
  326. .weak TIM4_IRQHandler
  327. .thumb_set TIM4_IRQHandler,__default_handler
  328.  
  329. .weak I2C1_EV_IRQHandler
  330. .thumb_set I2C1_EV_IRQHandler,__default_handler
  331.  
  332. .weak I2C1_ER_IRQHandler
  333. .thumb_set I2C1_ER_IRQHandler,__default_handler
  334.  
  335. .weak I2C2_EV_IRQHandler
  336. .thumb_set I2C2_EV_IRQHandler,__default_handler
  337.  
  338. .weak I2C2_ER_IRQHandler
  339. .thumb_set I2C2_ER_IRQHandler,__default_handler
  340.  
  341. .weak SPI1_IRQHandler
  342. .thumb_set SPI1_IRQHandler,__default_handler
  343.  
  344. .weak SPI2_IRQHandler
  345. .thumb_set SPI2_IRQHandler,__default_handler
  346.  
  347. .weak USART1_IRQHandler
  348. .thumb_set USART1_IRQHandler,__default_handler
  349.  
  350. .weak USART2_IRQHandler
  351. .thumb_set USART2_IRQHandler,__default_handler
  352.  
  353. .weak USART3_IRQHandler
  354. .thumb_set USART3_IRQHandler,__default_handler
  355.  
  356. .weak EXTI15_10_IRQHandler
  357. .thumb_set EXTI15_10_IRQHandler,__default_handler
  358.  
  359. .weak RTC_Alarm_IRQHandler
  360. .thumb_set RTC_Alarm_IRQHandler,__default_handler
  361.  
  362. .weak OTG_FS_WKUP_IRQHandler
  363. .thumb_set OTG_FS_WKUP_IRQHandler,__default_handler
  364.  
  365. .weak TIM8_BRK_TIM12_IRQHandler
  366. .thumb_set TIM8_BRK_TIM12_IRQHandler,__default_handler
  367.  
  368. .weak TIM8_UP_TIM13_IRQHandler
  369. .thumb_set TIM8_UP_TIM13_IRQHandler,__default_handler
  370.  
  371. .weak TIM8_TRG_COM_TIM14_IRQHandler
  372. .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,__default_handler
  373.  
  374. .weak TIM8_CC_IRQHandler
  375. .thumb_set TIM8_CC_IRQHandler,__default_handler
  376.  
  377. .weak DMA1_Stream7_IRQHandler
  378. .thumb_set DMA1_Stream7_IRQHandler,__default_handler
  379.  
  380. .weak FSMC_IRQHandler
  381. .thumb_set FSMC_IRQHandler,__default_handler
  382.  
  383. .weak SDIO_IRQHandler
  384. .thumb_set SDIO_IRQHandler,__default_handler
  385.  
  386. .weak TIM5_IRQHandler
  387. .thumb_set TIM5_IRQHandler,__default_handler
  388.  
  389. .weak SPI3_IRQHandler
  390. .thumb_set SPI3_IRQHandler,__default_handler
  391.  
  392. .weak UART4_IRQHandler
  393. .thumb_set UART4_IRQHandler,__default_handler
  394.  
  395. .weak UART5_IRQHandler
  396. .thumb_set UART5_IRQHandler,__default_handler
  397.  
  398. .weak TIM6_DAC_IRQHandler
  399. .thumb_set TIM6_DAC_IRQHandler,__default_handler
  400.  
  401. .weak TIM7_IRQHandler
  402. .thumb_set TIM7_IRQHandler,__default_handler
  403.  
  404. .weak DMA2_Stream0_IRQHandler
  405. .thumb_set DMA2_Stream0_IRQHandler,__default_handler
  406.  
  407. .weak DMA2_Stream1_IRQHandler
  408. .thumb_set DMA2_Stream1_IRQHandler,__default_handler
  409.  
  410. .weak DMA2_Stream2_IRQHandler
  411. .thumb_set DMA2_Stream2_IRQHandler,__default_handler
  412.  
  413. .weak DMA2_Stream3_IRQHandler
  414. .thumb_set DMA2_Stream3_IRQHandler,__default_handler
  415.  
  416. .weak DMA2_Stream4_IRQHandler
  417. .thumb_set DMA2_Stream4_IRQHandler,__default_handler
  418.  
  419. .weak ETH_IRQHandler
  420. .thumb_set ETH_IRQHandler,__default_handler
  421.  
  422. .weak ETH_WKUP_IRQHandler
  423. .thumb_set ETH_WKUP_IRQHandler,__default_handler
  424.  
  425. .weak CAN2_TX_IRQHandler
  426. .thumb_set CAN2_TX_IRQHandler,__default_handler
  427.  
  428. .weak CAN2_RX0_IRQHandler
  429. .thumb_set CAN2_RX0_IRQHandler,__default_handler
  430.  
  431. .weak CAN2_RX1_IRQHandler
  432. .thumb_set CAN2_RX1_IRQHandler,__default_handler
  433.  
  434. .weak CAN2_SCE_IRQHandler
  435. .thumb_set CAN2_SCE_IRQHandler,__default_handler
  436.  
  437. .weak OTG_FS_IRQHandler
  438. .thumb_set OTG_FS_IRQHandler,__default_handler
  439.  
  440. .weak DMA2_Stream5_IRQHandler
  441. .thumb_set DMA2_Stream5_IRQHandler,__default_handler
  442.  
  443. .weak DMA2_Stream6_IRQHandler
  444. .thumb_set DMA2_Stream6_IRQHandler,__default_handler
  445.  
  446. .weak DMA2_Stream7_IRQHandler
  447. .thumb_set DMA2_Stream7_IRQHandler,__default_handler
  448.  
  449. .weak USART6_IRQHandler
  450. .thumb_set USART6_IRQHandler,__default_handler
  451.  
  452. .weak I2C3_EV_IRQHandler
  453. .thumb_set I2C3_EV_IRQHandler,__default_handler
  454.  
  455. .weak I2C3_ER_IRQHandler
  456. .thumb_set I2C3_ER_IRQHandler,__default_handler
  457.  
  458. .weak OTG_HS_EP1_OUT_IRQHandler
  459. .thumb_set OTG_HS_EP1_OUT_IRQHandler,__default_handler
  460.  
  461. .weak OTG_HS_EP1_IN_IRQHandler
  462. .thumb_set OTG_HS_EP1_IN_IRQHandler,__default_handler
  463.  
  464. .weak OTG_HS_WKUP_IRQHandler
  465. .thumb_set OTG_HS_WKUP_IRQHandler,__default_handler
  466.  
  467. .weak OTG_HS_IRQHandler
  468. .thumb_set OTG_HS_IRQHandler,__default_handler
  469.  
  470. .weak DCMI_IRQHandler
  471. .thumb_set DCMI_IRQHandler,__default_handler
  472.  
  473. .weak CRYP_IRQHandler
  474. .thumb_set CRYP_IRQHandler,__default_handler
  475.  
  476. .weak HASH_RNG_IRQHandler
  477. .thumb_set HASH_RNG_IRQHandler,__default_handler
  478.  
  479. .weak FPU_IRQHandler
  480. .thumb_set FPU_IRQHandler,__default_handler
  481.  
  482. /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
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