API tools faq
paste
Advertisement
Guest User

Untitled

a guest
May 22nd, 2019
121
0
Never
Add comment
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
text 45.86 KB | None | 0 0
raw download clone embed print report
  1.  
  2. build/romstage/northbridge/intel/sandybridge/early_dmi.o: build/romstage/northbridge/intel/sandybridge/early_dmi.o:
  3.  
  4.  
  5. Déassemblage de la section .text.early_init_dmi : Déassemblage de la section .text.early_init_dmi :
  6.  
  7. 00000000 <early_init_dmi>: 00000000 <early_init_dmi>:
  8. #include <console/console.h> #include <console/console.h>
  9. #include <northbridge/intel/sandybridge/sandybridge.h> #include <northbridge/intel/sandybridge/sandybridge.h>
  10. #include <southbridge/intel/bd82x6x/pch.h> #include <southbridge/intel/bd82x6x/pch.h>
  11.  
  12. void early_init_dmi(void) void early_init_dmi(void)
  13. { {
  14. 0: 83 ec 0c sub $0xc,%esp | 0: 83 ec 1c sub $0x1c,%esp
  15. > volatile u32 tmp;
  16. int i; int i;
  17.  
  18. DMIBAR32(0x0914) |= 0x80000000; DMIBAR32(0x0914) |= 0x80000000;
  19. 3: a1 14 89 d1 fe mov 0xfed18914,%eax 3: a1 14 89 d1 fe mov 0xfed18914,%eax
  20. 8: 0d 00 00 00 80 or $0x80000000,%eax 8: 0d 00 00 00 80 or $0x80000000,%eax
  21. d: a3 14 89 d1 fe mov %eax,0xfed18914 d: a3 14 89 d1 fe mov %eax,0xfed18914
  22. DMIBAR32(0x0934) |= 0x80000000; DMIBAR32(0x0934) |= 0x80000000;
  23. 12: a1 34 89 d1 fe mov 0xfed18934,%eax 12: a1 34 89 d1 fe mov 0xfed18934,%eax
  24. 17: 0d 00 00 00 80 or $0x80000000,%eax 17: 0d 00 00 00 80 or $0x80000000,%eax
  25. 1c: a3 34 89 d1 fe mov %eax,0xfed18934 1c: a3 34 89 d1 fe mov %eax,0xfed18934
  26. 21: b8 00 8a d1 fe mov $0xfed18a00,%eax 21: b8 00 8a d1 fe mov $0xfed18a00,%eax
  27.  
  28. for (i = 0; i < 4; i++) { for (i = 0; i < 4; i++) {
  29. DMIBAR32(0x0a00 + (i << 4)) &= 0xf3ffffff; DMIBAR32(0x0a00 + (i << 4)) &= 0xf3ffffff;
  30. 26: 8b 10 mov (%eax),%edx 26: 8b 10 mov (%eax),%edx
  31. 28: 83 c0 10 add $0x10,%eax 28: 83 c0 10 add $0x10,%eax
  32. 2b: 81 e2 ff ff ff f3 and $0xf3ffffff,%edx 2b: 81 e2 ff ff ff f3 and $0xf3ffffff,%edx
  33. 31: 89 50 f0 mov %edx,-0x10(%eax) 31: 89 50 f0 mov %edx,-0x10(%eax)
  34. DMIBAR32(0x0a04 + (i << 4)) |= 0x800; DMIBAR32(0x0a04 + (i << 4)) |= 0x800;
  35. 34: 8b 50 f4 mov -0xc(%eax),%edx 34: 8b 50 f4 mov -0xc(%eax),%edx
  36. 37: 80 ce 08 or $0x8,%dh 37: 80 ce 08 or $0x8,%dh
  37. 3a: 89 50 f4 mov %edx,-0xc(%eax) 3a: 89 50 f4 mov %edx,-0xc(%eax)
  38. for (i = 0; i < 4; i++) { for (i = 0; i < 4; i++) {
  39. 3d: 3d 40 8a d1 fe cmp $0xfed18a40,%eax 3d: 3d 40 8a d1 fe cmp $0xfed18a40,%eax
  40. 42: 75 e2 jne 26 <early_init_dmi+0x2 42: 75 e2 jne 26 <early_init_dmi+0x2
  41. } }
  42. DMIBAR32(0x0c30) = (DMIBAR32(0x0c30) & 0xfffffff) | 0 DMIBAR32(0x0c30) = (DMIBAR32(0x0c30) & 0xfffffff) | 0
  43. 44: a1 30 8c d1 fe mov 0xfed18c30,%eax 44: a1 30 8c d1 fe mov 0xfed18c30,%eax
  44. 49: 25 ff ff ff 0f and $0xfffffff,%eax 49: 25 ff ff ff 0f and $0xfffffff,%eax
  45. 4e: 0d 00 00 00 40 or $0x40000000,%eax 4e: 0d 00 00 00 40 or $0x40000000,%eax
  46. 53: a3 30 8c d1 fe mov %eax,0xfed18c30 53: a3 30 8c d1 fe mov %eax,0xfed18c30
  47.  
  48. for (i = 0; i < 2; i++) { for (i = 0; i < 2; i++) {
  49. DMIBAR32(0x0904 + (i << 5)) &= 0xfe3fffff; DMIBAR32(0x0904 + (i << 5)) &= 0xfe3fffff;
  50. 58: a1 04 89 d1 fe mov 0xfed18904,%eax 58: a1 04 89 d1 fe mov 0xfed18904,%eax
  51. 5d: 25 ff ff 3f fe and $0xfe3fffff,%eax 5d: 25 ff ff 3f fe and $0xfe3fffff,%eax
  52. 62: a3 04 89 d1 fe mov %eax,0xfed18904 62: a3 04 89 d1 fe mov %eax,0xfed18904
  53. DMIBAR32(0x090c + (i << 5)) &= 0xfff1ffff; DMIBAR32(0x090c + (i << 5)) &= 0xfff1ffff;
  54. 67: a1 0c 89 d1 fe mov 0xfed1890c,%eax 67: a1 0c 89 d1 fe mov 0xfed1890c,%eax
  55. 6c: 25 ff ff f1 ff and $0xfff1ffff,%eax 6c: 25 ff ff f1 ff and $0xfff1ffff,%eax
  56. 71: a3 0c 89 d1 fe mov %eax,0xfed1890c 71: a3 0c 89 d1 fe mov %eax,0xfed1890c
  57. DMIBAR32(0x0904 + (i << 5)) &= 0xfe3fffff; DMIBAR32(0x0904 + (i << 5)) &= 0xfe3fffff;
  58. 76: a1 24 89 d1 fe mov 0xfed18924,%eax 76: a1 24 89 d1 fe mov 0xfed18924,%eax
  59. 7b: 25 ff ff 3f fe and $0xfe3fffff,%eax 7b: 25 ff ff 3f fe and $0xfe3fffff,%eax
  60. 80: a3 24 89 d1 fe mov %eax,0xfed18924 80: a3 24 89 d1 fe mov %eax,0xfed18924
  61. DMIBAR32(0x090c + (i << 5)) &= 0xfff1ffff; DMIBAR32(0x090c + (i << 5)) &= 0xfff1ffff;
  62. 85: a1 2c 89 d1 fe mov 0xfed1892c,%eax 85: a1 2c 89 d1 fe mov 0xfed1892c,%eax
  63. 8a: 25 ff ff f1 ff and $0xfff1ffff,%eax 8a: 25 ff ff f1 ff and $0xfff1ffff,%eax
  64. 8f: a3 2c 89 d1 fe mov %eax,0xfed1892c 8f: a3 2c 89 d1 fe mov %eax,0xfed1892c
  65. } }
  66.  
  67. DMIBAR32(0x090c) &= 0xfe1fffff; DMIBAR32(0x090c) &= 0xfe1fffff;
  68. 94: a1 0c 89 d1 fe mov 0xfed1890c,%eax 94: a1 0c 89 d1 fe mov 0xfed1890c,%eax
  69. 99: 25 ff ff 1f fe and $0xfe1fffff,%eax 99: 25 ff ff 1f fe and $0xfe1fffff,%eax
  70. 9e: a3 0c 89 d1 fe mov %eax,0xfed1890c 9e: a3 0c 89 d1 fe mov %eax,0xfed1890c
  71. DMIBAR32(0x092c) &= 0xfe1fffff; DMIBAR32(0x092c) &= 0xfe1fffff;
  72. a3: a1 2c 89 d1 fe mov 0xfed1892c,%eax a3: a1 2c 89 d1 fe mov 0xfed1892c,%eax
  73. a8: 25 ff ff 1f fe and $0xfe1fffff,%eax a8: 25 ff ff 1f fe and $0xfe1fffff,%eax
  74. ad: a3 2c 89 d1 fe mov %eax,0xfed1892c ad: a3 2c 89 d1 fe mov %eax,0xfed1892c
  75.  
  76. DMIBAR32(0x0904); // !!! = 0x7a1842ec | tmp = DMIBAR32(0x0904); // !!! = 0x7a1842ec
  77. b2: a1 04 89 d1 fe mov 0xfed18904,%eax b2: a1 04 89 d1 fe mov 0xfed18904,%eax
  78. > b7: 89 44 24 0c mov %eax,0xc(%esp)
  79. DMIBAR32(0x0904) = 0x7a1842ec; DMIBAR32(0x0904) = 0x7a1842ec;
  80. b7: c7 05 04 89 d1 fe ec movl $0x7a1842ec,0xfed18904 | bb: c7 05 04 89 d1 fe ec movl $0x7a1842ec,0xfed18904
  81. be: 42 18 7a | c2: 42 18 7a
  82. DMIBAR32(0x090c); // !!! = 0x00000208 | tmp = DMIBAR32(0x090c); // !!! = 0x00000208
  83. c1: a1 0c 89 d1 fe mov 0xfed1890c,%eax | c5: a1 0c 89 d1 fe mov 0xfed1890c,%eax
  84. > ca: 89 44 24 0c mov %eax,0xc(%esp)
  85. DMIBAR32(0x090c) = 0x00000128; DMIBAR32(0x090c) = 0x00000128;
  86. c6: c7 05 0c 89 d1 fe 28 movl $0x128,0xfed1890c | ce: c7 05 0c 89 d1 fe 28 movl $0x128,0xfed1890c
  87. cd: 01 00 00 | d5: 01 00 00
  88. DMIBAR32(0x0924); // !!! = 0x7a1842ec | tmp = DMIBAR32(0x0924); // !!! = 0x7a1842ec
  89. d0: a1 24 89 d1 fe mov 0xfed18924,%eax | d8: a1 24 89 d1 fe mov 0xfed18924,%eax
  90. > dd: 89 44 24 0c mov %eax,0xc(%esp)
  91. DMIBAR32(0x0924) = 0x7a1842ec; DMIBAR32(0x0924) = 0x7a1842ec;
  92. d5: c7 05 24 89 d1 fe ec movl $0x7a1842ec,0xfed18924 | e1: c7 05 24 89 d1 fe ec movl $0x7a1842ec,0xfed18924
  93. dc: 42 18 7a | e8: 42 18 7a
  94. DMIBAR32(0x092c); // !!! = 0x00000208 | tmp = DMIBAR32(0x092c); // !!! = 0x00000208
  95. df: a1 2c 89 d1 fe mov 0xfed1892c,%eax | eb: a1 2c 89 d1 fe mov 0xfed1892c,%eax
  96. > f0: 89 44 24 0c mov %eax,0xc(%esp)
  97. DMIBAR32(0x092c) = 0x00000128; DMIBAR32(0x092c) = 0x00000128;
  98. e4: c7 05 2c 89 d1 fe 28 movl $0x128,0xfed1892c | f4: c7 05 2c 89 d1 fe 28 movl $0x128,0xfed1892c
  99. eb: 01 00 00 | fb: 01 00 00
  100. DMIBAR32(0x0700); // !!! = 0x46139008 | tmp = DMIBAR32(0x0700); // !!! = 0x46139008
  101. ee: a1 00 87 d1 fe mov 0xfed18700,%eax | fe: a1 00 87 d1 fe mov 0xfed18700,%eax
  102. > 103: 89 44 24 0c mov %eax,0xc(%esp)
  103. DMIBAR32(0x0700) = 0x46139008; DMIBAR32(0x0700) = 0x46139008;
  104. f3: c7 05 00 87 d1 fe 08 movl $0x46139008,0xfed18700 | 107: c7 05 00 87 d1 fe 08 movl $0x46139008,0xfed18700
  105. fa: 90 13 46 | 10e: 90 13 46
  106. DMIBAR32(0x0720); // !!! = 0x46139008 | tmp = DMIBAR32(0x0720); // !!! = 0x46139008
  107. fd: a1 20 87 d1 fe mov 0xfed18720,%eax | 111: a1 20 87 d1 fe mov 0xfed18720,%eax
  108. > 116: 89 44 24 0c mov %eax,0xc(%esp)
  109. DMIBAR32(0x0720) = 0x46139008; DMIBAR32(0x0720) = 0x46139008;
  110. 102: c7 05 20 87 d1 fe 08 movl $0x46139008,0xfed18720 | 11a: c7 05 20 87 d1 fe 08 movl $0x46139008,0xfed18720
  111. 109: 90 13 46 | 121: 90 13 46
  112. DMIBAR32(0x0c04); // !!! = 0x2e680008 | tmp = DMIBAR32(0x0c04); // !!! = 0x2e680008
  113. 10c: a1 04 8c d1 fe mov 0xfed18c04,%eax | 124: a1 04 8c d1 fe mov 0xfed18c04,%eax
  114. > 129: 89 44 24 0c mov %eax,0xc(%esp)
  115. DMIBAR32(0x0c04) = 0x2e680008; DMIBAR32(0x0c04) = 0x2e680008;
  116. 111: c7 05 04 8c d1 fe 08 movl $0x2e680008,0xfed18c04 | 12d: c7 05 04 8c d1 fe 08 movl $0x2e680008,0xfed18c04
  117. 118: 00 68 2e | 134: 00 68 2e
  118. DMIBAR32(0x0904); // !!! = 0x7a1842ec | tmp = DMIBAR32(0x0904); // !!! = 0x7a1842ec
  119. 11b: a1 04 89 d1 fe mov 0xfed18904,%eax | 137: a1 04 89 d1 fe mov 0xfed18904,%eax
  120. > 13c: 89 44 24 0c mov %eax,0xc(%esp)
  121. DMIBAR32(0x0904) = 0x3a1842ec; DMIBAR32(0x0904) = 0x3a1842ec;
  122. 120: c7 05 04 89 d1 fe ec movl $0x3a1842ec,0xfed18904 | 140: c7 05 04 89 d1 fe ec movl $0x3a1842ec,0xfed18904
  123. 127: 42 18 3a | 147: 42 18 3a
  124. DMIBAR32(0x0924); // !!! = 0x7a1842ec | tmp = DMIBAR32(0x0924); // !!! = 0x7a1842ec
  125. 12a: a1 24 89 d1 fe mov 0xfed18924,%eax | 14a: a1 24 89 d1 fe mov 0xfed18924,%eax
  126. > 14f: 89 44 24 0c mov %eax,0xc(%esp)
  127. DMIBAR32(0x0924) = 0x3a1842ec; DMIBAR32(0x0924) = 0x3a1842ec;
  128. 12f: c7 05 24 89 d1 fe ec movl $0x3a1842ec,0xfed18924 | 153: c7 05 24 89 d1 fe ec movl $0x3a1842ec,0xfed18924
  129. 136: 42 18 3a | 15a: 42 18 3a
  130. DMIBAR32(0x0910); // !!! = 0x00006300 | tmp = DMIBAR32(0x0910); // !!! = 0x00006300
  131. 139: a1 10 89 d1 fe mov 0xfed18910,%eax | 15d: a1 10 89 d1 fe mov 0xfed18910,%eax
  132. > 162: 89 44 24 0c mov %eax,0xc(%esp)
  133. DMIBAR32(0x0910) = 0x00004300; DMIBAR32(0x0910) = 0x00004300;
  134. 13e: c7 05 10 89 d1 fe 00 movl $0x4300,0xfed18910 | 166: c7 05 10 89 d1 fe 00 movl $0x4300,0xfed18910
  135. 145: 43 00 00 | 16d: 43 00 00
  136. DMIBAR32(0x0930); // !!! = 0x00006300 | tmp = DMIBAR32(0x0930); // !!! = 0x00006300
  137. 148: a1 30 89 d1 fe mov 0xfed18930,%eax | 170: a1 30 89 d1 fe mov 0xfed18930,%eax
  138. > 175: 89 44 24 0c mov %eax,0xc(%esp)
  139. DMIBAR32(0x0930) = 0x00004300; DMIBAR32(0x0930) = 0x00004300;
  140. 14d: c7 05 30 89 d1 fe 00 movl $0x4300,0xfed18930 | 179: c7 05 30 89 d1 fe 00 movl $0x4300,0xfed18930
  141. 154: 43 00 00 | 180: 43 00 00
  142. DMIBAR32(0x0a00); // !!! = 0x03042010 | tmp = DMIBAR32(0x0a00); // !!! = 0x03042010
  143. 157: a1 00 8a d1 fe mov 0xfed18a00,%eax | 183: a1 00 8a d1 fe mov 0xfed18a00,%eax
  144. > 188: 89 44 24 0c mov %eax,0xc(%esp)
  145. DMIBAR32(0x0a00) = 0x03042018; DMIBAR32(0x0a00) = 0x03042018;
  146. 15c: c7 05 00 8a d1 fe 18 movl $0x3042018,0xfed18a00 | 18c: c7 05 00 8a d1 fe 18 movl $0x3042018,0xfed18a00
  147. 163: 20 04 03 | 193: 20 04 03
  148. DMIBAR32(0x0a10); // !!! = 0x03042010 | tmp = DMIBAR32(0x0a10); // !!! = 0x03042010
  149. 166: a1 10 8a d1 fe mov 0xfed18a10,%eax | 196: a1 10 8a d1 fe mov 0xfed18a10,%eax
  150. > 19b: 89 44 24 0c mov %eax,0xc(%esp)
  151. DMIBAR32(0x0a10) = 0x03042018; DMIBAR32(0x0a10) = 0x03042018;
  152. 16b: c7 05 10 8a d1 fe 18 movl $0x3042018,0xfed18a10 | 19f: c7 05 10 8a d1 fe 18 movl $0x3042018,0xfed18a10
  153. 172: 20 04 03 | 1a6: 20 04 03
  154. DMIBAR32(0x0a20); // !!! = 0x03042010 | tmp = DMIBAR32(0x0a20); // !!! = 0x03042010
  155. 175: a1 20 8a d1 fe mov 0xfed18a20,%eax | 1a9: a1 20 8a d1 fe mov 0xfed18a20,%eax
  156. > 1ae: 89 44 24 0c mov %eax,0xc(%esp)
  157. DMIBAR32(0x0a20) = 0x03042018; DMIBAR32(0x0a20) = 0x03042018;
  158. 17a: c7 05 20 8a d1 fe 18 movl $0x3042018,0xfed18a20 | 1b2: c7 05 20 8a d1 fe 18 movl $0x3042018,0xfed18a20
  159. 181: 20 04 03 | 1b9: 20 04 03
  160. DMIBAR32(0x0a30); // !!! = 0x03042010 | tmp = DMIBAR32(0x0a30); // !!! = 0x03042010
  161. 184: a1 30 8a d1 fe mov 0xfed18a30,%eax | 1bc: a1 30 8a d1 fe mov 0xfed18a30,%eax
  162. > 1c1: 89 44 24 0c mov %eax,0xc(%esp)
  163. DMIBAR32(0x0a30) = 0x03042018; DMIBAR32(0x0a30) = 0x03042018;
  164. 189: c7 05 30 8a d1 fe 18 movl $0x3042018,0xfed18a30 | 1c5: c7 05 30 8a d1 fe 18 movl $0x3042018,0xfed18a30
  165. 190: 20 04 03 | 1cc: 20 04 03
  166. DMIBAR32(0x0c00); // !!! = 0x29700c08 | tmp = DMIBAR32(0x0c00); // !!! = 0x29700c08
  167. 193: a1 00 8c d1 fe mov 0xfed18c00,%eax | 1cf: a1 00 8c d1 fe mov 0xfed18c00,%eax
  168. > 1d4: 89 44 24 0c mov %eax,0xc(%esp)
  169. DMIBAR32(0x0c00) = 0x29700c08; DMIBAR32(0x0c00) = 0x29700c08;
  170. 198: c7 05 00 8c d1 fe 08 movl $0x29700c08,0xfed18c00 | 1d8: c7 05 00 8c d1 fe 08 movl $0x29700c08,0xfed18c00
  171. 19f: 0c 70 29 | 1df: 0c 70 29
  172. DMIBAR32(0x0a04); // !!! = 0x0c0708f0 | tmp = DMIBAR32(0x0a04); // !!! = 0x0c0708f0
  173. 1a2: a1 04 8a d1 fe mov 0xfed18a04,%eax | 1e2: a1 04 8a d1 fe mov 0xfed18a04,%eax
  174. > 1e7: 89 44 24 0c mov %eax,0xc(%esp)
  175. DMIBAR32(0x0a04) = 0x0c0718f0; DMIBAR32(0x0a04) = 0x0c0718f0;
  176. 1a7: c7 05 04 8a d1 fe f0 movl $0xc0718f0,0xfed18a04 | 1eb: c7 05 04 8a d1 fe f0 movl $0xc0718f0,0xfed18a04
  177. 1ae: 18 07 0c | 1f2: 18 07 0c
  178. DMIBAR32(0x0a14); // !!! = 0x0c0708f0 | tmp = DMIBAR32(0x0a14); // !!! = 0x0c0708f0
  179. 1b1: a1 14 8a d1 fe mov 0xfed18a14,%eax | 1f5: a1 14 8a d1 fe mov 0xfed18a14,%eax
  180. > 1fa: 89 44 24 0c mov %eax,0xc(%esp)
  181. DMIBAR32(0x0a14) = 0x0c0718f0; DMIBAR32(0x0a14) = 0x0c0718f0;
  182. 1b6: c7 05 14 8a d1 fe f0 movl $0xc0718f0,0xfed18a14 | 1fe: c7 05 14 8a d1 fe f0 movl $0xc0718f0,0xfed18a14
  183. 1bd: 18 07 0c | 205: 18 07 0c
  184. DMIBAR32(0x0a24); // !!! = 0x0c0708f0 | tmp = DMIBAR32(0x0a24); // !!! = 0x0c0708f0
  185. 1c0: a1 24 8a d1 fe mov 0xfed18a24,%eax | 208: a1 24 8a d1 fe mov 0xfed18a24,%eax
  186. > 20d: 89 44 24 0c mov %eax,0xc(%esp)
  187. DMIBAR32(0x0a24) = 0x0c0718f0; DMIBAR32(0x0a24) = 0x0c0718f0;
  188. 1c5: c7 05 24 8a d1 fe f0 movl $0xc0718f0,0xfed18a24 | 211: c7 05 24 8a d1 fe f0 movl $0xc0718f0,0xfed18a24
  189. 1cc: 18 07 0c | 218: 18 07 0c
  190. DMIBAR32(0x0a34); // !!! = 0x0c0708f0 | tmp = DMIBAR32(0x0a34); // !!! = 0x0c0708f0
  191. 1cf: a1 34 8a d1 fe mov 0xfed18a34,%eax | 21b: a1 34 8a d1 fe mov 0xfed18a34,%eax
  192. > 220: 89 44 24 0c mov %eax,0xc(%esp)
  193. DMIBAR32(0x0a34) = 0x0c0718f0; DMIBAR32(0x0a34) = 0x0c0718f0;
  194. 1d4: c7 05 34 8a d1 fe f0 movl $0xc0718f0,0xfed18a34 | 224: c7 05 34 8a d1 fe f0 movl $0xc0718f0,0xfed18a34
  195. 1db: 18 07 0c | 22b: 18 07 0c
  196. DMIBAR32(0x0900); // !!! = 0x50000000 | tmp = DMIBAR32(0x0900); // !!! = 0x50000000
  197. 1de: a1 00 89 d1 fe mov 0xfed18900,%eax | 22e: a1 00 89 d1 fe mov 0xfed18900,%eax
  198. > 233: 89 44 24 0c mov %eax,0xc(%esp)
  199. DMIBAR32(0x0900) = 0x50000000; DMIBAR32(0x0900) = 0x50000000;
  200. 1e3: c7 05 00 89 d1 fe 00 movl $0x50000000,0xfed18900 | 237: c7 05 00 89 d1 fe 00 movl $0x50000000,0xfed18900
  201. 1ea: 00 00 50 | 23e: 00 00 50
  202. DMIBAR32(0x0920); // !!! = 0x50000000 | tmp = DMIBAR32(0x0920); // !!! = 0x50000000
  203. 1ed: a1 20 89 d1 fe mov 0xfed18920,%eax | 241: a1 20 89 d1 fe mov 0xfed18920,%eax
  204. > 246: 89 44 24 0c mov %eax,0xc(%esp)
  205. DMIBAR32(0x0920) = 0x50000000; DMIBAR32(0x0920) = 0x50000000;
  206. 1f2: c7 05 20 89 d1 fe 00 movl $0x50000000,0xfed18920 | 24a: c7 05 20 89 d1 fe 00 movl $0x50000000,0xfed18920
  207. 1f9: 00 00 50 | 251: 00 00 50
  208. DMIBAR32(0x0908); // !!! = 0x51ffffff | tmp = DMIBAR32(0x0908); // !!! = 0x51ffffff
  209. 1fc: a1 08 89 d1 fe mov 0xfed18908,%eax | 254: a1 08 89 d1 fe mov 0xfed18908,%eax
  210. > 259: 89 44 24 0c mov %eax,0xc(%esp)
  211. DMIBAR32(0x0908) = 0x51ffffff; DMIBAR32(0x0908) = 0x51ffffff;
  212. 201: c7 05 08 89 d1 fe ff movl $0x51ffffff,0xfed18908 | 25d: c7 05 08 89 d1 fe ff movl $0x51ffffff,0xfed18908
  213. 208: ff ff 51 | 264: ff ff 51
  214. DMIBAR32(0x0928); // !!! = 0x51ffffff | tmp = DMIBAR32(0x0928); // !!! = 0x51ffffff
  215. 20b: a1 28 89 d1 fe mov 0xfed18928,%eax | 267: a1 28 89 d1 fe mov 0xfed18928,%eax
  216. > 26c: 89 44 24 0c mov %eax,0xc(%esp)
  217. DMIBAR32(0x0928) = 0x51ffffff; DMIBAR32(0x0928) = 0x51ffffff;
  218. 210: c7 05 28 89 d1 fe ff movl $0x51ffffff,0xfed18928 | 270: c7 05 28 89 d1 fe ff movl $0x51ffffff,0xfed18928
  219. 217: ff ff 51 | 277: ff ff 51
  220. DMIBAR32(0x0a00); // !!! = 0x03042018 | tmp = DMIBAR32(0x0a00); // !!! = 0x03042018
  221. 21a: a1 00 8a d1 fe mov 0xfed18a00,%eax | 27a: a1 00 8a d1 fe mov 0xfed18a00,%eax
  222. > 27f: 89 44 24 0c mov %eax,0xc(%esp)
  223. DMIBAR32(0x0a00) = 0x03042018; DMIBAR32(0x0a00) = 0x03042018;
  224. 21f: c7 05 00 8a d1 fe 18 movl $0x3042018,0xfed18a00 | 283: c7 05 00 8a d1 fe 18 movl $0x3042018,0xfed18a00
  225. 226: 20 04 03 | 28a: 20 04 03
  226. DMIBAR32(0x0a10); // !!! = 0x03042018 | tmp = DMIBAR32(0x0a10); // !!! = 0x03042018
  227. 229: a1 10 8a d1 fe mov 0xfed18a10,%eax | 28d: a1 10 8a d1 fe mov 0xfed18a10,%eax
  228. > 292: 89 44 24 0c mov %eax,0xc(%esp)
  229. DMIBAR32(0x0a10) = 0x03042018; DMIBAR32(0x0a10) = 0x03042018;
  230. 22e: c7 05 10 8a d1 fe 18 movl $0x3042018,0xfed18a10 | 296: c7 05 10 8a d1 fe 18 movl $0x3042018,0xfed18a10
  231. 235: 20 04 03 | 29d: 20 04 03
  232. DMIBAR32(0x0a20); // !!! = 0x03042018 | tmp = DMIBAR32(0x0a20); // !!! = 0x03042018
  233. 238: a1 20 8a d1 fe mov 0xfed18a20,%eax | 2a0: a1 20 8a d1 fe mov 0xfed18a20,%eax
  234. > 2a5: 89 44 24 0c mov %eax,0xc(%esp)
  235. DMIBAR32(0x0a20) = 0x03042018; DMIBAR32(0x0a20) = 0x03042018;
  236. 23d: c7 05 20 8a d1 fe 18 movl $0x3042018,0xfed18a20 | 2a9: c7 05 20 8a d1 fe 18 movl $0x3042018,0xfed18a20
  237. 244: 20 04 03 | 2b0: 20 04 03
  238. DMIBAR32(0x0a30); // !!! = 0x03042018 | tmp = DMIBAR32(0x0a30); // !!! = 0x03042018
  239. 247: a1 30 8a d1 fe mov 0xfed18a30,%eax | 2b3: a1 30 8a d1 fe mov 0xfed18a30,%eax
  240. > 2b8: 89 44 24 0c mov %eax,0xc(%esp)
  241. DMIBAR32(0x0a30) = 0x03042018; DMIBAR32(0x0a30) = 0x03042018;
  242. 24c: c7 05 30 8a d1 fe 18 movl $0x3042018,0xfed18a30 | 2bc: c7 05 30 8a d1 fe 18 movl $0x3042018,0xfed18a30
  243. 253: 20 04 03 | 2c3: 20 04 03
  244. DMIBAR32(0x0700); // !!! = 0x46139008 | tmp = DMIBAR32(0x0700); // !!! = 0x46139008
  245. 256: a1 00 87 d1 fe mov 0xfed18700,%eax | 2c6: a1 00 87 d1 fe mov 0xfed18700,%eax
  246. > 2cb: 89 44 24 0c mov %eax,0xc(%esp)
  247. DMIBAR32(0x0700) = 0x46139008; DMIBAR32(0x0700) = 0x46139008;
  248. 25b: c7 05 00 87 d1 fe 08 movl $0x46139008,0xfed18700 | 2cf: c7 05 00 87 d1 fe 08 movl $0x46139008,0xfed18700
  249. 262: 90 13 46 | 2d6: 90 13 46
  250. DMIBAR32(0x0720); // !!! = 0x46139008 | tmp = DMIBAR32(0x0720); // !!! = 0x46139008
  251. 265: a1 20 87 d1 fe mov 0xfed18720,%eax | 2d9: a1 20 87 d1 fe mov 0xfed18720,%eax
  252. > 2de: 89 44 24 0c mov %eax,0xc(%esp)
  253. DMIBAR32(0x0720) = 0x46139008; DMIBAR32(0x0720) = 0x46139008;
  254. 26a: c7 05 20 87 d1 fe 08 movl $0x46139008,0xfed18720 | 2e2: c7 05 20 87 d1 fe 08 movl $0x46139008,0xfed18720
  255. 271: 90 13 46 | 2e9: 90 13 46
  256. DMIBAR32(0x0904); // !!! = 0x3a1842ec | tmp = DMIBAR32(0x0904); // !!! = 0x3a1842ec
  257. 274: a1 04 89 d1 fe mov 0xfed18904,%eax | 2ec: a1 04 89 d1 fe mov 0xfed18904,%eax
  258. > 2f1: 89 44 24 0c mov %eax,0xc(%esp)
  259. DMIBAR32(0x0904) = 0x3a1846ec; DMIBAR32(0x0904) = 0x3a1846ec;
  260. 279: c7 05 04 89 d1 fe ec movl $0x3a1846ec,0xfed18904 | 2f5: c7 05 04 89 d1 fe ec movl $0x3a1846ec,0xfed18904
  261. 280: 46 18 3a | 2fc: 46 18 3a
  262. DMIBAR32(0x0924); // !!! = 0x3a1842ec | tmp = DMIBAR32(0x0924); // !!! = 0x3a1842ec
  263. 283: a1 24 89 d1 fe mov 0xfed18924,%eax | 2ff: a1 24 89 d1 fe mov 0xfed18924,%eax
  264. > 304: 89 44 24 0c mov %eax,0xc(%esp)
  265. DMIBAR32(0x0924) = 0x3a1846ec; DMIBAR32(0x0924) = 0x3a1846ec;
  266. 288: c7 05 24 89 d1 fe ec movl $0x3a1846ec,0xfed18924 | 308: c7 05 24 89 d1 fe ec movl $0x3a1846ec,0xfed18924
  267. 28f: 46 18 3a | 30f: 46 18 3a
  268. DMIBAR32(0x0a00); // !!! = 0x03042018 | tmp = DMIBAR32(0x0a00); // !!! = 0x03042018
  269. 292: a1 00 8a d1 fe mov 0xfed18a00,%eax | 312: a1 00 8a d1 fe mov 0xfed18a00,%eax
  270. > 317: 89 44 24 0c mov %eax,0xc(%esp)
  271. DMIBAR32(0x0a00) = 0x03042018; DMIBAR32(0x0a00) = 0x03042018;
  272. 297: c7 05 00 8a d1 fe 18 movl $0x3042018,0xfed18a00 | 31b: c7 05 00 8a d1 fe 18 movl $0x3042018,0xfed18a00
  273. 29e: 20 04 03 | 322: 20 04 03
  274. DMIBAR32(0x0a10); // !!! = 0x03042018 | tmp = DMIBAR32(0x0a10); // !!! = 0x03042018
  275. 2a1: a1 10 8a d1 fe mov 0xfed18a10,%eax | 325: a1 10 8a d1 fe mov 0xfed18a10,%eax
  276. > 32a: 89 44 24 0c mov %eax,0xc(%esp)
  277. DMIBAR32(0x0a10) = 0x03042018; DMIBAR32(0x0a10) = 0x03042018;
  278. 2a6: c7 05 10 8a d1 fe 18 movl $0x3042018,0xfed18a10 | 32e: c7 05 10 8a d1 fe 18 movl $0x3042018,0xfed18a10
  279. 2ad: 20 04 03 | 335: 20 04 03
  280. DMIBAR32(0x0a20); // !!! = 0x03042018 | tmp = DMIBAR32(0x0a20); // !!! = 0x03042018
  281. 2b0: a1 20 8a d1 fe mov 0xfed18a20,%eax | 338: a1 20 8a d1 fe mov 0xfed18a20,%eax
  282. > 33d: 89 44 24 0c mov %eax,0xc(%esp)
  283. DMIBAR32(0x0a20) = 0x03042018; DMIBAR32(0x0a20) = 0x03042018;
  284. 2b5: c7 05 20 8a d1 fe 18 movl $0x3042018,0xfed18a20 | 341: c7 05 20 8a d1 fe 18 movl $0x3042018,0xfed18a20
  285. 2bc: 20 04 03 | 348: 20 04 03
  286. DMIBAR32(0x0a30); // !!! = 0x03042018 | tmp = DMIBAR32(0x0a30); // !!! = 0x03042018
  287. 2bf: a1 30 8a d1 fe mov 0xfed18a30,%eax | 34b: a1 30 8a d1 fe mov 0xfed18a30,%eax
  288. > 350: 89 44 24 0c mov %eax,0xc(%esp)
  289. DMIBAR32(0x0a30) = 0x03042018; DMIBAR32(0x0a30) = 0x03042018;
  290. 2c4: c7 05 30 8a d1 fe 18 movl $0x3042018,0xfed18a30 | 354: c7 05 30 8a d1 fe 18 movl $0x3042018,0xfed18a30
  291. 2cb: 20 04 03 | 35b: 20 04 03
  292. DMIBAR32(0x0908); // !!! = 0x51ffffff | tmp = DMIBAR32(0x0908); // !!! = 0x51ffffff
  293. 2ce: a1 08 89 d1 fe mov 0xfed18908,%eax | 35e: a1 08 89 d1 fe mov 0xfed18908,%eax
  294. > 363: 89 44 24 0c mov %eax,0xc(%esp)
  295. DMIBAR32(0x0908) = 0x51ffffff; DMIBAR32(0x0908) = 0x51ffffff;
  296. 2d3: c7 05 08 89 d1 fe ff movl $0x51ffffff,0xfed18908 | 367: c7 05 08 89 d1 fe ff movl $0x51ffffff,0xfed18908
  297. 2da: ff ff 51 | 36e: ff ff 51
  298. DMIBAR32(0x0928); // !!! = 0x51ffffff | tmp = DMIBAR32(0x0928); // !!! = 0x51ffffff
  299. 2dd: a1 28 89 d1 fe mov 0xfed18928,%eax | 371: a1 28 89 d1 fe mov 0xfed18928,%eax
  300. > 376: 89 44 24 0c mov %eax,0xc(%esp)
  301. DMIBAR32(0x0928) = 0x51ffffff; DMIBAR32(0x0928) = 0x51ffffff;
  302. 2e2: c7 05 28 89 d1 fe ff movl $0x51ffffff,0xfed18928 | 37a: c7 05 28 89 d1 fe ff movl $0x51ffffff,0xfed18928
  303. 2e9: ff ff 51 | 381: ff ff 51
  304. DMIBAR32(0x0c00); // !!! = 0x29700c08 | tmp = DMIBAR32(0x0c00); // !!! = 0x29700c08
  305. 2ec: a1 00 8c d1 fe mov 0xfed18c00,%eax | 384: a1 00 8c d1 fe mov 0xfed18c00,%eax
  306. > 389: 89 44 24 0c mov %eax,0xc(%esp)
  307. DMIBAR32(0x0c00) = 0x29700c08; DMIBAR32(0x0c00) = 0x29700c08;
  308. 2f1: c7 05 00 8c d1 fe 08 movl $0x29700c08,0xfed18c00 | 38d: c7 05 00 8c d1 fe 08 movl $0x29700c08,0xfed18c00
  309. 2f8: 0c 70 29 | 394: 0c 70 29
  310. DMIBAR32(0x0c0c); // !!! = 0x16063400 | tmp = DMIBAR32(0x0c0c); // !!! = 0x16063400
  311. 2fb: a1 0c 8c d1 fe mov 0xfed18c0c,%eax | 397: a1 0c 8c d1 fe mov 0xfed18c0c,%eax
  312. > 39c: 89 44 24 0c mov %eax,0xc(%esp)
  313. DMIBAR32(0x0c0c) = 0x00063400; DMIBAR32(0x0c0c) = 0x00063400;
  314. 300: c7 05 0c 8c d1 fe 00 movl $0x63400,0xfed18c0c | 3a0: c7 05 0c 8c d1 fe 00 movl $0x63400,0xfed18c0c
  315. 307: 34 06 00 | 3a7: 34 06 00
  316. DMIBAR32(0x0700); // !!! = 0x46139008 | tmp = DMIBAR32(0x0700); // !!! = 0x46139008
  317. 30a: a1 00 87 d1 fe mov 0xfed18700,%eax | 3aa: a1 00 87 d1 fe mov 0xfed18700,%eax
  318. > 3af: 89 44 24 0c mov %eax,0xc(%esp)
  319. DMIBAR32(0x0700) = 0x46339008; DMIBAR32(0x0700) = 0x46339008;
  320. 30f: c7 05 00 87 d1 fe 08 movl $0x46339008,0xfed18700 | 3b3: c7 05 00 87 d1 fe 08 movl $0x46339008,0xfed18700
  321. 316: 90 33 46 | 3ba: 90 33 46
  322. DMIBAR32(0x0720); // !!! = 0x46139008 | tmp = DMIBAR32(0x0720); // !!! = 0x46139008
  323. 319: a1 20 87 d1 fe mov 0xfed18720,%eax | 3bd: a1 20 87 d1 fe mov 0xfed18720,%eax
  324. > 3c2: 89 44 24 0c mov %eax,0xc(%esp)
  325. DMIBAR32(0x0720) = 0x46339008; DMIBAR32(0x0720) = 0x46339008;
  326. 31e: c7 05 20 87 d1 fe 08 movl $0x46339008,0xfed18720 | 3c6: c7 05 20 87 d1 fe 08 movl $0x46339008,0xfed18720
  327. 325: 90 33 46 | 3cd: 90 33 46
  328. DMIBAR32(0x0700); // !!! = 0x46339008 | tmp = DMIBAR32(0x0700); // !!! = 0x46339008
  329. 328: a1 00 87 d1 fe mov 0xfed18700,%eax | 3d0: a1 00 87 d1 fe mov 0xfed18700,%eax
  330. > 3d5: 89 44 24 0c mov %eax,0xc(%esp)
  331. DMIBAR32(0x0700) = 0x45339008; DMIBAR32(0x0700) = 0x45339008;
  332. 32d: c7 05 00 87 d1 fe 08 movl $0x45339008,0xfed18700 | 3d9: c7 05 00 87 d1 fe 08 movl $0x45339008,0xfed18700
  333. 334: 90 33 45 | 3e0: 90 33 45
  334. DMIBAR32(0x0720); // !!! = 0x46339008 | tmp = DMIBAR32(0x0720); // !!! = 0x46339008
  335. 337: a1 20 87 d1 fe mov 0xfed18720,%eax | 3e3: a1 20 87 d1 fe mov 0xfed18720,%eax
  336. > 3e8: 89 44 24 0c mov %eax,0xc(%esp)
  337. DMIBAR32(0x0720) = 0x45339008; DMIBAR32(0x0720) = 0x45339008;
  338. 33c: c7 05 20 87 d1 fe 08 movl $0x45339008,0xfed18720 | 3ec: c7 05 20 87 d1 fe 08 movl $0x45339008,0xfed18720
  339. 343: 90 33 45 | 3f3: 90 33 45
  340. DMIBAR32(0x0700); // !!! = 0x45339008 | tmp = DMIBAR32(0x0700); // !!! = 0x45339008
  341. 346: a1 00 87 d1 fe mov 0xfed18700,%eax | 3f6: a1 00 87 d1 fe mov 0xfed18700,%eax
  342. > 3fb: 89 44 24 0c mov %eax,0xc(%esp)
  343. DMIBAR32(0x0700) = 0x453b9008; DMIBAR32(0x0700) = 0x453b9008;
  344. 34b: c7 05 00 87 d1 fe 08 movl $0x453b9008,0xfed18700 | 3ff: c7 05 00 87 d1 fe 08 movl $0x453b9008,0xfed18700
  345. 352: 90 3b 45 | 406: 90 3b 45
  346. DMIBAR32(0x0720); // !!! = 0x45339008 | tmp = DMIBAR32(0x0720); // !!! = 0x45339008
  347. 355: a1 20 87 d1 fe mov 0xfed18720,%eax | 409: a1 20 87 d1 fe mov 0xfed18720,%eax
  348. > 40e: 89 44 24 0c mov %eax,0xc(%esp)
  349. DMIBAR32(0x0720) = 0x453b9008; DMIBAR32(0x0720) = 0x453b9008;
  350. 35a: c7 05 20 87 d1 fe 08 movl $0x453b9008,0xfed18720 | 412: c7 05 20 87 d1 fe 08 movl $0x453b9008,0xfed18720
  351. 361: 90 3b 45 | 419: 90 3b 45
  352. DMIBAR32(0x0700); // !!! = 0x453b9008 | tmp = DMIBAR32(0x0700); // !!! = 0x453b9008
  353. 364: a1 00 87 d1 fe mov 0xfed18700,%eax | 41c: a1 00 87 d1 fe mov 0xfed18700,%eax
  354. > 421: 89 44 24 0c mov %eax,0xc(%esp)
  355. DMIBAR32(0x0700) = 0x45bb9008; DMIBAR32(0x0700) = 0x45bb9008;
  356. 369: c7 05 00 87 d1 fe 08 movl $0x45bb9008,0xfed18700 | 425: c7 05 00 87 d1 fe 08 movl $0x45bb9008,0xfed18700
  357. 370: 90 bb 45 | 42c: 90 bb 45
  358. DMIBAR32(0x0720); // !!! = 0x453b9008 | tmp = DMIBAR32(0x0720); // !!! = 0x453b9008
  359. 373: a1 20 87 d1 fe mov 0xfed18720,%eax | 42f: a1 20 87 d1 fe mov 0xfed18720,%eax
  360. > 434: 89 44 24 0c mov %eax,0xc(%esp)
  361. DMIBAR32(0x0720) = 0x45bb9008; DMIBAR32(0x0720) = 0x45bb9008;
  362. 378: c7 05 20 87 d1 fe 08 movl $0x45bb9008,0xfed18720 | 438: c7 05 20 87 d1 fe 08 movl $0x45bb9008,0xfed18720
  363. 37f: 90 bb 45 | 43f: 90 bb 45
  364. DMIBAR32(0x0700); // !!! = 0x45bb9008 | tmp = DMIBAR32(0x0700); // !!! = 0x45bb9008
  365. 382: a1 00 87 d1 fe mov 0xfed18700,%eax | 442: a1 00 87 d1 fe mov 0xfed18700,%eax
  366. > 447: 89 44 24 0c mov %eax,0xc(%esp)
  367. DMIBAR32(0x0700) = 0x45fb9008; DMIBAR32(0x0700) = 0x45fb9008;
  368. 387: c7 05 00 87 d1 fe 08 movl $0x45fb9008,0xfed18700 | 44b: c7 05 00 87 d1 fe 08 movl $0x45fb9008,0xfed18700
  369. 38e: 90 fb 45 | 452: 90 fb 45
  370. DMIBAR32(0x0720); // !!! = 0x45bb9008 | tmp = DMIBAR32(0x0720); // !!! = 0x45bb9008
  371. 391: a1 20 87 d1 fe mov 0xfed18720,%eax | 455: a1 20 87 d1 fe mov 0xfed18720,%eax
  372. > 45a: 89 44 24 0c mov %eax,0xc(%esp)
  373. DMIBAR32(0x0720) = 0x45fb9008; DMIBAR32(0x0720) = 0x45fb9008;
  374. 396: c7 05 20 87 d1 fe 08 movl $0x45fb9008,0xfed18720 | 45e: c7 05 20 87 d1 fe 08 movl $0x45fb9008,0xfed18720
  375. 39d: 90 fb 45 | 465: 90 fb 45
  376. DMIBAR32(0x0914); // !!! = 0x9021a080 | tmp = DMIBAR32(0x0914); // !!! = 0x9021a080
  377. 3a0: a1 14 89 d1 fe mov 0xfed18914,%eax | 468: a1 14 89 d1 fe mov 0xfed18914,%eax
  378. > 46d: 89 44 24 0c mov %eax,0xc(%esp)
  379. DMIBAR32(0x0914) = 0x9021a280; DMIBAR32(0x0914) = 0x9021a280;
  380. 3a5: c7 05 14 89 d1 fe 80 movl $0x9021a280,0xfed18914 | 471: c7 05 14 89 d1 fe 80 movl $0x9021a280,0xfed18914
  381. 3ac: a2 21 90 | 478: a2 21 90
  382. DMIBAR32(0x0934); // !!! = 0x9021a080 | tmp = DMIBAR32(0x0934); // !!! = 0x9021a080
  383. 3af: a1 34 89 d1 fe mov 0xfed18934,%eax | 47b: a1 34 89 d1 fe mov 0xfed18934,%eax
  384. > 480: 89 44 24 0c mov %eax,0xc(%esp)
  385. DMIBAR32(0x0934) = 0x9021a280; DMIBAR32(0x0934) = 0x9021a280;
  386. 3b4: c7 05 34 89 d1 fe 80 movl $0x9021a280,0xfed18934 | 484: c7 05 34 89 d1 fe 80 movl $0x9021a280,0xfed18934
  387. 3bb: a2 21 90 | 48b: a2 21 90
  388. DMIBAR32(0x0914); // !!! = 0x9021a280 | tmp = DMIBAR32(0x0914); // !!! = 0x9021a280
  389. 3be: a1 14 89 d1 fe mov 0xfed18914,%eax | 48e: a1 14 89 d1 fe mov 0xfed18914,%eax
  390. > 493: 89 44 24 0c mov %eax,0xc(%esp)
  391. DMIBAR32(0x0914) = 0x9821a280; DMIBAR32(0x0914) = 0x9821a280;
  392. 3c3: c7 05 14 89 d1 fe 80 movl $0x9821a280,0xfed18914 | 497: c7 05 14 89 d1 fe 80 movl $0x9821a280,0xfed18914
  393. 3ca: a2 21 98 | 49e: a2 21 98
  394. DMIBAR32(0x0934); // !!! = 0x9021a280 | tmp = DMIBAR32(0x0934); // !!! = 0x9021a280
  395. 3cd: a1 34 89 d1 fe mov 0xfed18934,%eax | 4a1: a1 34 89 d1 fe mov 0xfed18934,%eax
  396. > 4a6: 89 44 24 0c mov %eax,0xc(%esp)
  397. DMIBAR32(0x0934) = 0x9821a280; DMIBAR32(0x0934) = 0x9821a280;
  398. 3d2: c7 05 34 89 d1 fe 80 movl $0x9821a280,0xfed18934 | 4aa: c7 05 34 89 d1 fe 80 movl $0x9821a280,0xfed18934
  399. 3d9: a2 21 98 | 4b1: a2 21 98
  400. DMIBAR32(0x0a00); // !!! = 0x03042018 | tmp = DMIBAR32(0x0a00); // !!! = 0x03042018
  401. 3dc: a1 00 8a d1 fe mov 0xfed18a00,%eax | 4b4: a1 00 8a d1 fe mov 0xfed18a00,%eax
  402. > 4b9: 89 44 24 0c mov %eax,0xc(%esp)
  403. DMIBAR32(0x0a00) = 0x03242018; DMIBAR32(0x0a00) = 0x03242018;
  404. 3e1: c7 05 00 8a d1 fe 18 movl $0x3242018,0xfed18a00 | 4bd: c7 05 00 8a d1 fe 18 movl $0x3242018,0xfed18a00
  405. 3e8: 20 24 03 | 4c4: 20 24 03
  406. DMIBAR32(0x0a10); // !!! = 0x03042018 | tmp = DMIBAR32(0x0a10); // !!! = 0x03042018
  407. 3eb: a1 10 8a d1 fe mov 0xfed18a10,%eax | 4c7: a1 10 8a d1 fe mov 0xfed18a10,%eax
  408. > 4cc: 89 44 24 0c mov %eax,0xc(%esp)
  409. DMIBAR32(0x0a10) = 0x03242018; DMIBAR32(0x0a10) = 0x03242018;
  410. 3f0: c7 05 10 8a d1 fe 18 movl $0x3242018,0xfed18a10 | 4d0: c7 05 10 8a d1 fe 18 movl $0x3242018,0xfed18a10
  411. 3f7: 20 24 03 | 4d7: 20 24 03
  412. DMIBAR32(0x0a20); // !!! = 0x03042018 | tmp = DMIBAR32(0x0a20); // !!! = 0x03042018
  413. 3fa: a1 20 8a d1 fe mov 0xfed18a20,%eax | 4da: a1 20 8a d1 fe mov 0xfed18a20,%eax
  414. > 4df: 89 44 24 0c mov %eax,0xc(%esp)
  415. DMIBAR32(0x0a20) = 0x03242018; DMIBAR32(0x0a20) = 0x03242018;
  416. 3ff: c7 05 20 8a d1 fe 18 movl $0x3242018,0xfed18a20 | 4e3: c7 05 20 8a d1 fe 18 movl $0x3242018,0xfed18a20
  417. 406: 20 24 03 | 4ea: 20 24 03
  418. DMIBAR32(0x0a30); // !!! = 0x03042018 | tmp = DMIBAR32(0x0a30); // !!! = 0x03042018
  419. 409: a1 30 8a d1 fe mov 0xfed18a30,%eax | 4ed: a1 30 8a d1 fe mov 0xfed18a30,%eax
  420. > 4f2: 89 44 24 0c mov %eax,0xc(%esp)
  421. DMIBAR32(0x0a30) = 0x03242018; DMIBAR32(0x0a30) = 0x03242018;
  422. 40e: c7 05 30 8a d1 fe 18 movl $0x3242018,0xfed18a30 | 4f6: c7 05 30 8a d1 fe 18 movl $0x3242018,0xfed18a30
  423. 415: 20 24 03 | 4fd: 20 24 03
  424. DMIBAR32(0x0258); // !!! = 0x40000600 | tmp = DMIBAR32(0x0258); // !!! = 0x40000600
  425. 418: a1 58 82 d1 fe mov 0xfed18258,%eax | 500: a1 58 82 d1 fe mov 0xfed18258,%eax
  426. > 505: 89 44 24 0c mov %eax,0xc(%esp)
  427. DMIBAR32(0x0258) = 0x60000600; DMIBAR32(0x0258) = 0x60000600;
  428. 41d: c7 05 58 82 d1 fe 00 movl $0x60000600,0xfed18258 | 509: c7 05 58 82 d1 fe 00 movl $0x60000600,0xfed18258
  429. 424: 06 00 60 | 510: 06 00 60
  430. DMIBAR32(0x0904); // !!! = 0x3a1846ec | tmp = DMIBAR32(0x0904); // !!! = 0x3a1846ec
  431. 427: a1 04 89 d1 fe mov 0xfed18904,%eax | 513: a1 04 89 d1 fe mov 0xfed18904,%eax
  432. > 518: 89 44 24 0c mov %eax,0xc(%esp)
  433. DMIBAR32(0x0904) = 0x2a1846ec; DMIBAR32(0x0904) = 0x2a1846ec;
  434. 42c: c7 05 04 89 d1 fe ec movl $0x2a1846ec,0xfed18904 | 51c: c7 05 04 89 d1 fe ec movl $0x2a1846ec,0xfed18904
  435. 433: 46 18 2a | 523: 46 18 2a
  436. DMIBAR32(0x0914); // !!! = 0x9821a280 | tmp = DMIBAR32(0x0914); // !!! = 0x9821a280
  437. 436: a1 14 89 d1 fe mov 0xfed18914,%eax | 526: a1 14 89 d1 fe mov 0xfed18914,%eax
  438. > 52b: 89 44 24 0c mov %eax,0xc(%esp)
  439. DMIBAR32(0x0914) = 0x98200280; DMIBAR32(0x0914) = 0x98200280;
  440. 43b: c7 05 14 89 d1 fe 80 movl $0x98200280,0xfed18914 | 52f: c7 05 14 89 d1 fe 80 movl $0x98200280,0xfed18914
  441. 442: 02 20 98 | 536: 02 20 98
  442. DMIBAR32(0x0924); // !!! = 0x3a1846ec | tmp = DMIBAR32(0x0924); // !!! = 0x3a1846ec
  443. 445: a1 24 89 d1 fe mov 0xfed18924,%eax | 539: a1 24 89 d1 fe mov 0xfed18924,%eax
  444. > 53e: 89 44 24 0c mov %eax,0xc(%esp)
  445. DMIBAR32(0x0924) = 0x2a1846ec; DMIBAR32(0x0924) = 0x2a1846ec;
  446. 44a: c7 05 24 89 d1 fe ec movl $0x2a1846ec,0xfed18924 | 542: c7 05 24 89 d1 fe ec movl $0x2a1846ec,0xfed18924
  447. 451: 46 18 2a | 549: 46 18 2a
  448. DMIBAR32(0x0934); // !!! = 0x9821a280 | tmp = DMIBAR32(0x0934); // !!! = 0x9821a280
  449. 454: a1 34 89 d1 fe mov 0xfed18934,%eax | 54c: a1 34 89 d1 fe mov 0xfed18934,%eax
  450. > 551: 89 44 24 0c mov %eax,0xc(%esp)
  451. DMIBAR32(0x0934) = 0x98200280; DMIBAR32(0x0934) = 0x98200280;
  452. 459: c7 05 34 89 d1 fe 80 movl $0x98200280,0xfed18934 | 555: c7 05 34 89 d1 fe 80 movl $0x98200280,0xfed18934
  453. 460: 02 20 98 | 55c: 02 20 98
  454. DMIBAR32(0x022c); // !!! = 0x00c26460 | tmp = DMIBAR32(0x022c); // !!! = 0x00c26460
  455. 463: a1 2c 82 d1 fe mov 0xfed1822c,%eax | 55f: a1 2c 82 d1 fe mov 0xfed1822c,%eax
  456. > 564: 89 44 24 0c mov %eax,0xc(%esp)
  457. DMIBAR32(0x022c) = 0x00c2403c; DMIBAR32(0x022c) = 0x00c2403c;
  458. 468: c7 05 2c 82 d1 fe 3c movl $0xc2403c,0xfed1822c | 568: c7 05 2c 82 d1 fe 3c movl $0xc2403c,0xfed1822c
  459. 46f: 40 c2 00 | 56f: 40 c2 00
  460.  
  461. early_pch_init_native_dmi_pre(); early_pch_init_native_dmi_pre();
  462. 472: e8 fc ff ff ff call 473 <early_init_dmi+0x | 572: e8 fc ff ff ff call 573 <early_init_dmi+0x
  463.  
  464. /* Write once settings. */ /* Write once settings. */
  465. DMIBAR32(DMILCAP) = (DMIBAR32(DMILCAP) & ~0x3f00f) | DMIBAR32(DMILCAP) = (DMIBAR32(DMILCAP) & ~0x3f00f) |
  466. 477: a1 84 80 d1 fe mov 0xfed18084,%eax | 577: a1 84 80 d1 fe mov 0xfed18084,%eax
  467. 47c: 25 f0 0f fc ff and $0xfffc0ff0,%eax | 57c: 25 f0 0f fc ff and $0xfffc0ff0,%eax
  468. (2 << 0) | // 5GT/s (2 << 0) | // 5GT/s
  469. (2 << 12) | // L0s 128 ns to less (2 << 12) | // L0s 128 ns to less
  470. 481: 0d 02 20 01 00 or $0x12002,%eax | 581: 0d 02 20 01 00 or $0x12002,%eax
  471. DMIBAR32(DMILCAP) = (DMIBAR32(DMILCAP) & ~0x3f00f) | DMIBAR32(DMILCAP) = (DMIBAR32(DMILCAP) & ~0x3f00f) |
  472. 486: a3 84 80 d1 fe mov %eax,0xfed18084 | 586: a3 84 80 d1 fe mov %eax,0xfed18084
  473. (2 << 15); // L1 2 us to less th (2 << 15); // L1 2 us to less th
  474.  
  475. DMIBAR8(DMILCTL) |= 0x20; // Retrain link DMIBAR8(DMILCTL) |= 0x20; // Retrain link
  476. 48b: a0 88 80 d1 fe mov 0xfed18088,%al | 58b: a0 88 80 d1 fe mov 0xfed18088,%al
  477. 490: 0c 20 or $0x20,%al | 590: 0c 20 or $0x20,%al
  478. 492: a2 88 80 d1 fe mov %al,0xfed18088 | 592: a2 88 80 d1 fe mov %al,0xfed18088
  479. while (DMIBAR16(DMILSTS) & TXTRN) while (DMIBAR16(DMILSTS) & TXTRN)
  480. 497: 66 a1 8a 80 d1 fe mov 0xfed1808a,%ax | 597: 66 a1 8a 80 d1 fe mov 0xfed1808a,%ax
  481. 49d: f6 c4 08 test $0x8,%ah | 59d: f6 c4 08 test $0x8,%ah
  482. 4a0: 75 f5 jne 497 <early_init_dmi+0x | 5a0: 75 f5 jne 597 <early_init_dmi+0x
  483. ; ;
  484.  
  485. DMIBAR8(DMILCTL) |= 0x20; // Retrain link DMIBAR8(DMILCTL) |= 0x20; // Retrain link
  486. 4a2: a0 88 80 d1 fe mov 0xfed18088,%al | 5a2: a0 88 80 d1 fe mov 0xfed18088,%al
  487. 4a7: 0c 20 or $0x20,%al | 5a7: 0c 20 or $0x20,%al
  488. 4a9: a2 88 80 d1 fe mov %al,0xfed18088 | 5a9: a2 88 80 d1 fe mov %al,0xfed18088
  489. while (DMIBAR16(DMILSTS) & TXTRN) while (DMIBAR16(DMILSTS) & TXTRN)
  490. 4ae: 66 a1 8a 80 d1 fe mov 0xfed1808a,%ax | 5ae: 66 a1 8a 80 d1 fe mov 0xfed1808a,%ax
  491. 4b4: f6 c4 08 test $0x8,%ah | 5b4: f6 c4 08 test $0x8,%ah
  492. 4b7: 75 f5 jne 4ae <early_init_dmi+0x | 5b7: 75 f5 jne 5ae <early_init_dmi+0x
  493. ; ;
  494.  
  495. const u8 w = (DMIBAR16(DMILSTS) >> 4) & 0x1f; const u8 w = (DMIBAR16(DMILSTS) >> 4) & 0x1f;
  496. 4b9: 66 a1 8a 80 d1 fe mov 0xfed1808a,%ax | 5b9: 66 a1 8a 80 d1 fe mov 0xfed1808a,%ax
  497. const u16 t = (DMIBAR16(DMILSTS) & 0xf) * 2500; const u16 t = (DMIBAR16(DMILSTS) & 0xf) * 2500;
  498. 4bf: 66 8b 15 8a 80 d1 fe mov 0xfed1808a,%dx | 5bf: 66 8b 15 8a 80 d1 fe mov 0xfed1808a,%dx
  499. const u8 w = (DMIBAR16(DMILSTS) >> 4) & 0x1f; const u8 w = (DMIBAR16(DMILSTS) >> 4) & 0x1f;
  500. 4c6: c1 e8 04 shr $0x4,%eax | 5c6: c1 e8 04 shr $0x4,%eax
  501. const u16 t = (DMIBAR16(DMILSTS) & 0xf) * 2500; const u16 t = (DMIBAR16(DMILSTS) & 0xf) * 2500;
  502. 4c9: 83 e2 0f and $0xf,%edx | 5c9: 83 e2 0f and $0xf,%edx
  503.  
  504. printk(BIOS_DEBUG, "DMI: Running at X%x @ %dMT/s\n", printk(BIOS_DEBUG, "DMI: Running at X%x @ %dMT/s\n",
  505. 4cc: 83 e0 1f and $0x1f,%eax | 5cc: 83 e0 1f and $0x1f,%eax
  506. 4cf: 69 d2 c4 09 00 00 imul $0x9c4,%edx,%edx | 5cf: 69 d2 c4 09 00 00 imul $0x9c4,%edx,%edx
  507. 4d5: 52 push %edx | 5d5: 52 push %edx
  508. 4d6: 50 push %eax | 5d6: 50 push %eax
  509. 4d7: 68 00 00 00 00 push $0x0 | 5d7: 68 00 00 00 00 push $0x0
  510. 4dc: 6a 07 push $0x7 | 5dc: 6a 07 push $0x7
  511. 4de: e8 fc ff ff ff call 4df <early_init_dmi+0x | 5de: e8 fc ff ff ff call 5df <early_init_dmi+0x
  512. * Pentium Processor Family, and Desktop Intel Celero * Pentium Processor Family, and Desktop Intel Celero
  513. * Vol. 2" * Vol. 2"
  514. */ */
  515.  
  516. /* Channel 0: Enable, Set ID to 0, map TC0 and TC3 an /* Channel 0: Enable, Set ID to 0, map TC0 and TC3 an
  517. DMIBAR32(DMIVC0RCTL) = (1 << 31) | (0 << 24) | (0x0c DMIBAR32(DMIVC0RCTL) = (1 << 31) | (0 << 24) | (0x0c
  518. 4e3: c7 05 14 80 d1 fe 19 movl $0x80000019,0xfed18014 | 5e3: c7 05 14 80 d1 fe 19 movl $0x80000019,0xfed18014
  519. 4ea: 00 00 80 | 5ea: 00 00 80
  520. /* Channel 1: Enable, Set ID to 1, map TC1 and TC5 to /* Channel 1: Enable, Set ID to 1, map TC1 and TC5 to
  521. DMIBAR32(DMIVC1RCTL) = (1 << 31) | (1 << 24) | (0x11 DMIBAR32(DMIVC1RCTL) = (1 << 31) | (1 << 24) | (0x11
  522. 4ed: c7 05 20 80 d1 fe 22 movl $0x81000022,0xfed18020 | 5ed: c7 05 20 80 d1 fe 22 movl $0x81000022,0xfed18020
  523. 4f4: 00 00 81 | 5f4: 00 00 81
  524. /* Channel p: Enable, Set ID to 2, map TC2 and TC6 to /* Channel p: Enable, Set ID to 2, map TC2 and TC6 to
  525. DMIBAR32(DMIVCPRCTL) = (1 << 31) | (2 << 24) | (0x22 DMIBAR32(DMIVCPRCTL) = (1 << 31) | (2 << 24) | (0x22
  526. 4f7: c7 05 2c 80 d1 fe 44 movl $0x82000044,0xfed1802c | 5f7: c7 05 2c 80 d1 fe 44 movl $0x82000044,0xfed1802c
  527. 4fe: 00 00 82 | 5fe: 00 00 82
  528. /* Channel m: Enable, Set ID to 0, map TC7 to VCm */ /* Channel m: Enable, Set ID to 0, map TC7 to VCm */
  529. DMIBAR32(DMIVCMRCTL) = (1 << 31) | (7 << 24) | (0x40 DMIBAR32(DMIVCMRCTL) = (1 << 31) | (7 << 24) | (0x40
  530. 501: c7 05 38 80 d1 fe 80 movl $0x87000080,0xfed18038 | 601: c7 05 38 80 d1 fe 80 movl $0x87000080,0xfed18038
  531. 508: 00 00 87 | 608: 00 00 87
  532.  
  533. /* Set Extended VC Count (EVCC) to 1 as Channel 1 is /* Set Extended VC Count (EVCC) to 1 as Channel 1 is
  534. DMIBAR8(DMIPVCCAP1) |= 1; DMIBAR8(DMIPVCCAP1) |= 1;
  535. 50b: a0 04 80 d1 fe mov 0xfed18004,%al | 60b: a0 04 80 d1 fe mov 0xfed18004,%al
  536. 510: 0c 01 or $0x1,%al | 610: 0c 01 or $0x1,%al
  537. 512: a2 04 80 d1 fe mov %al,0xfed18004 | 612: a2 04 80 d1 fe mov %al,0xfed18004
  538.  
  539. early_pch_init_native_dmi_post(); early_pch_init_native_dmi_post();
  540. 517: e8 fc ff ff ff call 518 <early_init_dmi+0x | 617: e8 fc ff ff ff call 618 <early_init_dmi+0x
  541.  
  542. /* /*
  543. * BIOS Requirement: Check if DMI VC Negotiation was * BIOS Requirement: Check if DMI VC Negotiation was
  544. * Wait for virtual channels negotiation pending. * Wait for virtual channels negotiation pending.
  545. */ */
  546. while (DMIBAR16(DMIVC0RSTS) & VC0NP) while (DMIBAR16(DMIVC0RSTS) & VC0NP)
  547. 51c: 83 c4 10 add $0x10,%esp | 61c: 83 c4 10 add $0x10,%esp
  548. 51f: 66 a1 1a 80 d1 fe mov 0xfed1801a,%ax | 61f: 66 a1 1a 80 d1 fe mov 0xfed1801a,%ax
  549. 525: a8 02 test $0x2,%al | 625: a8 02 test $0x2,%al
  550. 527: 75 f6 jne 51f <early_init_dmi+0x | 627: 75 f6 jne 61f <early_init_dmi+0x
  551. ; ;
  552. while (DMIBAR16(DMIVC1RSTS) & VC1NP) while (DMIBAR16(DMIVC1RSTS) & VC1NP)
  553. 529: 66 a1 26 80 d1 fe mov 0xfed18026,%ax | 629: 66 a1 26 80 d1 fe mov 0xfed18026,%ax
  554. 52f: a8 02 test $0x2,%al | 62f: a8 02 test $0x2,%al
  555. 531: 75 f6 jne 529 <early_init_dmi+0x | 631: 75 f6 jne 629 <early_init_dmi+0x
  556. ; ;
  557. while (DMIBAR16(DMIVCPRSTS) & VCPNP) while (DMIBAR16(DMIVCPRSTS) & VCPNP)
  558. 533: 66 a1 32 80 d1 fe mov 0xfed18032,%ax | 633: 66 a1 32 80 d1 fe mov 0xfed18032,%ax
  559. 539: a8 02 test $0x2,%al | 639: a8 02 test $0x2,%al
  560. 53b: 75 f6 jne 533 <early_init_dmi+0x | 63b: 75 f6 jne 633 <early_init_dmi+0x
  561. ; ;
  562. while (DMIBAR16(DMIVCMRSTS) & VCMNP) while (DMIBAR16(DMIVCMRSTS) & VCMNP)
  563. 53d: 66 a1 3e 80 d1 fe mov 0xfed1803e,%ax | 63d: 66 a1 3e 80 d1 fe mov 0xfed1803e,%ax
  564. 543: a8 02 test $0x2,%al | 643: a8 02 test $0x2,%al
  565. 545: 75 f6 jne 53d <early_init_dmi+0x | 645: 75 f6 jne 63d <early_init_dmi+0x
  566. ; ;
  567. } }
  568. 547: 83 c4 0c add $0xc,%esp | 647: 83 c4 1c add $0x1c,%esp
  569. 54a: c3 ret | 64a: c3 ret
Advertisement
Add Comment
Please, Sign In to add comment
Advertisement
Public Pastes
Advertisement
We use cookies for various purposes including analytics. By continuing to use Pastebin, you agree to our use of cookies as described in the Cookies Policy.  OK, I Understand
Not a member of Pastebin yet?
Sign Up, it unlocks many cool features!