DarkMorford

Sega CD Exodus Module

Jul 28th, 2015
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  1. <Module xmlns="http://www.exodusemulator.com/Schema/ExodusSchema.xsd" SystemClassName="SegaMegaCD" ModuleClassName="SegaMegaCD" ModuleInstanceName="MCD2" ModuleDisplayName="Mega-CD II" ManufacturerCode="SEGA" ManufacturerDisplayName="Sega" ProductionYear="1993">
  2.  
  3.     <!-- Define control devices -->
  4.     <Device DeviceName="M68000" InstanceName="Sub 68000" />
  5.     <!-- TODO: ASIC/Gate Array, PCM, CDC, CDD -->
  6.  
  7.     <!-- Define memory devices -->
  8.     <Device DeviceName="ROM16" InstanceName="BIOS ROM" MemoryEntryCount="0x10000" />
  9.  
  10.     <Device DeviceName="RAM16Variable" InstanceName="PRG-RAM" MemoryEntryCount="0x40000" />
  11.  
  12.     <Device DeviceName="RAM16Variable" InstanceName="Word RAM 0" MemoryEntryCount="0x10000" />
  13.     <Device DeviceName="RAM16Variable" InstanceName="Word RAM 1" MemoryEntryCount="0x10000" />
  14.  
  15.     <Device DeviceName="RAM8" InstanceName="Backup RAM" MemoryEntryCount="0x2000" />
  16.  
  17.     <!--
  18.     <Device DeviceName="RAM8" InstanceName="PCM RAM" MemoryEntryCount="0x10000" />
  19.     <Device DeviceName="RAM8" InstanceName="CDC RAM" MemoryEntryCount="0x4000" />
  20.     -->
  21.  
  22.     <!-- "Dummy" devices just for temporary use -->
  23.     <Device DeviceName="RAM8" InstanceName="Gate Array" MemoryEntryCount="0x200" />
  24.     <Device DeviceName="RAM8" InstanceName="PCM Access" MemoryEntryCount="0x2000" />
  25.  
  26.     <!-- Define clocks -->
  27.     <ClockSource Name="CLK50M" ClockType="Direct" InitialValue="50000000" /> <!-- 50 MHz master clock -->
  28.     <ClockSource Name="CLK12M" ClockType="Direct" InitialValue="12500000" /> <!-- 12.5 MHz clock for 68k -->
  29.     <!-- TODO: Change CLK12M to a Divider -->
  30.  
  31.     <!-- Define busses -->
  32.     <BusInterface Name="SubCpuBus" AddressBusWidth="20" DataBusWidth="16" />
  33.     <BusInterface Name="MainCpuBus" AddressBusWidth="18" DataBusWidth="16" />
  34.  
  35.     <!-- Define bus control lines -->
  36.     <BusInterface.DefineCELineMemory BusInterfaceName="SubCpuBus" LineName="LDS" BitCount="1" />
  37.     <BusInterface.DefineCELineMemory BusInterfaceName="SubCpuBus" LineName="UDS" BitCount="1" />
  38.     <BusInterface.DefineCELineMemory BusInterfaceName="SubCpuBus" LineName="R/W" BitCount="1" />
  39.     <BusInterface.DefineCELineMemory BusInterfaceName="SubCpuBus" LineName="AS"  BitCount="1" />
  40.     <BusInterface.DefineCELineMemory BusInterfaceName="SubCpuBus" LineName="FC"  BitCount="3" />
  41.  
  42.     <!-- Define external connectors -->
  43.     <System.ExportConnector BusInterfaceName="MainCpuBus" ConnectorClassName="ExpansionPort" ConnectorInstanceName="Expansion Port" />
  44.  
  45.     <!-- Attach clocks to devices -->
  46.     <BusInterface.MapClockSource BusInterfaceName="SubCpuBus" ClockSourceName="CLK12M" DeviceInstanceName="Sub 68000" TargetClockLine="CLK" />
  47.  
  48.     <!-- Attach busses to devices -->
  49.     <Device.ReferenceBus DeviceInstanceName="Sub 68000" BusInterfaceName="SubCpuBus" ReferenceName="BusInterface" />
  50.     <BusInterface.MapCELineOutputMemory BusInterfaceName="SubCpuBus" DeviceInstanceName="Sub 68000" BusLineName="UDS" DeviceLineName="UDS" />
  51.     <BusInterface.MapCELineOutputMemory BusInterfaceName="SubCpuBus" DeviceInstanceName="Sub 68000" BusLineName="LDS" DeviceLineName="LDS" />
  52.     <BusInterface.MapCELineOutputMemory BusInterfaceName="SubCpuBus" DeviceInstanceName="Sub 68000" BusLineName="R/W" DeviceLineName="R/W" />
  53.     <BusInterface.MapCELineOutputMemory BusInterfaceName="SubCpuBus" DeviceInstanceName="Sub 68000" BusLineName="AS"  DeviceLineName="AS" />
  54.     <BusInterface.MapCELineOutputMemory BusInterfaceName="SubCpuBus" DeviceInstanceName="Sub 68000" BusLineName="FC"  DeviceLineName="FC" />
  55.  
  56.     <!-- Connect memory to busses -->
  57.     <BusInterface.MapDevice BusInterfaceName="SubCpuBus" DeviceInstanceName="PRG-RAM" InterfaceNumber="2" MemoryMapBase="0x0" MemoryMapSize="0x80000" AddressDiscardLowerBitCount="1" />
  58.  
  59.  
  60.     <BusInterface.MapDevice BusInterfaceName="SubCpuBus" DeviceInstanceName="Gate Array" MemoryMapBase="0xFF8000" MemoryMapSize="0x200" />
  61.  
  62.     <!--
  63.     <BusInterface.MapDevice BusInterfaceName="SubCpuBus" DeviceInstanceName="Backup RAM" MemoryMapBase="0xFE0000" MemoryMapSize="0x2000" />
  64.     <BusInterface.MapDevice BusInterfaceName="SubCpuBus" DeviceInstanceName="Word RAM 0" InterfaceNumber="2" MemoryMapBase="0x80000" MemoryMapSize="0x20000" />
  65.     <BusInterface.MapDevice BusInterfaceName="SubCpuBus" DeviceInstanceName="Word RAM 1" InterfaceNumber="2" MemoryMapBase="0xA0000" MemoryMapSize="0x20000" />
  66.  
  67.     <BusInterface.MapDevice BusInterfaceName="SubCpuBus" DeviceInstanceName="PCM Access" MemoryMapBase="0xFF0000" MemoryMapSize="0x2000" />
  68.     -->
  69.  
  70. </Module>
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