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  1. /dts-v1/;
  2.  
  3. / {
  4. #address-cells = <0x1>;
  5. #size-cells = <0x1>;
  6. interrupt-parent = <0x1>;
  7. model = "Clockwork CPI3";
  8. compatible = "clockwork,clockworkpi-cpi3", "allwinner,sun8i-a33";
  9.  
  10. chosen {
  11. #address-cells = <0x1>;
  12. #size-cells = <0x1>;
  13. ranges;
  14. stdout-path = "serial0:115200n8";
  15.  
  16. framebuffer@0 {
  17. compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
  18. allwinner,pipeline = "de_be0-lcd0";
  19. clocks = <0x2 0x26 0x2 0x28 0x2 0x57 0x2 0x55 0x2 0x54 0x2 0x62>;
  20. status = "disabled";
  21. };
  22. };
  23.  
  24. aliases {
  25. serial0 = "/soc@01c00000/serial@01c28000";
  26. };
  27.  
  28. memory {
  29. device_type = "memory";
  30. reg = <0x40000000 0x80000000>;
  31. };
  32.  
  33. timer {
  34. compatible = "arm,armv7-timer";
  35. interrupts = <0x1 0xd 0xf08 0x1 0xe 0xf08 0x1 0xb 0xf08 0x1 0xa 0xf08>;
  36. clock-frequency = <0x16e3600>;
  37. arm,cpu-registers-not-fw-configured;
  38. };
  39.  
  40. cpus {
  41. enable-method = "allwinner,sun8i-a23";
  42. #address-cells = <0x1>;
  43. #size-cells = <0x0>;
  44.  
  45. cpu@0 {
  46. compatible = "arm,cortex-a7";
  47. device_type = "cpu";
  48. reg = <0x0>;
  49. clocks = <0x2 0x12>;
  50. clock-names = "cpu";
  51. operating-points-v2 = <0x3>;
  52. #cooling-cells = <0x2>;
  53. linux,phandle = <0x30>;
  54. phandle = <0x30>;
  55. };
  56.  
  57. cpu@1 {
  58. compatible = "arm,cortex-a7";
  59. device_type = "cpu";
  60. reg = <0x1>;
  61. operating-points-v2 = <0x3>;
  62. };
  63.  
  64. cpu@2 {
  65. compatible = "arm,cortex-a7";
  66. device_type = "cpu";
  67. reg = <0x2>;
  68. operating-points-v2 = <0x3>;
  69. };
  70.  
  71. cpu@3 {
  72. compatible = "arm,cortex-a7";
  73. device_type = "cpu";
  74. reg = <0x3>;
  75. operating-points-v2 = <0x3>;
  76. };
  77. };
  78.  
  79. clocks {
  80. #address-cells = <0x1>;
  81. #size-cells = <0x1>;
  82. ranges;
  83.  
  84. osc24M_clk {
  85. #clock-cells = <0x0>;
  86. compatible = "fixed-clock";
  87. clock-frequency = <0x16e3600>;
  88. clock-accuracy = <0xc350>;
  89. clock-output-names = "osc24M";
  90. linux,phandle = <0x12>;
  91. phandle = <0x12>;
  92. };
  93.  
  94. ext_osc32k_clk {
  95. #clock-cells = <0x0>;
  96. compatible = "fixed-clock";
  97. clock-frequency = <0x8000>;
  98. clock-accuracy = <0xc350>;
  99. clock-output-names = "ext-osc32k";
  100. linux,phandle = <0x19>;
  101. phandle = <0x19>;
  102. };
  103. };
  104.  
  105. soc@01c00000 {
  106. compatible = "simple-bus";
  107. #address-cells = <0x1>;
  108. #size-cells = <0x1>;
  109. ranges;
  110.  
  111. dma-controller@01c02000 {
  112. compatible = "allwinner,sun8i-a23-dma";
  113. reg = <0x1c02000 0x1000>;
  114. interrupts = <0x0 0x32 0x4>;
  115. clocks = <0x2 0x19>;
  116. resets = <0x2 0x6>;
  117. #dma-cells = <0x1>;
  118. linux,phandle = <0x15>;
  119. phandle = <0x15>;
  120. };
  121.  
  122. mmc@01c0f000 {
  123. compatible = "allwinner,sun7i-a20-mmc";
  124. reg = <0x1c0f000 0x1000>;
  125. clocks = <0x2 0x1a 0x2 0x3c 0x2 0x3e 0x2 0x3d>;
  126. clock-names = "ahb", "mmc", "output", "sample";
  127. resets = <0x2 0x7>;
  128. reset-names = "ahb";
  129. interrupts = <0x0 0x3c 0x4>;
  130. status = "okay";
  131. #address-cells = <0x1>;
  132. #size-cells = <0x0>;
  133. pinctrl-names = "default";
  134. pinctrl-0 = <0x4 0x5>;
  135. vmmc-supply = <0x6>;
  136. cd-gpios = <0x7 0x1 0x3 0x1>;
  137. bus-width = <0x4>;
  138. };
  139.  
  140. mmc@01c10000 {
  141. compatible = "allwinner,sun7i-a20-mmc";
  142. reg = <0x1c10000 0x1000>;
  143. clocks = <0x2 0x1b 0x2 0x3f 0x2 0x41 0x2 0x40>;
  144. clock-names = "ahb", "mmc", "output", "sample";
  145. resets = <0x2 0x8>;
  146. reset-names = "ahb";
  147. interrupts = <0x0 0x3d 0x4>;
  148. status = "okay";
  149. #address-cells = <0x1>;
  150. #size-cells = <0x0>;
  151. pinctrl-names = "default";
  152. pinctrl-0 = <0x8 0x9>;
  153. vmmc-supply = <0xa>;
  154. mmc-pwrseq = <0xb>;
  155. bus-width = <0x4>;
  156. non-removable;
  157. keep-power-in-suspend;
  158. };
  159.  
  160. mmc@01c11000 {
  161. compatible = "allwinner,sun7i-a20-mmc";
  162. reg = <0x1c11000 0x1000>;
  163. clocks = <0x2 0x1c 0x2 0x42 0x2 0x44 0x2 0x43>;
  164. clock-names = "ahb", "mmc", "output", "sample";
  165. resets = <0x2 0x9>;
  166. reset-names = "ahb";
  167. interrupts = <0x0 0x3e 0x4>;
  168. status = "disabled";
  169. #address-cells = <0x1>;
  170. #size-cells = <0x0>;
  171. };
  172.  
  173. nand@01c03000 {
  174. compatible = "allwinner,sun4i-a10-nand";
  175. reg = <0x1c03000 0x1000>;
  176. interrupts = <0x0 0x46 0x4>;
  177. clocks = <0x2 0x1d 0x2 0x3b>;
  178. clock-names = "ahb", "mod";
  179. resets = <0x2 0xa>;
  180. reset-names = "ahb";
  181. status = "disabled";
  182. #address-cells = <0x1>;
  183. #size-cells = <0x0>;
  184. };
  185.  
  186. usb@01c19000 {
  187. reg = <0x1c19000 0x400>;
  188. clocks = <0x2 0x22>;
  189. resets = <0x2 0xf>;
  190. interrupts = <0x0 0x47 0x4>;
  191. interrupt-names = "mc";
  192. phys = <0xc 0x0>;
  193. phy-names = "usb";
  194. extcon = <0xc 0x0>;
  195. status = "okay";
  196. compatible = "allwinner,sun8i-a33-musb";
  197. dr_mode = "otg";
  198. };
  199.  
  200. phy@01c19400 {
  201. clocks = <0x2 0x4a 0x2 0x4b>;
  202. clock-names = "usb0_phy", "usb1_phy";
  203. resets = <0x2 0x0 0x2 0x1>;
  204. reset-names = "usb0_reset", "usb1_reset";
  205. status = "okay";
  206. #phy-cells = <0x1>;
  207. compatible = "allwinner,sun8i-a33-usb-phy";
  208. reg = <0x1c19400 0x14 0x1c1a800 0x4>;
  209. reg-names = "phy_ctrl", "pmu1";
  210. pinctrl-names = "default";
  211. pinctrl-0 = <0xd>;
  212. usb0_vbus-supply = <0xe>;
  213. usb0_id_det-gpios = <0xf 0x0 0x4 0x0>;
  214. usb0_vbus_power-supply = <0x10>;
  215. usb1_vbus-supply = <0x11>;
  216. linux,phandle = <0xc>;
  217. phandle = <0xc>;
  218. };
  219.  
  220. usb@01c1a000 {
  221. compatible = "allwinner,sun8i-a23-ehci", "generic-ehci";
  222. reg = <0x1c1a000 0x100>;
  223. interrupts = <0x0 0x48 0x4>;
  224. clocks = <0x2 0x23>;
  225. resets = <0x2 0x10>;
  226. phys = <0xc 0x1>;
  227. phy-names = "usb";
  228. status = "okay";
  229. };
  230.  
  231. usb@01c1a400 {
  232. compatible = "allwinner,sun8i-a23-ohci", "generic-ohci";
  233. reg = <0x1c1a400 0x100>;
  234. interrupts = <0x0 0x49 0x4>;
  235. clocks = <0x2 0x24 0x2 0x4e>;
  236. resets = <0x2 0x11>;
  237. phys = <0xc 0x1>;
  238. phy-names = "usb";
  239. status = "okay";
  240. };
  241.  
  242. clock@01c20000 {
  243. reg = <0x1c20000 0x400>;
  244. clocks = <0x12 0x13 0x0>;
  245. clock-names = "hosc", "losc";
  246. #clock-cells = <0x1>;
  247. #reset-cells = <0x1>;
  248. compatible = "allwinner,sun8i-a33-ccu";
  249. linux,phandle = <0x2>;
  250. phandle = <0x2>;
  251. };
  252.  
  253. pinctrl@01c20800 {
  254. reg = <0x1c20800 0x400>;
  255. clocks = <0x2 0x30 0x12 0x13 0x0>;
  256. clock-names = "apb", "hosc", "losc";
  257. gpio-controller;
  258. interrupt-controller;
  259. #interrupt-cells = <0x3>;
  260. #gpio-cells = <0x3>;
  261. compatible = "allwinner,sun8i-a33-pinctrl";
  262. interrupts = <0x0 0xf 0x4 0x0 0x11 0x4>;
  263. linux,phandle = <0x7>;
  264. phandle = <0x7>;
  265.  
  266. uart0@0 {
  267. pins = "PF2", "PF4";
  268. function = "uart0";
  269. };
  270.  
  271. uart1@0 {
  272. pins = "PG6", "PG7";
  273. function = "uart1";
  274. };
  275.  
  276. uart1-cts-rts@0 {
  277. pins = "PG8", "PG9";
  278. function = "uart1";
  279. };
  280.  
  281. mmc0@0 {
  282. pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5";
  283. function = "mmc0";
  284. drive-strength = <0x1e>;
  285. bias-pull-up;
  286. linux,phandle = <0x4>;
  287. phandle = <0x4>;
  288. };
  289.  
  290. mmc1@0 {
  291. pins = "PG0", "PG1", "PG2", "PG3", "PG4", "PG5";
  292. function = "mmc1";
  293. drive-strength = <0x1e>;
  294. bias-pull-up;
  295. linux,phandle = <0x8>;
  296. phandle = <0x8>;
  297. };
  298.  
  299. mmc2_8bit {
  300. pins = "PC5", "PC6", "PC8", "PC9", "PC10", "PC11", "PC12", "PC13", "PC14", "PC15", "PC16";
  301. function = "mmc2";
  302. drive-strength = <0x1e>;
  303. bias-pull-up;
  304. };
  305.  
  306. pwm0 {
  307. pins = "PH0";
  308. function = "pwm0";
  309. };
  310.  
  311. i2c0@0 {
  312. pins = "PH2", "PH3";
  313. function = "i2c0";
  314. };
  315.  
  316. i2c1@0 {
  317. pins = "PH4", "PH5";
  318. function = "i2c1";
  319. linux,phandle = <0x17>;
  320. phandle = <0x17>;
  321. };
  322.  
  323. i2c2@0 {
  324. pins = "PE12", "PE13";
  325. function = "i2c2";
  326. };
  327.  
  328. lcd-rgb666@0 {
  329. pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7", "PD10", "PD11", "PD12", "PD13", "PD14", "PD15", "PD18", "PD19", "PD20", "PD21", "PD22", "PD23", "PD24", "PD25", "PD26", "PD27";
  330. function = "lcd0";
  331. };
  332.  
  333. uart0@1 {
  334. pins = "PB0", "PB1";
  335. function = "uart0";
  336. linux,phandle = <0x16>;
  337. phandle = <0x16>;
  338. };
  339.  
  340. mmc0_cd_pin@0 {
  341. pins = "PB3";
  342. function = "gpio_in";
  343. bias-pull-up;
  344. linux,phandle = <0x5>;
  345. phandle = <0x5>;
  346. };
  347.  
  348. led_pins@0 {
  349. pins = "PB7";
  350. function = "gpio_out";
  351. linux,phandle = <0x36>;
  352. phandle = <0x36>;
  353. };
  354.  
  355. backlight_control_pin@0 {
  356. pins = "PH1";
  357. function = "gpio_out";
  358. linux,phandle = <0x37>;
  359. phandle = <0x37>;
  360. };
  361. };
  362.  
  363. timer@01c20c00 {
  364. compatible = "allwinner,sun4i-a10-timer";
  365. reg = <0x1c20c00 0xa0>;
  366. interrupts = <0x0 0x12 0x4 0x0 0x13 0x4>;
  367. clocks = <0x12>;
  368. };
  369.  
  370. watchdog@01c20ca0 {
  371. compatible = "allwinner,sun6i-a31-wdt";
  372. reg = <0x1c20ca0 0x20>;
  373. interrupts = <0x0 0x19 0x4>;
  374. };
  375.  
  376. pwm@01c21400 {
  377. compatible = "allwinner,sun7i-a20-pwm";
  378. reg = <0x1c21400 0xc>;
  379. clocks = <0x12>;
  380. #pwm-cells = <0x3>;
  381. status = "disabled";
  382. };
  383.  
  384. lradc@01c22800 {
  385. compatible = "allwinner,sun4i-a10-lradc-keys";
  386. reg = <0x1c22800 0x100>;
  387. interrupts = <0x0 0x1e 0x4>;
  388. status = "okay";
  389. vref-supply = <0x14>;
  390.  
  391. button@0 {
  392. label = "V+";
  393. linux,code = <0x73>;
  394. channel = <0x0>;
  395. voltage = <0x2e630>;
  396. };
  397.  
  398. button@1 {
  399. label = "V-";
  400. linux,code = <0x72>;
  401. channel = <0x0>;
  402. voltage = <0x5f370>;
  403. };
  404. };
  405.  
  406. serial@01c28000 {
  407. compatible = "snps,dw-apb-uart";
  408. reg = <0x1c28000 0x400>;
  409. interrupts = <0x0 0x0 0x4>;
  410. reg-shift = <0x2>;
  411. reg-io-width = <0x4>;
  412. clocks = <0x2 0x36>;
  413. resets = <0x2 0x23>;
  414. dmas = <0x15 0x6 0x15 0x6>;
  415. dma-names = "rx", "tx";
  416. status = "okay";
  417. pinctrl-names = "default";
  418. pinctrl-0 = <0x16>;
  419. };
  420.  
  421. serial@01c28400 {
  422. compatible = "snps,dw-apb-uart";
  423. reg = <0x1c28400 0x400>;
  424. interrupts = <0x0 0x1 0x4>;
  425. reg-shift = <0x2>;
  426. reg-io-width = <0x4>;
  427. clocks = <0x2 0x37>;
  428. resets = <0x2 0x24>;
  429. dmas = <0x15 0x7 0x15 0x7>;
  430. dma-names = "rx", "tx";
  431. status = "disabled";
  432. };
  433.  
  434. serial@01c28800 {
  435. compatible = "snps,dw-apb-uart";
  436. reg = <0x1c28800 0x400>;
  437. interrupts = <0x0 0x2 0x4>;
  438. reg-shift = <0x2>;
  439. reg-io-width = <0x4>;
  440. clocks = <0x2 0x38>;
  441. resets = <0x2 0x25>;
  442. dmas = <0x15 0x8 0x15 0x8>;
  443. dma-names = "rx", "tx";
  444. status = "disabled";
  445. };
  446.  
  447. serial@01c28c00 {
  448. compatible = "snps,dw-apb-uart";
  449. reg = <0x1c28c00 0x400>;
  450. interrupts = <0x0 0x3 0x4>;
  451. reg-shift = <0x2>;
  452. reg-io-width = <0x4>;
  453. clocks = <0x2 0x39>;
  454. resets = <0x2 0x26>;
  455. dmas = <0x15 0x9 0x15 0x9>;
  456. dma-names = "rx", "tx";
  457. status = "disabled";
  458. };
  459.  
  460. serial@01c29000 {
  461. compatible = "snps,dw-apb-uart";
  462. reg = <0x1c29000 0x400>;
  463. interrupts = <0x0 0x4 0x4>;
  464. reg-shift = <0x2>;
  465. reg-io-width = <0x4>;
  466. clocks = <0x2 0x3a>;
  467. resets = <0x2 0x27>;
  468. dmas = <0x15 0xa 0x15 0xa>;
  469. dma-names = "rx", "tx";
  470. status = "disabled";
  471. };
  472.  
  473. i2c@01c2ac00 {
  474. compatible = "allwinner,sun6i-a31-i2c";
  475. reg = <0x1c2ac00 0x400>;
  476. interrupts = <0x0 0x6 0x4>;
  477. clocks = <0x2 0x33>;
  478. resets = <0x2 0x20>;
  479. status = "disabled";
  480. #address-cells = <0x1>;
  481. #size-cells = <0x0>;
  482. };
  483.  
  484. i2c@01c2b000 {
  485. compatible = "allwinner,sun6i-a31-i2c";
  486. reg = <0x1c2b000 0x400>;
  487. interrupts = <0x0 0x7 0x4>;
  488. clocks = <0x2 0x34>;
  489. resets = <0x2 0x21>;
  490. status = "okay";
  491. #address-cells = <0x1>;
  492. #size-cells = <0x0>;
  493. pinctrl-names = "default";
  494. pinctrl-0 = <0x17>;
  495. };
  496.  
  497. i2c@01c2b400 {
  498. compatible = "allwinner,sun6i-a31-i2c";
  499. reg = <0x1c2b400 0x400>;
  500. interrupts = <0x0 0x8 0x4>;
  501. clocks = <0x2 0x35>;
  502. resets = <0x2 0x22>;
  503. status = "disabled";
  504. #address-cells = <0x1>;
  505. #size-cells = <0x0>;
  506. };
  507.  
  508. gpu@1c40000 {
  509. compatible = "allwinner,sun8i-a23-mali", "allwinner,sun7i-a20-mali", "arm,mali-400";
  510. reg = <0x1c40000 0x10000>;
  511. interrupts = <0x0 0x61 0x4 0x0 0x62 0x4 0x0 0x63 0x4 0x0 0x64 0x4 0x0 0x66 0x4 0x0 0x67 0x4 0x0 0x65 0x4>;
  512. interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1", "ppmmu1", "pmu";
  513. clocks = <0x2 0x2a 0x2 0x63>;
  514. clock-names = "bus", "core";
  515. resets = <0x2 0x17>;
  516. #cooling-cells = <0x2>;
  517. assigned-clocks = <0x2 0x63>;
  518. assigned-clock-rates = <0x16e36000>;
  519. operating-points-v2 = <0x18>;
  520. linux,phandle = <0x33>;
  521. phandle = <0x33>;
  522. };
  523.  
  524. interrupt-controller@01c81000 {
  525. compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
  526. reg = <0x1c81000 0x1000 0x1c82000 0x2000 0x1c84000 0x2000 0x1c86000 0x2000>;
  527. interrupt-controller;
  528. #interrupt-cells = <0x3>;
  529. interrupts = <0x1 0x9 0xf04>;
  530. linux,phandle = <0x1>;
  531. phandle = <0x1>;
  532. };
  533.  
  534. rtc@01f00000 {
  535. compatible = "allwinner,sun6i-a31-rtc";
  536. reg = <0x1f00000 0x54>;
  537. interrupts = <0x0 0x28 0x4 0x0 0x29 0x4>;
  538. clock-output-names = "osc32k";
  539. clocks = <0x19>;
  540. #clock-cells = <0x1>;
  541. linux,phandle = <0x13>;
  542. phandle = <0x13>;
  543. };
  544.  
  545. interrupt-controller@1f00c00 {
  546. compatible = "allwinner,sun6i-a31-r-intc";
  547. interrupt-controller;
  548. #interrupt-cells = <0x2>;
  549. reg = <0x1f00c00 0x400>;
  550. interrupts = <0x0 0x20 0x4>;
  551. linux,phandle = <0x21>;
  552. phandle = <0x21>;
  553. };
  554.  
  555. prcm@01f01400 {
  556. compatible = "allwinner,sun8i-a23-prcm";
  557. reg = <0x1f01400 0x200>;
  558.  
  559. ar100_clk {
  560. compatible = "fixed-factor-clock";
  561. #clock-cells = <0x0>;
  562. clock-div = <0x1>;
  563. clock-mult = <0x1>;
  564. clocks = <0x12>;
  565. clock-output-names = "ar100";
  566. linux,phandle = <0x1a>;
  567. phandle = <0x1a>;
  568. };
  569.  
  570. ahb0_clk {
  571. compatible = "fixed-factor-clock";
  572. #clock-cells = <0x0>;
  573. clock-div = <0x1>;
  574. clock-mult = <0x1>;
  575. clocks = <0x1a>;
  576. clock-output-names = "ahb0";
  577. linux,phandle = <0x1b>;
  578. phandle = <0x1b>;
  579. };
  580.  
  581. apb0_clk {
  582. compatible = "allwinner,sun8i-a23-apb0-clk";
  583. #clock-cells = <0x0>;
  584. clocks = <0x1b>;
  585. clock-output-names = "apb0";
  586. linux,phandle = <0x1c>;
  587. phandle = <0x1c>;
  588. };
  589.  
  590. apb0_gates_clk {
  591. compatible = "allwinner,sun8i-a23-apb0-gates-clk";
  592. #clock-cells = <0x1>;
  593. clocks = <0x1c>;
  594. clock-output-names = "apb0_pio", "apb0_timer", "apb0_rsb", "apb0_uart", "apb0_i2c";
  595. linux,phandle = <0x1e>;
  596. phandle = <0x1e>;
  597. };
  598.  
  599. apb0_rst {
  600. compatible = "allwinner,sun6i-a31-clock-reset";
  601. #reset-cells = <0x1>;
  602. linux,phandle = <0x1f>;
  603. phandle = <0x1f>;
  604. };
  605.  
  606. codec-analog {
  607. compatible = "allwinner,sun8i-a23-codec-analog";
  608. pinctrl-names = "default";
  609. pinctrl-0 = <0x1d>;
  610. speaker-amplifier-gpios = <0xf 0x0 0x3 0x0>;
  611. interrupts = <0x0 0x2e 0x4>;
  612. linux,phandle = <0x2c>;
  613. phandle = <0x2c>;
  614. };
  615. };
  616.  
  617. cpucfg@01f01c00 {
  618. compatible = "allwinner,sun8i-a23-cpuconfig";
  619. reg = <0x1f01c00 0x300>;
  620. };
  621.  
  622. serial@01f02800 {
  623. compatible = "snps,dw-apb-uart";
  624. reg = <0x1f02800 0x400>;
  625. interrupts = <0x0 0x26 0x4>;
  626. reg-shift = <0x2>;
  627. reg-io-width = <0x4>;
  628. clocks = <0x1e 0x4>;
  629. resets = <0x1f 0x4>;
  630. status = "disabled";
  631. };
  632.  
  633. pinctrl@01f02c00 {
  634. compatible = "allwinner,sun8i-a23-r-pinctrl";
  635. reg = <0x1f02c00 0x400>;
  636. interrupts = <0x0 0x2d 0x4>;
  637. clocks = <0x1e 0x0 0x12 0x13 0x0>;
  638. clock-names = "apb", "hosc", "losc";
  639. resets = <0x1f 0x0>;
  640. gpio-controller;
  641. interrupt-controller;
  642. #interrupt-cells = <0x3>;
  643. #address-cells = <0x1>;
  644. #size-cells = <0x0>;
  645. #gpio-cells = <0x3>;
  646. linux,phandle = <0xf>;
  647. phandle = <0xf>;
  648.  
  649. r_rsb {
  650. pins = "PL0", "PL1";
  651. function = "s_rsb";
  652. drive-strength = <0x14>;
  653. bias-pull-up;
  654. linux,phandle = <0x20>;
  655. phandle = <0x20>;
  656. };
  657.  
  658. r_uart@0 {
  659. pins = "PL2", "PL3";
  660. function = "s_uart";
  661. };
  662.  
  663. usb1_vbus_pin@0 {
  664. pins = "PL2";
  665. function = "gpio_out";
  666. linux,phandle = <0x35>;
  667. phandle = <0x35>;
  668. };
  669.  
  670. speaker_amplifier_pin@0 {
  671. pins = "PL3";
  672. function = "gpio_out";
  673. linux,phandle = <0x1d>;
  674. phandle = <0x1d>;
  675. };
  676.  
  677. usb0_id_detect_pin@0 {
  678. pins = "PL4";
  679. function = "gpio_in";
  680. bias-pull-up;
  681. linux,phandle = <0xd>;
  682. phandle = <0xd>;
  683. };
  684.  
  685. wifi_reset_pin@0 {
  686. pins = "PL6";
  687. function = "gpio_out";
  688. linux,phandle = <0x9>;
  689. phandle = <0x9>;
  690. };
  691.  
  692. headset_det@0 {
  693. pins = "PL11";
  694. function = "gpio_in";
  695. };
  696. };
  697.  
  698. rsb@01f03400 {
  699. compatible = "allwinner,sun8i-a23-rsb";
  700. reg = <0x1f03400 0x400>;
  701. interrupts = <0x0 0x27 0x4>;
  702. clocks = <0x1e 0x3>;
  703. clock-frequency = <0x2dc6c0>;
  704. resets = <0x1f 0x3>;
  705. pinctrl-names = "default";
  706. pinctrl-0 = <0x20>;
  707. status = "okay";
  708. #address-cells = <0x1>;
  709. #size-cells = <0x0>;
  710.  
  711. pmic@3a3 {
  712. compatible = "x-powers,axp223";
  713. reg = <0x3a3>;
  714. interrupt-parent = <0x21>;
  715. interrupts = <0x0 0x8>;
  716. drivevbus-supply = <0x22>;
  717. x-powers,drive-vbus-en;
  718. interrupt-controller;
  719. #interrupt-cells = <0x1>;
  720.  
  721. ac-power-supply {
  722. compatible = "x-powers,axp221-ac-power-supply";
  723. status = "disabled";
  724. };
  725.  
  726. battery-power-supply {
  727. compatible = "x-powers,axp221-battery-power-supply";
  728. status = "okay";
  729. };
  730.  
  731. regulators {
  732. x-powers,dcdc-freq = <0xbb8>;
  733.  
  734. dcdc1 {
  735. regulator-name = "vcc-3v0";
  736. regulator-always-on;
  737. regulator-min-microvolt = <0x2dc6c0>;
  738. regulator-max-microvolt = <0x2dc6c0>;
  739. linux,phandle = <0x6>;
  740. phandle = <0x6>;
  741. };
  742.  
  743. dcdc2 {
  744. regulator-name = "vdd-sys";
  745. regulator-always-on;
  746. regulator-min-microvolt = <0x10c8e0>;
  747. regulator-max-microvolt = <0x10c8e0>;
  748. };
  749.  
  750. dcdc3 {
  751. regulator-name = "vdd-cpu";
  752. regulator-always-on;
  753. regulator-min-microvolt = <0x124f80>;
  754. regulator-max-microvolt = <0x124f80>;
  755. };
  756.  
  757. dcdc4 {
  758. regulator-name = "dcdc4";
  759. };
  760.  
  761. dcdc5 {
  762. regulator-name = "vcc-dram";
  763. regulator-always-on;
  764. regulator-min-microvolt = <0x16e360>;
  765. regulator-max-microvolt = <0x16e360>;
  766. };
  767.  
  768. dc1sw {
  769. regulator-name = "dc1sw";
  770. };
  771.  
  772. dc5ldo {
  773. regulator-name = "vdd-cpus";
  774. regulator-always-on;
  775. regulator-min-microvolt = <0x10c8e0>;
  776. regulator-max-microvolt = <0x10c8e0>;
  777. };
  778.  
  779. aldo1 {
  780. regulator-name = "vcc-io";
  781. regulator-always-on;
  782. regulator-min-microvolt = <0x2dc6c0>;
  783. regulator-max-microvolt = <0x2dc6c0>;
  784. linux,phandle = <0xa>;
  785. phandle = <0xa>;
  786. };
  787.  
  788. aldo2 {
  789. regulator-name = "vdd-dll";
  790. regulator-always-on;
  791. regulator-min-microvolt = <0x2625a0>;
  792. regulator-max-microvolt = <0x2625a0>;
  793. };
  794.  
  795. aldo3 {
  796. regulator-name = "vcc-pll-avcc";
  797. regulator-always-on;
  798. regulator-min-microvolt = <0x2dc6c0>;
  799. regulator-max-microvolt = <0x2dc6c0>;
  800. linux,phandle = <0x14>;
  801. phandle = <0x14>;
  802. };
  803.  
  804. dldo1 {
  805. regulator-name = "vcc-wifi0";
  806. regulator-always-on;
  807. regulator-min-microvolt = <0x325aa0>;
  808. regulator-max-microvolt = <0x325aa0>;
  809. };
  810.  
  811. dldo2 {
  812. regulator-name = "vcc-wifi1";
  813. regulator-always-on;
  814. regulator-min-microvolt = <0x325aa0>;
  815. regulator-max-microvolt = <0x325aa0>;
  816. };
  817.  
  818. dldo3 {
  819. regulator-name = "vcc-3v0-csi";
  820. regulator-min-microvolt = <0x2dc6c0>;
  821. regulator-max-microvolt = <0x2dc6c0>;
  822. };
  823.  
  824. dldo4 {
  825. regulator-name = "dldo4";
  826. };
  827.  
  828. eldo1 {
  829. regulator-name = "vcc-1v2-hsic";
  830. regulator-min-microvolt = <0x124f80>;
  831. regulator-max-microvolt = <0x124f80>;
  832. };
  833.  
  834. eldo2 {
  835. regulator-name = "vcc-dsp";
  836. regulator-min-microvolt = <0x2dc6c0>;
  837. regulator-max-microvolt = <0x2dc6c0>;
  838. };
  839.  
  840. eldo3 {
  841. regulator-name = "eldo3";
  842. regulator-min-microvolt = <0x2dc6c0>;
  843. regulator-max-microvolt = <0x2dc6c0>;
  844. };
  845.  
  846. ldo_io0 {
  847. regulator-name = "ldo_io0";
  848. status = "disabled";
  849. };
  850.  
  851. ldo_io1 {
  852. regulator-name = "ldo_io1";
  853. status = "disabled";
  854. };
  855.  
  856. rtc_ldo {
  857. regulator-always-on;
  858. regulator-min-microvolt = <0x2dc6c0>;
  859. regulator-max-microvolt = <0x2dc6c0>;
  860. regulator-name = "rtc_ldo";
  861. };
  862.  
  863. drivevbus {
  864. regulator-name = "usb0-vbus";
  865. status = "okay";
  866. linux,phandle = <0xe>;
  867. phandle = <0xe>;
  868. };
  869. };
  870.  
  871. usb_power_supply {
  872. compatible = "x-powers,axp223-usb-power-supply";
  873. status = "okay";
  874. linux,phandle = <0x10>;
  875. phandle = <0x10>;
  876. };
  877. };
  878. };
  879.  
  880. lcd-controller@01c0c000 {
  881. compatible = "allwinner,sun8i-a33-tcon";
  882. reg = <0x1c0c000 0x1000>;
  883. interrupts = <0x0 0x56 0x4>;
  884. clocks = <0x2 0x26 0x2 0x57>;
  885. clock-names = "ahb", "tcon-ch0";
  886. clock-output-names = "tcon-pixel-clock";
  887. resets = <0x2 0x13>;
  888. reset-names = "lcd";
  889. status = "disabled";
  890.  
  891. ports {
  892. #address-cells = <0x1>;
  893. #size-cells = <0x0>;
  894.  
  895. port@0 {
  896. #address-cells = <0x1>;
  897. #size-cells = <0x0>;
  898. reg = <0x0>;
  899.  
  900. endpoint@0 {
  901. reg = <0x0>;
  902. remote-endpoint = <0x23>;
  903. linux,phandle = <0x28>;
  904. phandle = <0x28>;
  905. };
  906. };
  907.  
  908. port@1 {
  909. #address-cells = <0x1>;
  910. #size-cells = <0x0>;
  911. reg = <0x1>;
  912. };
  913. };
  914. };
  915.  
  916. crypto-engine@01c15000 {
  917. compatible = "allwinner,sun4i-a10-crypto";
  918. reg = <0x1c15000 0x1000>;
  919. interrupts = <0x0 0x50 0x4>;
  920. clocks = <0x2 0x18 0x2 0x45>;
  921. clock-names = "ahb", "mod";
  922. resets = <0x2 0x5>;
  923. reset-names = "ahb";
  924. };
  925.  
  926. dai@01c22c00 {
  927. #sound-dai-cells = <0x0>;
  928. compatible = "allwinner,sun6i-a31-i2s";
  929. reg = <0x1c22c00 0x200>;
  930. interrupts = <0x0 0x1d 0x4>;
  931. clocks = <0x2 0x2f 0x2 0x5c>;
  932. clock-names = "apb", "mod";
  933. resets = <0x2 0x1d>;
  934. dmas = <0x15 0xf 0x15 0xf>;
  935. dma-names = "rx", "tx";
  936. status = "okay";
  937. linux,phandle = <0x2d>;
  938. phandle = <0x2d>;
  939. };
  940.  
  941. codec@01c22e00 {
  942. #sound-dai-cells = <0x0>;
  943. compatible = "allwinner,sun8i-a33-codec";
  944. reg = <0x1c22e00 0x400>;
  945. interrupts = <0x0 0x1d 0x4>;
  946. clocks = <0x2 0x2f 0x2 0x5c>;
  947. clock-names = "bus", "mod";
  948. status = "okay";
  949. linux,phandle = <0x2e>;
  950. phandle = <0x2e>;
  951. };
  952.  
  953. ths@01c25000 {
  954. compatible = "allwinner,sun8i-a33-ths";
  955. reg = <0x1c25000 0x100>;
  956. #thermal-sensor-cells = <0x0>;
  957. #io-channel-cells = <0x0>;
  958. linux,phandle = <0x2a>;
  959. phandle = <0x2a>;
  960. };
  961.  
  962. display-frontend@01e00000 {
  963. compatible = "allwinner,sun8i-a33-display-frontend";
  964. reg = <0x1e00000 0x20000>;
  965. interrupts = <0x0 0x5d 0x4>;
  966. clocks = <0x2 0x29 0x2 0x56 0x2 0x53>;
  967. clock-names = "ahb", "mod", "ram";
  968. resets = <0x2 0x16>;
  969. status = "disabled";
  970. linux,phandle = <0x29>;
  971. phandle = <0x29>;
  972.  
  973. ports {
  974. #address-cells = <0x1>;
  975. #size-cells = <0x0>;
  976.  
  977. port@1 {
  978. #address-cells = <0x1>;
  979. #size-cells = <0x0>;
  980. reg = <0x1>;
  981.  
  982. endpoint@0 {
  983. reg = <0x0>;
  984. remote-endpoint = <0x24>;
  985. linux,phandle = <0x25>;
  986. phandle = <0x25>;
  987. };
  988. };
  989. };
  990. };
  991.  
  992. display-backend@01e60000 {
  993. compatible = "allwinner,sun8i-a33-display-backend";
  994. reg = <0x1e60000 0x10000 0x1e80000 0x1000>;
  995. reg-names = "be", "sat";
  996. interrupts = <0x0 0x5f 0x4>;
  997. clocks = <0x2 0x28 0x2 0x55 0x2 0x54 0x2 0x2e>;
  998. clock-names = "ahb", "mod", "ram", "sat";
  999. resets = <0x2 0x15 0x2 0x1b>;
  1000. reset-names = "be", "sat";
  1001. assigned-clocks = <0x2 0x55>;
  1002. assigned-clock-rates = <0x11e1a300>;
  1003.  
  1004. ports {
  1005. #address-cells = <0x1>;
  1006. #size-cells = <0x0>;
  1007.  
  1008. port@0 {
  1009. #address-cells = <0x1>;
  1010. #size-cells = <0x0>;
  1011. reg = <0x0>;
  1012.  
  1013. endpoint@0 {
  1014. reg = <0x0>;
  1015. remote-endpoint = <0x25>;
  1016. linux,phandle = <0x24>;
  1017. phandle = <0x24>;
  1018. };
  1019. };
  1020.  
  1021. port@1 {
  1022. #address-cells = <0x1>;
  1023. #size-cells = <0x0>;
  1024. reg = <0x1>;
  1025.  
  1026. endpoint@0 {
  1027. reg = <0x0>;
  1028. remote-endpoint = <0x26>;
  1029. linux,phandle = <0x27>;
  1030. phandle = <0x27>;
  1031. };
  1032. };
  1033. };
  1034. };
  1035.  
  1036. drc@01e70000 {
  1037. compatible = "allwinner,sun8i-a33-drc";
  1038. reg = <0x1e70000 0x10000>;
  1039. interrupts = <0x0 0x5b 0x4>;
  1040. clocks = <0x2 0x2d 0x2 0x62 0x2 0x52>;
  1041. clock-names = "ahb", "mod", "ram";
  1042. resets = <0x2 0x1a>;
  1043. assigned-clocks = <0x2 0x62>;
  1044. assigned-clock-rates = <0x11e1a300>;
  1045.  
  1046. ports {
  1047. #address-cells = <0x1>;
  1048. #size-cells = <0x0>;
  1049.  
  1050. port@0 {
  1051. #address-cells = <0x1>;
  1052. #size-cells = <0x0>;
  1053. reg = <0x0>;
  1054.  
  1055. endpoint@0 {
  1056. reg = <0x0>;
  1057. remote-endpoint = <0x27>;
  1058. linux,phandle = <0x26>;
  1059. phandle = <0x26>;
  1060. };
  1061. };
  1062.  
  1063. port@1 {
  1064. #address-cells = <0x1>;
  1065. #size-cells = <0x0>;
  1066. reg = <0x1>;
  1067.  
  1068. endpoint@0 {
  1069. reg = <0x0>;
  1070. remote-endpoint = <0x28>;
  1071. linux,phandle = <0x23>;
  1072. phandle = <0x23>;
  1073. };
  1074. };
  1075. };
  1076. };
  1077. };
  1078.  
  1079. opp_table0 {
  1080. compatible = "operating-points-v2";
  1081. opp-shared;
  1082. linux,phandle = <0x3>;
  1083. phandle = <0x3>;
  1084.  
  1085. opp-120000000 {
  1086. opp-hz = <0x0 0x7270e00>;
  1087. opp-microvolt = <0xfde80>;
  1088. clock-latency-ns = <0x3b9b0>;
  1089. };
  1090.  
  1091. opp-240000000 {
  1092. opp-hz = <0x0 0xe4e1c00>;
  1093. opp-microvolt = <0xfde80>;
  1094. clock-latency-ns = <0x3b9b0>;
  1095. };
  1096.  
  1097. opp-312000000 {
  1098. opp-hz = <0x0 0x1298be00>;
  1099. opp-microvolt = <0xfde80>;
  1100. clock-latency-ns = <0x3b9b0>;
  1101. };
  1102.  
  1103. opp-408000000 {
  1104. opp-hz = <0x0 0x18519600>;
  1105. opp-microvolt = <0xfde80>;
  1106. clock-latency-ns = <0x3b9b0>;
  1107. };
  1108.  
  1109. opp-480000000 {
  1110. opp-hz = <0x0 0x1c9c3800>;
  1111. opp-microvolt = <0xfde80>;
  1112. clock-latency-ns = <0x3b9b0>;
  1113. };
  1114.  
  1115. opp-504000000 {
  1116. opp-hz = <0x0 0x1e0a6e00>;
  1117. opp-microvolt = <0xfde80>;
  1118. clock-latency-ns = <0x3b9b0>;
  1119. };
  1120.  
  1121. opp-600000000 {
  1122. opp-hz = <0x0 0x23c34600>;
  1123. opp-microvolt = <0xfde80>;
  1124. clock-latency-ns = <0x3b9b0>;
  1125. };
  1126.  
  1127. opp-648000000 {
  1128. opp-hz = <0x0 0x269fb200>;
  1129. opp-microvolt = <0xfde80>;
  1130. clock-latency-ns = <0x3b9b0>;
  1131. };
  1132.  
  1133. opp-720000000 {
  1134. opp-hz = <0x0 0x2aea5400>;
  1135. opp-microvolt = <0x10c8e0>;
  1136. clock-latency-ns = <0x3b9b0>;
  1137. };
  1138.  
  1139. opp-816000000 {
  1140. opp-hz = <0x0 0x30a32c00>;
  1141. opp-microvolt = <0x10c8e0>;
  1142. clock-latency-ns = <0x3b9b0>;
  1143. };
  1144.  
  1145. opp-912000000 {
  1146. opp-hz = <0x0 0x365c0400>;
  1147. opp-microvolt = <0x124f80>;
  1148. clock-latency-ns = <0x3b9b0>;
  1149. };
  1150.  
  1151. opp-1008000000 {
  1152. opp-hz = <0x0 0x3c14dc00>;
  1153. opp-microvolt = <0x124f80>;
  1154. clock-latency-ns = <0x3b9b0>;
  1155. };
  1156. };
  1157.  
  1158. display-engine {
  1159. compatible = "allwinner,sun8i-a33-display-engine";
  1160. allwinner,pipelines = <0x29>;
  1161. status = "disabled";
  1162. };
  1163.  
  1164. iio-hwmon {
  1165. compatible = "iio-hwmon";
  1166. io-channels = <0x2a>;
  1167. };
  1168.  
  1169. gpu-opp-table {
  1170. compatible = "operating-points-v2";
  1171. linux,phandle = <0x18>;
  1172. phandle = <0x18>;
  1173.  
  1174. opp-144000000 {
  1175. opp-hz = <0x0 0x8954400>;
  1176. };
  1177.  
  1178. opp-240000000 {
  1179. opp-hz = <0x0 0xe4e1c00>;
  1180. };
  1181.  
  1182. opp-384000000 {
  1183. opp-hz = <0x0 0x16e36000>;
  1184. };
  1185. };
  1186.  
  1187. sound {
  1188. compatible = "simple-audio-card";
  1189. simple-audio-card,name = "sun8i-a33-audio";
  1190. simple-audio-card,format = "i2s";
  1191. simple-audio-card,frame-master = <0x2b>;
  1192. simple-audio-card,bitclock-master = <0x2b>;
  1193. simple-audio-card,mclk-fs = <0x200>;
  1194. simple-audio-card,aux-devs = <0x2c>;
  1195. simple-audio-card,routing = "Left DAC", "AIF1 Slot 0 Left", "Right DAC", "AIF1 Slot 0 Right";
  1196. status = "okay";
  1197.  
  1198. simple-audio-card,cpu {
  1199. sound-dai = <0x2d>;
  1200. };
  1201.  
  1202. simple-audio-card,codec {
  1203. sound-dai = <0x2e>;
  1204. linux,phandle = <0x2b>;
  1205. phandle = <0x2b>;
  1206. };
  1207. };
  1208.  
  1209. thermal-zones {
  1210.  
  1211. cpu_thermal {
  1212. polling-delay-passive = <0xfa>;
  1213. polling-delay = <0x3e8>;
  1214. thermal-sensors = <0x2a>;
  1215.  
  1216. cooling-maps {
  1217.  
  1218. map0 {
  1219. trip = <0x2f>;
  1220. cooling-device = <0x30 0xffffffff 0xffffffff>;
  1221. };
  1222.  
  1223. map1 {
  1224. trip = <0x31>;
  1225. cooling-device = <0x30 0xffffffff 0xffffffff>;
  1226. };
  1227.  
  1228. map2 {
  1229. trip = <0x32>;
  1230. cooling-device = <0x33 0x1 0xffffffff>;
  1231. };
  1232.  
  1233. map3 {
  1234. trip = <0x34>;
  1235. cooling-device = <0x33 0x2 0xffffffff>;
  1236. };
  1237. };
  1238.  
  1239. trips {
  1240.  
  1241. cpu_alert0 {
  1242. temperature = <0x124f8>;
  1243. hysteresis = <0x7d0>;
  1244. type = "passive";
  1245. linux,phandle = <0x2f>;
  1246. phandle = <0x2f>;
  1247. };
  1248.  
  1249. gpu_alert0 {
  1250. temperature = <0x14c08>;
  1251. hysteresis = <0x7d0>;
  1252. type = "passive";
  1253. linux,phandle = <0x32>;
  1254. phandle = <0x32>;
  1255. };
  1256.  
  1257. cpu_alert1 {
  1258. temperature = <0x15f90>;
  1259. hysteresis = <0x7d0>;
  1260. type = "hot";
  1261. linux,phandle = <0x31>;
  1262. phandle = <0x31>;
  1263. };
  1264.  
  1265. gpu_alert1 {
  1266. temperature = <0x17318>;
  1267. hysteresis = <0x7d0>;
  1268. type = "hot";
  1269. linux,phandle = <0x34>;
  1270. phandle = <0x34>;
  1271. };
  1272.  
  1273. cpu_crit {
  1274. temperature = <0x1adb0>;
  1275. hysteresis = <0x7d0>;
  1276. type = "critical";
  1277. };
  1278. };
  1279. };
  1280. };
  1281.  
  1282. ahci-5v {
  1283. compatible = "regulator-fixed";
  1284. regulator-name = "ahci-5v";
  1285. regulator-min-microvolt = <0x4c4b40>;
  1286. regulator-max-microvolt = <0x4c4b40>;
  1287. regulator-boot-on;
  1288. enable-active-high;
  1289. gpio = <0x7 0x1 0x8 0x0>;
  1290. status = "disabled";
  1291. };
  1292.  
  1293. usb0-vbus {
  1294. compatible = "regulator-fixed";
  1295. regulator-name = "usb0-vbus";
  1296. regulator-min-microvolt = <0x4c4b40>;
  1297. regulator-max-microvolt = <0x4c4b40>;
  1298. enable-active-high;
  1299. gpio = <0x7 0x1 0x9 0x0>;
  1300. status = "disabled";
  1301. };
  1302.  
  1303. usb1-vbus {
  1304. compatible = "regulator-fixed";
  1305. regulator-name = "usb1-vbus";
  1306. regulator-min-microvolt = <0x4c4b40>;
  1307. regulator-max-microvolt = <0x4c4b40>;
  1308. regulator-boot-on;
  1309. enable-active-high;
  1310. gpio = <0xf 0x0 0x2 0x0>;
  1311. status = "okay";
  1312. pinctrl-names = "default";
  1313. pinctrl-0 = <0x35>;
  1314. linux,phandle = <0x11>;
  1315. phandle = <0x11>;
  1316. };
  1317.  
  1318. usb2-vbus {
  1319. compatible = "regulator-fixed";
  1320. regulator-name = "usb2-vbus";
  1321. regulator-min-microvolt = <0x4c4b40>;
  1322. regulator-max-microvolt = <0x4c4b40>;
  1323. regulator-boot-on;
  1324. enable-active-high;
  1325. gpio = <0x7 0x7 0x3 0x0>;
  1326. status = "disabled";
  1327. };
  1328.  
  1329. vcc3v0 {
  1330. compatible = "regulator-fixed";
  1331. regulator-name = "vcc3v0";
  1332. regulator-min-microvolt = <0x2dc6c0>;
  1333. regulator-max-microvolt = <0x2dc6c0>;
  1334. };
  1335.  
  1336. vcc3v3 {
  1337. compatible = "regulator-fixed";
  1338. regulator-name = "vcc3v3";
  1339. regulator-min-microvolt = <0x325aa0>;
  1340. regulator-max-microvolt = <0x325aa0>;
  1341. };
  1342.  
  1343. vcc5v0 {
  1344. compatible = "regulator-fixed";
  1345. regulator-name = "vcc5v0";
  1346. regulator-min-microvolt = <0x4c4b40>;
  1347. regulator-max-microvolt = <0x4c4b40>;
  1348. linux,phandle = <0x22>;
  1349. phandle = <0x22>;
  1350. };
  1351.  
  1352. leds {
  1353. compatible = "gpio-leds";
  1354. pinctrl-names = "default";
  1355. pinctrl-0 = <0x36>;
  1356.  
  1357. led1 {
  1358. label = "led1";
  1359. gpio = <0x7 0x1 0x7 0x1>;
  1360. };
  1361. };
  1362.  
  1363. wifi_pwrseq {
  1364. compatible = "mmc-pwrseq-simple";
  1365. reset-gpios = <0xf 0x0 0x6 0x1>;
  1366. linux,phandle = <0xb>;
  1367. phandle = <0xb>;
  1368. };
  1369.  
  1370. backlight {
  1371. compatible = "ocp8178-backlight";
  1372. pinctrl-names = "default";
  1373. pinctrl-0 = <0x37>;
  1374. backlight-control-gpios = <0x7 0x7 0x1 0x0>;
  1375. default-brightness = <0x5>;
  1376. };
  1377. };
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