diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi
index 1cdc346a0..f64a95ac9 100644
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -683,6 +683,29 @@
 		status = "disabled";
 	};

+	consys: consys@18070000 {
+                compatible = "mediatek,mt7623-consys";
+                reg = <0 0x18070000 0 0x0200>,  /*CONN_MCU_CONFIG_BASE      */
+                      <0 0x10001000 0 0x1600>;  /*TOPCKGEN_BASE             */
+                clocks = <&infracfg CLK_INFRA_CONNMCU>;
+                clock-names = "consysbus";
+                power-domains = <&scpsys MT2701_POWER_DOMAIN_CONN>;
+                interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_LOW>,  /* BGF_EINT */
+                             <GIC_SPI 163 IRQ_TYPE_LEVEL_LOW>;  /* WDT_EINT */
+                resets = <&watchdog MT2701_TOPRGU_CONN_MCU_RST>;
+                reset-names = "connsys";
+                status="disabled";
+        };
+
+	wifi: wifi@180f0000 {
+                compatible = "mediatek,mt7623-wifi",
+                             "mediatek,wifi";
+                reg = <0 0x180f0000 0 0x005c>;
+                interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_LOW>;
+                clocks = <&pericfg CLK_PERI_AP_DMA>;
+                clock-names = "wifi-dma";
+        };
+
 	hifsys: syscon@1a000000 {
 		compatible = "mediatek,mt7623-hifsys",
 			     "mediatek,mt2701-hifsys",
@@ -898,6 +921,24 @@
 		#dma-cells = <1>;
 	};

+    consys_pins_default: consys_pins_default {
+            adie {
+                pinmux = <MT7623_PIN_60_WB_RSTB_FUNC_WB_RSTB>,
+                         <MT7623_PIN_61_GPIO61_FUNC_TEST_FD>,
+                         <MT7623_PIN_62_GPIO62_FUNC_TEST_FC>,
+                         <MT7623_PIN_63_WB_SCLK_FUNC_WB_SCLK>,
+                         <MT7623_PIN_64_WB_SDATA_FUNC_WB_SDATA>,
+                         <MT7623_PIN_65_WB_SEN_FUNC_WB_SEN>,
+                         <MT7623_PIN_66_WB_CRTL0_FUNC_WB_CRTL0>,
+                         <MT7623_PIN_67_WB_CRTL1_FUNC_WB_CRTL1>,
+                         <MT7623_PIN_68_WB_CRTL2_FUNC_WB_CRTL2>,
+                         <MT7623_PIN_69_WB_CRTL3_FUNC_WB_CRTL3>,
+                         <MT7623_PIN_70_WB_CRTL4_FUNC_WB_CRTL4>,
+                         <MT7623_PIN_71_WB_CRTL5_FUNC_WB_CRTL5>;
+                bias-disable;
+            };
+    };
+
 	eth: ethernet@1b100000 {
 		compatible = "mediatek,mt7623-eth",
 			     "mediatek,mt2701-eth",
diff --git a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
index 2b760f90f..d0c5253a4 100644
--- a/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
+++ b/arch/arm/boot/dts/mt7623n-bananapi-bpi-r2.dts
@@ -112,6 +112,19 @@
 		device_type = "memory";
 		reg = <0 0x80000000 0 0x80000000>;
 	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+		consys-reserve-memory {
+			compatible = "mediatek,consys-reserve-memory";
+			no-map;
+			size = <0 0x100000>;
+			alignment = <0 0x100000>;
+		};
+	};
+
 };

 &btif {
@@ -287,6 +300,17 @@
 	status = "okay";
 };

+&consys {
+        mediatek,pwrap-regmap = <&pwrap>;
+        pinctrl-names = "default";
+        pinctrl-0 = <&consys_pins_default>;
+        vcn18-supply = <&mt6323_vcn18_reg>;
+        vcn28-supply = <&mt6323_vcn28_reg>;
+        vcn33_bt-supply = <&mt6323_vcn33_bt_reg>;
+        vcn33_wifi-supply = <&mt6323_vcn33_wifi_reg>;
+        status = "okay";
+};
+
 &spi0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&spi0_pins_a>;
@@ -331,3 +355,6 @@
 	status = "okay";
 };

+&watchdog {
+	status = "okay";
+};