Advertisement
Not a member of Pastebin yet?
Sign Up,
it unlocks many cool features!
- * SpiceNetList
- *
- * Exported from untitled.sch at 21/07/2019 1:17 PM
- *
- * EAGLE Version 9.4.0 Copyright (c) 1988-2019 Autodesk, Inc.
- *
- .TEMP=25.0
- * --------- .OPTIONS ---------
- .OPTIONS ABSTOL=1e-12 GMIN=1e-12 PIVREL=1e-3 ITL1=100 ITL2=50 PIVTOL=1e-13 RELTOL=1e-3 VNTOL=1e-6 CHGTOL=1e-15 ITL4=10 METHOD=TRAP SRCSTEPS=0 TRTOL=7 NODE
- * --------- .PARAMS ---------
- * --------- devices ---------
- C_C1 N_3 0 1000uF
- R_R1 N_2 N_1 10M
- V_VCUR_1 N_2 N_3
- V_V1 N_1 0 DC 10 AC 0
- * --------- simulation ---------
- .control
- set filetype=ascii
- TRAN 2e-7 0.0001 0 1e-5
- write untitled.sch.sim V(N_1) V(N_2) I(V_VCUR_1) I(V_V1)
- .endc
- .END
Advertisement
Add Comment
Please, Sign In to add comment
Advertisement