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- UnaryImm { opcode: Iconst, imm: Imm64(1) } attempting to legalize instruction...done
- Unary { opcode: Ineg, arg: v0 } attempting to legalize instruction...legalized
- UnaryImm { opcode: Iconst, imm: Imm64(0) } attempting to legalize instruction...done
- Binary { opcode: Isub, args: [v4, v0] } attempting to legalize instruction...done
- UnaryImm { opcode: Iconst, imm: Imm64(1) } attempting to legalize instruction...legalized
- UnaryImm { opcode: Iconst, imm: Imm64(1) } attempting to legalize instruction...done
- Unary { opcode: Ireduce, arg: v5 } attempting to legalize instruction...done
- Unary { opcode: Ineg, arg: v2 } attempting to legalize instruction...done
- MultiAry { opcode: Return, args: EntityList { index: 0, unused: PhantomData } } attempting to legalize instruction...done
- FAIL ./filetests/isa/x86/legalize-custom.clif: legalizer(%ineg_legalized):
- filecheck failed:
- #0 regex: V=v\d+
- #1 regex: BB=block\d+
- #2 check: v0 = iconst.i32 1
- #3 nextln: v4 = iconst.i32 0
- #4 nextln: v1 = isub v4, v0
- #5 check: v5 = iconst.i32 1
- #6 nextln: v2 = ireduce.i8 v5
- #7 nextln: v6 = iconst.i8 0
- #8 nextln: v3 = isub v6, v2
- > function %ineg_legalized() fast {
- > block0:
- > [Op1pu_id#b8] v0 = iconst.i32 1
- ^~~~~~~~~~~~~~~~~
- Matched #2: \bv0 = iconst\.i32 1\b
- > [Op1pu_id#b8] v4 = iconst.i32 0
- ^~~~~~~~~~~~~~~~~
- Matched #3: \bv4 = iconst\.i32 0\b
- > [DynRexOp1rr#29] v1 = isub v4, v0
- ^~~~~~~~~~~~~~~~
- Matched #4: \bv1 = isub v4, v0\b
- > [Op1pu_id#b8] v5 = iconst.i32 1
- ^~~~~~~~~~~~~~~~~
- Matched #5: \bv5 = iconst\.i32 1\b
- > [null#00] v2 = ireduce.i8 v5
- ^~~~~~~~~~~~~~~~~~
- Matched #6: \bv2 = ireduce\.i8 v5\b
- > [-] v3 = ineg v2
- Missed #7: \bv6 = iconst\.i8 0\b
- > [Op1ret#c3] return
- > }
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