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  1. UnaryImm { opcode: Iconst, imm: Imm64(1) } attempting to legalize instruction...done
  2. Unary { opcode: Ineg, arg: v0 } attempting to legalize instruction...legalized
  3. UnaryImm { opcode: Iconst, imm: Imm64(0) } attempting to legalize instruction...done
  4. Binary { opcode: Isub, args: [v4, v0] } attempting to legalize instruction...done
  5. UnaryImm { opcode: Iconst, imm: Imm64(1) } attempting to legalize instruction...legalized
  6. UnaryImm { opcode: Iconst, imm: Imm64(1) } attempting to legalize instruction...done
  7. Unary { opcode: Ireduce, arg: v5 } attempting to legalize instruction...done
  8. Unary { opcode: Ineg, arg: v2 } attempting to legalize instruction...done
  9. MultiAry { opcode: Return, args: EntityList { index: 0, unused: PhantomData } } attempting to legalize instruction...done
  10. FAIL ./filetests/isa/x86/legalize-custom.clif: legalizer(%ineg_legalized):
  11. filecheck failed:
  12. #0 regex: V=v\d+
  13. #1 regex: BB=block\d+
  14. #2 check: v0 = iconst.i32 1
  15. #3 nextln: v4 = iconst.i32 0
  16. #4 nextln: v1 = isub v4, v0
  17. #5 check: v5 = iconst.i32 1
  18. #6 nextln: v2 = ireduce.i8 v5
  19. #7 nextln: v6 = iconst.i8 0
  20. #8 nextln: v3 = isub v6, v2
  21. > function %ineg_legalized() fast {
  22. > block0:
  23. > [Op1pu_id#b8] v0 = iconst.i32 1
  24. ^~~~~~~~~~~~~~~~~
  25. Matched #2: \bv0 = iconst\.i32 1\b
  26. > [Op1pu_id#b8] v4 = iconst.i32 0
  27. ^~~~~~~~~~~~~~~~~
  28. Matched #3: \bv4 = iconst\.i32 0\b
  29. > [DynRexOp1rr#29] v1 = isub v4, v0
  30. ^~~~~~~~~~~~~~~~
  31. Matched #4: \bv1 = isub v4, v0\b
  32. > [Op1pu_id#b8] v5 = iconst.i32 1
  33. ^~~~~~~~~~~~~~~~~
  34. Matched #5: \bv5 = iconst\.i32 1\b
  35. > [null#00] v2 = ireduce.i8 v5
  36. ^~~~~~~~~~~~~~~~~~
  37. Matched #6: \bv2 = ireduce\.i8 v5\b
  38. > [-] v3 = ineg v2
  39. Missed #7: \bv6 = iconst\.i8 0\b
  40. > [Op1ret#c3] return
  41. > }
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