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Throbber

creamygoat
Apr 3rd, 2017
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  1. ;-------------------------------------------------------------------------------
  2. ; Throbber.S - ATtiny85 PWM throbber for an illuminated dildo
  3. ;-------------------------------------------------------------------------------
  4. ;
  5. ; Author: Daniel Neville (creamygoat@gmail.com)
  6. ; Date: 1 April 2017
  7. ; Licence: Public domain
  8. ; Version: 1.0.0
  9. ;
  10. ; PIN ASSIGNMENT
  11. ;               ____
  12. ;      ~RESET 1| AT |8 Vcc
  13. ;          NC 2|tiny|7 NC
  14. ;          NC 3| 85 |6 PWMOUT
  15. ;         GND 4|____|5 NC
  16. ;
  17. ;-------------------------------------------------------------------------------
  18. ; Notes
  19. ;-------------------------------------------------------------------------------
  20. ;
  21. ; Fuses:
  22. ;   Low fuse: 0x62 (7:CKDIV8, 4:SUT0, 3-0:CKSEL=8MHz RC, 1MHz system clock)
  23. ;   High fuse: 0xdf (5:SPIEN) 0xd7 (6:SPIEN, 3:EESAVE)
  24. ;   Extended fuse: 0xff
  25. ;
  26. ; Fuse programming
  27. ;   avrdude -p t85 -c usbasp -U lfuse:w:0x62:m
  28. ;   avrdude -p t85 -c usbasp -U hfuse:w:0xdf:m
  29. ;   avrdude -p t85 -c usbasp -U efuse:w:0xff:m
  30. ;
  31. ; Compiling, inspecting and programming:
  32. ;
  33. ;   avr-gcc -mmcu=attiny85 -o Throbber.o Throbber.S
  34. ;   avr-objdump -C -d Throbber.o
  35. ;   avr-ld -o Throbber.elf Throbber.o
  36. ;   avr-objcopy -O ihex Throbber.elf Throbber.hex
  37. ;   avrdude -p t85 -c usbasp -U flash:w:Throbber.hex:i
  38. ;
  39. ;-------------------------------------------------------------------------------
  40.  
  41. ;-------------------------------------------------------------------------------
  42. ; Index
  43. ;-------------------------------------------------------------------------------
  44.  
  45.  
  46. ; Imports
  47. ; Exports
  48. ; Constants
  49. ; Structures
  50. ; Macros
  51. ;
  52. ; Interrupt handlers
  53. ;  __vector_default
  54. ;   TIM1_OVF_vect
  55. ;
  56. ; Initialisation
  57. ;   InitialiseRegisterConstants
  58. ;   InitialiseHardware
  59. ;   ClearGlobals
  60. ;
  61. ; main
  62. ;
  63. ; Data in program memory
  64. ;
  65. ;   PM_ThrobTable
  66. ;
  67. ; Globals in SRAM
  68.  
  69.  
  70. ;-------------------------------------------------------------------------------
  71. ; Imports
  72. ;-------------------------------------------------------------------------------
  73.  
  74.  
  75. #include <avr/common.h>
  76. #include <avr/io.h>
  77.  
  78.  
  79. ;-------------------------------------------------------------------------------
  80. ; Exports
  81. ;-------------------------------------------------------------------------------
  82.  
  83.  
  84. .global main
  85. .global __vector_default
  86. .global TIM1_OVF_vect
  87.  
  88.  
  89. ;-------------------------------------------------------------------------------
  90. ; Constants
  91. ;-------------------------------------------------------------------------------
  92.  
  93.  
  94. ; Inputs and outputs
  95. OUTPUT_BIT_PWM_OUT = 0 ; Fixed at 5:OC1A
  96.  
  97. THROB_INDEX_BITS = 8
  98. THROB_INDEX_RANGE = 1 << THROB_INDEX_BITS
  99. THROB_INDEX_MASK = THROB_INDEX_RANGE - 1
  100.  
  101. ; The Timer 1 output compare register C sets the throbbing rate.
  102. ; Sensible values range from about 12 (0.21s) to 255 (4.2s).
  103. ; Nice defaults include 91 (1.5s, 40bpm) and 182 (3.0s, 20bpm).
  104. THROB_INTERRUPT_PERIOD_MINUS_ONE = 91
  105.  
  106.  
  107. ;-------------------------------------------------------------------------------
  108. ; Structures
  109. ;-------------------------------------------------------------------------------
  110.  
  111.  
  112. G_ThrobIndex = 0
  113. GSize = G_ThrobIndex + 1
  114.  
  115.  
  116. ;-------------------------------------------------------------------------------
  117. ; Macros
  118. ;-------------------------------------------------------------------------------
  119.  
  120.  
  121. ; Conditional execution of the following one-word instruction
  122.  
  123. .macro  ifcc
  124.         brcs    . + 2
  125. .endm
  126. .macro  ifcs
  127.         brcc    . + 2
  128. .endm
  129. .macro  ifne
  130.         breq    . + 2
  131. .endm
  132. .macro  ifeq
  133.         brne    . + 2
  134. .endm
  135. .macro  ifpl
  136.         brmi    . + 2
  137. .endm
  138. .macro  ifmi
  139.         brpl    . + 2
  140. .endm
  141. .macro  ifvc
  142.         brvs    . + 2
  143. .endm
  144. .macro  ifvs
  145.         brvc    . + 2
  146. .endm
  147. .macro  iflt
  148.         brge    . + 2
  149. .endm
  150. .macro  ifge
  151.         brlt    . + 2
  152. .endm
  153. .macro  ifhc
  154.         brhs    . + 2
  155. .endm
  156. .macro  ifhs
  157.         brhc    . + 2
  158. .endm
  159. .macro  iftc
  160.         brts    . + 2
  161. .endm
  162. .macro  ifts
  163.         brtc    . + 2
  164. .endm
  165. .macro  ifid
  166.         brie    . + 2
  167. .endm
  168. .macro  ifie
  169.         brid    . + 2
  170. .endm
  171. .macro  iflo
  172.         brsh    . + 2
  173. .endm
  174. .macro  ifsh
  175.         brlo    . + 2
  176. .endm
  177. .macro  ifbs
  178.         brbc    . + 2
  179. .endm
  180. .macro  ifbc
  181.         brbs    . + 2
  182. .endm
  183.  
  184.  
  185. ;-------------------------------------------------------------------------------
  186.  
  187.  
  188. ; Positive-sense register and I/O bit tests
  189.  
  190. .macro  ifbrc   a:req, b:req
  191.         sbrs    \a, \b
  192. .endm
  193. .macro  ifbrs   a:req, b:req
  194.         sbrc    \a, \b
  195. .endm
  196. .macro  ifbic   a:req, b:req
  197.         sbis    \a, \b
  198. .endm
  199. .macro  ifbis   a:req, b:req
  200.         sbic    \a, \b
  201. .endm
  202.  
  203.  
  204. ;-------------------------------------------------------------------------------
  205.  
  206.  
  207. ; Load high & low 8-bit registers with one 16-bit word
  208.  
  209. .macro  ldhl      a:req, b:req, c:req
  210.         ldi       \b, lo8(\c)
  211.         ldi       \a, hi8(\c)
  212. .endm
  213.  
  214.  
  215. ;-------------------------------------------------------------------------------
  216.  
  217.  
  218. ; Load immediate word
  219.  
  220. .macro  ldiw    a:req, b:req
  221.   .ifc \a, r17:r16
  222.         ldhl    r17, r16, \b
  223.   .else
  224.   .ifc \a, r19:r18
  225.         ldhl    r19, r18, \b
  226.   .else
  227.   .ifc \a, r21:r20
  228.         ldhl    r21, r20, \b
  229.   .else
  230.   .ifc \a, r23:r22
  231.         ldhl    r23, r22, \b
  232.   .else
  233.   .ifc \a, r25:r24
  234.         ldhl    r25, r24, \b
  235.   .else
  236.   .ifc \a, r27:r26
  237.         ldhl    XH, XL, \b
  238.   .else
  239.   .ifc \a, r29:r28
  240.         ldhl    YH, YL, \b
  241.   .else
  242.   .ifc \a, r31:r30
  243.         ldhl    ZH, ZL, \b
  244.   .else
  245.   .ifc \a, X
  246.         ldhl    XH, XL, \b
  247.   .else
  248.   .ifc \a, Y
  249.         ldhl    YH, YL, \b
  250.   .else
  251.   .ifc \a, Z
  252.         ldhl    ZH, ZL, \b
  253.   .else
  254.     .error "Expected LDIW R, x where R is X, Y, Z or a register pair."
  255.   .endif
  256.   .endif
  257.   .endif
  258.   .endif
  259.   .endif
  260.   .endif
  261.   .endif
  262.   .endif
  263.   .endif
  264.   .endif
  265.   .endif
  266. .endm
  267.  
  268.  
  269. ;-------------------------------------------------------------------------------
  270.  
  271.  
  272. .macro  scmd    a:req, b
  273.   .ifnb \b
  274.     .ifc \a, rest
  275.         .byte   WSCMD_REST, (\b) & 255, (\b) >> 8
  276.     .else
  277.     .ifc \a, duration
  278.         .byte   WSCMD_DURATION, (\b) & 255, (\b) >> 8
  279.     .else
  280.     .ifc \a, waveix
  281.         .byte   WSCMD_WAVEIX, \b
  282.     .else
  283.     .ifc \a, volume
  284.         .byte   WSCMD_VOLUME, \b
  285.     .else
  286.     .ifc \a, frequency
  287.         .byte   WSCMD_FREQUENCY, (\b) & 255, (\b) >> 8
  288.     .else
  289.     .ifc \a, sweeprate
  290.         .byte   WSCMD_SWEEPRATE, (\b) & 255, ((\b) >> 8) & 255
  291.     .else
  292.     .ifc \a, phase
  293.         .byte   WSCMD_PHASE, \b
  294.     .else
  295.       .error "Invalid track command name."
  296.     .endif
  297.     .endif
  298.     .endif
  299.     .endif
  300.     .endif
  301.     .endif
  302.     .endif
  303.   .else
  304.     .ifc \a, end
  305.         .byte   WSCMD_END
  306.     .else
  307.       .error "Parameter required for this track command."
  308.     .endif
  309.   .endif
  310. .endm
  311.  
  312.  
  313. ;-------------------------------------------------------------------------------
  314. .section .text
  315. ;-------------------------------------------------------------------------------
  316.  
  317. ;-------------------------------------------------------------------------------
  318. ; Interrupt handlers
  319. ;-------------------------------------------------------------------------------
  320.  
  321.  
  322. __vector_default:
  323.  
  324.         reti
  325.  
  326.  
  327. ;-------------------------------------------------------------------------------
  328.  
  329.  
  330. TIM1_OVF_vect:
  331. ; Timber 1 overflow nterrupt handler
  332. ;
  333. ; Fetches a new PWM value from the Throb Table through an index and increments
  334. ; that index by one, wrapping around when the end is reached.
  335.  
  336.         push    r1
  337.         push    r16
  338.         push    ZL
  339.         push    ZH
  340.         in      r16, _SFR_IO_ADDR(SREG)
  341.         push    r16
  342.  
  343.         clr     r1
  344.  
  345.         lds     ZH, Globals + G_ThrobIndex
  346.         andi    ZH, THROB_INDEX_MASK
  347.         mov     r16, ZH
  348.         inc     ZH
  349.         andi    ZH, THROB_INDEX_MASK
  350.         sts     Globals + G_ThrobIndex, ZH
  351.         ldiw    Z, PM_ThrobTable
  352.         add     ZL, r16
  353.         adc     ZH, r1
  354.         lpm     r16, Z
  355.         out     _SFR_IO_ADDR(OCR0A), r16
  356.  
  357.         pop     r16
  358.         out     _SFR_IO_ADDR(SREG), r16
  359.         pop     ZH
  360.         pop     ZL
  361.         pop     r16
  362.         pop     r1
  363.  
  364.         reti
  365.  
  366.         ; 49 cycles, including entry
  367.  
  368.  
  369. ;-------------------------------------------------------------------------------
  370. ; Initialisation
  371. ;-------------------------------------------------------------------------------
  372.  
  373.  
  374. InitialiseRegisterConstants:
  375. ; Out: r1 = 0
  376. ;      r2 = 1
  377. ;      r3 = 255
  378. ;      Y = Globals
  379.  
  380.         ; r1 = 0
  381.         clr     r1
  382.  
  383.         ; r2 = 1, handy for carry-changing inc/dec via add/sub.
  384.         clr     r2
  385.         inc     r2
  386.  
  387.         ; r3 = 255 for sign extension.
  388.         clr     r3
  389.         dec     r3
  390.  
  391.         ldiw    Y, Globals
  392.  
  393.         ret
  394.  
  395.  
  396. ;-------------------------------------------------------------------------------
  397.  
  398.  
  399. InitialiseHardware:
  400.  
  401.         ; No interrupts!
  402.         cli
  403.  
  404.         ; Clear the watchdog reset flag so that it doesn't
  405.         ; disable the watchdog timer.
  406.         in      r16, _SFR_IO_ADDR(MCUSR)
  407.         andi    r16, ~(1 << WDRF)
  408.         out     _SFR_IO_ADDR(MCUSR), r16
  409.  
  410.         ; Start the watchdog timer and have it force a reset of the CPU if
  411.         ; the timer isn't reset at least once every 0.25 seconds.
  412.         in      r16, _SFR_IO_ADDR(WDTCR)
  413.         ori     r16, (1 << WDCE) |  (1 << WDE)
  414.         mov     r17, r16
  415.         andi    r17, ~((1 << WDCE) | (1 << WDP3) | (0b111 << WDP0))
  416.         ori     r17, (1 << WDE) | (0 << WDP3) | (0b100 << WDP0)
  417.         out     _SFR_IO_ADDR(WDTCR), r16
  418.         out     _SFR_IO_ADDR(WDTCR), r17
  419.  
  420.         ; Halt and configure Timer/Counter 0 to run at 125kHz,
  421.         ; producing 488.3Hz PWM on Pin 5:OC0A
  422.         ;
  423.         ; TCCR0A.COM0A[1:0] = 0b10 => Output high, then low for PWM
  424.         ; TCCR0A.WGM0[1:0] = 0b11 (WGM0 = 0b011 => Fast PWM)
  425.         ; TCCR0B.CS0[2:0] = 0x010 => Clk_IO/8 (125kHz)
  426.         ; TCNT0 = 0
  427.         ; OCR0A = 0
  428.         ; OCR0C is not used, as CTC0 is left disabled.
  429.  
  430.         ldi     r18, (1 << TSM) | (1 << PSR0)
  431.         out     _SFR_IO_ADDR(GTCCR), r18
  432.         ldi     r18, (0b10 << COM0A0) | (0b11 << WGM00)
  433.         out     _SFR_IO_ADDR(TCCR0A), r18
  434.         ldi     r18, (0 << WGM02) | (0b010 << CS00)
  435.         out     _SFR_IO_ADDR(TCCR0B), r18
  436.         out     _SFR_IO_ADDR(TCNT0), r1
  437.  
  438.         ; Start the counting.
  439.         out     _SFR_IO_ADDR(GTCCR), r1
  440.  
  441.         ; Configure Timer/Counter 1 to run at 15.625kHz,
  442.         ; producing f = 61.035Hz when C is set to 255
  443.         ; where f = Timer_frequency / (C + 1).
  444.         ; For a 256 byte throb table, C = 255 implies a throb rate of 0.2384Hz.
  445.         ;
  446.         ; OCR1C = 255
  447.         ; OCR1A = 255
  448.         ; TCCR1.CTC = 1 => C modifies frequency
  449.         ; TCCR1.PWM1A = 1 => PWM enabled (else interrupt won't work)
  450.         ; TCCR1.COM1A[1:0] = 0b00 => No output
  451.         ; TCCR1.CS1[3:0] = 0b0111 => Clk_IO/64 (15.625kHz)
  452.         ; TCNT1 = 0
  453.  
  454.         out     _SFR_IO_ADDR(OCR1A), r3
  455.         ldi     r18, THROB_INTERRUPT_PERIOD_MINUS_ONE
  456.         out     _SFR_IO_ADDR(OCR1C), r18
  457.         ldi     r18, (1 << CTC1) | (1 << PWM1A) | (0b0111 << CS10)
  458.         out     _SFR_IO_ADDR(TCCR1), r18
  459.         out     _SFR_IO_ADDR(TCNT1), r1
  460.  
  461.         ; Enable Timer 1 to generate interrupts on match with C.
  462.         ldi     r18, (1 << TOIE1)
  463.         out     _SFR_IO_ADDR(TIMSK), r18
  464.  
  465.         ; Set Data Direction and pull-ups
  466.         ; 2:PB3 is unused, pulled high
  467.         ; 3:PB4 is unused, pulled high
  468.         ; 5:PB1 is output (PWM ouput)
  469.         ; 6:PB0 is unused, pulled high
  470.         ; 7:PB2 is unused, pulled high
  471.         ldi     r18, (0b011111 & ~(1 << OUTPUT_BIT_PWM_OUT))
  472.         ldi     r19, (1 << OUTPUT_BIT_PWM_OUT)
  473.         out     _SFR_IO_ADDR(PORTB), r18
  474.         out     _SFR_IO_ADDR(DDRB), r19
  475.  
  476.         ; Disable digital input buffers to avoid floating inputs
  477.         ; and save power.
  478.         ldi     r18, 0b011111
  479.         out     _SFR_IO_ADDR(DIDR0), r18
  480.  
  481.         ; Save power by turning off the ADC module. (It is already disabled.)
  482.         ; The Universal Serial Interface module can be disabled, too.
  483.         ldi     r18, (1 << PRADC); | (1 << PRUSI)
  484.         out     _SFR_IO_ADDR(PRR), r18
  485.  
  486.         ret
  487.  
  488.  
  489. ;-------------------------------------------------------------------------------
  490.  
  491.  
  492. ClearGlobals:
  493.  
  494.         ldi     r18, (GlobalsEnd - Globals)
  495.         tst     r18
  496.         breq    2f
  497.  
  498.         movw    ZL, YL
  499. 1:      st      Z+, r1
  500.         dec     r18
  501.         brne    1b
  502. 2:
  503.         ret
  504.  
  505.  
  506. ;-------------------------------------------------------------------------------
  507. ; main
  508. ;-------------------------------------------------------------------------------
  509.  
  510.  
  511. main:
  512.  
  513.         rcall   InitialiseRegisterConstants
  514.         rcall   InitialiseHardware
  515.         rcall   ClearGlobals
  516.  
  517.         ; Enable interrupts
  518.         sei
  519.  
  520. main_Loop:
  521.  
  522.         ldi     r18, (0 << BODS) | (1 << SE) | (0b00 << SM0) | (0 << BODSE)
  523.         out     _SFR_IO_ADDR(MCUCR), r18
  524.         sleep
  525.         ; An interrupt occurred. Keep the watchdog happy, then.
  526.         wdr
  527.  
  528.         rjmp    main_Loop
  529.  
  530.  
  531. ;-------------------------------------------------------------------------------
  532. ; Data in program memory
  533. ;-------------------------------------------------------------------------------
  534.  
  535.  
  536. PM_ThrobTable:
  537. ; y = (0.5 + 0.5 * (0.5 - 0.5 * cos(x))) ^ 2.2
  538.         .byte   55,56,56,56,56,56,56,56
  539.         .byte   57,57,57,58,58,59,59,60
  540.         .byte   60,61,62,62,63,64,65,65
  541.         .byte   66,67,68,69,70,71,73,74
  542.         .byte   75,76,78,79,80,82,83,85
  543.         .byte   86,88,90,91,93,95,97,98
  544.         .byte   100,102,104,106,108,110,112,115
  545.         .byte   117,119,121,124,126,128,131,133
  546.         .byte   135,138,140,143,145,148,150,153
  547.         .byte   156,158,161,163,166,169,171,174
  548.         .byte   176,179,182,184,187,189,192,194
  549.         .byte   197,199,202,204,207,209,211,213
  550.         .byte   216,218,220,222,224,226,228,230
  551.         .byte   232,234,235,237,239,240,242,243
  552.         .byte   244,246,247,248,249,250,251,252
  553.         .byte   252,253,253,254,254,255,255,255
  554.         .byte   255,255,255,255,254,254,253,253
  555.         .byte   252,252,251,250,249,248,247,246
  556.         .byte   244,243,242,240,239,237,235,234
  557.         .byte   232,230,228,226,224,222,220,218
  558.         .byte   216,213,211,209,207,204,202,199
  559.         .byte   197,194,192,189,187,184,182,179
  560.         .byte   176,174,171,169,166,163,161,158
  561.         .byte   156,153,150,148,145,143,140,138
  562.         .byte   135,133,131,128,126,124,121,119
  563.         .byte   117,115,112,110,108,106,104,102
  564.         .byte   100,98,97,95,93,91,90,88
  565.         .byte   86,85,83,82,80,79,78,76
  566.         .byte   75,74,73,71,70,69,68,67
  567.         .byte   66,65,65,64,63,62,62,61
  568.         .byte   60,60,59,59,58,58,57,57
  569.         .byte   57,56,56,56,56,56,56,56
  570. .if 0
  571. ; y = (0.4999 * ((0.4 + 0.6 * (0.5 - 0.5 * cos(x)))) ^ 2.2)
  572.         .byte   17,17,17,17,17,17,17,17
  573.         .byte   18,18,18,18,18,18,19,19
  574.         .byte   19,19,20,20,20,21,21,22
  575.         .byte   22,23,23,23,24,25,25,26
  576.         .byte   26,27,28,28,29,30,30,31
  577.         .byte   32,33,34,35,35,36,37,38
  578.         .byte   39,40,41,42,43,45,46,47
  579.         .byte   48,49,50,52,53,54,56,57
  580.         .byte   58,60,61,62,64,65,67,68
  581.         .byte   69,71,72,74,75,77,78,80
  582.         .byte   81,83,84,86,87,89,90,92
  583.         .byte   93,94,96,97,99,100,101,103
  584.         .byte   104,105,107,108,109,110,112,113
  585.         .byte   114,115,116,117,118,119,120,120
  586.         .byte   121,122,123,123,124,124,125,125
  587.         .byte   126,126,127,127,127,127,127,127
  588.         .byte   127,127,127,127,127,127,127,126
  589.         .byte   126,125,125,124,124,123,123,122
  590.         .byte   121,120,120,119,118,117,116,115
  591.         .byte   114,113,112,110,109,108,107,105
  592.         .byte   104,103,101,100,99,97,96,94
  593.         .byte   93,92,90,89,87,86,84,83
  594.         .byte   81,80,78,77,75,74,72,71
  595.         .byte   69,68,67,65,64,62,61,60
  596.         .byte   58,57,56,54,53,52,50,49
  597.         .byte   48,47,46,45,43,42,41,40
  598.         .byte   39,38,37,36,35,35,34,33
  599.         .byte   32,31,30,30,29,28,28,27
  600.         .byte   26,26,25,25,24,23,23,23
  601.         .byte   22,22,21,21,20,20,20,19
  602.         .byte   19,19,19,18,18,18,18,18
  603.         .byte   18,17,17,17,17,17,17,17
  604. ; y = (0.5 - 0.5 * cos(x)) ^ 2.2
  605.         .byte   0,0,0,0,0,0,0,0
  606.         .byte   0,0,0,0,0,0,0,0
  607.         .byte   0,0,0,0,1,1,1,1
  608.         .byte   1,1,2,2,2,2,3,3
  609.         .byte   4,4,5,5,6,7,8,8
  610.         .byte   9,10,11,12,14,15,16,18
  611.         .byte   19,21,22,24,26,28,30,32
  612.         .byte   34,37,39,42,44,47,50,53
  613.         .byte   55,59,62,65,68,72,75,79
  614.         .byte   82,86,90,93,97,101,105,109
  615.         .byte   113,117,121,126,130,134,138,142
  616.         .byte   147,151,155,159,164,168,172,176
  617.         .byte   180,184,188,192,196,199,203,207
  618.         .byte   210,213,217,220,223,226,229,232
  619.         .byte   234,237,239,241,243,245,247,248
  620.         .byte   250,251,252,253,254,254,255,255
  621.         .byte   255,255,255,254,254,253,252,251
  622.         .byte   250,248,247,245,243,241,239,237
  623.         .byte   234,232,229,226,223,220,217,213
  624.         .byte   210,207,203,199,196,192,188,184
  625.         .byte   180,176,172,168,164,159,155,151
  626.         .byte   147,142,138,134,130,126,121,117
  627.         .byte   113,109,105,101,97,93,90,86
  628.         .byte   82,79,75,72,68,65,62,59
  629.         .byte   55,53,50,47,44,42,39,37
  630.         .byte   34,32,30,28,26,24,22,21
  631.         .byte   19,18,16,15,14,12,11,10
  632.         .byte   9,8,8,7,6,5,5,4
  633.         .byte   4,3,3,2,2,2,2,1
  634.         .byte   1,1,1,1,1,0,0,0
  635.         .byte   0,0,0,0,0,0,0,0
  636.         .byte   0,0,0,0,0,0,0,0
  637. .endif
  638.  
  639.  
  640. ;-------------------------------------------------------------------------------
  641. .section .bss
  642. ;-------------------------------------------------------------------------------
  643.  
  644. ;-------------------------------------------------------------------------------
  645. ; Globals in SRAM
  646. ;-------------------------------------------------------------------------------
  647.  
  648.  
  649. Globals:
  650.         .fill   GSize
  651. GlobalsEnd:
  652.  
  653.  
  654. ;-------------------------------------------------------------------------------
  655. .end
  656. ;-------------------------------------------------------------------------------
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