kirill_76rus

CountTimeFSM

Dec 1st, 2020
571
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  1. module countFSM(input logic reset, input logic inp, input logic clk, output logic [31:0] result);
  2. typedef enum logic [1:0] {S0, S1, S2} statetype;
  3. statetype state, newstate;
  4. logic [31:0] temp = 0;
  5. always_ff @(posedge clk, posedge reset)
  6. if(reset) state <= S0;
  7. else state <= newstate;
  8.  
  9. always_comb
  10.     case(state)
  11. S0:  
  12.     if(inp) newstate = S1;
  13.     else newstate = S0;
  14. S1:
  15.     if(inp) newstate = S1;
  16.     else newstate = S2;
  17. S2:
  18.     newstate = S0;
  19. endcase
  20. always_ff @(posedge clk)
  21. case(state)
  22. S0: temp = 0;
  23. S1: temp = temp + 1;
  24. S2: result = temp;
  25. endcase
  26. endmodule
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