module moroso_test_tlb(
                       input        clkin,
                       input        aa,
                       input        ptw2arb_rvalid_,
                       input        ptw2arb_stall_,
                       input        dtlb_re_a_,
                       input        dtlb_re_b_,
                       input [19:0] dtlb_pagedir_base_,
                       input [7:0]  dtlb_rdata_stuff_,
                       input [19:0] dtlb_addr_a_,
                       input [19:0] dtlb_addr_b_,
                       output       b
                       );

   /*AUTOWIRE*/
   // Beginning of automatic wires (for undeclared instantiated-module outputs)
   wire [3:0]           dtlb_flags_a;           // From dtlb_inst of MCPU_MEM_dtlb.v
   wire [3:0]           dtlb_flags_b;           // From dtlb_inst of MCPU_MEM_dtlb.v
   wire [31:12]         dtlb_phys_addr_a;       // From dtlb_inst of MCPU_MEM_dtlb.v
   wire [31:12]         dtlb_phys_addr_b;       // From dtlb_inst of MCPU_MEM_dtlb.v
   wire                 dtlb_ready;             // From dtlb_inst of MCPU_MEM_dtlb.v
   wire [31:12]         tlb2ptw_addr;           // From dtlb_inst of MCPU_MEM_dtlb.v
   wire [19:0]          tlb2ptw_pagedir_base;   // From dtlb_inst of MCPU_MEM_dtlb.v
   wire                 tlb2ptw_re;             // From dtlb_inst of MCPU_MEM_dtlb.v
   // End of automatics

	wire [31:12]    tlb2ptw_phys_addr;
   wire            tlb2ptw_ready;
   wire [3:0]      tlb2ptw_pagetab_flags;
   wire [3:0]      tlb2ptw_pagedir_flags;

   wire         ptw2arb_valid;
   wire [2:0]      ptw2arb_opcode;
   wire [31:5] ptw2arb_addr;

   reg         ptw2arb_rvalid;
   reg         ptw2arb_stall;
   reg         dtlb_re_a;
   reg         dtlb_re_b;
   reg [19:0]  dtlb_pagedir_base;
   reg [7:0]   dtlb_rdata_stuff;
   reg [19:0]  dtlb_addr_a;
   reg [19:0]  dtlb_addr_b;

   assign b = ^dtlb_flags_a ^ ^dtlb_flags_b ^ ^dtlb_phys_addr_a ^ ^dtlb_phys_addr_b
              ^ dtlb_ready // ^ ^tlb2ptw_addr ^ ^tlb2ptw_pagedir_base ^ tlb2ptw_re;
				  ^ ptw2arb_valid ^ ^ptw2arb_opcode ^ ^ptw2arb_addr;

	 wire        clkout;
	 clkpll clk_inst(.refclk(clkin), .outclk_0(clkout));

	 reg a = 1;
	 always @(posedge clkout) begin
      a <= ~aa;
      ptw2arb_rvalid <= ptw2arb_rvalid_;
      ptw2arb_stall <= ptw2arb_stall_;
      dtlb_re_a <= dtlb_re_a_;
      dtlb_re_b <= dtlb_re_b_;
      dtlb_pagedir_base <= dtlb_pagedir_base_;
      dtlb_rdata_stuff <= dtlb_rdata_stuff_;
      dtlb_addr_a <= dtlb_addr_a_;
      dtlb_addr_b <= dtlb_addr_b_;
  end

   MCPU_MEM_dtlb dtlb_inst(
                           // Outputs
                           .dtlb_phys_addr_a    (dtlb_phys_addr_a[31:12]),
                           .dtlb_phys_addr_b    (dtlb_phys_addr_b[31:12]),
                           .dtlb_flags_a        (dtlb_flags_a[3:0]),
                           .dtlb_flags_b        (dtlb_flags_b[3:0]),
                           .dtlb_ready          (dtlb_ready),
                           .tlb2ptw_addr        (tlb2ptw_addr[31:12]),
                           .tlb2ptw_re          (tlb2ptw_re),
                           .tlb2ptw_pagedir_base(tlb2ptw_pagedir_base[19:0]),
                           // Inputs
                           .clk                 (clkout),
                           .dtlb_addr_a         ({20{a}}),
                           .dtlb_addr_b         ({20{a}}),
                           .dtlb_re_a           (dtlb_re_a),
                           .dtlb_re_b           (dtlb_re_b),
                           .dtlb_pagedir_base(dtlb_pagedir_base),
									         .tlb2ptw_phys_addr(tlb2ptw_phys_addr),
									         .tlb2ptw_ready(tlb2ptw_ready),
									         .tlb2ptw_pagetab_flags(tlb2ptw_pagetab_flags),
									         .tlb2ptw_pagedir_flags(tlb2ptw_pagedir_flags),
									         );

		MCPU_MEM_pt_walk walk_inst(
                        .tlb2ptw_clk(clkout),

                        .tlb2ptw_addr(tlb2ptw_addr),
                        .tlb2ptw_re(tlb2ptw_re),
                        .tlb2ptw_pagedir_base(tlb2ptw_pagedir_base),

                        .tlb2ptw_phys_addr(tlb2ptw_phys_addr),
                        .tlb2ptw_ready(tlb2ptw_ready),
                        .tlb2ptw_pagetab_flags(tlb2ptw_pagetab_flags),
                        .tlb2ptw_pagedir_flags(tlb2ptw_pagedir_flags),


                        // Atom interface to arb
                        .ptw2arb_valid(ptw2arb_valid),
                        .ptw2arb_opcode(ptw2arb_opcode),
                        .ptw2arb_addr(ptw2arb_addr),

                        .ptw2arb_rdata({4{dtlb_rdata_stuff,56'b0}}),
                        .ptw2arb_rvalid(ptw2arb_rvalid),
                        .ptw2arb_stall(ptw2arb_stall)
                        );
endmodule