/include/ "am33xx.dtsi"

/include/ "am335x-bone-common.dtsi"

&am33xx_pinmux {
  card0_pins: pinmux_card0_pins {
    pinctrl-single,pins = <
      0x78 0x7
      0x40 0x27
      0x44 0x27
    >;
  };
  card1_pins: pinmux_card1_pins {
    pinctrl-single,pins = <
      0x164 0x7
      0x19c 0x00
      0x1a4 0x27
    >;
  };
  card2_pins: pinmux_card2_pins {
    pinctrl-single,pins = <
      0x34 0x7
      0x18 0x27
      0x3c 0x27
    >;
  };
};

&spi0 {
  status = "okay";
  pinctrl-names = "default";
  pinctrl-0 = <&spi0_pins_s0>;

  dbcard@0 {
		compatible = "dbbroadcast,r0005spi";
    spi-max-frequency = <24000000>;
    reg = <0>;
    pinctrl-names = "default";
    pinctrl-0 = <&card0_pins>;
    card = <0>;
    fpga-int = <&gpio2 28 0>;
    read-latch = <&gpio2 16 0>;
    write-latch = <&gpio2 17 0>;
	};
  dbcard@1 {
    compatible = "dbbroadcast,r0005spi";
		spi-max-frequency = <24000000>;
    reg = <1>;
    pinctrl-names = "default";
    pinctrl-0 = <&card1_pins>;
    fpga-int = <&gpio1 7 0>;
    read-latch = <&gpio4 21 0>;
    write-latch = <&gpio4 19 0>;
    card = <1>;
	};
};

&spi1 {
  status = "okay";
  pinctrl-names = "default";
  pinctrl-0 = <&spi1_pins_s0>;

  dbcard@0 {
		compatible = "dbbroadcast,r0005spi";
		spi-max-frequency = <24000000>;
    reg = <0>;
    pinctrl-names = "default";
    pinctrl-0 = <&card2_pins>;
    card = <2>;
    fpga-int = <&gpio2 13 0>;
    read-latch = <&gpio2 6 0>;
    write-latch = <&gpio2 15 0>;
	};
};