DDR Version 1.04 20130517
In
SRX
DDR3
3 222MHz
Bus Width=32 Col=10 Bank=8 Row=16 CS=1 Die Bus-Width=8 Size=2048MB
OUT


U-Boot 2014.01-g265c80e-dirty (Sep 15 2014 - 19:53:30)

CPU:	RK3188
Board:	RK30xx platform Board
total reserving memory(except stack) is :48m
DRAM:  1 GiB
arch_interrupt_init
DMAInit: OK
SdmmcInit=0 0
FwPartOffset=2000 , 0
storage init OK!
Using default environment

In:    serial
Out:   serial
Err:   serial
board_late_init
unsigned!
SecureBootEn = 0 0
data abort

    MAYBE you should read doc/README.arm-unaligned-accesses

pc : [<9d1b0db8>]	   lr : [<9d1b5438>]
sp : 9d0958a8  ip : 9d095aa8	 fp : 60000240
r10: 60012f80  r9 : 9d0a6b28	 r8 : 10080228
r7 : 00000133  r6 : 9d1c1efd	 r5 : 00000200  r4 : 9d401820
r3 : 9d1c1eed  r2 : fcdc8c3b	 r1 : 00000200  r0 : 9d401820
Flags: nZCv  IRQs on  FIQs off  Mode SVC_32
Resetting CPU ...

resetting ...