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Oct 25th, 2019
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  1. Blink.ino.elf: file format elf32-littlearm
  2.  
  3.  
  4. Disassembly of section .text:
  5.  
  6. 00000000 <g_pfnVectors>:
  7. 0: 00 00 04 20 35 02 00 00 2d 02 00 00 2f 02 00 00 ... 5...-.../...
  8. 10: 31 02 00 00 31 02 00 00 31 02 00 00 00 00 00 00 1...1...1.......
  9. ...
  10. 2c: 31 02 00 00 31 02 00 00 00 00 00 00 31 02 00 00 1...1.......1...
  11. 3c: a5 03 00 00 e1 04 00 00 f1 04 00 00 01 05 00 00 ................
  12. 4c: 11 05 00 00 21 05 00 00 cf 02 00 00 d1 02 00 00 ....!...........
  13. 5c: 31 02 00 00 31 02 00 00 31 02 00 00 31 02 00 00 1...1...1...1...
  14. 6c: 31 02 00 00 31 02 00 00 31 02 00 00 31 02 00 00 1...1...1...1...
  15. 7c: 31 02 00 00 31 02 00 00 31 02 00 00 31 02 00 00 1...1...1...1...
  16. 8c: 31 02 00 00 31 02 00 00 31 02 00 00 31 02 00 00 1...1...1...1...
  17. 9c: 31 02 00 00 31 02 00 00 31 02 00 00 31 02 00 00 1...1...1...1...
  18. ac: 31 02 00 00 31 02 00 00 31 02 00 00 31 05 00 00 1...1...1...1...
  19. bc: 41 05 00 00 51 05 00 00 d3 02 00 00 31 02 00 00 A...Q.......1...
  20. cc: 31 02 00 00 31 02 00 00 31 02 00 00 31 02 00 00 1...1...1...1...
  21. dc: 31 02 00 00 00 00 00 00 31 02 00 00 31 02 00 00 1.......1...1...
  22. ec: 31 02 00 00 31 02 00 00 31 02 00 00 31 02 00 00 1...1...1...1...
  23. fc: 31 02 00 00 31 02 00 00 31 02 00 00 31 02 00 00 1...1...1...1...
  24. 10c: 61 05 00 00 71 05 00 00 81 05 00 00 31 02 00 00 a...q.......1...
  25. 11c: 31 02 00 00 d5 02 00 00 d7 02 00 00 d9 02 00 00 1...............
  26. 12c: db 02 00 00 dd 02 00 00 31 02 00 00 31 02 00 00 ........1...1...
  27. 13c: cd 02 00 00 31 02 00 00 31 02 00 00 31 02 00 00 ....1...1...1...
  28. 14c: 31 02 00 00 00 00 00 00 00 00 00 00 31 02 00 00 1...........1...
  29. 15c: 31 02 00 00 91 05 00 00 a1 05 00 00 00 00 00 00 1...............
  30. 16c: 31 02 00 00 b1 05 00 00 b1 05 00 00 b1 05 00 00 1...............
  31. 17c: b1 05 00 00 b1 05 00 00 b1 05 00 00 b1 05 00 00 ................
  32. 18c: b1 05 00 00 c1 05 00 00 c1 05 00 00 c1 05 00 00 ................
  33. 19c: c1 05 00 00 c1 05 00 00 c1 05 00 00 c1 05 00 00 ................
  34. 1ac: c1 05 00 00 d1 05 00 00 e1 05 00 00 31 02 00 00 ............1...
  35. 1bc: 31 02 00 00 31 02 00 00 31 02 00 00 31 02 00 00 1...1...1...1...
  36. 1cc: 31 02 00 00 31 02 00 00 31 02 00 00 31 02 00 00 1...1...1...1...
  37. 1dc: 31 02 00 00 31 02 00 00 31 02 00 00 31 02 00 00 1...1...1...1...
  38. 1ec: 31 02 00 00 31 02 00 00 31 02 00 00 31 02 00 00 1...1...1...1...
  39. 1fc: f1 05 00 00 ....
  40.  
  41. 00000200 <setup>:
  42. 200: 2101 movs r1, #1
  43. 202: 2051 movs r0, #81 ; 0x51
  44. 204: f000 b8e2 b.w 3cc <pinMode>
  45.  
  46. 00000208 <loop>:
  47. 208: b508 push {r3, lr}
  48. 20a: 2101 movs r1, #1
  49. 20c: 2051 movs r0, #81 ; 0x51
  50. 20e: f000 f931 bl 474 <digitalWrite>
  51. 212: 2032 movs r0, #50 ; 0x32
  52. 214: f000 f892 bl 33c <delay>
  53. 218: 2051 movs r0, #81 ; 0x51
  54. 21a: 2100 movs r1, #0
  55. 21c: f000 f92a bl 474 <digitalWrite>
  56. 220: f44f 70fa mov.w r0, #500 ; 0x1f4
  57. 224: e8bd 4008 ldmia.w sp!, {r3, lr}
  58. 228: f000 b888 b.w 33c <delay>
  59.  
  60. 0000022c <NmiSR>:
  61. 22c: e7fe b.n 22c <NmiSR>
  62.  
  63. 0000022e <FaultISR>:
  64. 22e: e7fe b.n 22e <FaultISR>
  65.  
  66. 00000230 <IntDefaultHandler>:
  67. 230: e7fe b.n 230 <IntDefaultHandler>
  68. ...
  69.  
  70. 00000234 <ResetISR>:
  71. 234: b570 push {r4, r5, r6, lr}
  72. 236: 4a1b ldr r2, [pc, #108] ; (2a4 <ResetISR+0x70>)
  73. 238: 4b1b ldr r3, [pc, #108] ; (2a8 <ResetISR+0x74>)
  74. 23a: 491c ldr r1, [pc, #112] ; (2ac <ResetISR+0x78>)
  75. 23c: 428b cmp r3, r1
  76. 23e: d321 bcc.n 284 <ResetISR+0x50>
  77. 240: 4820 ldr r0, [pc, #128] ; (2c4 <ResetISR+0x90>)
  78. 242: 4921 ldr r1, [pc, #132] ; (2c8 <ResetISR+0x94>)
  79. 244: f04f 0200 mov.w r2, #0
  80. 248: 4288 cmp r0, r1
  81. 24a: bfb8 it lt
  82. 24c: f840 2b04 strlt.w r2, [r0], #4
  83. 250: dbfa blt.n 248 <ResetISR+0x14>
  84. 252: 4a17 ldr r2, [pc, #92] ; (2b0 <ResetISR+0x7c>)
  85. 254: 4e17 ldr r6, [pc, #92] ; (2b4 <ResetISR+0x80>)
  86. 256: 6813 ldr r3, [r2, #0]
  87. 258: 4c17 ldr r4, [pc, #92] ; (2b8 <ResetISR+0x84>)
  88. 25a: f443 0370 orr.w r3, r3, #15728640 ; 0xf00000
  89. 25e: 1ba4 subs r4, r4, r6
  90. 260: 6013 str r3, [r2, #0]
  91. 262: 10a4 asrs r4, r4, #2
  92. 264: 2500 movs r5, #0
  93. 266: 42a5 cmp r5, r4
  94. 268: d111 bne.n 28e <ResetISR+0x5a>
  95. 26a: 4e14 ldr r6, [pc, #80] ; (2bc <ResetISR+0x88>)
  96. 26c: 4c14 ldr r4, [pc, #80] ; (2c0 <ResetISR+0x8c>)
  97. 26e: f000 f9c7 bl 600 <_init>
  98. 272: 1ba4 subs r4, r4, r6
  99. 274: 10a4 asrs r4, r4, #2
  100. 276: 2500 movs r5, #0
  101. 278: 42a5 cmp r5, r4
  102. 27a: d10d bne.n 298 <ResetISR+0x64>
  103. 27c: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
  104. 280: f000 ba6c b.w 75c <main>
  105. 284: f852 0f04 ldr.w r0, [r2, #4]!
  106. 288: f843 0b04 str.w r0, [r3], #4
  107. 28c: e7d6 b.n 23c <ResetISR+0x8>
  108. 28e: f856 3025 ldr.w r3, [r6, r5, lsl #2]
  109. 292: 4798 blx r3
  110. 294: 3501 adds r5, #1
  111. 296: e7e6 b.n 266 <ResetISR+0x32>
  112. 298: f856 3025 ldr.w r3, [r6, r5, lsl #2]
  113. 29c: 4798 blx r3
  114. 29e: 3501 adds r5, #1
  115. 2a0: e7ea b.n 278 <ResetISR+0x44>
  116. 2a2: bf00 nop
  117. 2a4: 00000f64 .word 0x00000f64
  118. 2a8: 20000000 .word 0x20000000
  119. 2ac: 20000000 .word 0x20000000
  120. 2b0: e000ed88 .word 0xe000ed88
  121. 2b4: 00000f68 .word 0x00000f68
  122. 2b8: 00000f68 .word 0x00000f68
  123. 2bc: 00000f68 .word 0x00000f68
  124. 2c0: 00000f68 .word 0x00000f68
  125. 2c4: 20000000 .word 0x20000000
  126. 2c8: 20000264 .word 0x20000264
  127.  
  128. 000002cc <ToneIntHandler>:
  129. 2cc: 4770 bx lr
  130.  
  131. 000002ce <UARTIntHandler>:
  132. 2ce: 4770 bx lr
  133.  
  134. 000002d0 <UARTIntHandler1>:
  135. 2d0: 4770 bx lr
  136.  
  137. 000002d2 <UARTIntHandler2>:
  138. 2d2: 4770 bx lr
  139.  
  140. 000002d4 <UARTIntHandler3>:
  141. 2d4: 4770 bx lr
  142.  
  143. 000002d6 <UARTIntHandler4>:
  144. 2d6: 4770 bx lr
  145.  
  146. 000002d8 <UARTIntHandler5>:
  147. 2d8: 4770 bx lr
  148.  
  149. 000002da <UARTIntHandler6>:
  150. 2da: 4770 bx lr
  151.  
  152. 000002dc <UARTIntHandler7>:
  153. 2dc: 4770 bx lr
  154. ...
  155.  
  156. 000002e0 <timerInit>:
  157. 2e0: b570 push {r4, r5, r6, lr}
  158. 2e2: 4c10 ldr r4, [pc, #64] ; (324 <timerInit+0x44>)
  159. 2e4: 4910 ldr r1, [pc, #64] ; (328 <timerInit+0x48>)
  160. 2e6: 4811 ldr r0, [pc, #68] ; (32c <timerInit+0x4c>)
  161. 2e8: 4d11 ldr r5, [pc, #68] ; (330 <timerInit+0x50>)
  162. 2ea: f000 fb6f bl 9cc <SysCtlClockFreqSet>
  163. 2ee: 6823 ldr r3, [r4, #0]
  164. 2f0: 4810 ldr r0, [pc, #64] ; (334 <timerInit+0x54>)
  165. 2f2: 695b ldr r3, [r3, #20]
  166. 2f4: 4798 blx r3
  167. 2f6: 6823 ldr r3, [r4, #0]
  168. 2f8: 685b ldr r3, [r3, #4]
  169. 2fa: 4798 blx r3
  170. 2fc: 682b ldr r3, [r5, #0]
  171. 2fe: 2180 movs r1, #128 ; 0x80
  172. 300: 200f movs r0, #15
  173. 302: 699b ldr r3, [r3, #24]
  174. 304: 4798 blx r3
  175. 306: 6823 ldr r3, [r4, #0]
  176. 308: 68db ldr r3, [r3, #12]
  177. 30a: 4798 blx r3
  178. 30c: 682b ldr r3, [r5, #0]
  179. 30e: 685b ldr r3, [r3, #4]
  180. 310: 4798 blx r3
  181. 312: 4b09 ldr r3, [pc, #36] ; (338 <timerInit+0x58>)
  182. 314: 681b ldr r3, [r3, #0]
  183. 316: f44f 7080 mov.w r0, #256 ; 0x100
  184. 31a: f8d3 30b4 ldr.w r3, [r3, #180] ; 0xb4
  185. 31e: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
  186. 322: 4718 bx r3
  187. 324: 01000038 .word 0x01000038
  188. 328: 07270e00 .word 0x07270e00
  189. 32c: f1000680 .word 0xf1000680
  190. 330: 01000048 .word 0x01000048
  191. 334: 0001d4c0 .word 0x0001d4c0
  192. 338: 01000044 .word 0x01000044
  193.  
  194. 0000033c <delay>:
  195. 33c: b538 push {r3, r4, r5, lr}
  196. 33e: 0045 lsls r5, r0, #1
  197. 340: 2400 movs r4, #0
  198. 342: 42ac cmp r4, r5
  199. 344: d100 bne.n 348 <delay+0xc>
  200. 346: bd38 pop {r3, r4, r5, pc}
  201. 348: f44f 70fa mov.w r0, #500 ; 0x1f4
  202. 34c: f000 f802 bl 354 <delayMicroseconds>
  203. 350: 3401 adds r4, #1
  204. 352: e7f6 b.n 342 <delay+0x6>
  205.  
  206. 00000354 <delayMicroseconds>:
  207. 354: f5b0 7f7a cmp.w r0, #1000 ; 0x3e8
  208. 358: b573 push {r0, r1, r4, r5, r6, lr}
  209. 35a: 4604 mov r4, r0
  210. 35c: d308 bcc.n 370 <delayMicroseconds+0x1c>
  211. 35e: f44f 767a mov.w r6, #1000 ; 0x3e8
  212. 362: fbb0 f5f6 udiv r5, r0, r6
  213. 366: 4628 mov r0, r5
  214. 368: f7ff ffe8 bl 33c <delay>
  215. 36c: fb06 4415 mls r4, r6, r5, r4
  216. 370: 4b0b ldr r3, [pc, #44] ; (3a0 <delayMicroseconds+0x4c>)
  217. 372: 490b ldr r1, [pc, #44] ; (3a0 <delayMicroseconds+0x4c>)
  218. 374: 681a ldr r2, [r3, #0]
  219. 376: 2078 movs r0, #120 ; 0x78
  220. 378: 4360 muls r0, r4
  221. 37a: f022 427f bic.w r2, r2, #4278190080 ; 0xff000000
  222. 37e: 4282 cmp r2, r0
  223. 380: bf3e ittt cc
  224. 382: f500 007e addcc.w r0, r0, #16646144 ; 0xfe0000
  225. 386: f500 502c addcc.w r0, r0, #11008 ; 0x2b00
  226. 38a: 303f addcc r0, #63 ; 0x3f
  227. 38c: 680b ldr r3, [r1, #0]
  228. 38e: 1ad3 subs r3, r2, r3
  229. 390: f023 437f bic.w r3, r3, #4278190080 ; 0xff000000
  230. 394: 9301 str r3, [sp, #4]
  231. 396: 9b01 ldr r3, [sp, #4]
  232. 398: 4298 cmp r0, r3
  233. 39a: d2f7 bcs.n 38c <delayMicroseconds+0x38>
  234. 39c: b002 add sp, #8
  235. 39e: bd70 pop {r4, r5, r6, pc}
  236. 3a0: e000e018 .word 0xe000e018
  237.  
  238. 000003a4 <SysTickIntHandler>:
  239. 3a4: 4a07 ldr r2, [pc, #28] ; (3c4 <SysTickIntHandler+0x20>)
  240. 3a6: b538 push {r3, r4, r5, lr}
  241. 3a8: 6813 ldr r3, [r2, #0]
  242. 3aa: 4d07 ldr r5, [pc, #28] ; (3c8 <SysTickIntHandler+0x24>)
  243. 3ac: 3301 adds r3, #1
  244. 3ae: 6013 str r3, [r2, #0]
  245. 3b0: 2400 movs r4, #0
  246. 3b2: f855 3024 ldr.w r3, [r5, r4, lsl #2]
  247. 3b6: b10b cbz r3, 3bc <SysTickIntHandler+0x18>
  248. 3b8: 2001 movs r0, #1
  249. 3ba: 4798 blx r3
  250. 3bc: 3401 adds r4, #1
  251. 3be: 2c08 cmp r4, #8
  252. 3c0: d1f7 bne.n 3b2 <SysTickIntHandler+0xe>
  253. 3c2: bd38 pop {r3, r4, r5, pc}
  254. 3c4: 20000020 .word 0x20000020
  255. 3c8: 20000000 .word 0x20000000
  256.  
  257. 000003cc <pinMode>:
  258. 3cc: 4b24 ldr r3, [pc, #144] ; (460 <pinMode+0x94>)
  259. 3ce: 5c1b ldrb r3, [r3, r0]
  260. 3d0: b570 push {r4, r5, r6, lr}
  261. 3d2: 2b00 cmp r3, #0
  262. 3d4: d043 beq.n 45e <pinMode+0x92>
  263. 3d6: 4a23 ldr r2, [pc, #140] ; (464 <pinMode+0x98>)
  264. 3d8: 5c15 ldrb r5, [r2, r0]
  265. 3da: 4a23 ldr r2, [pc, #140] ; (468 <pinMode+0x9c>)
  266. 3dc: f852 4023 ldr.w r4, [r2, r3, lsl #2]
  267. 3e0: 4b22 ldr r3, [pc, #136] ; (46c <pinMode+0xa0>)
  268. 3e2: b931 cbnz r1, 3f2 <pinMode+0x26>
  269. 3e4: 681b ldr r3, [r3, #0]
  270. 3e6: 6b9b ldr r3, [r3, #56] ; 0x38
  271. 3e8: 4629 mov r1, r5
  272. 3ea: 4620 mov r0, r4
  273. 3ec: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr}
  274. 3f0: 4718 bx r3
  275. 3f2: 2902 cmp r1, #2
  276. 3f4: d11c bne.n 430 <pinMode+0x64>
  277. 3f6: 4a1e ldr r2, [pc, #120] ; (470 <pinMode+0xa4>)
  278. 3f8: f8c4 2520 str.w r2, [r4, #1312] ; 0x520
  279. 3fc: f8d4 2524 ldr.w r2, [r4, #1316] ; 0x524
  280. 400: 432a orrs r2, r5
  281. 402: f8c4 2524 str.w r2, [r4, #1316] ; 0x524
  282. 406: 2200 movs r2, #0
  283. 408: f8c4 2520 str.w r2, [r4, #1312] ; 0x520
  284. 40c: 681b ldr r3, [r3, #0]
  285. 40e: 4629 mov r1, r5
  286. 410: 685b ldr r3, [r3, #4]
  287. 412: 4620 mov r0, r4
  288. 414: 4798 blx r3
  289. 416: 230a movs r3, #10
  290. 418: 4629 mov r1, r5
  291. 41a: 2201 movs r2, #1
  292. 41c: 4620 mov r0, r4
  293. 41e: f000 f9f9 bl 814 <GPIOPadConfigSet>
  294. 422: f8d4 3524 ldr.w r3, [r4, #1316] ; 0x524
  295. 426: ea23 0505 bic.w r5, r3, r5
  296. 42a: f8c4 5524 str.w r5, [r4, #1316] ; 0x524
  297. 42e: bd70 pop {r4, r5, r6, pc}
  298. 430: 2903 cmp r1, #3
  299. 432: d111 bne.n 458 <pinMode+0x8c>
  300. 434: 4a0e ldr r2, [pc, #56] ; (470 <pinMode+0xa4>)
  301. 436: f8c4 2520 str.w r2, [r4, #1312] ; 0x520
  302. 43a: f8d4 2524 ldr.w r2, [r4, #1316] ; 0x524
  303. 43e: 432a orrs r2, r5
  304. 440: f8c4 2524 str.w r2, [r4, #1316] ; 0x524
  305. 444: 2200 movs r2, #0
  306. 446: f8c4 2520 str.w r2, [r4, #1312] ; 0x520
  307. 44a: 681b ldr r3, [r3, #0]
  308. 44c: 4629 mov r1, r5
  309. 44e: 685b ldr r3, [r3, #4]
  310. 450: 4620 mov r0, r4
  311. 452: 4798 blx r3
  312. 454: 230c movs r3, #12
  313. 456: e7df b.n 418 <pinMode+0x4c>
  314. 458: 681b ldr r3, [r3, #0]
  315. 45a: 6bdb ldr r3, [r3, #60] ; 0x3c
  316. 45c: e7c4 b.n 3e8 <pinMode+0x1c>
  317. 45e: bd70 pop {r4, r5, r6, pc}
  318. 460: 00000c74 .word 0x00000c74
  319. 464: 00000c14 .word 0x00000c14
  320. 468: 00000cd4 .word 0x00000cd4
  321. 46c: 01000020 .word 0x01000020
  322. 470: 4c4f434b .word 0x4c4f434b
  323.  
  324. 00000474 <digitalWrite>:
  325. 474: 4b0a ldr r3, [pc, #40] ; (4a0 <digitalWrite+0x2c>)
  326. 476: b430 push {r4, r5}
  327. 478: 5c1c ldrb r4, [r3, r0]
  328. 47a: 4b0a ldr r3, [pc, #40] ; (4a4 <digitalWrite+0x30>)
  329. 47c: 5c1b ldrb r3, [r3, r0]
  330. 47e: 2900 cmp r1, #0
  331. 480: bf14 ite ne
  332. 482: 4622 movne r2, r4
  333. 484: 2200 moveq r2, #0
  334. 486: b14b cbz r3, 49c <digitalWrite+0x28>
  335. 488: 4907 ldr r1, [pc, #28] ; (4a8 <digitalWrite+0x34>)
  336. 48a: 4808 ldr r0, [pc, #32] ; (4ac <digitalWrite+0x38>)
  337. 48c: 6809 ldr r1, [r1, #0]
  338. 48e: f850 0023 ldr.w r0, [r0, r3, lsl #2]
  339. 492: 680d ldr r5, [r1, #0]
  340. 494: 4621 mov r1, r4
  341. 496: 462b mov r3, r5
  342. 498: bc30 pop {r4, r5}
  343. 49a: 4718 bx r3
  344. 49c: bc30 pop {r4, r5}
  345. 49e: 4770 bx lr
  346. 4a0: 00000c14 .word 0x00000c14
  347. 4a4: 00000c74 .word 0x00000c74
  348. 4a8: 01000020 .word 0x01000020
  349. 4ac: 00000cd4 .word 0x00000cd4
  350.  
  351. 000004b0 <GPIOXIntHandler>:
  352. 4b0: b570 push {r4, r5, r6, lr}
  353. 4b2: 460e mov r6, r1
  354. 4b4: 2101 movs r1, #1
  355. 4b6: 4604 mov r4, r0
  356. 4b8: f000 fa44 bl 944 <GPIOIntStatus>
  357. 4bc: 4601 mov r1, r0
  358. 4be: 4605 mov r5, r0
  359. 4c0: 4620 mov r0, r4
  360. 4c2: f000 fa46 bl 952 <GPIOIntClear>
  361. 4c6: 2400 movs r4, #0
  362. 4c8: 07eb lsls r3, r5, #31
  363. 4ca: d503 bpl.n 4d4 <GPIOXIntHandler+0x24>
  364. 4cc: f856 3024 ldr.w r3, [r6, r4, lsl #2]
  365. 4d0: b103 cbz r3, 4d4 <GPIOXIntHandler+0x24>
  366. 4d2: 4798 blx r3
  367. 4d4: 3401 adds r4, #1
  368. 4d6: 2c08 cmp r4, #8
  369. 4d8: ea4f 0555 mov.w r5, r5, lsr #1
  370. 4dc: d1f4 bne.n 4c8 <GPIOXIntHandler+0x18>
  371. 4de: bd70 pop {r4, r5, r6, pc}
  372.  
  373. 000004e0 <GPIOAIntHandler>:
  374. 4e0: 4902 ldr r1, [pc, #8] ; (4ec <GPIOAIntHandler+0xc>)
  375. 4e2: f04f 2040 mov.w r0, #1073758208 ; 0x40004000
  376. 4e6: f7ff bfe3 b.w 4b0 <GPIOXIntHandler>
  377. 4ea: bf00 nop
  378. 4ec: 20000024 .word 0x20000024
  379.  
  380. 000004f0 <GPIOBIntHandler>:
  381. 4f0: 4901 ldr r1, [pc, #4] ; (4f8 <GPIOBIntHandler+0x8>)
  382. 4f2: 4802 ldr r0, [pc, #8] ; (4fc <GPIOBIntHandler+0xc>)
  383. 4f4: f7ff bfdc b.w 4b0 <GPIOXIntHandler>
  384. 4f8: 20000044 .word 0x20000044
  385. 4fc: 40005000 .word 0x40005000
  386.  
  387. 00000500 <GPIOCIntHandler>:
  388. 500: 4901 ldr r1, [pc, #4] ; (508 <GPIOCIntHandler+0x8>)
  389. 502: 4802 ldr r0, [pc, #8] ; (50c <GPIOCIntHandler+0xc>)
  390. 504: f7ff bfd4 b.w 4b0 <GPIOXIntHandler>
  391. 508: 20000064 .word 0x20000064
  392. 50c: 40006000 .word 0x40006000
  393.  
  394. 00000510 <GPIODIntHandler>:
  395. 510: 4901 ldr r1, [pc, #4] ; (518 <GPIODIntHandler+0x8>)
  396. 512: 4802 ldr r0, [pc, #8] ; (51c <GPIODIntHandler+0xc>)
  397. 514: f7ff bfcc b.w 4b0 <GPIOXIntHandler>
  398. 518: 20000084 .word 0x20000084
  399. 51c: 40007000 .word 0x40007000
  400.  
  401. 00000520 <GPIOEIntHandler>:
  402. 520: 4901 ldr r1, [pc, #4] ; (528 <GPIOEIntHandler+0x8>)
  403. 522: 4802 ldr r0, [pc, #8] ; (52c <GPIOEIntHandler+0xc>)
  404. 524: f7ff bfc4 b.w 4b0 <GPIOXIntHandler>
  405. 528: 200000a4 .word 0x200000a4
  406. 52c: 40024000 .word 0x40024000
  407.  
  408. 00000530 <GPIOFIntHandler>:
  409. 530: 4901 ldr r1, [pc, #4] ; (538 <GPIOFIntHandler+0x8>)
  410. 532: 4802 ldr r0, [pc, #8] ; (53c <GPIOFIntHandler+0xc>)
  411. 534: f7ff bfbc b.w 4b0 <GPIOXIntHandler>
  412. 538: 200000c4 .word 0x200000c4
  413. 53c: 40025000 .word 0x40025000
  414.  
  415. 00000540 <GPIOGIntHandler>:
  416. 540: 4901 ldr r1, [pc, #4] ; (548 <GPIOGIntHandler+0x8>)
  417. 542: 4802 ldr r0, [pc, #8] ; (54c <GPIOGIntHandler+0xc>)
  418. 544: f7ff bfb4 b.w 4b0 <GPIOXIntHandler>
  419. 548: 200000e4 .word 0x200000e4
  420. 54c: 40026000 .word 0x40026000
  421.  
  422. 00000550 <GPIOHIntHandler>:
  423. 550: 4901 ldr r1, [pc, #4] ; (558 <GPIOHIntHandler+0x8>)
  424. 552: 4802 ldr r0, [pc, #8] ; (55c <GPIOHIntHandler+0xc>)
  425. 554: f7ff bfac b.w 4b0 <GPIOXIntHandler>
  426. 558: 20000104 .word 0x20000104
  427. 55c: 40027000 .word 0x40027000
  428.  
  429. 00000560 <GPIOJIntHandler>:
  430. 560: 4901 ldr r1, [pc, #4] ; (568 <GPIOJIntHandler+0x8>)
  431. 562: 4802 ldr r0, [pc, #8] ; (56c <GPIOJIntHandler+0xc>)
  432. 564: f7ff bfa4 b.w 4b0 <GPIOXIntHandler>
  433. 568: 20000124 .word 0x20000124
  434. 56c: 4003d000 .word 0x4003d000
  435.  
  436. 00000570 <GPIOKIntHandler>:
  437. 570: 4901 ldr r1, [pc, #4] ; (578 <GPIOKIntHandler+0x8>)
  438. 572: 4802 ldr r0, [pc, #8] ; (57c <GPIOKIntHandler+0xc>)
  439. 574: f7ff bf9c b.w 4b0 <GPIOXIntHandler>
  440. 578: 20000144 .word 0x20000144
  441. 57c: 40061000 .word 0x40061000
  442.  
  443. 00000580 <GPIOLIntHandler>:
  444. 580: 4901 ldr r1, [pc, #4] ; (588 <GPIOLIntHandler+0x8>)
  445. 582: 4802 ldr r0, [pc, #8] ; (58c <GPIOLIntHandler+0xc>)
  446. 584: f7ff bf94 b.w 4b0 <GPIOXIntHandler>
  447. 588: 20000164 .word 0x20000164
  448. 58c: 40062000 .word 0x40062000
  449.  
  450. 00000590 <GPIOMIntHandler>:
  451. 590: 4901 ldr r1, [pc, #4] ; (598 <GPIOMIntHandler+0x8>)
  452. 592: 4802 ldr r0, [pc, #8] ; (59c <GPIOMIntHandler+0xc>)
  453. 594: f7ff bf8c b.w 4b0 <GPIOXIntHandler>
  454. 598: 20000184 .word 0x20000184
  455. 59c: 40063000 .word 0x40063000
  456.  
  457. 000005a0 <GPIONIntHandler>:
  458. 5a0: 4901 ldr r1, [pc, #4] ; (5a8 <GPIONIntHandler+0x8>)
  459. 5a2: 4802 ldr r0, [pc, #8] ; (5ac <GPIONIntHandler+0xc>)
  460. 5a4: f7ff bf84 b.w 4b0 <GPIOXIntHandler>
  461. 5a8: 200001a4 .word 0x200001a4
  462. 5ac: 40064000 .word 0x40064000
  463.  
  464. 000005b0 <GPIOPIntHandler>:
  465. 5b0: 4901 ldr r1, [pc, #4] ; (5b8 <GPIOPIntHandler+0x8>)
  466. 5b2: 4802 ldr r0, [pc, #8] ; (5bc <GPIOPIntHandler+0xc>)
  467. 5b4: f7ff bf7c b.w 4b0 <GPIOXIntHandler>
  468. 5b8: 200001c4 .word 0x200001c4
  469. 5bc: 40065000 .word 0x40065000
  470.  
  471. 000005c0 <GPIOQIntHandler>:
  472. 5c0: 4901 ldr r1, [pc, #4] ; (5c8 <GPIOQIntHandler+0x8>)
  473. 5c2: 4802 ldr r0, [pc, #8] ; (5cc <GPIOQIntHandler+0xc>)
  474. 5c4: f7ff bf74 b.w 4b0 <GPIOXIntHandler>
  475. 5c8: 200001e4 .word 0x200001e4
  476. 5cc: 40066000 .word 0x40066000
  477.  
  478. 000005d0 <GPIORIntHandler>:
  479. 5d0: 4901 ldr r1, [pc, #4] ; (5d8 <GPIORIntHandler+0x8>)
  480. 5d2: 4802 ldr r0, [pc, #8] ; (5dc <GPIORIntHandler+0xc>)
  481. 5d4: f7ff bf6c b.w 4b0 <GPIOXIntHandler>
  482. 5d8: 20000204 .word 0x20000204
  483. 5dc: 40067000 .word 0x40067000
  484.  
  485. 000005e0 <GPIOSIntHandler>:
  486. 5e0: 4901 ldr r1, [pc, #4] ; (5e8 <GPIOSIntHandler+0x8>)
  487. 5e2: 4802 ldr r0, [pc, #8] ; (5ec <GPIOSIntHandler+0xc>)
  488. 5e4: f7ff bf64 b.w 4b0 <GPIOXIntHandler>
  489. 5e8: 20000224 .word 0x20000224
  490. 5ec: 40068000 .word 0x40068000
  491.  
  492. 000005f0 <GPIOTIntHandler>:
  493. 5f0: 4901 ldr r1, [pc, #4] ; (5f8 <GPIOTIntHandler+0x8>)
  494. 5f2: 4802 ldr r0, [pc, #8] ; (5fc <GPIOTIntHandler+0xc>)
  495. 5f4: f7ff bf5c b.w 4b0 <GPIOXIntHandler>
  496. 5f8: 20000244 .word 0x20000244
  497. 5fc: 40069000 .word 0x40069000
  498.  
  499. 00000600 <_init>:
  500. 600: 4b3c ldr r3, [pc, #240] ; (6f4 <_init+0xf4>)
  501. 602: 483d ldr r0, [pc, #244] ; (6f8 <_init+0xf8>)
  502. 604: 681b ldr r3, [r3, #0]
  503. 606: b510 push {r4, lr}
  504. 608: 4c3c ldr r4, [pc, #240] ; (6fc <_init+0xfc>)
  505. 60a: 699b ldr r3, [r3, #24]
  506. 60c: 4798 blx r3
  507. 60e: 6823 ldr r3, [r4, #0]
  508. 610: 6c5b ldr r3, [r3, #68] ; 0x44
  509. 612: 4798 blx r3
  510. 614: 2802 cmp r0, #2
  511. 616: d106 bne.n 626 <_init+0x26>
  512. 618: 6823 ldr r3, [r4, #0]
  513. 61a: 6c5b ldr r3, [r3, #68] ; 0x44
  514. 61c: 4798 blx r3
  515. 61e: 2802 cmp r0, #2
  516. 620: d001 beq.n 626 <_init+0x26>
  517. 622: f000 f8cb bl 7bc <EEPROMMassErase>
  518. 626: 4c33 ldr r4, [pc, #204] ; (6f4 <_init+0xf4>)
  519. 628: f7ff fe5a bl 2e0 <timerInit>
  520. 62c: 6823 ldr r3, [r4, #0]
  521. 62e: 4834 ldr r0, [pc, #208] ; (700 <_init+0x100>)
  522. 630: 699b ldr r3, [r3, #24]
  523. 632: 4798 blx r3
  524. 634: 6823 ldr r3, [r4, #0]
  525. 636: 4833 ldr r0, [pc, #204] ; (704 <_init+0x104>)
  526. 638: 699b ldr r3, [r3, #24]
  527. 63a: 4798 blx r3
  528. 63c: 6823 ldr r3, [r4, #0]
  529. 63e: 4832 ldr r0, [pc, #200] ; (708 <_init+0x108>)
  530. 640: 699b ldr r3, [r3, #24]
  531. 642: 4798 blx r3
  532. 644: 6823 ldr r3, [r4, #0]
  533. 646: 4831 ldr r0, [pc, #196] ; (70c <_init+0x10c>)
  534. 648: 699b ldr r3, [r3, #24]
  535. 64a: 4798 blx r3
  536. 64c: 6823 ldr r3, [r4, #0]
  537. 64e: 4830 ldr r0, [pc, #192] ; (710 <_init+0x110>)
  538. 650: 699b ldr r3, [r3, #24]
  539. 652: 4798 blx r3
  540. 654: 6823 ldr r3, [r4, #0]
  541. 656: 482f ldr r0, [pc, #188] ; (714 <_init+0x114>)
  542. 658: 699b ldr r3, [r3, #24]
  543. 65a: 4798 blx r3
  544. 65c: 6823 ldr r3, [r4, #0]
  545. 65e: 482e ldr r0, [pc, #184] ; (718 <_init+0x118>)
  546. 660: 699b ldr r3, [r3, #24]
  547. 662: 4798 blx r3
  548. 664: 6823 ldr r3, [r4, #0]
  549. 666: 482d ldr r0, [pc, #180] ; (71c <_init+0x11c>)
  550. 668: 699b ldr r3, [r3, #24]
  551. 66a: 4798 blx r3
  552. 66c: 6823 ldr r3, [r4, #0]
  553. 66e: 482c ldr r0, [pc, #176] ; (720 <_init+0x120>)
  554. 670: 699b ldr r3, [r3, #24]
  555. 672: 4798 blx r3
  556. 674: 6823 ldr r3, [r4, #0]
  557. 676: 482b ldr r0, [pc, #172] ; (724 <_init+0x124>)
  558. 678: 699b ldr r3, [r3, #24]
  559. 67a: 4798 blx r3
  560. 67c: 6823 ldr r3, [r4, #0]
  561. 67e: 482a ldr r0, [pc, #168] ; (728 <_init+0x128>)
  562. 680: 699b ldr r3, [r3, #24]
  563. 682: 4798 blx r3
  564. 684: 6823 ldr r3, [r4, #0]
  565. 686: 4829 ldr r0, [pc, #164] ; (72c <_init+0x12c>)
  566. 688: 699b ldr r3, [r3, #24]
  567. 68a: 4798 blx r3
  568. 68c: 6823 ldr r3, [r4, #0]
  569. 68e: 4828 ldr r0, [pc, #160] ; (730 <_init+0x130>)
  570. 690: 699b ldr r3, [r3, #24]
  571. 692: 4798 blx r3
  572. 694: 6823 ldr r3, [r4, #0]
  573. 696: 4827 ldr r0, [pc, #156] ; (734 <_init+0x134>)
  574. 698: 699b ldr r3, [r3, #24]
  575. 69a: 4798 blx r3
  576. 69c: 6823 ldr r3, [r4, #0]
  577. 69e: 4826 ldr r0, [pc, #152] ; (738 <_init+0x138>)
  578. 6a0: 699b ldr r3, [r3, #24]
  579. 6a2: 4798 blx r3
  580. 6a4: 6823 ldr r3, [r4, #0]
  581. 6a6: 4825 ldr r0, [pc, #148] ; (73c <_init+0x13c>)
  582. 6a8: 699b ldr r3, [r3, #24]
  583. 6aa: 4798 blx r3
  584. 6ac: 6823 ldr r3, [r4, #0]
  585. 6ae: 4824 ldr r0, [pc, #144] ; (740 <_init+0x140>)
  586. 6b0: 699b ldr r3, [r3, #24]
  587. 6b2: 4798 blx r3
  588. 6b4: 6823 ldr r3, [r4, #0]
  589. 6b6: 4823 ldr r0, [pc, #140] ; (744 <_init+0x144>)
  590. 6b8: 699b ldr r3, [r3, #24]
  591. 6ba: 4798 blx r3
  592. 6bc: 4b22 ldr r3, [pc, #136] ; (748 <_init+0x148>)
  593. 6be: 4a23 ldr r2, [pc, #140] ; (74c <_init+0x14c>)
  594. 6c0: 4923 ldr r1, [pc, #140] ; (750 <_init+0x150>)
  595. 6c2: 601a str r2, [r3, #0]
  596. 6c4: 680b ldr r3, [r1, #0]
  597. 6c6: f043 0301 orr.w r3, r3, #1
  598. 6ca: 600b str r3, [r1, #0]
  599. 6cc: 4b21 ldr r3, [pc, #132] ; (754 <_init+0x154>)
  600. 6ce: 601a str r2, [r3, #0]
  601. 6d0: 4a21 ldr r2, [pc, #132] ; (758 <_init+0x158>)
  602. 6d2: 6813 ldr r3, [r2, #0]
  603. 6d4: f043 0380 orr.w r3, r3, #128 ; 0x80
  604. 6d8: 6013 str r3, [r2, #0]
  605. 6da: 6823 ldr r3, [r4, #0]
  606. 6dc: 2110 movs r1, #16
  607. 6de: 4608 mov r0, r1
  608. 6e0: f8d3 30bc ldr.w r3, [r3, #188] ; 0xbc
  609. 6e4: 4798 blx r3
  610. 6e6: f240 1021 movw r0, #289 ; 0x121
  611. 6ea: e8bd 4010 ldmia.w sp!, {r4, lr}
  612. 6ee: f000 b963 b.w 9b8 <SysCtlDeepSleepPowerSet>
  613. 6f2: bf00 nop
  614. 6f4: 01000044 .word 0x01000044
  615. 6f8: f0005800 .word 0xf0005800
  616. 6fc: 01000070 .word 0x01000070
  617. 700: f0000800 .word 0xf0000800
  618. 704: f0000801 .word 0xf0000801
  619. 708: f0000802 .word 0xf0000802
  620. 70c: f0000803 .word 0xf0000803
  621. 710: f0000804 .word 0xf0000804
  622. 714: f0000805 .word 0xf0000805
  623. 718: f0000806 .word 0xf0000806
  624. 71c: f0000807 .word 0xf0000807
  625. 720: f0000808 .word 0xf0000808
  626. 724: f0000809 .word 0xf0000809
  627. 728: f000080a .word 0xf000080a
  628. 72c: f000080b .word 0xf000080b
  629. 730: f000080c .word 0xf000080c
  630. 734: f000080d .word 0xf000080d
  631. 738: f000080e .word 0xf000080e
  632. 73c: f000080f .word 0xf000080f
  633. 740: f0000810 .word 0xf0000810
  634. 744: f0000811 .word 0xf0000811
  635. 748: 40025520 .word 0x40025520
  636. 74c: 4c4f434b .word 0x4c4f434b
  637. 750: 40025524 .word 0x40025524
  638. 754: 40007520 .word 0x40007520
  639. 758: 40007524 .word 0x40007524
  640.  
  641. 0000075c <main>:
  642. 75c: b508 push {r3, lr}
  643. 75e: f7ff fd4f bl 200 <setup>
  644. 762: 4c04 ldr r4, [pc, #16] ; (774 <main+0x18>)
  645. 764: f7ff fd50 bl 208 <loop>
  646. 768: 2c00 cmp r4, #0
  647. 76a: d0fb beq.n 764 <main+0x8>
  648. 76c: f3af 8000 nop.w
  649. 770: e7f8 b.n 764 <main+0x8>
  650. 772: bf00 nop
  651. 774: 00000000 .word 0x00000000
  652.  
  653. 00000778 <_EEPROMWaitForDone>:
  654. 778: 4b02 ldr r3, [pc, #8] ; (784 <_EEPROMWaitForDone+0xc>)
  655. 77a: 6818 ldr r0, [r3, #0]
  656. 77c: 07c3 lsls r3, r0, #31
  657. 77e: d4fb bmi.n 778 <_EEPROMWaitForDone>
  658. 780: 4770 bx lr
  659. 782: bf00 nop
  660. 784: 400af018 .word 0x400af018
  661.  
  662. 00000788 <_EEPROMSectorMaskClear>:
  663. 788: b538 push {r3, r4, r5, lr}
  664. 78a: 200a movs r0, #10
  665. 78c: 4c09 ldr r4, [pc, #36] ; (7b4 <_EEPROMSectorMaskClear+0x2c>)
  666. 78e: f000 f919 bl 9c4 <SysCtlDelay>
  667. 792: 2303 movs r3, #3
  668. 794: 6023 str r3, [r4, #0]
  669. 796: 200a movs r0, #10
  670. 798: f000 f914 bl 9c4 <SysCtlDelay>
  671. 79c: 4806 ldr r0, [pc, #24] ; (7b8 <_EEPROMSectorMaskClear+0x30>)
  672. 79e: 2500 movs r5, #0
  673. 7a0: 6005 str r5, [r0, #0]
  674. 7a2: 200a movs r0, #10
  675. 7a4: f000 f90e bl 9c4 <SysCtlDelay>
  676. 7a8: 200a movs r0, #10
  677. 7aa: 6025 str r5, [r4, #0]
  678. 7ac: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
  679. 7b0: f000 b908 b.w 9c4 <SysCtlDelay>
  680. 7b4: 400fd0fc .word 0x400fd0fc
  681. 7b8: 400ae2c0 .word 0x400ae2c0
  682.  
  683. 000007bc <EEPROMMassErase>:
  684. 7bc: 4a0e ldr r2, [pc, #56] ; (7f8 <EEPROMMassErase+0x3c>)
  685. 7be: 480f ldr r0, [pc, #60] ; (7fc <EEPROMMassErase+0x40>)
  686. 7c0: 6811 ldr r1, [r2, #0]
  687. 7c2: b508 push {r3, lr}
  688. 7c4: 4b0e ldr r3, [pc, #56] ; (800 <EEPROMMassErase+0x44>)
  689. 7c6: 400b ands r3, r1
  690. 7c8: 4283 cmp r3, r0
  691. 7ca: d104 bne.n 7d6 <EEPROMMassErase+0x1a>
  692. 7cc: 6812 ldr r2, [r2, #0]
  693. 7ce: b291 uxth r1, r2
  694. 7d0: b909 cbnz r1, 7d6 <EEPROMMassErase+0x1a>
  695. 7d2: f7ff ffd9 bl 788 <_EEPROMSectorMaskClear>
  696. 7d6: 4b0b ldr r3, [pc, #44] ; (804 <EEPROMMassErase+0x48>)
  697. 7d8: 480b ldr r0, [pc, #44] ; (808 <EEPROMMassErase+0x4c>)
  698. 7da: 6018 str r0, [r3, #0]
  699. 7dc: f7ff ffcc bl 778 <_EEPROMWaitForDone>
  700. 7e0: 480a ldr r0, [pc, #40] ; (80c <EEPROMMassErase+0x50>)
  701. 7e2: f000 f8cb bl 97c <SysCtlPeripheralReset>
  702. 7e6: 2002 movs r0, #2
  703. 7e8: f000 f8ec bl 9c4 <SysCtlDelay>
  704. 7ec: f7ff ffc4 bl 778 <_EEPROMWaitForDone>
  705. 7f0: 4a07 ldr r2, [pc, #28] ; (810 <EEPROMMassErase+0x54>)
  706. 7f2: 6810 ldr r0, [r2, #0]
  707. 7f4: bd08 pop {r3, pc}
  708. 7f6: bf00 nop
  709. 7f8: 400fe000 .word 0x400fe000
  710. 7fc: 10050000 .word 0x10050000
  711. 800: 70ff0000 .word 0x70ff0000
  712. 804: 400af080 .word 0x400af080
  713. 808: e37b0001 .word 0xe37b0001
  714. 80c: f0005800 .word 0xf0005800
  715. 810: 400af018 .word 0x400af018
  716.  
  717. 00000814 <GPIOPadConfigSet>:
  718. 814: b5f0 push {r4, r5, r6, r7, lr}
  719. 816: f3c2 1641 ubfx r6, r2, #5, #2
  720. 81a: 2400 movs r4, #0
  721. 81c: fa41 f504 asr.w r5, r1, r4
  722. 820: 07ed lsls r5, r5, #31
  723. 822: d511 bpl.n 848 <GPIOPadConfigSet+0x34>
  724. 824: f8d0 7fc4 ldr.w r7, [r0, #4036] ; 0xfc4
  725. 828: 0065 lsls r5, r4, #1
  726. 82a: f04f 0c03 mov.w ip, #3
  727. 82e: fa0c fc05 lsl.w ip, ip, r5
  728. 832: ea27 070c bic.w r7, r7, ip
  729. 836: f8c0 7fc4 str.w r7, [r0, #4036] ; 0xfc4
  730. 83a: f8d0 7fc4 ldr.w r7, [r0, #4036] ; 0xfc4
  731. 83e: fa06 f505 lsl.w r5, r6, r5
  732. 842: 433d orrs r5, r7
  733. 844: f8c0 5fc4 str.w r5, [r0, #4036] ; 0xfc4
  734. 848: 3401 adds r4, #1
  735. 84a: 2c08 cmp r4, #8
  736. 84c: d1e6 bne.n 81c <GPIOPadConfigSet+0x8>
  737. 84e: f8d0 4500 ldr.w r4, [r0, #1280] ; 0x500
  738. 852: f012 0f01 tst.w r2, #1
  739. 856: f500 65a0 add.w r5, r0, #1280 ; 0x500
  740. 85a: bf14 ite ne
  741. 85c: 430c orrne r4, r1
  742. 85e: 438c biceq r4, r1
  743. 860: 602c str r4, [r5, #0]
  744. 862: f8d0 4504 ldr.w r4, [r0, #1284] ; 0x504
  745. 866: f012 0f02 tst.w r2, #2
  746. 86a: f200 5504 addw r5, r0, #1284 ; 0x504
  747. 86e: bf14 ite ne
  748. 870: 430c orrne r4, r1
  749. 872: 438c biceq r4, r1
  750. 874: 602c str r4, [r5, #0]
  751. 876: f8d0 4508 ldr.w r4, [r0, #1288] ; 0x508
  752. 87a: f012 0f04 tst.w r2, #4
  753. 87e: f500 65a1 add.w r5, r0, #1288 ; 0x508
  754. 882: bf14 ite ne
  755. 884: 430c orrne r4, r1
  756. 886: 438c biceq r4, r1
  757. 888: 602c str r4, [r5, #0]
  758. 88a: f8d0 4518 ldr.w r4, [r0, #1304] ; 0x518
  759. 88e: f012 0f08 tst.w r2, #8
  760. 892: f500 65a3 add.w r5, r0, #1304 ; 0x518
  761. 896: bf14 ite ne
  762. 898: 430c orrne r4, r1
  763. 89a: 438c biceq r4, r1
  764. 89c: 602c str r4, [r5, #0]
  765. 89e: f012 0f10 tst.w r2, #16
  766. 8a2: f8d0 253c ldr.w r2, [r0, #1340] ; 0x53c
  767. 8a6: f200 543c addw r4, r0, #1340 ; 0x53c
  768. 8aa: bf14 ite ne
  769. 8ac: 430a orrne r2, r1
  770. 8ae: 438a biceq r2, r1
  771. 8b0: 6022 str r2, [r4, #0]
  772. 8b2: f8d0 250c ldr.w r2, [r0, #1292] ; 0x50c
  773. 8b6: f013 0f01 tst.w r3, #1
  774. 8ba: f200 540c addw r4, r0, #1292 ; 0x50c
  775. 8be: bf14 ite ne
  776. 8c0: 430a orrne r2, r1
  777. 8c2: 438a biceq r2, r1
  778. 8c4: 6022 str r2, [r4, #0]
  779. 8c6: f8d0 2510 ldr.w r2, [r0, #1296] ; 0x510
  780. 8ca: f013 0f02 tst.w r3, #2
  781. 8ce: f500 64a2 add.w r4, r0, #1296 ; 0x510
  782. 8d2: bf14 ite ne
  783. 8d4: 430a orrne r2, r1
  784. 8d6: 438a biceq r2, r1
  785. 8d8: 6022 str r2, [r4, #0]
  786. 8da: f8d0 2514 ldr.w r2, [r0, #1300] ; 0x514
  787. 8de: f013 0f04 tst.w r3, #4
  788. 8e2: f200 5414 addw r4, r0, #1300 ; 0x514
  789. 8e6: bf14 ite ne
  790. 8e8: 430a orrne r2, r1
  791. 8ea: 438a biceq r2, r1
  792. 8ec: 6022 str r2, [r4, #0]
  793. 8ee: f8d0 251c ldr.w r2, [r0, #1308] ; 0x51c
  794. 8f2: f013 0f08 tst.w r3, #8
  795. 8f6: f200 541c addw r4, r0, #1308 ; 0x51c
  796. 8fa: bf14 ite ne
  797. 8fc: 430a orrne r2, r1
  798. 8fe: 438a biceq r2, r1
  799. 900: 6022 str r2, [r4, #0]
  800. 902: f8d0 2544 ldr.w r2, [r0, #1348] ; 0x544
  801. 906: f413 7f00 tst.w r3, #512 ; 0x200
  802. 90a: f200 5444 addw r4, r0, #1348 ; 0x544
  803. 90e: bf14 ite ne
  804. 910: 430a orrne r2, r1
  805. 912: 438a biceq r2, r1
  806. 914: 6022 str r2, [r4, #0]
  807. 916: f8d0 2540 ldr.w r2, [r0, #1344] ; 0x540
  808. 91a: f413 7f40 tst.w r3, #768 ; 0x300
  809. 91e: f500 64a8 add.w r4, r0, #1344 ; 0x540
  810. 922: bf14 ite ne
  811. 924: 430a orrne r2, r1
  812. 926: 438a biceq r2, r1
  813. 928: 6022 str r2, [r4, #0]
  814. 92a: f500 62a5 add.w r2, r0, #1320 ; 0x528
  815. 92e: b91b cbnz r3, 938 <GPIOPadConfigSet+0x124>
  816. 930: f8d0 0528 ldr.w r0, [r0, #1320] ; 0x528
  817. 934: 4301 orrs r1, r0
  818. 936: e003 b.n 940 <GPIOPadConfigSet+0x12c>
  819. 938: f8d0 3528 ldr.w r3, [r0, #1320] ; 0x528
  820. 93c: ea23 0101 bic.w r1, r3, r1
  821. 940: 6011 str r1, [r2, #0]
  822. 942: bdf0 pop {r4, r5, r6, r7, pc}
  823.  
  824. 00000944 <GPIOIntStatus>:
  825. 944: b111 cbz r1, 94c <GPIOIntStatus+0x8>
  826. 946: f8d0 0418 ldr.w r0, [r0, #1048] ; 0x418
  827. 94a: 4770 bx lr
  828. 94c: f8d0 0414 ldr.w r0, [r0, #1044] ; 0x414
  829. 950: 4770 bx lr
  830.  
  831. 00000952 <GPIOIntClear>:
  832. 952: f8c0 141c str.w r1, [r0, #1052] ; 0x41c
  833. 956: 4770 bx lr
  834.  
  835. 00000958 <_SysCtlMemTimingGet>:
  836. 958: b510 push {r4, lr}
  837. 95a: 2300 movs r3, #0
  838. 95c: 4a06 ldr r2, [pc, #24] ; (978 <_SysCtlMemTimingGet+0x20>)
  839. 95e: f852 1033 ldr.w r1, [r2, r3, lsl #3]
  840. 962: 00dc lsls r4, r3, #3
  841. 964: 4288 cmp r0, r1
  842. 966: d802 bhi.n 96e <_SysCtlMemTimingGet+0x16>
  843. 968: 1910 adds r0, r2, r4
  844. 96a: 6840 ldr r0, [r0, #4]
  845. 96c: bd10 pop {r4, pc}
  846. 96e: 3301 adds r3, #1
  847. 970: 2b06 cmp r3, #6
  848. 972: d1f3 bne.n 95c <_SysCtlMemTimingGet+0x4>
  849. 974: 2000 movs r0, #0
  850. 976: bd10 pop {r4, pc}
  851. 978: 00000ecc .word 0x00000ecc
  852.  
  853. 0000097c <SysCtlPeripheralReset>:
  854. 97c: b2c3 uxtb r3, r0
  855. 97e: f3c0 2007 ubfx r0, r0, #8, #8
  856. 982: 0099 lsls r1, r3, #2
  857. 984: f500 237e add.w r3, r0, #1040384 ; 0xfe000
  858. 988: f041 4284 orr.w r2, r1, #1107296256 ; 0x42000000
  859. 98c: f503 61a0 add.w r1, r3, #1280 ; 0x500
  860. 990: f421 0070 bic.w r0, r1, #15728640 ; 0xf00000
  861. 994: ea42 1040 orr.w r0, r2, r0, lsl #5
  862. 998: 2201 movs r2, #1
  863. 99a: b082 sub sp, #8
  864. 99c: 6002 str r2, [r0, #0]
  865. 99e: 2300 movs r3, #0
  866. 9a0: 9301 str r3, [sp, #4]
  867. 9a2: 9b01 ldr r3, [sp, #4]
  868. 9a4: 2b0f cmp r3, #15
  869. 9a6: d802 bhi.n 9ae <SysCtlPeripheralReset+0x32>
  870. 9a8: 9a01 ldr r2, [sp, #4]
  871. 9aa: 1c53 adds r3, r2, #1
  872. 9ac: e7f8 b.n 9a0 <SysCtlPeripheralReset+0x24>
  873. 9ae: 2100 movs r1, #0
  874. 9b0: 6001 str r1, [r0, #0]
  875. 9b2: b002 add sp, #8
  876. 9b4: 4770 bx lr
  877. ...
  878.  
  879. 000009b8 <SysCtlDeepSleepPowerSet>:
  880. 9b8: 4b01 ldr r3, [pc, #4] ; (9c0 <SysCtlDeepSleepPowerSet+0x8>)
  881. 9ba: 6018 str r0, [r3, #0]
  882. 9bc: 4770 bx lr
  883. 9be: bf00 nop
  884. 9c0: 400fe18c .word 0x400fe18c
  885.  
  886. 000009c4 <SysCtlDelay>:
  887. 9c4: 3801 subs r0, #1
  888. 9c6: f47f affd bne.w 9c4 <SysCtlDelay>
  889. 9ca: 4770 bx lr
  890.  
  891. 000009cc <SysCtlClockFreqSet>:
  892. 9cc: 4b7f ldr r3, [pc, #508] ; (bcc <SysCtlClockFreqSet+0x200>)
  893. 9ce: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
  894. 9d2: 681a ldr r2, [r3, #0]
  895. 9d4: 4b7e ldr r3, [pc, #504] ; (bd0 <SysCtlClockFreqSet+0x204>)
  896. 9d6: 460c mov r4, r1
  897. 9d8: 497e ldr r1, [pc, #504] ; (bd4 <SysCtlClockFreqSet+0x208>)
  898. 9da: 4011 ands r1, r2
  899. 9dc: 4299 cmp r1, r3
  900. 9de: d101 bne.n 9e4 <SysCtlClockFreqSet+0x18>
  901. 9e0: 2400 movs r4, #0
  902. 9e2: e0ef b.n bc4 <SysCtlClockFreqSet+0x1f8>
  903. 9e4: f000 0338 and.w r3, r0, #56 ; 0x38
  904. 9e8: 2b10 cmp r3, #16
  905. 9ea: d024 beq.n a36 <SysCtlClockFreqSet+0x6a>
  906. 9ec: 2b30 cmp r3, #48 ; 0x30
  907. 9ee: f3c0 1784 ubfx r7, r0, #6, #5
  908. 9f2: d024 beq.n a3e <SysCtlClockFreqSet+0x72>
  909. 9f4: 2b38 cmp r3, #56 ; 0x38
  910. 9f6: d027 beq.n a48 <SysCtlClockFreqSet+0x7c>
  911. 9f8: bb5b cbnz r3, a52 <SysCtlClockFreqSet+0x86>
  912. 9fa: f1a7 0209 sub.w r2, r7, #9
  913. 9fe: 2a11 cmp r2, #17
  914. a00: d8ee bhi.n 9e0 <SysCtlClockFreqSet+0x14>
  915. a02: 4975 ldr r1, [pc, #468] ; (bd8 <SysCtlClockFreqSet+0x20c>)
  916. a04: 4e75 ldr r6, [pc, #468] ; (bdc <SysCtlClockFreqSet+0x210>)
  917. a06: 680a ldr r2, [r1, #0]
  918. a08: f856 6027 ldr.w r6, [r6, r7, lsl #2]
  919. a0c: f022 021c bic.w r2, r2, #28
  920. a10: 2f06 cmp r7, #6
  921. a12: bfc8 it gt
  922. a14: f042 0210 orrgt.w r2, r2, #16
  923. a18: 600a str r2, [r1, #0]
  924. a1a: f44f 2200 mov.w r2, #524288 ; 0x80000
  925. a1e: 4970 ldr r1, [pc, #448] ; (be0 <SysCtlClockFreqSet+0x214>)
  926. a20: 6809 ldr r1, [r1, #0]
  927. a22: 05c9 lsls r1, r1, #23
  928. a24: d402 bmi.n a2c <SysCtlClockFreqSet+0x60>
  929. a26: 3a01 subs r2, #1
  930. a28: d1f9 bne.n a1e <SysCtlClockFreqSet+0x52>
  931. a2a: e7d9 b.n 9e0 <SysCtlClockFreqSet+0x14>
  932. a2c: 2a00 cmp r2, #0
  933. a2e: d0d7 beq.n 9e0 <SysCtlClockFreqSet+0x14>
  934. a30: f04f 754c mov.w r5, #53477376 ; 0x3300000
  935. a34: e00f b.n a56 <SysCtlClockFreqSet+0x8a>
  936. a36: 2500 movs r5, #0
  937. a38: 4e6a ldr r6, [pc, #424] ; (be4 <SysCtlClockFreqSet+0x218>)
  938. a3a: 2715 movs r7, #21
  939. a3c: e00b b.n a56 <SysCtlClockFreqSet+0x8a>
  940. a3e: f44f 1500 mov.w r5, #2097152 ; 0x200000
  941. a42: f247 5630 movw r6, #30000 ; 0x7530
  942. a46: e006 b.n a56 <SysCtlClockFreqSet+0x8a>
  943. a48: f44f 0580 mov.w r5, #4194304 ; 0x400000
  944. a4c: f44f 4600 mov.w r6, #32768 ; 0x8000
  945. a50: e001 b.n a56 <SysCtlClockFreqSet+0x8a>
  946. a52: 2500 movs r5, #0
  947. a54: 462e mov r6, r5
  948. a56: f410 5f60 tst.w r0, #14336 ; 0x3800
  949. a5a: d17a bne.n b52 <SysCtlClockFreqSet+0x186>
  950. a5c: b10b cbz r3, a62 <SysCtlClockFreqSet+0x96>
  951. a5e: 2b10 cmp r3, #16
  952. a60: d1be bne.n 9e0 <SysCtlClockFreqSet+0x14>
  953. a62: f3c0 6a02 ubfx sl, r0, #24, #3
  954. a66: 4860 ldr r0, [pc, #384] ; (be8 <SysCtlClockFreqSet+0x21c>)
  955. a68: f8df 919c ldr.w r9, [pc, #412] ; c08 <SysCtlClockFreqSet+0x23c>
  956. a6c: f8df 819c ldr.w r8, [pc, #412] ; c0c <SysCtlClockFreqSet+0x240>
  957. a70: f7ff ff72 bl 958 <_SysCtlMemTimingGet>
  958. a74: f8c9 0000 str.w r0, [r9]
  959. a78: f8d8 0000 ldr.w r0, [r8]
  960. a7c: 495b ldr r1, [pc, #364] ; (bec <SysCtlClockFreqSet+0x220>)
  961. a7e: 4b5c ldr r3, [pc, #368] ; (bf0 <SysCtlClockFreqSet+0x224>)
  962. a80: 4001 ands r1, r0
  963. a82: f041 4200 orr.w r2, r1, #2147483648 ; 0x80000000
  964. a86: f853 102a ldr.w r1, [r3, sl, lsl #2]
  965. a8a: f8c8 2000 str.w r2, [r8]
  966. a8e: 1e60 subs r0, r4, #1
  967. a90: 1842 adds r2, r0, r1
  968. a92: f8d8 0000 ldr.w r0, [r8]
  969. a96: 21d8 movs r1, #216 ; 0xd8
  970. a98: 3f09 subs r7, #9
  971. a9a: ea45 0300 orr.w r3, r5, r0
  972. a9e: fbb2 f4f4 udiv r4, r2, r4
  973. aa2: fb01 f00a mul.w r0, r1, sl
  974. aa6: 4a53 ldr r2, [pc, #332] ; (bf4 <SysCtlClockFreqSet+0x228>)
  975. aa8: f8c8 3000 str.w r3, [r8]
  976. aac: f04f 0c0c mov.w ip, #12
  977. ab0: fb0c 0a07 mla sl, ip, r7, r0
  978. ab4: eb02 070a add.w r7, r2, sl
  979. ab8: 4b4f ldr r3, [pc, #316] ; (bf8 <SysCtlClockFreqSet+0x22c>)
  980. aba: 6879 ldr r1, [r7, #4]
  981. abc: f852 200a ldr.w r2, [r2, sl]
  982. ac0: 6019 str r1, [r3, #0]
  983. ac2: 6818 ldr r0, [r3, #0]
  984. ac4: 3c01 subs r4, #1
  985. ac6: ea40 2704 orr.w r7, r0, r4, lsl #8
  986. aca: 601f str r7, [r3, #0]
  987. acc: 4f4b ldr r7, [pc, #300] ; (bfc <SysCtlClockFreqSet+0x230>)
  988. ace: 6839 ldr r1, [r7, #0]
  989. ad0: f401 0000 and.w r0, r1, #8388608 ; 0x800000
  990. ad4: ea40 0402 orr.w r4, r0, r2
  991. ad8: 603c str r4, [r7, #0]
  992. ada: 6839 ldr r1, [r7, #0]
  993. adc: 4a48 ldr r2, [pc, #288] ; (c00 <SysCtlClockFreqSet+0x234>)
  994. ade: 6838 ldr r0, [r7, #0]
  995. ae0: 400a ands r2, r1
  996. ae2: 6819 ldr r1, [r3, #0]
  997. ae4: 681b ldr r3, [r3, #0]
  998. ae6: f003 041f and.w r4, r3, #31
  999. aea: 1c63 adds r3, r4, #1
  1000. aec: fbb6 f6f3 udiv r6, r6, r3
  1001. af0: 0580 lsls r0, r0, #22
  1002. af2: 0bd3 lsrs r3, r2, #15
  1003. af4: 0d84 lsrs r4, r0, #22
  1004. af6: fb03 f006 mul.w r0, r3, r6
  1005. afa: 015b lsls r3, r3, #5
  1006. afc: ebc3 2292 rsb r2, r3, r2, lsr #10
  1007. b00: 4372 muls r2, r6
  1008. b02: 0a93 lsrs r3, r2, #10
  1009. b04: eb03 1050 add.w r0, r3, r0, lsr #5
  1010. b08: f3c1 2104 ubfx r1, r1, #8, #5
  1011. b0c: fb04 0606 mla r6, r4, r6, r0
  1012. b10: 1c4c adds r4, r1, #1
  1013. b12: fbb6 f2f4 udiv r2, r6, r4
  1014. b16: 0854 lsrs r4, r2, #1
  1015. b18: 4620 mov r0, r4
  1016. b1a: f7ff ff1d bl 958 <_SysCtlMemTimingGet>
  1017. b1e: f8c9 0000 str.w r0, [r9]
  1018. b22: 683b ldr r3, [r7, #0]
  1019. b24: 0218 lsls r0, r3, #8
  1020. b26: d506 bpl.n b36 <SysCtlClockFreqSet+0x16a>
  1021. b28: f8d8 2000 ldr.w r2, [r8]
  1022. b2c: f042 4380 orr.w r3, r2, #1073741824 ; 0x40000000
  1023. b30: f8c8 3000 str.w r3, [r8]
  1024. b34: e003 b.n b3e <SysCtlClockFreqSet+0x172>
  1025. b36: 6838 ldr r0, [r7, #0]
  1026. b38: f440 0100 orr.w r1, r0, #8388608 ; 0x800000
  1027. b3c: 6039 str r1, [r7, #0]
  1028. b3e: f44f 4200 mov.w r2, #32768 ; 0x8000
  1029. b42: 4830 ldr r0, [pc, #192] ; (c04 <SysCtlClockFreqSet+0x238>)
  1030. b44: 6801 ldr r1, [r0, #0]
  1031. b46: 07c9 lsls r1, r1, #31
  1032. b48: d433 bmi.n bb2 <SysCtlClockFreqSet+0x1e6>
  1033. b4a: 3a01 subs r2, #1
  1034. b4c: d1f9 bne.n b42 <SysCtlClockFreqSet+0x176>
  1035. b4e: 4614 mov r4, r2
  1036. b50: e029 b.n ba6 <SysCtlClockFreqSet+0x1da>
  1037. b52: 4824 ldr r0, [pc, #144] ; (be4 <SysCtlClockFreqSet+0x218>)
  1038. b54: 4f2c ldr r7, [pc, #176] ; (c08 <SysCtlClockFreqSet+0x23c>)
  1039. b56: f7ff feff bl 958 <_SysCtlMemTimingGet>
  1040. b5a: 6038 str r0, [r7, #0]
  1041. b5c: f8d7 00a0 ldr.w r0, [r7, #160] ; 0xa0
  1042. b60: 4a2a ldr r2, [pc, #168] ; (c0c <SysCtlClockFreqSet+0x240>)
  1043. b62: 4b2b ldr r3, [pc, #172] ; (c10 <SysCtlClockFreqSet+0x244>)
  1044. b64: f420 0100 bic.w r1, r0, #8388608 ; 0x800000
  1045. b68: f8c7 10a0 str.w r1, [r7, #160] ; 0xa0
  1046. b6c: 6817 ldr r7, [r2, #0]
  1047. b6e: 403b ands r3, r7
  1048. b70: f043 4000 orr.w r0, r3, #2147483648 ; 0x80000000
  1049. b74: 6010 str r0, [r2, #0]
  1050. b76: b13c cbz r4, b88 <SysCtlClockFreqSet+0x1bc>
  1051. b78: fbb6 f7f4 udiv r7, r6, r4
  1052. b7c: b107 cbz r7, b80 <SysCtlClockFreqSet+0x1b4>
  1053. b7e: 3f01 subs r7, #1
  1054. b80: 1c7c adds r4, r7, #1
  1055. b82: fbb6 f4f4 udiv r4, r6, r4
  1056. b86: e000 b.n b8a <SysCtlClockFreqSet+0x1be>
  1057. b88: 4627 mov r7, r4
  1058. b8a: 4620 mov r0, r4
  1059. b8c: f7ff fee4 bl 958 <_SysCtlMemTimingGet>
  1060. b90: 491d ldr r1, [pc, #116] ; (c08 <SysCtlClockFreqSet+0x23c>)
  1061. b92: 6008 str r0, [r1, #0]
  1062. b94: f851 2c10 ldr.w r2, [r1, #-16]
  1063. b98: f042 4300 orr.w r3, r2, #2147483648 ; 0x80000000
  1064. b9c: 431d orrs r5, r3
  1065. b9e: ea45 2787 orr.w r7, r5, r7, lsl #10
  1066. ba2: f841 7c10 str.w r7, [r1, #-16]
  1067. ba6: 4b19 ldr r3, [pc, #100] ; (c0c <SysCtlClockFreqSet+0x240>)
  1068. ba8: 6818 ldr r0, [r3, #0]
  1069. baa: f420 0170 bic.w r1, r0, #15728640 ; 0xf00000
  1070. bae: 6019 str r1, [r3, #0]
  1071. bb0: e008 b.n bc4 <SysCtlClockFreqSet+0x1f8>
  1072. bb2: 4b16 ldr r3, [pc, #88] ; (c0c <SysCtlClockFreqSet+0x240>)
  1073. bb4: 6818 ldr r0, [r3, #0]
  1074. bb6: f040 4110 orr.w r1, r0, #2415919104 ; 0x90000000
  1075. bba: f041 0201 orr.w r2, r1, #1
  1076. bbe: 4315 orrs r5, r2
  1077. bc0: 601d str r5, [r3, #0]
  1078. bc2: e7f0 b.n ba6 <SysCtlClockFreqSet+0x1da>
  1079. bc4: 4620 mov r0, r4
  1080. bc6: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
  1081. bca: bf00 nop
  1082. bcc: 400fe000 .word 0x400fe000
  1083. bd0: 10050000 .word 0x10050000
  1084. bd4: 70ff0000 .word 0x70ff0000
  1085. bd8: 400fe07c .word 0x400fe07c
  1086. bdc: 00000efc .word 0x00000efc
  1087. be0: 400fe050 .word 0x400fe050
  1088. be4: 00f42400 .word 0x00f42400
  1089. be8: 017d7840 .word 0x017d7840
  1090. bec: e00ffc00 .word 0xe00ffc00
  1091. bf0: 00000ec4 .word 0x00000ec4
  1092. bf4: 00000d14 .word 0x00000d14
  1093. bf8: 400fe164 .word 0x400fe164
  1094. bfc: 400fe160 .word 0x400fe160
  1095. c00: 000ffc00 .word 0x000ffc00
  1096. c04: 400fe168 .word 0x400fe168
  1097. c08: 400fe0c0 .word 0x400fe0c0
  1098. c0c: 400fe0b0 .word 0x400fe0b0
  1099. c10: ef0003ff .word 0xef0003ff
  1100.  
  1101. 00000c14 <digital_pin_to_bit_mask>:
  1102. c14: 10100000 08204020 04080480 02010408 .... @ .........
  1103. c24: 08040800 01000000 80080402 08201040 ............@. .
  1104. c34: 20010204 04080110 01040002 01201002 ... .......... .
  1105. c44: 40102010 04080802 80208000 10000000 . .@...... .....
  1106. c54: 04020120 80201008 04010240 10200102 ..... .@..... .
  1107. c64: 10010202 40020101 08040201 02018040 .......@....@...
  1108.  
  1109. 00000c74 <digital_pin_to_port>:
  1110. c74: 03050000 04050303 0e020203 04040d0d ................
  1111. c84: 0c080800 05000000 04050505 0b0c0c01 ................
  1112. c94: 0b0b0b0b 0606070b 0e040006 0f04040e ................
  1113. ca4: 0c0d0d0e 0f0f0e0f 0c0e0100 02000000 ................
  1114. cb4: 0a0a0a02 0a01010a 0c08080a 0a0a0c0c ................
  1115. cc4: 060d0d07 04090906 01010101 02020b0b ................
  1116.  
  1117. 00000cd4 <port_to_base>:
  1118. cd4: 00000000 40004000 40005000 40006000 .....@.@.P.@.`.@
  1119. ce4: 40007000 40024000 40025000 40026000 .p.@.@.@.P.@.`.@
  1120. cf4: 40027000 4003d000 40061000 40062000 .p.@...@...@. .@
  1121. d04: 40063000 40064000 40065000 40066000 .0.@.@.@.P.@.`.@
  1122.  
  1123. 00000d14 <g_pppui32XTALtoVCO>:
  1124. d14: 00000040 00000000 00000100 0008003e @...........>...
  1125. d24: 00000000 00000100 000000a0 00000002 ................
  1126. d34: 00000100 00015434 00000000 00000100 ....4T..........
  1127. d44: 0006702b 00000000 00000100 00000028 +p..........(...
  1128. d54: 00000000 00000100 00010027 00000000 ........'.......
  1129. d64: 00000100 00000020 00000000 00000100 .... ...........
  1130. d74: 00000050 00000002 00000100 0000ac1a P...............
  1131. d84: 00000000 00000100 00099417 00000000 ................
  1132. d94: 00000100 00059816 00000000 00000100 ................
  1133. da4: 00000014 00000000 00000100 00088013 ................
  1134. db4: 00000000 00000100 000000a0 00000008 ................
  1135. dc4: 00000100 00000010 00000000 00000100 ................
  1136. dd4: 00000028 00000002 00000100 00000040 (...........@...
  1137. de4: 00000004 00000100 00000060 00000000 ........`.......
  1138. df4: 00000100 000c005d 00000000 00000100 ....]...........
  1139. e04: 00000050 00000000 00000100 0002004e P...........N...
  1140. e14: 00000000 00000100 0001ac41 00000000 ........A.......
  1141. e24: 00000100 0000003c 00000000 00000100 ....<...........
  1142. e34: 0009803a 00000000 00000100 00000030 :...........0...
  1143. e44: 00000000 00000100 00000028 00000000 ........(.......
  1144. e54: 00000100 00010027 00000000 00000100 ....'...........
  1145. e64: 00066023 00000000 00000100 00086021 #`..........!`..
  1146. e74: 00000000 00000100 0000001e 00000000 ................
  1147. e84: 00000100 0004c01d 00000000 00000100 ................
  1148. e94: 00000050 00000002 00000100 00000018 P...............
  1149. ea4: 00000000 00000100 00000014 00000000 ................
  1150. eb4: 00000100 00000060 00000004 00000100 ....`...........
  1151.  
  1152. 00000ec4 <g_pui32VCOFrequencies>:
  1153. ec4: 09896800 0e4e1c00 .h....N.
  1154.  
  1155. 00000ecc <g_sXTALtoMEMTIM>:
  1156. ecc: 00f42400 00300030 02625a00 00910091 .$..0.0..Zb.....
  1157. edc: 03938700 00d200d2 04c4b400 01130113 ................
  1158. eec: 05f5e100 01540154 07270e00 01950195 ....T.T...'.....
  1159.  
  1160. 00000efc <g_pui32Xtals>:
  1161. efc: 000f4240 001c2000 001e8480 00258000 @B... ........%.
  1162. f0c: 00369e99 00384000 003d0900 003e8000 ..6..@8...=...>.
  1163. f1c: 004b0000 004c4b40 004e2000 005b8d80 ..K.@KL.. N...[.
  1164. f2c: 005dc000 00708000 007a1200 007d0000 ..]...p...z...}.
  1165. f3c: 00989680 00b71b00 00bb8000 00cee8c0 ................
  1166. f4c: 00da7a64 00f42400 00fa0000 0112a880 dz...$..........
  1167. f5c: 01312d00 016e3600 017d7840 .-1..6n.@x}.
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