asdf

// 4 types of load instructions: lw, lb, lbu
	if (dx_instr_out[31:26] == 'b100011 || dx_instr_out[31:26] == 'b100000 || dx_instr_out[31:26] == 'b100100) begin
        // (D/X regdest rd[15:11] == F/D regsrc: rt[25:21])
		if (dx_instr_out[15:11] == fd_instr_out[25:21] ==  && FD_rd_n_rt == 0) begin
			stall = 1;
		end
        // (D/X regdest rd[15:11] == F/D regsrc: rd[15:11])
        else if (dx_instr_out[15:11] == fd_instr_out[15:11] ==  && FD_rd_n_rt == 1) begin
			stall = 1;
		end
        // (D/X regdest rd[15:11] == F/D regsrc: rt[25:21]) && F/D.OP != STORE
		else if (dx_instr_out[15:11] == fd_instr_out[25:21] && FD_rd_n_rt != 0) &&
				 (fd_instr_out[31:26] != 'b101011 || fd_instr_out[31:26] != 'b101000) ) begin	// 2 types of store - sw, sb
			stall = 1;
		end
        // (D/X regdest rd[15:11] == F/D regsrc: rd[15:11]) && F/D.OP != STORE
        else if (dx_instr_out[15:11] == fd_instr_out[15:11] && FD_rd_n_rt != 1) &&
				 (fd_instr_out[31:26] != 'b101011 || fd_instr_out[31:26] != 'b101000) ) begin	// 2 types of store - sw, sb
			stall = 1;
		end
		else begin
			stall = 0;
		end
	end

	else ...
end