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  1. DefinitionBlock ("dsdt.aml", "DSDT", 2, "ALASKA", "A M I", 0x00000021)
  2. {
  3. /*
  4. * iASL Warning: There were 2 external control methods found during
  5. * disassembly, but additional ACPI tables to resolve these externals
  6. * were not specified. This resulting disassembler output file may not
  7. * compile because the disassembler did not know how many arguments
  8. * to assign to these methods. To specify the tables needed to resolve
  9. * external control method references, the -e option can be used to
  10. * specify the filenames. Example iASL invocations:
  11. * iasl -e ssdt1.aml ssdt2.aml ssdt3.aml -d dsdt.aml
  12. * iasl -e dsdt.aml ssdt2.aml -d ssdt1.aml
  13. * iasl -e ssdt*.aml -d dsdt.aml
  14. *
  15. * In addition, the -fe option can be used to specify a file containing
  16. * control method external declarations with the associated method
  17. * argument counts. Each line of the file must be of the form:
  18. * External (<method pathname>, MethodObj, <argument count>)
  19. * Invocation:
  20. * iasl -fe refs.txt -d dsdt.aml
  21. *
  22. * The following methods were unresolved and many not compile properly
  23. * because the disassembler had to guess at the number of arguments
  24. * required for each:
  25. */
  26. External (_SB_.PCI0.IEIT.EITV, MethodObj) // Warning: Unresolved method, guessing 0 arguments
  27. External (TNOT, MethodObj) // Warning: Unresolved method, guessing 0 arguments
  28. External (_PR_.CPU0._PPC, UnknownObj)
  29. External (_PR_.CPU0._PSS, IntObj)
  30. External (_SB_.PCI0.PEG0.PEGP.DGON, UnknownObj)
  31. External (CFGD, UnknownObj)
  32. External (PDC0, UnknownObj)
  33. External (PDC1, UnknownObj)
  34. External (PDC2, UnknownObj)
  35. External (PDC3, UnknownObj)
  36. External (PDC4, UnknownObj)
  37. External (PDC5, UnknownObj)
  38. External (PDC6, UnknownObj)
  39. External (PDC7, UnknownObj)
  40. Name (SMBS, 0x0580)
  41. Name (SMBL, 0x20)
  42. Name (PMBS, 0x0400)
  43. Name (PMLN, 0x80)
  44. Name (GPBS, 0x0500)
  45. Name (GPLN, 0x80)
  46. Name (SMIP, 0xB2)
  47. Name (APCB, 0xFEC00000)
  48. Name (APCL, 0x1000)
  49. Name (SMCR, 0x0430)
  50. Name (HPTB, 0xFED00000)
  51. Name (HPTC, 0xFED1F404)
  52. Name (FLSZ, 0x00400000)
  53. Name (SRCB, 0xFED1C000)
  54. Name (RCLN, 0x4000)
  55. Name (TCBR, 0xFED08000)
  56. Name (TCLT, 0x1000)
  57. Name (PEBS, 0xF8000000)
  58. Name (PELN, 0x04000000)
  59. Name (LAPB, 0xFEE00000)
  60. Name (EGPB, 0xFED19000)
  61. Name (MCHB, 0xFED10000)
  62. Name (VTBS, 0xFED90000)
  63. Name (VTLN, 0x4000)
  64. Name (ACPH, 0xDE)
  65. Name (ASSB, Zero)
  66. Name (AOTB, Zero)
  67. Name (AAXB, Zero)
  68. Name (PEHP, Zero)
  69. Name (SHPC, One)
  70. Name (PEPM, Zero)
  71. Name (PEER, Zero)
  72. Name (PECS, Zero)
  73. Name (ITKE, Zero)
  74. Name (DPPB, 0xFED98000)
  75. Name (DPPL, 0x8000)
  76. Name (FMBL, One)
  77. Name (FDTP, 0x02)
  78. Name (FUPS, 0x03)
  79. Name (FUWS, 0x04)
  80. Name (BSH, Zero)
  81. Name (BEL, One)
  82. Name (BEH, 0x02)
  83. Name (BRH, 0x03)
  84. Name (BTF, 0x04)
  85. Name (BHC, 0x05)
  86. Name (BYB, 0x06)
  87. Name (BPH, 0x07)
  88. Name (BSHS, 0x08)
  89. Name (BELC, 0x09)
  90. Name (BRHP, 0x0A)
  91. Name (BTFC, 0x0B)
  92. Name (BEHP, 0x0C)
  93. Name (BPHS, 0x0D)
  94. Name (BELP, 0x0E)
  95. Name (BTL, 0x10)
  96. Name (BTFP, 0x11)
  97. Name (BSR, 0x14)
  98. Name (BOF, 0x20)
  99. Name (BEF, 0x21)
  100. Name (BLLE, 0x22)
  101. Name (BLLC, 0x23)
  102. Name (BLCA, 0x24)
  103. Name (BLLS, 0x25)
  104. Name (BLLP, 0x26)
  105. Name (BLLD, 0x27)
  106. Name (BHBE, 0x30)
  107. Name (BHBC, 0x31)
  108. Name (BHBN, 0x32)
  109. Name (BHBM, 0x33)
  110. Name (TRTP, One)
  111. Name (WDTE, One)
  112. Name (TRTD, 0x02)
  113. Name (TRTI, 0x03)
  114. Name (GCDD, One)
  115. Name (DSTA, 0x0A)
  116. Name (DSLO, 0x0C)
  117. Name (DSLC, 0x0E)
  118. Name (PITS, 0x10)
  119. Name (SBCS, 0x12)
  120. Name (SALS, 0x13)
  121. Name (LSSS, 0x2A)
  122. Name (SOOT, 0x35)
  123. Name (PDBR, 0x4D)
  124. Name (SRSI, 0xB2)
  125. Name (CSMI, 0x61)
  126. Name (DSSP, Zero)
  127. Name (FHPP, Zero)
  128. Name (SMIT, 0xB2)
  129. Name (OFST, 0x35)
  130. Name (TPMF, Zero)
  131. Name (TCMF, Zero)
  132. Name (TMF1, Zero)
  133. Name (TMF2, Zero)
  134. Name (TMF3, Zero)
  135. Name (TRST, 0x02)
  136. Name (MBEC, Zero)
  137. Name (SS1, Zero)
  138. Name (SS2, Zero)
  139. Name (SS3, One)
  140. Name (SS4, One)
  141. Name (IOST, 0x4400)
  142. Name (TOPM, 0x00000000)
  143. Name (ROMS, 0xFFE00000)
  144. Name (VGAF, One)
  145. OperationRegion (GNVS, SystemMemory, 0xCA1CFE18, 0x01D3)
  146. Field (GNVS, AnyAcc, Lock, Preserve)
  147. {
  148. OSYS, 16,
  149. SMIF, 8,
  150. PRM0, 8,
  151. PRM1, 8,
  152. SCIF, 8,
  153. PRM2, 8,
  154. PRM3, 8,
  155. LCKF, 8,
  156. PRM4, 8,
  157. PRM5, 8,
  158. P80D, 32,
  159. LIDS, 8,
  160. PWRS, 8,
  161. DBGS, 8,
  162. THOF, 8,
  163. ACT1, 8,
  164. ACTT, 8,
  165. PSVT, 8,
  166. TC1V, 8,
  167. TC2V, 8,
  168. TSPV, 8,
  169. CRTT, 8,
  170. DTSE, 8,
  171. DTS1, 8,
  172. DTS2, 8,
  173. DTSF, 8,
  174. Offset (0x25),
  175. REVN, 8,
  176. RES3, 8,
  177. Offset (0x28),
  178. APIC, 8,
  179. TCNT, 8,
  180. PCP0, 8,
  181. PCP1, 8,
  182. PPCM, 8,
  183. PPMF, 32,
  184. C67L, 8,
  185. NATP, 8,
  186. CMAP, 8,
  187. CMBP, 8,
  188. LPTP, 8,
  189. FDCP, 8,
  190. CMCP, 8,
  191. CIRP, 8,
  192. SMSC, 8,
  193. W381, 8,
  194. SMC1, 8,
  195. IGDS, 8,
  196. TLST, 8,
  197. CADL, 8,
  198. PADL, 8,
  199. CSTE, 16,
  200. NSTE, 16,
  201. SSTE, 16,
  202. NDID, 8,
  203. DID1, 32,
  204. DID2, 32,
  205. DID3, 32,
  206. DID4, 32,
  207. DID5, 32,
  208. KSV0, 32,
  209. KSV1, 8,
  210. Offset (0x67),
  211. BLCS, 8,
  212. BRTL, 8,
  213. ALSE, 8,
  214. ALAF, 8,
  215. LLOW, 8,
  216. LHIH, 8,
  217. Offset (0x6E),
  218. EMAE, 8,
  219. EMAP, 16,
  220. EMAL, 16,
  221. Offset (0x74),
  222. MEFE, 8,
  223. DSTS, 8,
  224. Offset (0x78),
  225. TPMP, 8,
  226. TPME, 8,
  227. MORD, 8,
  228. TCGP, 8,
  229. PPRP, 32,
  230. PPRQ, 8,
  231. LPPR, 8,
  232. GTF0, 56,
  233. GTF2, 56,
  234. IDEM, 8,
  235. GTF1, 56,
  236. BID, 8,
  237. PLID, 8,
  238. Offset (0xAA),
  239. ASLB, 32,
  240. IBTT, 8,
  241. IPAT, 8,
  242. ITVF, 8,
  243. ITVM, 8,
  244. IPSC, 8,
  245. IBLC, 8,
  246. IBIA, 8,
  247. ISSC, 8,
  248. I409, 8,
  249. I509, 8,
  250. I609, 8,
  251. I709, 8,
  252. IPCF, 8,
  253. IDMS, 8,
  254. IF1E, 8,
  255. HVCO, 8,
  256. NXD1, 32,
  257. NXD2, 32,
  258. NXD3, 32,
  259. NXD4, 32,
  260. NXD5, 32,
  261. NXD6, 32,
  262. NXD7, 32,
  263. NXD8, 32,
  264. GSMI, 8,
  265. PAVP, 8,
  266. Offset (0xE1),
  267. OSCC, 8,
  268. NEXP, 8,
  269. SBV1, 8,
  270. SBV2, 8,
  271. Offset (0xEB),
  272. DSEN, 8,
  273. ECON, 8,
  274. GPIC, 8,
  275. CTYP, 8,
  276. L01C, 8,
  277. VFN0, 8,
  278. VFN1, 8,
  279. VFN2, 8,
  280. VFN3, 8,
  281. VFN4, 8,
  282. Offset (0x100),
  283. NVGA, 32,
  284. NVHA, 32,
  285. AMDA, 32,
  286. DID6, 32,
  287. DID7, 32,
  288. DID8, 32,
  289. EBAS, 32,
  290. CPSP, 32,
  291. EECP, 32,
  292. EVCP, 32,
  293. XBAS, 32,
  294. OBS1, 32,
  295. OBS2, 32,
  296. OBS3, 32,
  297. OBS4, 32,
  298. OBS5, 32,
  299. OBS6, 32,
  300. OBS7, 32,
  301. OBS8, 32,
  302. Offset (0x157),
  303. ATMC, 8,
  304. PTMC, 8,
  305. ATRA, 8,
  306. PTRA, 8,
  307. PNHM, 32,
  308. TBAB, 32,
  309. TBAH, 32,
  310. RTIP, 8,
  311. TSOD, 8,
  312. ATPC, 8,
  313. PTPC, 8,
  314. PFLV, 8,
  315. BREV, 8,
  316. SGMD, 8,
  317. SGFL, 8,
  318. PWOK, 8,
  319. HLRS, 8,
  320. DSEL, 8,
  321. ESEL, 8,
  322. PSEL, 8,
  323. PWEN, 8,
  324. PRST, 8,
  325. MXD1, 32,
  326. MXD2, 32,
  327. MXD3, 32,
  328. MXD4, 32,
  329. MXD5, 32,
  330. MXD6, 32,
  331. MXD7, 32,
  332. MXD8, 32,
  333. GBAS, 16,
  334. SGGP, 8,
  335. PXFX, 8,
  336. PXDY, 8,
  337. PXFD, 8,
  338. Offset (0x19D),
  339. ALFP, 8,
  340. IMON, 8,
  341. PDTS, 8,
  342. PKGA, 8,
  343. PAMT, 8,
  344. AC0F, 8,
  345. AC1F, 8,
  346. DTS3, 8,
  347. DTS4, 8,
  348. Offset (0x1B2),
  349. XHCI, 8,
  350. XHPM, 8,
  351. Offset (0x1B7),
  352. XTUB, 32,
  353. XTUS, 32,
  354. XMPB, 32,
  355. Offset (0x1C4),
  356. LPMV, 8,
  357. Offset (0x1C6),
  358. DDRF, 8,
  359. MM64, 8,
  360. AOAC, 8,
  361. SLDR, 32,
  362. ECTM, 32,
  363. ELAN, 8,
  364. STLC, 8
  365. }
  366. Scope (_SB)
  367. {
  368. Name (PR00, Package (0x23)
  369. {
  370. Package (0x04)
  371. {
  372. 0x001FFFFF,
  373. Zero,
  374. LNKF,
  375. Zero
  376. },
  377. Package (0x04)
  378. {
  379. 0x001FFFFF,
  380. One,
  381. LNKD,
  382. Zero
  383. },
  384. Package (0x04)
  385. {
  386. 0x001FFFFF,
  387. 0x02,
  388. LNKC,
  389. Zero
  390. },
  391. Package (0x04)
  392. {
  393. 0x001FFFFF,
  394. 0x03,
  395. LNKA,
  396. Zero
  397. },
  398. Package (0x04)
  399. {
  400. 0x0014FFFF,
  401. Zero,
  402. LNKA,
  403. Zero
  404. },
  405. Package (0x04)
  406. {
  407. 0x001DFFFF,
  408. Zero,
  409. LNKH,
  410. Zero
  411. },
  412. Package (0x04)
  413. {
  414. 0x001DFFFF,
  415. One,
  416. LNKD,
  417. Zero
  418. },
  419. Package (0x04)
  420. {
  421. 0x001DFFFF,
  422. 0x02,
  423. LNKA,
  424. Zero
  425. },
  426. Package (0x04)
  427. {
  428. 0x001DFFFF,
  429. 0x03,
  430. LNKC,
  431. Zero
  432. },
  433. Package (0x04)
  434. {
  435. 0x001AFFFF,
  436. Zero,
  437. LNKA,
  438. Zero
  439. },
  440. Package (0x04)
  441. {
  442. 0x001AFFFF,
  443. One,
  444. LNKF,
  445. Zero
  446. },
  447. Package (0x04)
  448. {
  449. 0x001AFFFF,
  450. 0x02,
  451. LNKC,
  452. Zero
  453. },
  454. Package (0x04)
  455. {
  456. 0x001AFFFF,
  457. 0x03,
  458. LNKD,
  459. Zero
  460. },
  461. Package (0x04)
  462. {
  463. 0x001BFFFF,
  464. Zero,
  465. LNKG,
  466. Zero
  467. },
  468. Package (0x04)
  469. {
  470. 0x0016FFFF,
  471. Zero,
  472. LNKA,
  473. Zero
  474. },
  475. Package (0x04)
  476. {
  477. 0x0016FFFF,
  478. One,
  479. LNKD,
  480. Zero
  481. },
  482. Package (0x04)
  483. {
  484. 0x0016FFFF,
  485. 0x02,
  486. LNKC,
  487. Zero
  488. },
  489. Package (0x04)
  490. {
  491. 0x0016FFFF,
  492. 0x03,
  493. LNKB,
  494. Zero
  495. },
  496. Package (0x04)
  497. {
  498. 0x001CFFFF,
  499. Zero,
  500. LNKA,
  501. Zero
  502. },
  503. Package (0x04)
  504. {
  505. 0x001CFFFF,
  506. One,
  507. LNKB,
  508. Zero
  509. },
  510. Package (0x04)
  511. {
  512. 0x001CFFFF,
  513. 0x02,
  514. LNKC,
  515. Zero
  516. },
  517. Package (0x04)
  518. {
  519. 0x001CFFFF,
  520. 0x03,
  521. LNKD,
  522. Zero
  523. },
  524. Package (0x04)
  525. {
  526. 0x0001FFFF,
  527. Zero,
  528. LNKA,
  529. Zero
  530. },
  531. Package (0x04)
  532. {
  533. 0x0001FFFF,
  534. One,
  535. LNKB,
  536. Zero
  537. },
  538. Package (0x04)
  539. {
  540. 0x0001FFFF,
  541. 0x02,
  542. LNKC,
  543. Zero
  544. },
  545. Package (0x04)
  546. {
  547. 0x0001FFFF,
  548. 0x03,
  549. LNKD,
  550. Zero
  551. },
  552. Package (0x04)
  553. {
  554. 0x0006FFFF,
  555. Zero,
  556. LNKD,
  557. Zero
  558. },
  559. Package (0x04)
  560. {
  561. 0x0006FFFF,
  562. One,
  563. LNKA,
  564. Zero
  565. },
  566. Package (0x04)
  567. {
  568. 0x0006FFFF,
  569. 0x02,
  570. LNKB,
  571. Zero
  572. },
  573. Package (0x04)
  574. {
  575. 0x0006FFFF,
  576. 0x03,
  577. LNKC,
  578. Zero
  579. },
  580. Package (0x04)
  581. {
  582. 0x0004FFFF,
  583. Zero,
  584. LNKA,
  585. Zero
  586. },
  587. Package (0x04)
  588. {
  589. 0x0004FFFF,
  590. One,
  591. LNKB,
  592. Zero
  593. },
  594. Package (0x04)
  595. {
  596. 0x0004FFFF,
  597. 0x02,
  598. LNKC,
  599. Zero
  600. },
  601. Package (0x04)
  602. {
  603. 0x0004FFFF,
  604. 0x03,
  605. LNKD,
  606. Zero
  607. },
  608. Package (0x04)
  609. {
  610. 0x0002FFFF,
  611. Zero,
  612. LNKA,
  613. Zero
  614. }
  615. })
  616. Name (AR00, Package (0x23)
  617. {
  618. Package (0x04)
  619. {
  620. 0x001FFFFF,
  621. Zero,
  622. Zero,
  623. 0x15
  624. },
  625. Package (0x04)
  626. {
  627. 0x001FFFFF,
  628. One,
  629. Zero,
  630. 0x13
  631. },
  632. Package (0x04)
  633. {
  634. 0x001FFFFF,
  635. 0x02,
  636. Zero,
  637. 0x12
  638. },
  639. Package (0x04)
  640. {
  641. 0x001FFFFF,
  642. 0x03,
  643. Zero,
  644. 0x10
  645. },
  646. Package (0x04)
  647. {
  648. 0x0014FFFF,
  649. Zero,
  650. Zero,
  651. 0x10
  652. },
  653. Package (0x04)
  654. {
  655. 0x001DFFFF,
  656. Zero,
  657. Zero,
  658. 0x17
  659. },
  660. Package (0x04)
  661. {
  662. 0x001DFFFF,
  663. One,
  664. Zero,
  665. 0x13
  666. },
  667. Package (0x04)
  668. {
  669. 0x001DFFFF,
  670. 0x02,
  671. Zero,
  672. 0x10
  673. },
  674. Package (0x04)
  675. {
  676. 0x001DFFFF,
  677. 0x03,
  678. Zero,
  679. 0x12
  680. },
  681. Package (0x04)
  682. {
  683. 0x001AFFFF,
  684. Zero,
  685. Zero,
  686. 0x10
  687. },
  688. Package (0x04)
  689. {
  690. 0x001AFFFF,
  691. One,
  692. Zero,
  693. 0x15
  694. },
  695. Package (0x04)
  696. {
  697. 0x001AFFFF,
  698. 0x02,
  699. Zero,
  700. 0x12
  701. },
  702. Package (0x04)
  703. {
  704. 0x001AFFFF,
  705. 0x03,
  706. Zero,
  707. 0x13
  708. },
  709. Package (0x04)
  710. {
  711. 0x001BFFFF,
  712. Zero,
  713. Zero,
  714. 0x16
  715. },
  716. Package (0x04)
  717. {
  718. 0x0016FFFF,
  719. Zero,
  720. Zero,
  721. 0x10
  722. },
  723. Package (0x04)
  724. {
  725. 0x0016FFFF,
  726. One,
  727. Zero,
  728. 0x13
  729. },
  730. Package (0x04)
  731. {
  732. 0x0016FFFF,
  733. 0x02,
  734. Zero,
  735. 0x12
  736. },
  737. Package (0x04)
  738. {
  739. 0x0016FFFF,
  740. 0x03,
  741. Zero,
  742. 0x11
  743. },
  744. Package (0x04)
  745. {
  746. 0x001CFFFF,
  747. Zero,
  748. Zero,
  749. 0x10
  750. },
  751. Package (0x04)
  752. {
  753. 0x001CFFFF,
  754. One,
  755. Zero,
  756. 0x11
  757. },
  758. Package (0x04)
  759. {
  760. 0x001CFFFF,
  761. 0x02,
  762. Zero,
  763. 0x12
  764. },
  765. Package (0x04)
  766. {
  767. 0x001CFFFF,
  768. 0x03,
  769. Zero,
  770. 0x13
  771. },
  772. Package (0x04)
  773. {
  774. 0x0001FFFF,
  775. Zero,
  776. Zero,
  777. 0x10
  778. },
  779. Package (0x04)
  780. {
  781. 0x0001FFFF,
  782. One,
  783. Zero,
  784. 0x11
  785. },
  786. Package (0x04)
  787. {
  788. 0x0001FFFF,
  789. 0x02,
  790. Zero,
  791. 0x12
  792. },
  793. Package (0x04)
  794. {
  795. 0x0001FFFF,
  796. 0x03,
  797. Zero,
  798. 0x13
  799. },
  800. Package (0x04)
  801. {
  802. 0x0006FFFF,
  803. Zero,
  804. Zero,
  805. 0x13
  806. },
  807. Package (0x04)
  808. {
  809. 0x0006FFFF,
  810. One,
  811. Zero,
  812. 0x10
  813. },
  814. Package (0x04)
  815. {
  816. 0x0006FFFF,
  817. 0x02,
  818. Zero,
  819. 0x11
  820. },
  821. Package (0x04)
  822. {
  823. 0x0006FFFF,
  824. 0x03,
  825. Zero,
  826. 0x12
  827. },
  828. Package (0x04)
  829. {
  830. 0x0004FFFF,
  831. Zero,
  832. Zero,
  833. 0x10
  834. },
  835. Package (0x04)
  836. {
  837. 0x0004FFFF,
  838. One,
  839. Zero,
  840. 0x11
  841. },
  842. Package (0x04)
  843. {
  844. 0x0004FFFF,
  845. 0x02,
  846. Zero,
  847. 0x12
  848. },
  849. Package (0x04)
  850. {
  851. 0x0004FFFF,
  852. 0x03,
  853. Zero,
  854. 0x13
  855. },
  856. Package (0x04)
  857. {
  858. 0x0002FFFF,
  859. Zero,
  860. Zero,
  861. 0x10
  862. }
  863. })
  864. Name (PR04, Package (0x04)
  865. {
  866. Package (0x04)
  867. {
  868. 0xFFFF,
  869. Zero,
  870. LNKA,
  871. Zero
  872. },
  873. Package (0x04)
  874. {
  875. 0xFFFF,
  876. One,
  877. LNKB,
  878. Zero
  879. },
  880. Package (0x04)
  881. {
  882. 0xFFFF,
  883. 0x02,
  884. LNKC,
  885. Zero
  886. },
  887. Package (0x04)
  888. {
  889. 0xFFFF,
  890. 0x03,
  891. LNKD,
  892. Zero
  893. }
  894. })
  895. Name (AR04, Package (0x04)
  896. {
  897. Package (0x04)
  898. {
  899. 0xFFFF,
  900. Zero,
  901. Zero,
  902. 0x10
  903. },
  904. Package (0x04)
  905. {
  906. 0xFFFF,
  907. One,
  908. Zero,
  909. 0x11
  910. },
  911. Package (0x04)
  912. {
  913. 0xFFFF,
  914. 0x02,
  915. Zero,
  916. 0x12
  917. },
  918. Package (0x04)
  919. {
  920. 0xFFFF,
  921. 0x03,
  922. Zero,
  923. 0x13
  924. }
  925. })
  926. Name (PR05, Package (0x04)
  927. {
  928. Package (0x04)
  929. {
  930. 0xFFFF,
  931. Zero,
  932. LNKB,
  933. Zero
  934. },
  935. Package (0x04)
  936. {
  937. 0xFFFF,
  938. One,
  939. LNKC,
  940. Zero
  941. },
  942. Package (0x04)
  943. {
  944. 0xFFFF,
  945. 0x02,
  946. LNKD,
  947. Zero
  948. },
  949. Package (0x04)
  950. {
  951. 0xFFFF,
  952. 0x03,
  953. LNKA,
  954. Zero
  955. }
  956. })
  957. Name (AR05, Package (0x04)
  958. {
  959. Package (0x04)
  960. {
  961. 0xFFFF,
  962. Zero,
  963. Zero,
  964. 0x11
  965. },
  966. Package (0x04)
  967. {
  968. 0xFFFF,
  969. One,
  970. Zero,
  971. 0x12
  972. },
  973. Package (0x04)
  974. {
  975. 0xFFFF,
  976. 0x02,
  977. Zero,
  978. 0x13
  979. },
  980. Package (0x04)
  981. {
  982. 0xFFFF,
  983. 0x03,
  984. Zero,
  985. 0x10
  986. }
  987. })
  988. Name (PR06, Package (0x04)
  989. {
  990. Package (0x04)
  991. {
  992. 0xFFFF,
  993. Zero,
  994. LNKC,
  995. Zero
  996. },
  997. Package (0x04)
  998. {
  999. 0xFFFF,
  1000. One,
  1001. LNKD,
  1002. Zero
  1003. },
  1004. Package (0x04)
  1005. {
  1006. 0xFFFF,
  1007. 0x02,
  1008. LNKA,
  1009. Zero
  1010. },
  1011. Package (0x04)
  1012. {
  1013. 0xFFFF,
  1014. 0x03,
  1015. LNKB,
  1016. Zero
  1017. }
  1018. })
  1019. Name (AR06, Package (0x04)
  1020. {
  1021. Package (0x04)
  1022. {
  1023. 0xFFFF,
  1024. Zero,
  1025. Zero,
  1026. 0x12
  1027. },
  1028. Package (0x04)
  1029. {
  1030. 0xFFFF,
  1031. One,
  1032. Zero,
  1033. 0x13
  1034. },
  1035. Package (0x04)
  1036. {
  1037. 0xFFFF,
  1038. 0x02,
  1039. Zero,
  1040. 0x10
  1041. },
  1042. Package (0x04)
  1043. {
  1044. 0xFFFF,
  1045. 0x03,
  1046. Zero,
  1047. 0x11
  1048. }
  1049. })
  1050. Name (PR07, Package (0x04)
  1051. {
  1052. Package (0x04)
  1053. {
  1054. 0xFFFF,
  1055. Zero,
  1056. LNKD,
  1057. Zero
  1058. },
  1059. Package (0x04)
  1060. {
  1061. 0xFFFF,
  1062. One,
  1063. LNKA,
  1064. Zero
  1065. },
  1066. Package (0x04)
  1067. {
  1068. 0xFFFF,
  1069. 0x02,
  1070. LNKB,
  1071. Zero
  1072. },
  1073. Package (0x04)
  1074. {
  1075. 0xFFFF,
  1076. 0x03,
  1077. LNKC,
  1078. Zero
  1079. }
  1080. })
  1081. Name (AR07, Package (0x04)
  1082. {
  1083. Package (0x04)
  1084. {
  1085. 0xFFFF,
  1086. Zero,
  1087. Zero,
  1088. 0x13
  1089. },
  1090. Package (0x04)
  1091. {
  1092. 0xFFFF,
  1093. One,
  1094. Zero,
  1095. 0x10
  1096. },
  1097. Package (0x04)
  1098. {
  1099. 0xFFFF,
  1100. 0x02,
  1101. Zero,
  1102. 0x11
  1103. },
  1104. Package (0x04)
  1105. {
  1106. 0xFFFF,
  1107. 0x03,
  1108. Zero,
  1109. 0x12
  1110. }
  1111. })
  1112. Name (PR08, Package (0x04)
  1113. {
  1114. Package (0x04)
  1115. {
  1116. 0xFFFF,
  1117. Zero,
  1118. LNKA,
  1119. Zero
  1120. },
  1121. Package (0x04)
  1122. {
  1123. 0xFFFF,
  1124. One,
  1125. LNKB,
  1126. Zero
  1127. },
  1128. Package (0x04)
  1129. {
  1130. 0xFFFF,
  1131. 0x02,
  1132. LNKC,
  1133. Zero
  1134. },
  1135. Package (0x04)
  1136. {
  1137. 0xFFFF,
  1138. 0x03,
  1139. LNKD,
  1140. Zero
  1141. }
  1142. })
  1143. Name (AR08, Package (0x04)
  1144. {
  1145. Package (0x04)
  1146. {
  1147. 0xFFFF,
  1148. Zero,
  1149. Zero,
  1150. 0x10
  1151. },
  1152. Package (0x04)
  1153. {
  1154. 0xFFFF,
  1155. One,
  1156. Zero,
  1157. 0x11
  1158. },
  1159. Package (0x04)
  1160. {
  1161. 0xFFFF,
  1162. 0x02,
  1163. Zero,
  1164. 0x12
  1165. },
  1166. Package (0x04)
  1167. {
  1168. 0xFFFF,
  1169. 0x03,
  1170. Zero,
  1171. 0x13
  1172. }
  1173. })
  1174. Name (PR09, Package (0x04)
  1175. {
  1176. Package (0x04)
  1177. {
  1178. 0xFFFF,
  1179. Zero,
  1180. LNKB,
  1181. Zero
  1182. },
  1183. Package (0x04)
  1184. {
  1185. 0xFFFF,
  1186. One,
  1187. LNKC,
  1188. Zero
  1189. },
  1190. Package (0x04)
  1191. {
  1192. 0xFFFF,
  1193. 0x02,
  1194. LNKD,
  1195. Zero
  1196. },
  1197. Package (0x04)
  1198. {
  1199. 0xFFFF,
  1200. 0x03,
  1201. LNKA,
  1202. Zero
  1203. }
  1204. })
  1205. Name (AR09, Package (0x04)
  1206. {
  1207. Package (0x04)
  1208. {
  1209. 0xFFFF,
  1210. Zero,
  1211. Zero,
  1212. 0x11
  1213. },
  1214. Package (0x04)
  1215. {
  1216. 0xFFFF,
  1217. One,
  1218. Zero,
  1219. 0x12
  1220. },
  1221. Package (0x04)
  1222. {
  1223. 0xFFFF,
  1224. 0x02,
  1225. Zero,
  1226. 0x13
  1227. },
  1228. Package (0x04)
  1229. {
  1230. 0xFFFF,
  1231. 0x03,
  1232. Zero,
  1233. 0x10
  1234. }
  1235. })
  1236. Name (PR0E, Package (0x04)
  1237. {
  1238. Package (0x04)
  1239. {
  1240. 0xFFFF,
  1241. Zero,
  1242. LNKC,
  1243. Zero
  1244. },
  1245. Package (0x04)
  1246. {
  1247. 0xFFFF,
  1248. One,
  1249. LNKD,
  1250. Zero
  1251. },
  1252. Package (0x04)
  1253. {
  1254. 0xFFFF,
  1255. 0x02,
  1256. LNKA,
  1257. Zero
  1258. },
  1259. Package (0x04)
  1260. {
  1261. 0xFFFF,
  1262. 0x03,
  1263. LNKB,
  1264. Zero
  1265. }
  1266. })
  1267. Name (AR0E, Package (0x04)
  1268. {
  1269. Package (0x04)
  1270. {
  1271. 0xFFFF,
  1272. Zero,
  1273. Zero,
  1274. 0x12
  1275. },
  1276. Package (0x04)
  1277. {
  1278. 0xFFFF,
  1279. One,
  1280. Zero,
  1281. 0x13
  1282. },
  1283. Package (0x04)
  1284. {
  1285. 0xFFFF,
  1286. 0x02,
  1287. Zero,
  1288. 0x10
  1289. },
  1290. Package (0x04)
  1291. {
  1292. 0xFFFF,
  1293. 0x03,
  1294. Zero,
  1295. 0x11
  1296. }
  1297. })
  1298. Name (PR0F, Package (0x04)
  1299. {
  1300. Package (0x04)
  1301. {
  1302. 0xFFFF,
  1303. Zero,
  1304. LNKD,
  1305. Zero
  1306. },
  1307. Package (0x04)
  1308. {
  1309. 0xFFFF,
  1310. One,
  1311. LNKA,
  1312. Zero
  1313. },
  1314. Package (0x04)
  1315. {
  1316. 0xFFFF,
  1317. 0x02,
  1318. LNKB,
  1319. Zero
  1320. },
  1321. Package (0x04)
  1322. {
  1323. 0xFFFF,
  1324. 0x03,
  1325. LNKC,
  1326. Zero
  1327. }
  1328. })
  1329. Name (AR0F, Package (0x04)
  1330. {
  1331. Package (0x04)
  1332. {
  1333. 0xFFFF,
  1334. Zero,
  1335. Zero,
  1336. 0x13
  1337. },
  1338. Package (0x04)
  1339. {
  1340. 0xFFFF,
  1341. One,
  1342. Zero,
  1343. 0x10
  1344. },
  1345. Package (0x04)
  1346. {
  1347. 0xFFFF,
  1348. 0x02,
  1349. Zero,
  1350. 0x11
  1351. },
  1352. Package (0x04)
  1353. {
  1354. 0xFFFF,
  1355. 0x03,
  1356. Zero,
  1357. 0x12
  1358. }
  1359. })
  1360. Name (PR01, Package (0x14)
  1361. {
  1362. Package (0x04)
  1363. {
  1364. 0xFFFF,
  1365. Zero,
  1366. LNKF,
  1367. Zero
  1368. },
  1369. Package (0x04)
  1370. {
  1371. 0xFFFF,
  1372. One,
  1373. LNKG,
  1374. Zero
  1375. },
  1376. Package (0x04)
  1377. {
  1378. 0xFFFF,
  1379. 0x02,
  1380. LNKH,
  1381. Zero
  1382. },
  1383. Package (0x04)
  1384. {
  1385. 0xFFFF,
  1386. 0x03,
  1387. LNKE,
  1388. Zero
  1389. },
  1390. Package (0x04)
  1391. {
  1392. 0x0001FFFF,
  1393. Zero,
  1394. LNKG,
  1395. Zero
  1396. },
  1397. Package (0x04)
  1398. {
  1399. 0x0001FFFF,
  1400. One,
  1401. LNKF,
  1402. Zero
  1403. },
  1404. Package (0x04)
  1405. {
  1406. 0x0001FFFF,
  1407. 0x02,
  1408. LNKE,
  1409. Zero
  1410. },
  1411. Package (0x04)
  1412. {
  1413. 0x0001FFFF,
  1414. 0x03,
  1415. LNKH,
  1416. Zero
  1417. },
  1418. Package (0x04)
  1419. {
  1420. 0x0002FFFF,
  1421. Zero,
  1422. LNKC,
  1423. Zero
  1424. },
  1425. Package (0x04)
  1426. {
  1427. 0x0002FFFF,
  1428. One,
  1429. LNKD,
  1430. Zero
  1431. },
  1432. Package (0x04)
  1433. {
  1434. 0x0002FFFF,
  1435. 0x02,
  1436. LNKB,
  1437. Zero
  1438. },
  1439. Package (0x04)
  1440. {
  1441. 0x0002FFFF,
  1442. 0x03,
  1443. LNKA,
  1444. Zero
  1445. },
  1446. Package (0x04)
  1447. {
  1448. 0x0003FFFF,
  1449. Zero,
  1450. LNKD,
  1451. Zero
  1452. },
  1453. Package (0x04)
  1454. {
  1455. 0x0003FFFF,
  1456. One,
  1457. LNKC,
  1458. Zero
  1459. },
  1460. Package (0x04)
  1461. {
  1462. 0x0003FFFF,
  1463. 0x02,
  1464. LNKF,
  1465. Zero
  1466. },
  1467. Package (0x04)
  1468. {
  1469. 0x0003FFFF,
  1470. 0x03,
  1471. LNKG,
  1472. Zero
  1473. },
  1474. Package (0x04)
  1475. {
  1476. 0x0005FFFF,
  1477. Zero,
  1478. LNKA,
  1479. Zero
  1480. },
  1481. Package (0x04)
  1482. {
  1483. 0x0005FFFF,
  1484. One,
  1485. LNKB,
  1486. Zero
  1487. },
  1488. Package (0x04)
  1489. {
  1490. 0x0005FFFF,
  1491. 0x02,
  1492. LNKC,
  1493. Zero
  1494. },
  1495. Package (0x04)
  1496. {
  1497. 0x0005FFFF,
  1498. 0x03,
  1499. LNKD,
  1500. Zero
  1501. }
  1502. })
  1503. Name (AR01, Package (0x14)
  1504. {
  1505. Package (0x04)
  1506. {
  1507. 0xFFFF,
  1508. Zero,
  1509. Zero,
  1510. 0x15
  1511. },
  1512. Package (0x04)
  1513. {
  1514. 0xFFFF,
  1515. One,
  1516. Zero,
  1517. 0x16
  1518. },
  1519. Package (0x04)
  1520. {
  1521. 0xFFFF,
  1522. 0x02,
  1523. Zero,
  1524. 0x17
  1525. },
  1526. Package (0x04)
  1527. {
  1528. 0xFFFF,
  1529. 0x03,
  1530. Zero,
  1531. 0x14
  1532. },
  1533. Package (0x04)
  1534. {
  1535. 0x0001FFFF,
  1536. Zero,
  1537. Zero,
  1538. 0x16
  1539. },
  1540. Package (0x04)
  1541. {
  1542. 0x0001FFFF,
  1543. One,
  1544. Zero,
  1545. 0x15
  1546. },
  1547. Package (0x04)
  1548. {
  1549. 0x0001FFFF,
  1550. 0x02,
  1551. Zero,
  1552. 0x14
  1553. },
  1554. Package (0x04)
  1555. {
  1556. 0x0001FFFF,
  1557. 0x03,
  1558. Zero,
  1559. 0x17
  1560. },
  1561. Package (0x04)
  1562. {
  1563. 0x0002FFFF,
  1564. Zero,
  1565. Zero,
  1566. 0x12
  1567. },
  1568. Package (0x04)
  1569. {
  1570. 0x0002FFFF,
  1571. One,
  1572. Zero,
  1573. 0x13
  1574. },
  1575. Package (0x04)
  1576. {
  1577. 0x0002FFFF,
  1578. 0x02,
  1579. Zero,
  1580. 0x11
  1581. },
  1582. Package (0x04)
  1583. {
  1584. 0x0002FFFF,
  1585. 0x03,
  1586. Zero,
  1587. 0x10
  1588. },
  1589. Package (0x04)
  1590. {
  1591. 0x0003FFFF,
  1592. Zero,
  1593. Zero,
  1594. 0x13
  1595. },
  1596. Package (0x04)
  1597. {
  1598. 0x0003FFFF,
  1599. One,
  1600. Zero,
  1601. 0x12
  1602. },
  1603. Package (0x04)
  1604. {
  1605. 0x0003FFFF,
  1606. 0x02,
  1607. Zero,
  1608. 0x15
  1609. },
  1610. Package (0x04)
  1611. {
  1612. 0x0003FFFF,
  1613. 0x03,
  1614. Zero,
  1615. 0x16
  1616. },
  1617. Package (0x04)
  1618. {
  1619. 0x0005FFFF,
  1620. Zero,
  1621. Zero,
  1622. 0x10
  1623. },
  1624. Package (0x04)
  1625. {
  1626. 0x0005FFFF,
  1627. One,
  1628. Zero,
  1629. 0x11
  1630. },
  1631. Package (0x04)
  1632. {
  1633. 0x0005FFFF,
  1634. 0x02,
  1635. Zero,
  1636. 0x12
  1637. },
  1638. Package (0x04)
  1639. {
  1640. 0x0005FFFF,
  1641. 0x03,
  1642. Zero,
  1643. 0x13
  1644. }
  1645. })
  1646. Name (PR02, Package (0x04)
  1647. {
  1648. Package (0x04)
  1649. {
  1650. 0xFFFF,
  1651. Zero,
  1652. LNKA,
  1653. Zero
  1654. },
  1655. Package (0x04)
  1656. {
  1657. 0xFFFF,
  1658. One,
  1659. LNKB,
  1660. Zero
  1661. },
  1662. Package (0x04)
  1663. {
  1664. 0xFFFF,
  1665. 0x02,
  1666. LNKC,
  1667. Zero
  1668. },
  1669. Package (0x04)
  1670. {
  1671. 0xFFFF,
  1672. 0x03,
  1673. LNKD,
  1674. Zero
  1675. }
  1676. })
  1677. Name (AR02, Package (0x04)
  1678. {
  1679. Package (0x04)
  1680. {
  1681. 0xFFFF,
  1682. Zero,
  1683. Zero,
  1684. 0x10
  1685. },
  1686. Package (0x04)
  1687. {
  1688. 0xFFFF,
  1689. One,
  1690. Zero,
  1691. 0x11
  1692. },
  1693. Package (0x04)
  1694. {
  1695. 0xFFFF,
  1696. 0x02,
  1697. Zero,
  1698. 0x12
  1699. },
  1700. Package (0x04)
  1701. {
  1702. 0xFFFF,
  1703. 0x03,
  1704. Zero,
  1705. 0x13
  1706. }
  1707. })
  1708. Name (PR0A, Package (0x04)
  1709. {
  1710. Package (0x04)
  1711. {
  1712. 0xFFFF,
  1713. Zero,
  1714. LNKB,
  1715. Zero
  1716. },
  1717. Package (0x04)
  1718. {
  1719. 0xFFFF,
  1720. One,
  1721. LNKC,
  1722. Zero
  1723. },
  1724. Package (0x04)
  1725. {
  1726. 0xFFFF,
  1727. 0x02,
  1728. LNKD,
  1729. Zero
  1730. },
  1731. Package (0x04)
  1732. {
  1733. 0xFFFF,
  1734. 0x03,
  1735. LNKA,
  1736. Zero
  1737. }
  1738. })
  1739. Name (AR0A, Package (0x04)
  1740. {
  1741. Package (0x04)
  1742. {
  1743. 0xFFFF,
  1744. Zero,
  1745. Zero,
  1746. 0x11
  1747. },
  1748. Package (0x04)
  1749. {
  1750. 0xFFFF,
  1751. One,
  1752. Zero,
  1753. 0x12
  1754. },
  1755. Package (0x04)
  1756. {
  1757. 0xFFFF,
  1758. 0x02,
  1759. Zero,
  1760. 0x13
  1761. },
  1762. Package (0x04)
  1763. {
  1764. 0xFFFF,
  1765. 0x03,
  1766. Zero,
  1767. 0x10
  1768. }
  1769. })
  1770. Name (PR0B, Package (0x04)
  1771. {
  1772. Package (0x04)
  1773. {
  1774. 0xFFFF,
  1775. Zero,
  1776. LNKC,
  1777. Zero
  1778. },
  1779. Package (0x04)
  1780. {
  1781. 0xFFFF,
  1782. One,
  1783. LNKD,
  1784. Zero
  1785. },
  1786. Package (0x04)
  1787. {
  1788. 0xFFFF,
  1789. 0x02,
  1790. LNKA,
  1791. Zero
  1792. },
  1793. Package (0x04)
  1794. {
  1795. 0xFFFF,
  1796. 0x03,
  1797. LNKB,
  1798. Zero
  1799. }
  1800. })
  1801. Name (AR0B, Package (0x04)
  1802. {
  1803. Package (0x04)
  1804. {
  1805. 0xFFFF,
  1806. Zero,
  1807. Zero,
  1808. 0x12
  1809. },
  1810. Package (0x04)
  1811. {
  1812. 0xFFFF,
  1813. One,
  1814. Zero,
  1815. 0x13
  1816. },
  1817. Package (0x04)
  1818. {
  1819. 0xFFFF,
  1820. 0x02,
  1821. Zero,
  1822. 0x10
  1823. },
  1824. Package (0x04)
  1825. {
  1826. 0xFFFF,
  1827. 0x03,
  1828. Zero,
  1829. 0x11
  1830. }
  1831. })
  1832. Name (PR0C, Package (0x04)
  1833. {
  1834. Package (0x04)
  1835. {
  1836. 0xFFFF,
  1837. Zero,
  1838. LNKD,
  1839. Zero
  1840. },
  1841. Package (0x04)
  1842. {
  1843. 0xFFFF,
  1844. One,
  1845. LNKA,
  1846. Zero
  1847. },
  1848. Package (0x04)
  1849. {
  1850. 0xFFFF,
  1851. 0x02,
  1852. LNKB,
  1853. Zero
  1854. },
  1855. Package (0x04)
  1856. {
  1857. 0xFFFF,
  1858. 0x03,
  1859. LNKC,
  1860. Zero
  1861. }
  1862. })
  1863. Name (AR0C, Package (0x04)
  1864. {
  1865. Package (0x04)
  1866. {
  1867. 0xFFFF,
  1868. Zero,
  1869. Zero,
  1870. 0x13
  1871. },
  1872. Package (0x04)
  1873. {
  1874. 0xFFFF,
  1875. One,
  1876. Zero,
  1877. 0x10
  1878. },
  1879. Package (0x04)
  1880. {
  1881. 0xFFFF,
  1882. 0x02,
  1883. Zero,
  1884. 0x11
  1885. },
  1886. Package (0x04)
  1887. {
  1888. 0xFFFF,
  1889. 0x03,
  1890. Zero,
  1891. 0x12
  1892. }
  1893. })
  1894. Name (PRSA, ResourceTemplate ()
  1895. {
  1896. IRQ (Level, ActiveLow, Shared, )
  1897. {3,4,5,6,10,11,12,14,15}
  1898. })
  1899. Alias (PRSA, PRSB)
  1900. Alias (PRSA, PRSC)
  1901. Alias (PRSA, PRSD)
  1902. Alias (PRSA, PRSE)
  1903. Alias (PRSA, PRSF)
  1904. Alias (PRSA, PRSG)
  1905. Alias (PRSA, PRSH)
  1906. Device (PCI0)
  1907. {
  1908. Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID
  1909. Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID
  1910. Name (_ADR, Zero) // _ADR: Address
  1911. Method (^BN00, 0, NotSerialized)
  1912. {
  1913. Return (Zero)
  1914. }
  1915. Method (_BBN, 0, NotSerialized) // _BBN: BIOS Bus Number
  1916. {
  1917. Return (BN00 ())
  1918. }
  1919. Name (_UID, Zero) // _UID: Unique ID
  1920. Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
  1921. {
  1922. If (PICM)
  1923. {
  1924. Return (AR00 ())
  1925. }
  1926. Return (PR00 ())
  1927. }
  1928. OperationRegion (HBUS, PCI_Config, Zero, 0x0100)
  1929. Field (HBUS, DWordAcc, NoLock, Preserve)
  1930. {
  1931. Offset (0x40),
  1932. EPEN, 1,
  1933. , 11,
  1934. EPBR, 20,
  1935. Offset (0x48),
  1936. MHEN, 1,
  1937. , 14,
  1938. MHBR, 17,
  1939. Offset (0x50),
  1940. GCLK, 1,
  1941. Offset (0x54),
  1942. D0EN, 1,
  1943. Offset (0x60),
  1944. PXEN, 1,
  1945. PXSZ, 2,
  1946. , 23,
  1947. PXBR, 6,
  1948. Offset (0x68),
  1949. DIEN, 1,
  1950. , 11,
  1951. DIBR, 20,
  1952. Offset (0x70),
  1953. , 20,
  1954. MEBR, 12,
  1955. Offset (0x80),
  1956. , 4,
  1957. PM0H, 2,
  1958. Offset (0x81),
  1959. PM1L, 2,
  1960. , 2,
  1961. PM1H, 2,
  1962. Offset (0x82),
  1963. PM2L, 2,
  1964. , 2,
  1965. PM2H, 2,
  1966. Offset (0x83),
  1967. PM3L, 2,
  1968. , 2,
  1969. PM3H, 2,
  1970. Offset (0x84),
  1971. PM4L, 2,
  1972. , 2,
  1973. PM4H, 2,
  1974. Offset (0x85),
  1975. PM5L, 2,
  1976. , 2,
  1977. PM5H, 2,
  1978. Offset (0x86),
  1979. PM6L, 2,
  1980. , 2,
  1981. PM6H, 2,
  1982. Offset (0x87),
  1983. Offset (0xA8),
  1984. , 20,
  1985. TUUD, 19,
  1986. Offset (0xBC),
  1987. , 20,
  1988. TLUD, 12,
  1989. Offset (0xC8),
  1990. , 7,
  1991. HTSE, 1
  1992. }
  1993. OperationRegion (MCHT, SystemMemory, 0xFED10000, 0x1100)
  1994. Field (MCHT, ByteAcc, NoLock, Preserve)
  1995. {
  1996. }
  1997. Name (BUF0, ResourceTemplate ()
  1998. {
  1999. WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
  2000. 0x0000, // Granularity
  2001. 0x0000, // Range Minimum
  2002. 0x00FF, // Range Maximum
  2003. 0x0000, // Translation Offset
  2004. 0x0100, // Length
  2005. ,, _Y00)
  2006. DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
  2007. 0x00000000, // Granularity
  2008. 0x00000000, // Range Minimum
  2009. 0x00000CF7, // Range Maximum
  2010. 0x00000000, // Translation Offset
  2011. 0x00000CF8, // Length
  2012. ,, , TypeStatic)
  2013. IO (Decode16,
  2014. 0x0CF8, // Range Minimum
  2015. 0x0CF8, // Range Maximum
  2016. 0x01, // Alignment
  2017. 0x08, // Length
  2018. )
  2019. DWordIO (ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange,
  2020. 0x00000000, // Granularity
  2021. 0x00000D00, // Range Minimum
  2022. 0x0000FFFF, // Range Maximum
  2023. 0x00000000, // Translation Offset
  2024. 0x0000F300, // Length
  2025. ,, , TypeStatic)
  2026. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  2027. 0x00000000, // Granularity
  2028. 0x000A0000, // Range Minimum
  2029. 0x000BFFFF, // Range Maximum
  2030. 0x00000000, // Translation Offset
  2031. 0x00020000, // Length
  2032. ,, , AddressRangeMemory, TypeStatic)
  2033. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  2034. 0x00000000, // Granularity
  2035. 0x000C0000, // Range Minimum
  2036. 0x000C3FFF, // Range Maximum
  2037. 0x00000000, // Translation Offset
  2038. 0x00004000, // Length
  2039. ,, _Y01, AddressRangeMemory, TypeStatic)
  2040. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  2041. 0x00000000, // Granularity
  2042. 0x000C4000, // Range Minimum
  2043. 0x000C7FFF, // Range Maximum
  2044. 0x00000000, // Translation Offset
  2045. 0x00004000, // Length
  2046. ,, _Y02, AddressRangeMemory, TypeStatic)
  2047. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  2048. 0x00000000, // Granularity
  2049. 0x000C8000, // Range Minimum
  2050. 0x000CBFFF, // Range Maximum
  2051. 0x00000000, // Translation Offset
  2052. 0x00004000, // Length
  2053. ,, _Y03, AddressRangeMemory, TypeStatic)
  2054. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  2055. 0x00000000, // Granularity
  2056. 0x000CC000, // Range Minimum
  2057. 0x000CFFFF, // Range Maximum
  2058. 0x00000000, // Translation Offset
  2059. 0x00004000, // Length
  2060. ,, _Y04, AddressRangeMemory, TypeStatic)
  2061. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  2062. 0x00000000, // Granularity
  2063. 0x000D0000, // Range Minimum
  2064. 0x000D3FFF, // Range Maximum
  2065. 0x00000000, // Translation Offset
  2066. 0x00004000, // Length
  2067. ,, _Y05, AddressRangeMemory, TypeStatic)
  2068. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  2069. 0x00000000, // Granularity
  2070. 0x000D4000, // Range Minimum
  2071. 0x000D7FFF, // Range Maximum
  2072. 0x00000000, // Translation Offset
  2073. 0x00004000, // Length
  2074. ,, _Y06, AddressRangeMemory, TypeStatic)
  2075. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  2076. 0x00000000, // Granularity
  2077. 0x000D8000, // Range Minimum
  2078. 0x000DBFFF, // Range Maximum
  2079. 0x00000000, // Translation Offset
  2080. 0x00004000, // Length
  2081. ,, _Y07, AddressRangeMemory, TypeStatic)
  2082. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  2083. 0x00000000, // Granularity
  2084. 0x000DC000, // Range Minimum
  2085. 0x000DFFFF, // Range Maximum
  2086. 0x00000000, // Translation Offset
  2087. 0x00004000, // Length
  2088. ,, _Y08, AddressRangeMemory, TypeStatic)
  2089. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  2090. 0x00000000, // Granularity
  2091. 0x000E0000, // Range Minimum
  2092. 0x000E3FFF, // Range Maximum
  2093. 0x00000000, // Translation Offset
  2094. 0x00004000, // Length
  2095. ,, _Y09, AddressRangeMemory, TypeStatic)
  2096. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  2097. 0x00000000, // Granularity
  2098. 0x000E4000, // Range Minimum
  2099. 0x000E7FFF, // Range Maximum
  2100. 0x00000000, // Translation Offset
  2101. 0x00004000, // Length
  2102. ,, _Y0A, AddressRangeMemory, TypeStatic)
  2103. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  2104. 0x00000000, // Granularity
  2105. 0x000E8000, // Range Minimum
  2106. 0x000EBFFF, // Range Maximum
  2107. 0x00000000, // Translation Offset
  2108. 0x00004000, // Length
  2109. ,, _Y0B, AddressRangeMemory, TypeStatic)
  2110. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  2111. 0x00000000, // Granularity
  2112. 0x000EC000, // Range Minimum
  2113. 0x000EFFFF, // Range Maximum
  2114. 0x00000000, // Translation Offset
  2115. 0x00004000, // Length
  2116. ,, _Y0C, AddressRangeMemory, TypeStatic)
  2117. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  2118. 0x00000000, // Granularity
  2119. 0x000F0000, // Range Minimum
  2120. 0x000FFFFF, // Range Maximum
  2121. 0x00000000, // Translation Offset
  2122. 0x00010000, // Length
  2123. ,, _Y0D, AddressRangeMemory, TypeStatic)
  2124. DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  2125. 0x00000000, // Granularity
  2126. 0x00000000, // Range Minimum
  2127. 0xFEAFFFFF, // Range Maximum
  2128. 0x00000000, // Translation Offset
  2129. 0xFEB00000, // Length
  2130. ,, _Y0E, AddressRangeMemory, TypeStatic)
  2131. QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, Cacheable, ReadWrite,
  2132. 0x0000000000000000, // Granularity
  2133. 0x0000000000010000, // Range Minimum
  2134. 0x000000000001FFFF, // Range Maximum
  2135. 0x0000000000000000, // Translation Offset
  2136. 0x0000000000010000, // Length
  2137. ,, _Y0F, AddressRangeMemory, TypeStatic)
  2138. })
  2139. Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
  2140. {
  2141. CreateWordField (BUF0, \_SB.PCI0._Y00._MAX, PBMX) // _MAX: Maximum Base Address
  2142. Store (Subtract (ShiftRight (PELN, 0x14), 0x02), PBMX) /* \_SB_.PCI0._CRS.PBMX */
  2143. CreateWordField (BUF0, \_SB.PCI0._Y00._LEN, PBLN) // _LEN: Length
  2144. Store (Subtract (ShiftRight (PELN, 0x14), One), PBLN) /* \_SB_.PCI0._CRS.PBLN */
  2145. If (PM1L)
  2146. {
  2147. CreateDWordField (BUF0, \_SB.PCI0._Y01._LEN, C0LN) // _LEN: Length
  2148. Store (Zero, C0LN) /* \_SB_.PCI0._CRS.C0LN */
  2149. }
  2150. If (LEqual (PM1L, One))
  2151. {
  2152. CreateBitField (BUF0, \_SB.PCI0._Y01._RW, C0RW) // _RW_: Read-Write Status
  2153. Store (Zero, C0RW) /* \_SB_.PCI0._CRS.C0RW */
  2154. }
  2155. If (PM1H)
  2156. {
  2157. CreateDWordField (BUF0, \_SB.PCI0._Y02._LEN, C4LN) // _LEN: Length
  2158. Store (Zero, C4LN) /* \_SB_.PCI0._CRS.C4LN */
  2159. }
  2160. If (LEqual (PM1H, One))
  2161. {
  2162. CreateBitField (BUF0, \_SB.PCI0._Y02._RW, C4RW) // _RW_: Read-Write Status
  2163. Store (Zero, C4RW) /* \_SB_.PCI0._CRS.C4RW */
  2164. }
  2165. If (PM2L)
  2166. {
  2167. CreateDWordField (BUF0, \_SB.PCI0._Y03._LEN, C8LN) // _LEN: Length
  2168. Store (Zero, C8LN) /* \_SB_.PCI0._CRS.C8LN */
  2169. }
  2170. If (LEqual (PM2L, One))
  2171. {
  2172. CreateBitField (BUF0, \_SB.PCI0._Y03._RW, C8RW) // _RW_: Read-Write Status
  2173. Store (Zero, C8RW) /* \_SB_.PCI0._CRS.C8RW */
  2174. }
  2175. If (PM2H)
  2176. {
  2177. CreateDWordField (BUF0, \_SB.PCI0._Y04._LEN, CCLN) // _LEN: Length
  2178. Store (Zero, CCLN) /* \_SB_.PCI0._CRS.CCLN */
  2179. }
  2180. If (LEqual (PM2H, One))
  2181. {
  2182. CreateBitField (BUF0, \_SB.PCI0._Y04._RW, CCRW) // _RW_: Read-Write Status
  2183. Store (Zero, CCRW) /* \_SB_.PCI0._CRS.CCRW */
  2184. }
  2185. If (PM3L)
  2186. {
  2187. CreateDWordField (BUF0, \_SB.PCI0._Y05._LEN, D0LN) // _LEN: Length
  2188. Store (Zero, D0LN) /* \_SB_.PCI0._CRS.D0LN */
  2189. }
  2190. If (LEqual (PM3L, One))
  2191. {
  2192. CreateBitField (BUF0, \_SB.PCI0._Y05._RW, D0RW) // _RW_: Read-Write Status
  2193. Store (Zero, D0RW) /* \_SB_.PCI0._CRS.D0RW */
  2194. }
  2195. If (PM3H)
  2196. {
  2197. CreateDWordField (BUF0, \_SB.PCI0._Y06._LEN, D4LN) // _LEN: Length
  2198. Store (Zero, D4LN) /* \_SB_.PCI0._CRS.D4LN */
  2199. }
  2200. If (LEqual (PM3H, One))
  2201. {
  2202. CreateBitField (BUF0, \_SB.PCI0._Y06._RW, D4RW) // _RW_: Read-Write Status
  2203. Store (Zero, D4RW) /* \_SB_.PCI0._CRS.D4RW */
  2204. }
  2205. If (PM4L)
  2206. {
  2207. CreateDWordField (BUF0, \_SB.PCI0._Y07._LEN, D8LN) // _LEN: Length
  2208. Store (Zero, D8LN) /* \_SB_.PCI0._CRS.D8LN */
  2209. }
  2210. If (LEqual (PM4L, One))
  2211. {
  2212. CreateBitField (BUF0, \_SB.PCI0._Y07._RW, D8RW) // _RW_: Read-Write Status
  2213. Store (Zero, D8RW) /* \_SB_.PCI0._CRS.D8RW */
  2214. }
  2215. If (PM4H)
  2216. {
  2217. CreateDWordField (BUF0, \_SB.PCI0._Y08._LEN, DCLN) // _LEN: Length
  2218. Store (Zero, DCLN) /* \_SB_.PCI0._CRS.DCLN */
  2219. }
  2220. If (LEqual (PM4H, One))
  2221. {
  2222. CreateBitField (BUF0, \_SB.PCI0._Y08._RW, DCRW) // _RW_: Read-Write Status
  2223. Store (Zero, DCRW) /* \_SB_.PCI0._CRS.DCRW */
  2224. }
  2225. If (PM5L)
  2226. {
  2227. CreateDWordField (BUF0, \_SB.PCI0._Y09._LEN, E0LN) // _LEN: Length
  2228. Store (Zero, E0LN) /* \_SB_.PCI0._CRS.E0LN */
  2229. }
  2230. If (LEqual (PM5L, One))
  2231. {
  2232. CreateBitField (BUF0, \_SB.PCI0._Y09._RW, E0RW) // _RW_: Read-Write Status
  2233. Store (Zero, E0RW) /* \_SB_.PCI0._CRS.E0RW */
  2234. }
  2235. If (PM5H)
  2236. {
  2237. CreateDWordField (BUF0, \_SB.PCI0._Y0A._LEN, E4LN) // _LEN: Length
  2238. Store (Zero, E4LN) /* \_SB_.PCI0._CRS.E4LN */
  2239. }
  2240. If (LEqual (PM5H, One))
  2241. {
  2242. CreateBitField (BUF0, \_SB.PCI0._Y0A._RW, E4RW) // _RW_: Read-Write Status
  2243. Store (Zero, E4RW) /* \_SB_.PCI0._CRS.E4RW */
  2244. }
  2245. If (PM6L)
  2246. {
  2247. CreateDWordField (BUF0, \_SB.PCI0._Y0B._LEN, E8LN) // _LEN: Length
  2248. Store (Zero, E8LN) /* \_SB_.PCI0._CRS.E8LN */
  2249. }
  2250. If (LEqual (PM6L, One))
  2251. {
  2252. CreateBitField (BUF0, \_SB.PCI0._Y0B._RW, E8RW) // _RW_: Read-Write Status
  2253. Store (Zero, E8RW) /* \_SB_.PCI0._CRS.E8RW */
  2254. }
  2255. If (PM6H)
  2256. {
  2257. CreateDWordField (BUF0, \_SB.PCI0._Y0C._LEN, ECLN) // _LEN: Length
  2258. Store (Zero, ECLN) /* \_SB_.PCI0._CRS.ECLN */
  2259. }
  2260. If (LEqual (PM6H, One))
  2261. {
  2262. CreateBitField (BUF0, \_SB.PCI0._Y0C._RW, ECRW) // _RW_: Read-Write Status
  2263. Store (Zero, ECRW) /* \_SB_.PCI0._CRS.ECRW */
  2264. }
  2265. If (PM0H)
  2266. {
  2267. CreateDWordField (BUF0, \_SB.PCI0._Y0D._LEN, F0LN) // _LEN: Length
  2268. Store (Zero, F0LN) /* \_SB_.PCI0._CRS.F0LN */
  2269. }
  2270. If (LEqual (PM0H, One))
  2271. {
  2272. CreateBitField (BUF0, \_SB.PCI0._Y0D._RW, F0RW) // _RW_: Read-Write Status
  2273. Store (Zero, F0RW) /* \_SB_.PCI0._CRS.F0RW */
  2274. }
  2275. CreateDWordField (BUF0, \_SB.PCI0._Y0E._MIN, M1MN) // _MIN: Minimum Base Address
  2276. CreateDWordField (BUF0, \_SB.PCI0._Y0E._MAX, M1MX) // _MAX: Maximum Base Address
  2277. CreateDWordField (BUF0, \_SB.PCI0._Y0E._LEN, M1LN) // _LEN: Length
  2278. ShiftLeft (TLUD, 0x14, M1MN) /* \_SB_.PCI0._CRS.M1MN */
  2279. Add (Subtract (M1MX, M1MN), One, M1LN) /* \_SB_.PCI0._CRS.M1LN */
  2280. If (LOr (LEqual (MM64, Zero), LLessEqual (OSYS, 0x07D3)))
  2281. {
  2282. CreateQWordField (BUF0, \_SB.PCI0._Y0F._LEN, MSLN) // _LEN: Length
  2283. Store (Zero, MSLN) /* \_SB_.PCI0._CRS.MSLN */
  2284. }
  2285. Else
  2286. {
  2287. CreateQWordField (BUF0, \_SB.PCI0._Y0F._LEN, M2LN) // _LEN: Length
  2288. CreateQWordField (BUF0, \_SB.PCI0._Y0F._MIN, M2MN) // _MIN: Minimum Base Address
  2289. CreateQWordField (BUF0, \_SB.PCI0._Y0F._MAX, M2MX) // _MAX: Maximum Base Address
  2290. Store (0x0000000400000000, M2LN) /* \_SB_.PCI0._CRS.M2LN */
  2291. If (LGreaterEqual (TUUD, 0x1000))
  2292. {
  2293. ShiftLeft (TUUD, 0x14, M2MN) /* \_SB_.PCI0._CRS.M2MN */
  2294. }
  2295. Else
  2296. {
  2297. Store (0x0000000100000000, M2MN) /* \_SB_.PCI0._CRS.M2MN */
  2298. }
  2299. Subtract (Add (M2MN, M2LN), One, M2MX) /* \_SB_.PCI0._CRS.M2MX */
  2300. }
  2301. Return (BUF0) /* \_SB_.PCI0.BUF0 */
  2302. }
  2303. Name (GUID, Buffer (0x10)
  2304. {
  2305. /* 0000 */ 0x5B, 0x4D, 0xDB, 0x33, 0xF7, 0x1F, 0x1C, 0x40,
  2306. /* 0008 */ 0x96, 0x57, 0x74, 0x41, 0xC0, 0x3D, 0xD7, 0x66
  2307. })
  2308. Name (SUPP, Zero)
  2309. Name (CTRL, Zero)
  2310. Name (XCNT, Zero)
  2311. Method (_OSC, 4, Serialized) // _OSC: Operating System Capabilities
  2312. {
  2313. Store (Arg3, Local0)
  2314. CreateDWordField (Local0, Zero, CDW1)
  2315. CreateDWordField (Local0, 0x04, CDW2)
  2316. CreateDWordField (Local0, 0x08, CDW3)
  2317. If (^XHC.CUID (Arg0))
  2318. {
  2319. Return (^XHC.POSC (Arg1, Arg2, Arg3))
  2320. }
  2321. Else
  2322. {
  2323. If (_OSI ("Windows 2012"))
  2324. {
  2325. If (LEqual (XCNT, Zero))
  2326. {
  2327. ^XHC.XSEL ()
  2328. Increment (XCNT)
  2329. }
  2330. }
  2331. }
  2332. If (LEqual (Arg0, GUID))
  2333. {
  2334. Store (CDW2, SUPP) /* \_SB_.PCI0.SUPP */
  2335. Store (CDW3, CTRL) /* \_SB_.PCI0.CTRL */
  2336. If (LEqual (NEXP, Zero))
  2337. {
  2338. And (CTRL, 0xFFFFFFF8, CTRL) /* \_SB_.PCI0.CTRL */
  2339. }
  2340. If (NEXP)
  2341. {
  2342. If (Not (And (CDW1, One)))
  2343. {
  2344. If (And (CTRL, One))
  2345. {
  2346. NHPG ()
  2347. }
  2348. If (And (CTRL, 0x04))
  2349. {
  2350. NPME ()
  2351. }
  2352. }
  2353. }
  2354. If (LNotEqual (Arg1, One))
  2355. {
  2356. Or (CDW1, 0x08, CDW1) /* \_SB_.PCI0._OSC.CDW1 */
  2357. }
  2358. If (LNotEqual (CDW3, CTRL))
  2359. {
  2360. Or (CDW1, 0x10, CDW1) /* \_SB_.PCI0._OSC.CDW1 */
  2361. }
  2362. Store (CTRL, CDW3) /* \_SB_.PCI0._OSC.CDW3 */
  2363. Store (CTRL, OSCC) /* \OSCC */
  2364. Return (Local0)
  2365. }
  2366. Else
  2367. {
  2368. Or (CDW1, 0x04, CDW1) /* \_SB_.PCI0._OSC.CDW1 */
  2369. Return (Local0)
  2370. }
  2371. }
  2372. Scope (\_SB.PCI0)
  2373. {
  2374. Method (AR00, 0, NotSerialized)
  2375. {
  2376. Return (^^AR00) /* \_SB_.AR00 */
  2377. }
  2378. Method (PR00, 0, NotSerialized)
  2379. {
  2380. Return (^^PR00) /* \_SB_.PR00 */
  2381. }
  2382. Method (AR01, 0, NotSerialized)
  2383. {
  2384. Return (^^AR01) /* \_SB_.AR01 */
  2385. }
  2386. Method (PR01, 0, NotSerialized)
  2387. {
  2388. Return (^^PR01) /* \_SB_.PR01 */
  2389. }
  2390. Method (AR02, 0, NotSerialized)
  2391. {
  2392. Return (^^AR02) /* \_SB_.AR02 */
  2393. }
  2394. Method (PR02, 0, NotSerialized)
  2395. {
  2396. Return (^^PR02) /* \_SB_.PR02 */
  2397. }
  2398. Method (AR04, 0, NotSerialized)
  2399. {
  2400. Return (^^AR04) /* \_SB_.AR04 */
  2401. }
  2402. Method (PR04, 0, NotSerialized)
  2403. {
  2404. Return (^^PR04) /* \_SB_.PR04 */
  2405. }
  2406. Method (AR05, 0, NotSerialized)
  2407. {
  2408. Return (^^AR05) /* \_SB_.AR05 */
  2409. }
  2410. Method (PR05, 0, NotSerialized)
  2411. {
  2412. Return (^^PR05) /* \_SB_.PR05 */
  2413. }
  2414. Method (AR06, 0, NotSerialized)
  2415. {
  2416. Return (^^AR06) /* \_SB_.AR06 */
  2417. }
  2418. Method (PR06, 0, NotSerialized)
  2419. {
  2420. Return (^^PR06) /* \_SB_.PR06 */
  2421. }
  2422. Method (AR07, 0, NotSerialized)
  2423. {
  2424. Return (^^AR07) /* \_SB_.AR07 */
  2425. }
  2426. Method (PR07, 0, NotSerialized)
  2427. {
  2428. Return (^^PR07) /* \_SB_.PR07 */
  2429. }
  2430. Method (AR08, 0, NotSerialized)
  2431. {
  2432. Return (^^AR08) /* \_SB_.AR08 */
  2433. }
  2434. Method (PR08, 0, NotSerialized)
  2435. {
  2436. Return (^^PR08) /* \_SB_.PR08 */
  2437. }
  2438. Method (AR09, 0, NotSerialized)
  2439. {
  2440. Return (^^AR09) /* \_SB_.AR09 */
  2441. }
  2442. Method (PR09, 0, NotSerialized)
  2443. {
  2444. Return (^^PR09) /* \_SB_.PR09 */
  2445. }
  2446. Method (AR0E, 0, NotSerialized)
  2447. {
  2448. Return (^^AR0E) /* \_SB_.AR0E */
  2449. }
  2450. Method (PR0E, 0, NotSerialized)
  2451. {
  2452. Return (^^PR0E) /* \_SB_.PR0E */
  2453. }
  2454. Method (AR0F, 0, NotSerialized)
  2455. {
  2456. Return (^^AR0F) /* \_SB_.AR0F */
  2457. }
  2458. Method (PR0F, 0, NotSerialized)
  2459. {
  2460. Return (^^PR0F) /* \_SB_.PR0F */
  2461. }
  2462. Method (AR0A, 0, NotSerialized)
  2463. {
  2464. Return (^^AR0A) /* \_SB_.AR0A */
  2465. }
  2466. Method (PR0A, 0, NotSerialized)
  2467. {
  2468. Return (^^PR0A) /* \_SB_.PR0A */
  2469. }
  2470. Method (AR0B, 0, NotSerialized)
  2471. {
  2472. Return (^^AR0B) /* \_SB_.AR0B */
  2473. }
  2474. Method (PR0B, 0, NotSerialized)
  2475. {
  2476. Return (^^PR0B) /* \_SB_.PR0B */
  2477. }
  2478. Method (AR0C, 0, NotSerialized)
  2479. {
  2480. Return (^^AR0C) /* \_SB_.AR0C */
  2481. }
  2482. Method (PR0C, 0, NotSerialized)
  2483. {
  2484. Return (^^PR0C) /* \_SB_.PR0C */
  2485. }
  2486. }
  2487. Device (TPMX)
  2488. {
  2489. Name (_HID, EisaId ("PNP0C01") /* System Board */) // _HID: Hardware ID
  2490. Name (_UID, One) // _UID: Unique ID
  2491. Name (CRS, ResourceTemplate ()
  2492. {
  2493. Memory32Fixed (ReadOnly,
  2494. 0xFED40000, // Address Base
  2495. 0x00005000, // Address Length
  2496. )
  2497. })
  2498. Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
  2499. {
  2500. Return (CRS) /* \_SB_.PCI0.TPMX.CRS_ */
  2501. }
  2502. Method (_STA, 0, NotSerialized) // _STA: Status
  2503. {
  2504. If (TPMF)
  2505. {
  2506. Return (Zero)
  2507. }
  2508. Return (0x0F)
  2509. }
  2510. }
  2511. Device (LPCB)
  2512. {
  2513. Name (_ADR, 0x001F0000) // _ADR: Address
  2514. Scope (\_SB)
  2515. {
  2516. OperationRegion (PCI0.LPCB.LPC1, PCI_Config, 0x40, 0xC0)
  2517. Field (PCI0.LPCB.LPC1, AnyAcc, NoLock, Preserve)
  2518. {
  2519. Offset (0x20),
  2520. PARC, 8,
  2521. PBRC, 8,
  2522. PCRC, 8,
  2523. PDRC, 8,
  2524. Offset (0x28),
  2525. PERC, 8,
  2526. PFRC, 8,
  2527. PGRC, 8,
  2528. PHRC, 8,
  2529. Offset (0x6C),
  2530. Offset (0x6D),
  2531. Offset (0x6E),
  2532. XUSB, 1
  2533. }
  2534. Device (LNKA)
  2535. {
  2536. Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
  2537. Name (_UID, One) // _UID: Unique ID
  2538. Method (_DIS, 0, Serialized) // _DIS: Disable Device
  2539. {
  2540. Or (PARC, 0x80, PARC) /* \_SB_.PARC */
  2541. }
  2542. Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings
  2543. {
  2544. Return (PRSA) /* \_SB_.PRSA */
  2545. }
  2546. Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
  2547. {
  2548. Name (RTLA, ResourceTemplate ()
  2549. {
  2550. IRQ (Level, ActiveLow, Shared, )
  2551. {}
  2552. })
  2553. CreateWordField (RTLA, One, IRQ0)
  2554. Store (Zero, IRQ0) /* \_SB_.LNKA._CRS.IRQ0 */
  2555. ShiftLeft (One, And (PARC, 0x0F), IRQ0) /* \_SB_.LNKA._CRS.IRQ0 */
  2556. Return (RTLA) /* \_SB_.LNKA._CRS.RTLA */
  2557. }
  2558. Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
  2559. {
  2560. CreateWordField (Arg0, One, IRQ0)
  2561. FindSetRightBit (IRQ0, Local0)
  2562. Decrement (Local0)
  2563. Store (Local0, PARC) /* \_SB_.PARC */
  2564. }
  2565. Method (_STA, 0, Serialized) // _STA: Status
  2566. {
  2567. If (And (PARC, 0x80))
  2568. {
  2569. Return (0x09)
  2570. }
  2571. Else
  2572. {
  2573. Return (0x0B)
  2574. }
  2575. }
  2576. }
  2577. Device (LNKB)
  2578. {
  2579. Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
  2580. Name (_UID, 0x02) // _UID: Unique ID
  2581. Method (_DIS, 0, Serialized) // _DIS: Disable Device
  2582. {
  2583. Or (PBRC, 0x80, PBRC) /* \_SB_.PBRC */
  2584. }
  2585. Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings
  2586. {
  2587. Return (PRSB) /* \_SB_.PRSB */
  2588. }
  2589. Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
  2590. {
  2591. Name (RTLB, ResourceTemplate ()
  2592. {
  2593. IRQ (Level, ActiveLow, Shared, )
  2594. {}
  2595. })
  2596. CreateWordField (RTLB, One, IRQ0)
  2597. Store (Zero, IRQ0) /* \_SB_.LNKB._CRS.IRQ0 */
  2598. ShiftLeft (One, And (PBRC, 0x0F), IRQ0) /* \_SB_.LNKB._CRS.IRQ0 */
  2599. Return (RTLB) /* \_SB_.LNKB._CRS.RTLB */
  2600. }
  2601. Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
  2602. {
  2603. CreateWordField (Arg0, One, IRQ0)
  2604. FindSetRightBit (IRQ0, Local0)
  2605. Decrement (Local0)
  2606. Store (Local0, PBRC) /* \_SB_.PBRC */
  2607. }
  2608. Method (_STA, 0, Serialized) // _STA: Status
  2609. {
  2610. If (And (PBRC, 0x80))
  2611. {
  2612. Return (0x09)
  2613. }
  2614. Else
  2615. {
  2616. Return (0x0B)
  2617. }
  2618. }
  2619. }
  2620. Device (LNKC)
  2621. {
  2622. Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
  2623. Name (_UID, 0x03) // _UID: Unique ID
  2624. Method (_DIS, 0, Serialized) // _DIS: Disable Device
  2625. {
  2626. Or (PCRC, 0x80, PCRC) /* \_SB_.PCRC */
  2627. }
  2628. Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings
  2629. {
  2630. Return (PRSC) /* \_SB_.PRSC */
  2631. }
  2632. Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
  2633. {
  2634. Name (RTLC, ResourceTemplate ()
  2635. {
  2636. IRQ (Level, ActiveLow, Shared, )
  2637. {}
  2638. })
  2639. CreateWordField (RTLC, One, IRQ0)
  2640. Store (Zero, IRQ0) /* \_SB_.LNKC._CRS.IRQ0 */
  2641. ShiftLeft (One, And (PCRC, 0x0F), IRQ0) /* \_SB_.LNKC._CRS.IRQ0 */
  2642. Return (RTLC) /* \_SB_.LNKC._CRS.RTLC */
  2643. }
  2644. Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
  2645. {
  2646. CreateWordField (Arg0, One, IRQ0)
  2647. FindSetRightBit (IRQ0, Local0)
  2648. Decrement (Local0)
  2649. Store (Local0, PCRC) /* \_SB_.PCRC */
  2650. }
  2651. Method (_STA, 0, Serialized) // _STA: Status
  2652. {
  2653. If (And (PCRC, 0x80))
  2654. {
  2655. Return (0x09)
  2656. }
  2657. Else
  2658. {
  2659. Return (0x0B)
  2660. }
  2661. }
  2662. }
  2663. Device (LNKD)
  2664. {
  2665. Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
  2666. Name (_UID, 0x04) // _UID: Unique ID
  2667. Method (_DIS, 0, Serialized) // _DIS: Disable Device
  2668. {
  2669. Or (PDRC, 0x80, PDRC) /* \_SB_.PDRC */
  2670. }
  2671. Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings
  2672. {
  2673. Return (PRSD) /* \_SB_.PRSD */
  2674. }
  2675. Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
  2676. {
  2677. Name (RTLD, ResourceTemplate ()
  2678. {
  2679. IRQ (Level, ActiveLow, Shared, )
  2680. {}
  2681. })
  2682. CreateWordField (RTLD, One, IRQ0)
  2683. Store (Zero, IRQ0) /* \_SB_.LNKD._CRS.IRQ0 */
  2684. ShiftLeft (One, And (PDRC, 0x0F), IRQ0) /* \_SB_.LNKD._CRS.IRQ0 */
  2685. Return (RTLD) /* \_SB_.LNKD._CRS.RTLD */
  2686. }
  2687. Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
  2688. {
  2689. CreateWordField (Arg0, One, IRQ0)
  2690. FindSetRightBit (IRQ0, Local0)
  2691. Decrement (Local0)
  2692. Store (Local0, PDRC) /* \_SB_.PDRC */
  2693. }
  2694. Method (_STA, 0, Serialized) // _STA: Status
  2695. {
  2696. If (And (PDRC, 0x80))
  2697. {
  2698. Return (0x09)
  2699. }
  2700. Else
  2701. {
  2702. Return (0x0B)
  2703. }
  2704. }
  2705. }
  2706. Device (LNKE)
  2707. {
  2708. Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
  2709. Name (_UID, 0x05) // _UID: Unique ID
  2710. Method (_DIS, 0, Serialized) // _DIS: Disable Device
  2711. {
  2712. Or (PERC, 0x80, PERC) /* \_SB_.PERC */
  2713. }
  2714. Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings
  2715. {
  2716. Return (PRSE) /* \_SB_.PRSE */
  2717. }
  2718. Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
  2719. {
  2720. Name (RTLE, ResourceTemplate ()
  2721. {
  2722. IRQ (Level, ActiveLow, Shared, )
  2723. {}
  2724. })
  2725. CreateWordField (RTLE, One, IRQ0)
  2726. Store (Zero, IRQ0) /* \_SB_.LNKE._CRS.IRQ0 */
  2727. ShiftLeft (One, And (PERC, 0x0F), IRQ0) /* \_SB_.LNKE._CRS.IRQ0 */
  2728. Return (RTLE) /* \_SB_.LNKE._CRS.RTLE */
  2729. }
  2730. Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
  2731. {
  2732. CreateWordField (Arg0, One, IRQ0)
  2733. FindSetRightBit (IRQ0, Local0)
  2734. Decrement (Local0)
  2735. Store (Local0, PERC) /* \_SB_.PERC */
  2736. }
  2737. Method (_STA, 0, Serialized) // _STA: Status
  2738. {
  2739. If (And (PERC, 0x80))
  2740. {
  2741. Return (0x09)
  2742. }
  2743. Else
  2744. {
  2745. Return (0x0B)
  2746. }
  2747. }
  2748. }
  2749. Device (LNKF)
  2750. {
  2751. Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
  2752. Name (_UID, 0x06) // _UID: Unique ID
  2753. Method (_DIS, 0, Serialized) // _DIS: Disable Device
  2754. {
  2755. Or (PFRC, 0x80, PFRC) /* \_SB_.PFRC */
  2756. }
  2757. Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings
  2758. {
  2759. Return (PRSF) /* \_SB_.PRSF */
  2760. }
  2761. Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
  2762. {
  2763. Name (RTLF, ResourceTemplate ()
  2764. {
  2765. IRQ (Level, ActiveLow, Shared, )
  2766. {}
  2767. })
  2768. CreateWordField (RTLF, One, IRQ0)
  2769. Store (Zero, IRQ0) /* \_SB_.LNKF._CRS.IRQ0 */
  2770. ShiftLeft (One, And (PFRC, 0x0F), IRQ0) /* \_SB_.LNKF._CRS.IRQ0 */
  2771. Return (RTLF) /* \_SB_.LNKF._CRS.RTLF */
  2772. }
  2773. Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
  2774. {
  2775. CreateWordField (Arg0, One, IRQ0)
  2776. FindSetRightBit (IRQ0, Local0)
  2777. Decrement (Local0)
  2778. Store (Local0, PFRC) /* \_SB_.PFRC */
  2779. }
  2780. Method (_STA, 0, Serialized) // _STA: Status
  2781. {
  2782. If (And (PFRC, 0x80))
  2783. {
  2784. Return (0x09)
  2785. }
  2786. Else
  2787. {
  2788. Return (0x0B)
  2789. }
  2790. }
  2791. }
  2792. Device (LNKG)
  2793. {
  2794. Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
  2795. Name (_UID, 0x07) // _UID: Unique ID
  2796. Method (_DIS, 0, Serialized) // _DIS: Disable Device
  2797. {
  2798. Or (PGRC, 0x80, PGRC) /* \_SB_.PGRC */
  2799. }
  2800. Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings
  2801. {
  2802. Return (PRSG) /* \_SB_.PRSG */
  2803. }
  2804. Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
  2805. {
  2806. Name (RTLG, ResourceTemplate ()
  2807. {
  2808. IRQ (Level, ActiveLow, Shared, )
  2809. {}
  2810. })
  2811. CreateWordField (RTLG, One, IRQ0)
  2812. Store (Zero, IRQ0) /* \_SB_.LNKG._CRS.IRQ0 */
  2813. ShiftLeft (One, And (PGRC, 0x0F), IRQ0) /* \_SB_.LNKG._CRS.IRQ0 */
  2814. Return (RTLG) /* \_SB_.LNKG._CRS.RTLG */
  2815. }
  2816. Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
  2817. {
  2818. CreateWordField (Arg0, One, IRQ0)
  2819. FindSetRightBit (IRQ0, Local0)
  2820. Decrement (Local0)
  2821. Store (Local0, PGRC) /* \_SB_.PGRC */
  2822. }
  2823. Method (_STA, 0, Serialized) // _STA: Status
  2824. {
  2825. If (And (PGRC, 0x80))
  2826. {
  2827. Return (0x09)
  2828. }
  2829. Else
  2830. {
  2831. Return (0x0B)
  2832. }
  2833. }
  2834. }
  2835. Device (LNKH)
  2836. {
  2837. Name (_HID, EisaId ("PNP0C0F") /* PCI Interrupt Link Device */) // _HID: Hardware ID
  2838. Name (_UID, 0x08) // _UID: Unique ID
  2839. Method (_DIS, 0, Serialized) // _DIS: Disable Device
  2840. {
  2841. Or (PHRC, 0x80, PHRC) /* \_SB_.PHRC */
  2842. }
  2843. Method (_PRS, 0, Serialized) // _PRS: Possible Resource Settings
  2844. {
  2845. Return (PRSH) /* \_SB_.PRSH */
  2846. }
  2847. Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
  2848. {
  2849. Name (RTLH, ResourceTemplate ()
  2850. {
  2851. IRQ (Level, ActiveLow, Shared, )
  2852. {}
  2853. })
  2854. CreateWordField (RTLH, One, IRQ0)
  2855. Store (Zero, IRQ0) /* \_SB_.LNKH._CRS.IRQ0 */
  2856. ShiftLeft (One, And (PHRC, 0x0F), IRQ0) /* \_SB_.LNKH._CRS.IRQ0 */
  2857. Return (RTLH) /* \_SB_.LNKH._CRS.RTLH */
  2858. }
  2859. Method (_SRS, 1, Serialized) // _SRS: Set Resource Settings
  2860. {
  2861. CreateWordField (Arg0, One, IRQ0)
  2862. FindSetRightBit (IRQ0, Local0)
  2863. Decrement (Local0)
  2864. Store (Local0, PHRC) /* \_SB_.PHRC */
  2865. }
  2866. Method (_STA, 0, Serialized) // _STA: Status
  2867. {
  2868. If (And (PHRC, 0x80))
  2869. {
  2870. Return (0x09)
  2871. }
  2872. Else
  2873. {
  2874. Return (0x0B)
  2875. }
  2876. }
  2877. }
  2878. }
  2879. OperationRegion (LPC0, PCI_Config, 0x40, 0xC0)
  2880. Field (LPC0, AnyAcc, NoLock, Preserve)
  2881. {
  2882. Offset (0x40),
  2883. IOD0, 8,
  2884. IOD1, 8,
  2885. Offset (0xB0),
  2886. RAEN, 1,
  2887. , 13,
  2888. RCBA, 18
  2889. }
  2890. Device (DMAC)
  2891. {
  2892. Name (_HID, EisaId ("PNP0200") /* PC-class DMA Controller */) // _HID: Hardware ID
  2893. Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
  2894. {
  2895. IO (Decode16,
  2896. 0x0000, // Range Minimum
  2897. 0x0000, // Range Maximum
  2898. 0x01, // Alignment
  2899. 0x20, // Length
  2900. )
  2901. IO (Decode16,
  2902. 0x0081, // Range Minimum
  2903. 0x0081, // Range Maximum
  2904. 0x01, // Alignment
  2905. 0x11, // Length
  2906. )
  2907. IO (Decode16,
  2908. 0x0093, // Range Minimum
  2909. 0x0093, // Range Maximum
  2910. 0x01, // Alignment
  2911. 0x0D, // Length
  2912. )
  2913. IO (Decode16,
  2914. 0x00C0, // Range Minimum
  2915. 0x00C0, // Range Maximum
  2916. 0x01, // Alignment
  2917. 0x20, // Length
  2918. )
  2919. DMA (Compatibility, NotBusMaster, Transfer8_16, )
  2920. {4}
  2921. })
  2922. }
  2923. Device (FWHD)
  2924. {
  2925. Name (_HID, EisaId ("INT0800") /* Intel 82802 Firmware Hub Device */) // _HID: Hardware ID
  2926. Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
  2927. {
  2928. Memory32Fixed (ReadOnly,
  2929. 0xFF000000, // Address Base
  2930. 0x01000000, // Address Length
  2931. )
  2932. })
  2933. }
  2934. Device (HPET)
  2935. {
  2936. Name (_HID, EisaId ("PNP0103") /* HPET System Timer */) // _HID: Hardware ID
  2937. Name (_UID, Zero) // _UID: Unique ID
  2938. Name (BUF0, ResourceTemplate ()
  2939. {
  2940. Memory32Fixed (ReadWrite,
  2941. 0xFED00000, // Address Base
  2942. 0x00000400, // Address Length
  2943. _Y10)
  2944. })
  2945. Method (_STA, 0, NotSerialized) // _STA: Status
  2946. {
  2947. If (LGreaterEqual (OSYS, 0x07D1))
  2948. {
  2949. If (HPAE)
  2950. {
  2951. Return (0x0F)
  2952. }
  2953. }
  2954. Else
  2955. {
  2956. If (HPAE)
  2957. {
  2958. Return (0x0B)
  2959. }
  2960. }
  2961. Return (Zero)
  2962. }
  2963. Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
  2964. {
  2965. If (HPAE)
  2966. {
  2967. CreateDWordField (BUF0, \_SB.PCI0.LPCB.HPET._Y10._BAS, HPT0) // _BAS: Base Address
  2968. If (LEqual (HPAS, One))
  2969. {
  2970. Store (0xFED01000, HPT0) /* \_SB_.PCI0.LPCB.HPET._CRS.HPT0 */
  2971. }
  2972. If (LEqual (HPAS, 0x02))
  2973. {
  2974. Store (0xFED02000, HPT0) /* \_SB_.PCI0.LPCB.HPET._CRS.HPT0 */
  2975. }
  2976. If (LEqual (HPAS, 0x03))
  2977. {
  2978. Store (0xFED03000, HPT0) /* \_SB_.PCI0.LPCB.HPET._CRS.HPT0 */
  2979. }
  2980. }
  2981. Return (BUF0) /* \_SB_.PCI0.LPCB.HPET.BUF0 */
  2982. }
  2983. }
  2984. Device (IPIC)
  2985. {
  2986. Name (_HID, EisaId ("PNP0000") /* 8259-compatible Programmable Interrupt Controller */) // _HID: Hardware ID
  2987. Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
  2988. {
  2989. IO (Decode16,
  2990. 0x0020, // Range Minimum
  2991. 0x0020, // Range Maximum
  2992. 0x01, // Alignment
  2993. 0x02, // Length
  2994. )
  2995. IO (Decode16,
  2996. 0x0024, // Range Minimum
  2997. 0x0024, // Range Maximum
  2998. 0x01, // Alignment
  2999. 0x02, // Length
  3000. )
  3001. IO (Decode16,
  3002. 0x0028, // Range Minimum
  3003. 0x0028, // Range Maximum
  3004. 0x01, // Alignment
  3005. 0x02, // Length
  3006. )
  3007. IO (Decode16,
  3008. 0x002C, // Range Minimum
  3009. 0x002C, // Range Maximum
  3010. 0x01, // Alignment
  3011. 0x02, // Length
  3012. )
  3013. IO (Decode16,
  3014. 0x0030, // Range Minimum
  3015. 0x0030, // Range Maximum
  3016. 0x01, // Alignment
  3017. 0x02, // Length
  3018. )
  3019. IO (Decode16,
  3020. 0x0034, // Range Minimum
  3021. 0x0034, // Range Maximum
  3022. 0x01, // Alignment
  3023. 0x02, // Length
  3024. )
  3025. IO (Decode16,
  3026. 0x0038, // Range Minimum
  3027. 0x0038, // Range Maximum
  3028. 0x01, // Alignment
  3029. 0x02, // Length
  3030. )
  3031. IO (Decode16,
  3032. 0x003C, // Range Minimum
  3033. 0x003C, // Range Maximum
  3034. 0x01, // Alignment
  3035. 0x02, // Length
  3036. )
  3037. IO (Decode16,
  3038. 0x00A0, // Range Minimum
  3039. 0x00A0, // Range Maximum
  3040. 0x01, // Alignment
  3041. 0x02, // Length
  3042. )
  3043. IO (Decode16,
  3044. 0x00A4, // Range Minimum
  3045. 0x00A4, // Range Maximum
  3046. 0x01, // Alignment
  3047. 0x02, // Length
  3048. )
  3049. IO (Decode16,
  3050. 0x00A8, // Range Minimum
  3051. 0x00A8, // Range Maximum
  3052. 0x01, // Alignment
  3053. 0x02, // Length
  3054. )
  3055. IO (Decode16,
  3056. 0x00AC, // Range Minimum
  3057. 0x00AC, // Range Maximum
  3058. 0x01, // Alignment
  3059. 0x02, // Length
  3060. )
  3061. IO (Decode16,
  3062. 0x00B0, // Range Minimum
  3063. 0x00B0, // Range Maximum
  3064. 0x01, // Alignment
  3065. 0x02, // Length
  3066. )
  3067. IO (Decode16,
  3068. 0x00B4, // Range Minimum
  3069. 0x00B4, // Range Maximum
  3070. 0x01, // Alignment
  3071. 0x02, // Length
  3072. )
  3073. IO (Decode16,
  3074. 0x00B8, // Range Minimum
  3075. 0x00B8, // Range Maximum
  3076. 0x01, // Alignment
  3077. 0x02, // Length
  3078. )
  3079. IO (Decode16,
  3080. 0x00BC, // Range Minimum
  3081. 0x00BC, // Range Maximum
  3082. 0x01, // Alignment
  3083. 0x02, // Length
  3084. )
  3085. IO (Decode16,
  3086. 0x04D0, // Range Minimum
  3087. 0x04D0, // Range Maximum
  3088. 0x01, // Alignment
  3089. 0x02, // Length
  3090. )
  3091. IRQNoFlags ()
  3092. {2}
  3093. })
  3094. }
  3095. Device (LDRC)
  3096. {
  3097. Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID
  3098. Name (_UID, 0x02) // _UID: Unique ID
  3099. Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
  3100. {
  3101. IO (Decode16,
  3102. 0x002E, // Range Minimum
  3103. 0x002E, // Range Maximum
  3104. 0x01, // Alignment
  3105. 0x02, // Length
  3106. )
  3107. IO (Decode16,
  3108. 0x004E, // Range Minimum
  3109. 0x004E, // Range Maximum
  3110. 0x01, // Alignment
  3111. 0x02, // Length
  3112. )
  3113. IO (Decode16,
  3114. 0x0061, // Range Minimum
  3115. 0x0061, // Range Maximum
  3116. 0x01, // Alignment
  3117. 0x01, // Length
  3118. )
  3119. IO (Decode16,
  3120. 0x0063, // Range Minimum
  3121. 0x0063, // Range Maximum
  3122. 0x01, // Alignment
  3123. 0x01, // Length
  3124. )
  3125. IO (Decode16,
  3126. 0x0065, // Range Minimum
  3127. 0x0065, // Range Maximum
  3128. 0x01, // Alignment
  3129. 0x01, // Length
  3130. )
  3131. IO (Decode16,
  3132. 0x0067, // Range Minimum
  3133. 0x0067, // Range Maximum
  3134. 0x01, // Alignment
  3135. 0x01, // Length
  3136. )
  3137. IO (Decode16,
  3138. 0x0068, // Range Minimum
  3139. 0x0068, // Range Maximum
  3140. 0x01, // Alignment
  3141. 0x01, // Length
  3142. )
  3143. IO (Decode16,
  3144. 0x006C, // Range Minimum
  3145. 0x006C, // Range Maximum
  3146. 0x01, // Alignment
  3147. 0x01, // Length
  3148. )
  3149. IO (Decode16,
  3150. 0x0070, // Range Minimum
  3151. 0x0070, // Range Maximum
  3152. 0x01, // Alignment
  3153. 0x01, // Length
  3154. )
  3155. IO (Decode16,
  3156. 0x0080, // Range Minimum
  3157. 0x0080, // Range Maximum
  3158. 0x01, // Alignment
  3159. 0x01, // Length
  3160. )
  3161. IO (Decode16,
  3162. 0x0092, // Range Minimum
  3163. 0x0092, // Range Maximum
  3164. 0x01, // Alignment
  3165. 0x01, // Length
  3166. )
  3167. IO (Decode16,
  3168. 0x00B2, // Range Minimum
  3169. 0x00B2, // Range Maximum
  3170. 0x01, // Alignment
  3171. 0x02, // Length
  3172. )
  3173. IO (Decode16,
  3174. 0x0680, // Range Minimum
  3175. 0x0680, // Range Maximum
  3176. 0x01, // Alignment
  3177. 0x20, // Length
  3178. )
  3179. IO (Decode16,
  3180. 0x1000, // Range Minimum
  3181. 0x1000, // Range Maximum
  3182. 0x01, // Alignment
  3183. 0x10, // Length
  3184. )
  3185. IO (Decode16,
  3186. 0xFFFF, // Range Minimum
  3187. 0xFFFF, // Range Maximum
  3188. 0x01, // Alignment
  3189. 0x01, // Length
  3190. )
  3191. IO (Decode16,
  3192. 0xFFFF, // Range Minimum
  3193. 0xFFFF, // Range Maximum
  3194. 0x01, // Alignment
  3195. 0x01, // Length
  3196. )
  3197. IO (Decode16,
  3198. 0x0400, // Range Minimum
  3199. 0x0400, // Range Maximum
  3200. 0x01, // Alignment
  3201. 0x54, // Length
  3202. )
  3203. IO (Decode16,
  3204. 0x0458, // Range Minimum
  3205. 0x0458, // Range Maximum
  3206. 0x01, // Alignment
  3207. 0x28, // Length
  3208. )
  3209. IO (Decode16,
  3210. 0x0500, // Range Minimum
  3211. 0x0500, // Range Maximum
  3212. 0x01, // Alignment
  3213. 0x80, // Length
  3214. )
  3215. IO (Decode16,
  3216. 0x164E, // Range Minimum
  3217. 0x164E, // Range Maximum
  3218. 0x01, // Alignment
  3219. 0x02, // Length
  3220. )
  3221. IO (Decode16,
  3222. 0x3322, // Range Minimum
  3223. 0x3322, // Range Maximum
  3224. 0x01, // Alignment
  3225. 0x02, // Length
  3226. )
  3227. })
  3228. }
  3229. Device (RTC)
  3230. {
  3231. Name (_HID, EisaId ("PNP0B00") /* AT Real-Time Clock */) // _HID: Hardware ID
  3232. Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
  3233. {
  3234. IO (Decode16,
  3235. 0x0070, // Range Minimum
  3236. 0x0070, // Range Maximum
  3237. 0x01, // Alignment
  3238. 0x08, // Length
  3239. )
  3240. IRQNoFlags ()
  3241. {8}
  3242. })
  3243. }
  3244. Device (TIMR)
  3245. {
  3246. Name (_HID, EisaId ("PNP0100") /* PC-class System Timer */) // _HID: Hardware ID
  3247. Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
  3248. {
  3249. IO (Decode16,
  3250. 0x0040, // Range Minimum
  3251. 0x0040, // Range Maximum
  3252. 0x01, // Alignment
  3253. 0x04, // Length
  3254. )
  3255. IO (Decode16,
  3256. 0x0050, // Range Minimum
  3257. 0x0050, // Range Maximum
  3258. 0x10, // Alignment
  3259. 0x04, // Length
  3260. )
  3261. IRQNoFlags ()
  3262. {0}
  3263. })
  3264. }
  3265. Device (CWDT)
  3266. {
  3267. Name (_HID, EisaId ("INT3F0D") /* ACPI Motherboard Resources */) // _HID: Hardware ID
  3268. Name (_CID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _CID: Compatible ID
  3269. Name (BUF0, ResourceTemplate ()
  3270. {
  3271. IO (Decode16,
  3272. 0x0454, // Range Minimum
  3273. 0x0454, // Range Maximum
  3274. 0x04, // Alignment
  3275. 0x04, // Length
  3276. )
  3277. })
  3278. Method (_STA, 0, Serialized) // _STA: Status
  3279. {
  3280. If (LEqual (WDTE, One))
  3281. {
  3282. Return (0x0F)
  3283. }
  3284. Else
  3285. {
  3286. Return (Zero)
  3287. }
  3288. }
  3289. Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
  3290. {
  3291. Return (BUF0) /* \_SB_.PCI0.LPCB.CWDT.BUF0 */
  3292. }
  3293. }
  3294. Device (RMSC)
  3295. {
  3296. Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID
  3297. Name (_UID, 0x10) // _UID: Unique ID
  3298. Name (CRS1, ResourceTemplate ()
  3299. {
  3300. IO (Decode16,
  3301. 0x0010, // Range Minimum
  3302. 0x0010, // Range Maximum
  3303. 0x00, // Alignment
  3304. 0x10, // Length
  3305. )
  3306. IO (Decode16,
  3307. 0x0022, // Range Minimum
  3308. 0x0022, // Range Maximum
  3309. 0x00, // Alignment
  3310. 0x1E, // Length
  3311. )
  3312. IO (Decode16,
  3313. 0x0044, // Range Minimum
  3314. 0x0044, // Range Maximum
  3315. 0x00, // Alignment
  3316. 0x1C, // Length
  3317. )
  3318. IO (Decode16,
  3319. 0x0062, // Range Minimum
  3320. 0x0062, // Range Maximum
  3321. 0x00, // Alignment
  3322. 0x02, // Length
  3323. )
  3324. IO (Decode16,
  3325. 0x0065, // Range Minimum
  3326. 0x0065, // Range Maximum
  3327. 0x00, // Alignment
  3328. 0x0B, // Length
  3329. )
  3330. IO (Decode16,
  3331. 0x0072, // Range Minimum
  3332. 0x0072, // Range Maximum
  3333. 0x00, // Alignment
  3334. 0x0E, // Length
  3335. )
  3336. IO (Decode16,
  3337. 0x0080, // Range Minimum
  3338. 0x0080, // Range Maximum
  3339. 0x00, // Alignment
  3340. 0x01, // Length
  3341. )
  3342. IO (Decode16,
  3343. 0x0084, // Range Minimum
  3344. 0x0084, // Range Maximum
  3345. 0x00, // Alignment
  3346. 0x03, // Length
  3347. )
  3348. IO (Decode16,
  3349. 0x0088, // Range Minimum
  3350. 0x0088, // Range Maximum
  3351. 0x00, // Alignment
  3352. 0x01, // Length
  3353. )
  3354. IO (Decode16,
  3355. 0x008C, // Range Minimum
  3356. 0x008C, // Range Maximum
  3357. 0x00, // Alignment
  3358. 0x03, // Length
  3359. )
  3360. IO (Decode16,
  3361. 0x0090, // Range Minimum
  3362. 0x0090, // Range Maximum
  3363. 0x00, // Alignment
  3364. 0x10, // Length
  3365. )
  3366. IO (Decode16,
  3367. 0x00A2, // Range Minimum
  3368. 0x00A2, // Range Maximum
  3369. 0x00, // Alignment
  3370. 0x1E, // Length
  3371. )
  3372. IO (Decode16,
  3373. 0x00E0, // Range Minimum
  3374. 0x00E0, // Range Maximum
  3375. 0x00, // Alignment
  3376. 0x10, // Length
  3377. )
  3378. IO (Decode16,
  3379. 0x04D0, // Range Minimum
  3380. 0x04D0, // Range Maximum
  3381. 0x00, // Alignment
  3382. 0x02, // Length
  3383. )
  3384. })
  3385. Name (CRS2, ResourceTemplate ()
  3386. {
  3387. IO (Decode16,
  3388. 0x0010, // Range Minimum
  3389. 0x0010, // Range Maximum
  3390. 0x00, // Alignment
  3391. 0x10, // Length
  3392. )
  3393. IO (Decode16,
  3394. 0x0022, // Range Minimum
  3395. 0x0022, // Range Maximum
  3396. 0x00, // Alignment
  3397. 0x1E, // Length
  3398. )
  3399. IO (Decode16,
  3400. 0x0044, // Range Minimum
  3401. 0x0044, // Range Maximum
  3402. 0x00, // Alignment
  3403. 0x1C, // Length
  3404. )
  3405. IO (Decode16,
  3406. 0x0072, // Range Minimum
  3407. 0x0072, // Range Maximum
  3408. 0x00, // Alignment
  3409. 0x0E, // Length
  3410. )
  3411. IO (Decode16,
  3412. 0x0080, // Range Minimum
  3413. 0x0080, // Range Maximum
  3414. 0x00, // Alignment
  3415. 0x01, // Length
  3416. )
  3417. IO (Decode16,
  3418. 0x0084, // Range Minimum
  3419. 0x0084, // Range Maximum
  3420. 0x00, // Alignment
  3421. 0x03, // Length
  3422. )
  3423. IO (Decode16,
  3424. 0x0088, // Range Minimum
  3425. 0x0088, // Range Maximum
  3426. 0x00, // Alignment
  3427. 0x01, // Length
  3428. )
  3429. IO (Decode16,
  3430. 0x008C, // Range Minimum
  3431. 0x008C, // Range Maximum
  3432. 0x00, // Alignment
  3433. 0x03, // Length
  3434. )
  3435. IO (Decode16,
  3436. 0x0090, // Range Minimum
  3437. 0x0090, // Range Maximum
  3438. 0x00, // Alignment
  3439. 0x10, // Length
  3440. )
  3441. IO (Decode16,
  3442. 0x00A2, // Range Minimum
  3443. 0x00A2, // Range Maximum
  3444. 0x00, // Alignment
  3445. 0x1E, // Length
  3446. )
  3447. IO (Decode16,
  3448. 0x00E0, // Range Minimum
  3449. 0x00E0, // Range Maximum
  3450. 0x00, // Alignment
  3451. 0x10, // Length
  3452. )
  3453. IO (Decode16,
  3454. 0x04D0, // Range Minimum
  3455. 0x04D0, // Range Maximum
  3456. 0x00, // Alignment
  3457. 0x02, // Length
  3458. )
  3459. })
  3460. Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
  3461. {
  3462. If (And (MBEC, 0xFFFF))
  3463. {
  3464. Return (CRS1) /* \_SB_.PCI0.LPCB.RMSC.CRS1 */
  3465. }
  3466. Else
  3467. {
  3468. Return (CRS2) /* \_SB_.PCI0.LPCB.RMSC.CRS2 */
  3469. }
  3470. }
  3471. }
  3472. Device (COPR)
  3473. {
  3474. Name (_HID, EisaId ("PNP0C04") /* x87-compatible Floating Point Processing Unit */) // _HID: Hardware ID
  3475. Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
  3476. {
  3477. IO (Decode16,
  3478. 0x00F0, // Range Minimum
  3479. 0x00F0, // Range Maximum
  3480. 0x00, // Alignment
  3481. 0x10, // Length
  3482. )
  3483. IRQNoFlags ()
  3484. {13}
  3485. })
  3486. }
  3487. Device (PS2K)
  3488. {
  3489. Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard (101/102-key, PS/2 Mouse) */) // _HID: Hardware ID
  3490. Method (_STA, 0, NotSerialized) // _STA: Status
  3491. {
  3492. Return (0x0F)
  3493. }
  3494. Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
  3495. {
  3496. IO (Decode16,
  3497. 0x0060, // Range Minimum
  3498. 0x0060, // Range Maximum
  3499. 0x00, // Alignment
  3500. 0x01, // Length
  3501. )
  3502. IO (Decode16,
  3503. 0x0064, // Range Minimum
  3504. 0x0064, // Range Maximum
  3505. 0x00, // Alignment
  3506. 0x01, // Length
  3507. )
  3508. IRQNoFlags ()
  3509. {1}
  3510. })
  3511. Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
  3512. {
  3513. StartDependentFn (0x00, 0x00)
  3514. {
  3515. FixedIO (
  3516. 0x0060, // Address
  3517. 0x01, // Length
  3518. )
  3519. FixedIO (
  3520. 0x0064, // Address
  3521. 0x01, // Length
  3522. )
  3523. IRQNoFlags ()
  3524. {1}
  3525. }
  3526. EndDependentFn ()
  3527. })
  3528. }
  3529. Device (SENM)
  3530. {
  3531. Name (_HID, EisaId ("STLC033")) // _HID: Hardware ID
  3532. Name (_CID, EisaId ("PNP0F13")) // _CID: Compatible ID
  3533. Name (_UID, One) // _UID: Unique ID
  3534. Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
  3535. {
  3536. IRQ (Edge, ActiveHigh, Exclusive, )
  3537. {12}
  3538. })
  3539. Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
  3540. {
  3541. StartDependentFn (0x00, 0x00)
  3542. {
  3543. IRQNoFlags ()
  3544. {12}
  3545. }
  3546. EndDependentFn ()
  3547. })
  3548. Method (_STA, 0, NotSerialized) // _STA: Status
  3549. {
  3550. If (LEqual (ELAN, Zero))
  3551. {
  3552. Return (0x0F)
  3553. }
  3554. Return (Zero)
  3555. }
  3556. }
  3557. Device (ELNM)
  3558. {
  3559. Name (_HID, EisaId ("ETD0403")) // _HID: Hardware ID
  3560. Name (_CID, EisaId ("PNP0F13")) // _CID: Compatible ID
  3561. Name (_UID, 0x02) // _UID: Unique ID
  3562. Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
  3563. {
  3564. IO (Decode16,
  3565. 0x0060, // Range Minimum
  3566. 0x0060, // Range Maximum
  3567. 0x00, // Alignment
  3568. 0x01, // Length
  3569. )
  3570. IO (Decode16,
  3571. 0x0064, // Range Minimum
  3572. 0x0064, // Range Maximum
  3573. 0x00, // Alignment
  3574. 0x01, // Length
  3575. )
  3576. IRQNoFlags ()
  3577. {12}
  3578. })
  3579. Name (_PRS, ResourceTemplate () // _PRS: Possible Resource Settings
  3580. {
  3581. StartDependentFn (0x00, 0x00)
  3582. {
  3583. IRQNoFlags ()
  3584. {12}
  3585. }
  3586. EndDependentFn ()
  3587. })
  3588. Method (_STA, 0, NotSerialized) // _STA: Status
  3589. {
  3590. If (ELAN)
  3591. {
  3592. Return (0x0F)
  3593. }
  3594. Return (Zero)
  3595. }
  3596. }
  3597. }
  3598. Device (P0P1)
  3599. {
  3600. Name (_ADR, 0x001E0000) // _ADR: Address
  3601. Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
  3602. {
  3603. Return (GPRW (0x0B, 0x04))
  3604. }
  3605. Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
  3606. {
  3607. If (PICM)
  3608. {
  3609. Return (AR01 ())
  3610. }
  3611. Return (PR01 ())
  3612. }
  3613. }
  3614. Device (USB1)
  3615. {
  3616. Name (_ADR, 0x001D0001) // _ADR: Address
  3617. Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
  3618. {
  3619. Return (GPRW (0x03, 0x03))
  3620. }
  3621. }
  3622. Device (USB2)
  3623. {
  3624. Name (_ADR, 0x001D0002) // _ADR: Address
  3625. Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
  3626. {
  3627. Return (GPRW (0x04, 0x03))
  3628. }
  3629. }
  3630. Device (USB3)
  3631. {
  3632. Name (_ADR, 0x001D0003) // _ADR: Address
  3633. Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
  3634. {
  3635. Return (GPRW (0x0C, 0x03))
  3636. }
  3637. }
  3638. Device (USB4)
  3639. {
  3640. Name (_ADR, 0x001D0004) // _ADR: Address
  3641. Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
  3642. {
  3643. Return (GPRW (0x0E, 0x03))
  3644. }
  3645. }
  3646. Device (USB5)
  3647. {
  3648. Name (_ADR, 0x001A0001) // _ADR: Address
  3649. Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
  3650. {
  3651. Return (GPRW (0x05, 0x03))
  3652. }
  3653. }
  3654. Device (USB6)
  3655. {
  3656. Name (_ADR, 0x001A0002) // _ADR: Address
  3657. Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
  3658. {
  3659. Return (GPRW (0x20, 0x03))
  3660. }
  3661. }
  3662. Device (USB7)
  3663. {
  3664. Name (_ADR, 0x001A0003) // _ADR: Address
  3665. Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
  3666. {
  3667. Return (GPRW (0x25, 0x03))
  3668. }
  3669. }
  3670. Device (RP01)
  3671. {
  3672. Name (_ADR, 0x001C0000) // _ADR: Address
  3673. Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters
  3674. {
  3675. 0x08,
  3676. 0x40,
  3677. One,
  3678. Zero
  3679. })
  3680. OperationRegion (PXCS, PCI_Config, 0x40, 0xC0)
  3681. Field (PXCS, AnyAcc, NoLock, Preserve)
  3682. {
  3683. Offset (0x10),
  3684. L0SE, 1,
  3685. Offset (0x11),
  3686. Offset (0x12),
  3687. , 13,
  3688. LASX, 1,
  3689. Offset (0x14),
  3690. , 6,
  3691. HPCE, 1,
  3692. Offset (0x1A),
  3693. ABPX, 1,
  3694. , 2,
  3695. PDCX, 1,
  3696. , 2,
  3697. PDSX, 1,
  3698. Offset (0x1B),
  3699. Offset (0x20),
  3700. Offset (0x22),
  3701. PSPX, 1,
  3702. Offset (0x98),
  3703. , 30,
  3704. HPEX, 1,
  3705. PMEX, 1
  3706. }
  3707. Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
  3708. {
  3709. Offset (0x94),
  3710. , 1,
  3711. EIFD, 1,
  3712. Offset (0x95),
  3713. Offset (0x9C),
  3714. , 30,
  3715. HPSX, 1,
  3716. PMSX, 1
  3717. }
  3718. Device (PXSX)
  3719. {
  3720. Name (_ADR, Zero) // _ADR: Address
  3721. Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
  3722. {
  3723. 0x09,
  3724. 0x04
  3725. })
  3726. }
  3727. Method (HPME, 0, Serialized)
  3728. {
  3729. If (PMSX)
  3730. {
  3731. Store (0xC8, Local0)
  3732. While (Local0)
  3733. {
  3734. Store (One, PMSX) /* \_SB_.PCI0.RP01.PMSX */
  3735. If (PMSX)
  3736. {
  3737. Decrement (Local0)
  3738. }
  3739. Else
  3740. {
  3741. Store (Zero, Local0)
  3742. }
  3743. }
  3744. Notify (PXSX, 0x02) // Device Wake
  3745. }
  3746. }
  3747. Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
  3748. {
  3749. If (PICM)
  3750. {
  3751. Return (AR04 ())
  3752. }
  3753. Return (PR04 ())
  3754. }
  3755. Device (RLAN)
  3756. {
  3757. Name (_ADR, 0x02) // _ADR: Address
  3758. }
  3759. }
  3760. Device (RP02)
  3761. {
  3762. Name (_ADR, 0x001C0001) // _ADR: Address
  3763. Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters
  3764. {
  3765. 0x08,
  3766. 0x40,
  3767. One,
  3768. Zero
  3769. })
  3770. OperationRegion (PXCS, PCI_Config, 0x40, 0xC0)
  3771. Field (PXCS, AnyAcc, NoLock, Preserve)
  3772. {
  3773. Offset (0x10),
  3774. L0SE, 1,
  3775. Offset (0x11),
  3776. Offset (0x12),
  3777. , 13,
  3778. LASX, 1,
  3779. Offset (0x14),
  3780. , 6,
  3781. HPCE, 1,
  3782. Offset (0x1A),
  3783. ABPX, 1,
  3784. , 2,
  3785. PDCX, 1,
  3786. , 2,
  3787. PDSX, 1,
  3788. Offset (0x1B),
  3789. Offset (0x20),
  3790. Offset (0x22),
  3791. PSPX, 1,
  3792. Offset (0x98),
  3793. , 30,
  3794. HPEX, 1,
  3795. PMEX, 1
  3796. }
  3797. Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
  3798. {
  3799. Offset (0x94),
  3800. , 1,
  3801. EIFD, 1,
  3802. Offset (0x95),
  3803. Offset (0x9C),
  3804. , 30,
  3805. HPSX, 1,
  3806. PMSX, 1
  3807. }
  3808. Device (PXSX)
  3809. {
  3810. Name (_ADR, Zero) // _ADR: Address
  3811. Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
  3812. {
  3813. 0x09,
  3814. 0x04
  3815. })
  3816. }
  3817. Method (HPME, 0, Serialized)
  3818. {
  3819. If (PMSX)
  3820. {
  3821. Store (0xC8, Local0)
  3822. While (Local0)
  3823. {
  3824. Store (One, PMSX) /* \_SB_.PCI0.RP02.PMSX */
  3825. If (PMSX)
  3826. {
  3827. Decrement (Local0)
  3828. }
  3829. Else
  3830. {
  3831. Store (Zero, Local0)
  3832. }
  3833. }
  3834. Notify (PXSX, 0x02) // Device Wake
  3835. }
  3836. }
  3837. Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
  3838. {
  3839. If (PICM)
  3840. {
  3841. Return (AR05 ())
  3842. }
  3843. Return (PR05 ())
  3844. }
  3845. }
  3846. Device (RP03)
  3847. {
  3848. Name (_ADR, 0x001C0002) // _ADR: Address
  3849. Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters
  3850. {
  3851. 0x08,
  3852. 0x40,
  3853. One,
  3854. Zero
  3855. })
  3856. OperationRegion (PXCS, PCI_Config, 0x40, 0xC0)
  3857. Field (PXCS, AnyAcc, NoLock, Preserve)
  3858. {
  3859. Offset (0x10),
  3860. L0SE, 1,
  3861. Offset (0x11),
  3862. Offset (0x12),
  3863. , 13,
  3864. LASX, 1,
  3865. Offset (0x14),
  3866. , 6,
  3867. HPCE, 1,
  3868. Offset (0x1A),
  3869. ABPX, 1,
  3870. , 2,
  3871. PDCX, 1,
  3872. , 2,
  3873. PDSX, 1,
  3874. Offset (0x1B),
  3875. Offset (0x20),
  3876. Offset (0x22),
  3877. PSPX, 1,
  3878. Offset (0x98),
  3879. , 30,
  3880. HPEX, 1,
  3881. PMEX, 1
  3882. }
  3883. Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
  3884. {
  3885. Offset (0x94),
  3886. , 1,
  3887. EIFD, 1,
  3888. Offset (0x95),
  3889. Offset (0x9C),
  3890. , 30,
  3891. HPSX, 1,
  3892. PMSX, 1
  3893. }
  3894. Device (PXSX)
  3895. {
  3896. Name (_ADR, Zero) // _ADR: Address
  3897. Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
  3898. {
  3899. 0x09,
  3900. 0x04
  3901. })
  3902. }
  3903. Method (HPME, 0, Serialized)
  3904. {
  3905. If (PMSX)
  3906. {
  3907. Store (0xC8, Local0)
  3908. While (Local0)
  3909. {
  3910. Store (One, PMSX) /* \_SB_.PCI0.RP03.PMSX */
  3911. If (PMSX)
  3912. {
  3913. Decrement (Local0)
  3914. }
  3915. Else
  3916. {
  3917. Store (Zero, Local0)
  3918. }
  3919. }
  3920. Notify (PXSX, 0x02) // Device Wake
  3921. }
  3922. }
  3923. Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
  3924. {
  3925. If (PICM)
  3926. {
  3927. Return (AR06 ())
  3928. }
  3929. Return (PR06 ())
  3930. }
  3931. }
  3932. Device (RP04)
  3933. {
  3934. Name (_ADR, 0x001C0003) // _ADR: Address
  3935. Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters
  3936. {
  3937. 0x08,
  3938. 0x40,
  3939. One,
  3940. Zero
  3941. })
  3942. OperationRegion (PXCS, PCI_Config, 0x40, 0xC0)
  3943. Field (PXCS, AnyAcc, NoLock, Preserve)
  3944. {
  3945. Offset (0x10),
  3946. L0SE, 1,
  3947. Offset (0x11),
  3948. Offset (0x12),
  3949. , 13,
  3950. LASX, 1,
  3951. Offset (0x14),
  3952. , 6,
  3953. HPCE, 1,
  3954. Offset (0x1A),
  3955. ABPX, 1,
  3956. , 2,
  3957. PDCX, 1,
  3958. , 2,
  3959. PDSX, 1,
  3960. Offset (0x1B),
  3961. Offset (0x20),
  3962. Offset (0x22),
  3963. PSPX, 1,
  3964. Offset (0x98),
  3965. , 30,
  3966. HPEX, 1,
  3967. PMEX, 1
  3968. }
  3969. Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
  3970. {
  3971. Offset (0x94),
  3972. , 1,
  3973. EIFD, 1,
  3974. Offset (0x95),
  3975. Offset (0x9C),
  3976. , 30,
  3977. HPSX, 1,
  3978. PMSX, 1
  3979. }
  3980. Device (PXSX)
  3981. {
  3982. Name (_ADR, Zero) // _ADR: Address
  3983. Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
  3984. {
  3985. 0x09,
  3986. 0x04
  3987. })
  3988. }
  3989. Method (HPME, 0, Serialized)
  3990. {
  3991. If (PMSX)
  3992. {
  3993. Store (0xC8, Local0)
  3994. While (Local0)
  3995. {
  3996. Store (One, PMSX) /* \_SB_.PCI0.RP04.PMSX */
  3997. If (PMSX)
  3998. {
  3999. Decrement (Local0)
  4000. }
  4001. Else
  4002. {
  4003. Store (Zero, Local0)
  4004. }
  4005. }
  4006. Notify (PXSX, 0x02) // Device Wake
  4007. }
  4008. }
  4009. Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
  4010. {
  4011. If (PICM)
  4012. {
  4013. Return (AR07 ())
  4014. }
  4015. Return (PR07 ())
  4016. }
  4017. }
  4018. Device (RP05)
  4019. {
  4020. Name (_ADR, 0x001C0004) // _ADR: Address
  4021. Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters
  4022. {
  4023. 0x08,
  4024. 0x40,
  4025. One,
  4026. Zero
  4027. })
  4028. OperationRegion (PXCS, PCI_Config, 0x40, 0xC0)
  4029. Field (PXCS, AnyAcc, NoLock, Preserve)
  4030. {
  4031. Offset (0x10),
  4032. L0SE, 1,
  4033. Offset (0x11),
  4034. Offset (0x12),
  4035. , 13,
  4036. LASX, 1,
  4037. Offset (0x14),
  4038. , 6,
  4039. HPCE, 1,
  4040. Offset (0x1A),
  4041. ABPX, 1,
  4042. , 2,
  4043. PDCX, 1,
  4044. , 2,
  4045. PDSX, 1,
  4046. Offset (0x1B),
  4047. Offset (0x20),
  4048. Offset (0x22),
  4049. PSPX, 1,
  4050. Offset (0x98),
  4051. , 30,
  4052. HPEX, 1,
  4053. PMEX, 1
  4054. }
  4055. Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
  4056. {
  4057. Offset (0x94),
  4058. , 1,
  4059. EIFD, 1,
  4060. Offset (0x95),
  4061. Offset (0x9C),
  4062. , 30,
  4063. HPSX, 1,
  4064. PMSX, 1
  4065. }
  4066. Device (PXSX)
  4067. {
  4068. Name (_ADR, Zero) // _ADR: Address
  4069. Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
  4070. {
  4071. 0x09,
  4072. 0x04
  4073. })
  4074. }
  4075. Method (HPME, 0, Serialized)
  4076. {
  4077. If (PMSX)
  4078. {
  4079. Store (0xC8, Local0)
  4080. While (Local0)
  4081. {
  4082. Store (One, PMSX) /* \_SB_.PCI0.RP05.PMSX */
  4083. If (PMSX)
  4084. {
  4085. Decrement (Local0)
  4086. }
  4087. Else
  4088. {
  4089. Store (Zero, Local0)
  4090. }
  4091. }
  4092. Notify (PXSX, 0x02) // Device Wake
  4093. }
  4094. }
  4095. Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
  4096. {
  4097. If (PICM)
  4098. {
  4099. Return (AR08 ())
  4100. }
  4101. Return (PR08 ())
  4102. }
  4103. }
  4104. Device (RP06)
  4105. {
  4106. Name (_ADR, 0x001C0005) // _ADR: Address
  4107. Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters
  4108. {
  4109. 0x08,
  4110. 0x40,
  4111. One,
  4112. Zero
  4113. })
  4114. OperationRegion (PXCS, PCI_Config, 0x40, 0xC0)
  4115. Field (PXCS, AnyAcc, NoLock, Preserve)
  4116. {
  4117. Offset (0x10),
  4118. L0SE, 1,
  4119. Offset (0x11),
  4120. Offset (0x12),
  4121. , 13,
  4122. LASX, 1,
  4123. Offset (0x14),
  4124. , 6,
  4125. HPCE, 1,
  4126. Offset (0x1A),
  4127. ABPX, 1,
  4128. , 2,
  4129. PDCX, 1,
  4130. , 2,
  4131. PDSX, 1,
  4132. Offset (0x1B),
  4133. Offset (0x20),
  4134. Offset (0x22),
  4135. PSPX, 1,
  4136. Offset (0x98),
  4137. , 30,
  4138. HPEX, 1,
  4139. PMEX, 1
  4140. }
  4141. Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
  4142. {
  4143. Offset (0x94),
  4144. , 1,
  4145. EIFD, 1,
  4146. Offset (0x95),
  4147. Offset (0x9C),
  4148. , 30,
  4149. HPSX, 1,
  4150. PMSX, 1
  4151. }
  4152. Device (PXSX)
  4153. {
  4154. Name (_ADR, Zero) // _ADR: Address
  4155. Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
  4156. {
  4157. 0x09,
  4158. 0x04
  4159. })
  4160. }
  4161. Method (HPME, 0, Serialized)
  4162. {
  4163. If (PMSX)
  4164. {
  4165. Store (0xC8, Local0)
  4166. While (Local0)
  4167. {
  4168. Store (One, PMSX) /* \_SB_.PCI0.RP06.PMSX */
  4169. If (PMSX)
  4170. {
  4171. Decrement (Local0)
  4172. }
  4173. Else
  4174. {
  4175. Store (Zero, Local0)
  4176. }
  4177. }
  4178. Notify (PXSX, 0x02) // Device Wake
  4179. }
  4180. }
  4181. Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
  4182. {
  4183. If (PICM)
  4184. {
  4185. Return (AR09 ())
  4186. }
  4187. Return (PR09 ())
  4188. }
  4189. }
  4190. Device (RP07)
  4191. {
  4192. Name (_ADR, 0x001C0006) // _ADR: Address
  4193. Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters
  4194. {
  4195. 0x08,
  4196. 0x40,
  4197. One,
  4198. Zero
  4199. })
  4200. OperationRegion (PXCS, PCI_Config, 0x40, 0xC0)
  4201. Field (PXCS, AnyAcc, NoLock, Preserve)
  4202. {
  4203. Offset (0x10),
  4204. L0SE, 1,
  4205. Offset (0x11),
  4206. Offset (0x12),
  4207. , 13,
  4208. LASX, 1,
  4209. Offset (0x14),
  4210. , 6,
  4211. HPCE, 1,
  4212. Offset (0x1A),
  4213. ABPX, 1,
  4214. , 2,
  4215. PDCX, 1,
  4216. , 2,
  4217. PDSX, 1,
  4218. Offset (0x1B),
  4219. Offset (0x20),
  4220. Offset (0x22),
  4221. PSPX, 1,
  4222. Offset (0x98),
  4223. , 30,
  4224. HPEX, 1,
  4225. PMEX, 1
  4226. }
  4227. Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
  4228. {
  4229. Offset (0x94),
  4230. , 1,
  4231. EIFD, 1,
  4232. Offset (0x95),
  4233. Offset (0x9C),
  4234. , 30,
  4235. HPSX, 1,
  4236. PMSX, 1
  4237. }
  4238. Device (PXSX)
  4239. {
  4240. Name (_ADR, Zero) // _ADR: Address
  4241. Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
  4242. {
  4243. 0x09,
  4244. 0x04
  4245. })
  4246. }
  4247. Method (HPME, 0, Serialized)
  4248. {
  4249. If (PMSX)
  4250. {
  4251. Store (0xC8, Local0)
  4252. While (Local0)
  4253. {
  4254. Store (One, PMSX) /* \_SB_.PCI0.RP07.PMSX */
  4255. If (PMSX)
  4256. {
  4257. Decrement (Local0)
  4258. }
  4259. Else
  4260. {
  4261. Store (Zero, Local0)
  4262. }
  4263. }
  4264. Notify (PXSX, 0x02) // Device Wake
  4265. }
  4266. }
  4267. Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
  4268. {
  4269. If (PICM)
  4270. {
  4271. Return (AR0E ())
  4272. }
  4273. Return (PR0E ())
  4274. }
  4275. }
  4276. Device (RP08)
  4277. {
  4278. Name (_ADR, 0x001C0007) // _ADR: Address
  4279. Name (_HPP, Package (0x04) // _HPP: Hot Plug Parameters
  4280. {
  4281. 0x08,
  4282. 0x40,
  4283. One,
  4284. Zero
  4285. })
  4286. OperationRegion (PXCS, PCI_Config, 0x40, 0xC0)
  4287. Field (PXCS, AnyAcc, NoLock, Preserve)
  4288. {
  4289. Offset (0x10),
  4290. L0SE, 1,
  4291. Offset (0x11),
  4292. Offset (0x12),
  4293. , 13,
  4294. LASX, 1,
  4295. Offset (0x14),
  4296. , 6,
  4297. HPCE, 1,
  4298. Offset (0x1A),
  4299. ABPX, 1,
  4300. , 2,
  4301. PDCX, 1,
  4302. , 2,
  4303. PDSX, 1,
  4304. Offset (0x1B),
  4305. Offset (0x20),
  4306. Offset (0x22),
  4307. PSPX, 1,
  4308. Offset (0x98),
  4309. , 30,
  4310. HPEX, 1,
  4311. PMEX, 1
  4312. }
  4313. Field (PXCS, AnyAcc, NoLock, WriteAsZeros)
  4314. {
  4315. Offset (0x94),
  4316. , 1,
  4317. EIFD, 1,
  4318. Offset (0x95),
  4319. Offset (0x9C),
  4320. , 30,
  4321. HPSX, 1,
  4322. PMSX, 1
  4323. }
  4324. Device (PXSX)
  4325. {
  4326. Name (_ADR, Zero) // _ADR: Address
  4327. Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
  4328. {
  4329. 0x09,
  4330. 0x04
  4331. })
  4332. }
  4333. Method (HPME, 0, Serialized)
  4334. {
  4335. If (PMSX)
  4336. {
  4337. Store (0xC8, Local0)
  4338. While (Local0)
  4339. {
  4340. Store (One, PMSX) /* \_SB_.PCI0.RP08.PMSX */
  4341. If (PMSX)
  4342. {
  4343. Decrement (Local0)
  4344. }
  4345. Else
  4346. {
  4347. Store (Zero, Local0)
  4348. }
  4349. }
  4350. Notify (PXSX, 0x02) // Device Wake
  4351. }
  4352. }
  4353. Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
  4354. {
  4355. If (PICM)
  4356. {
  4357. Return (AR0F ())
  4358. }
  4359. Return (PR0F ())
  4360. }
  4361. }
  4362. Device (PEG0)
  4363. {
  4364. Name (_ADR, 0x00010000) // _ADR: Address
  4365. Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
  4366. {
  4367. If (PICM)
  4368. {
  4369. Return (AR02 ())
  4370. }
  4371. Return (PR02 ())
  4372. }
  4373. Device (PEGP)
  4374. {
  4375. Name (_ADR, 0xFFFF) // _ADR: Address
  4376. }
  4377. }
  4378. Device (PEG1)
  4379. {
  4380. Name (_ADR, 0x00010001) // _ADR: Address
  4381. Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
  4382. {
  4383. If (PICM)
  4384. {
  4385. Return (AR0A ())
  4386. }
  4387. Return (PR0A ())
  4388. }
  4389. }
  4390. Device (PEG2)
  4391. {
  4392. Name (_ADR, 0x00010002) // _ADR: Address
  4393. Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
  4394. {
  4395. If (PICM)
  4396. {
  4397. Return (AR0B ())
  4398. }
  4399. Return (PR0B ())
  4400. }
  4401. }
  4402. Device (PEG3)
  4403. {
  4404. Name (_ADR, 0x00060000) // _ADR: Address
  4405. Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table
  4406. {
  4407. If (PICM)
  4408. {
  4409. Return (AR0C ())
  4410. }
  4411. Return (PR0C ())
  4412. }
  4413. }
  4414. Device (B0D4)
  4415. {
  4416. Name (_ADR, 0x00040000) // _ADR: Address
  4417. }
  4418. }
  4419. Scope (\_GPE)
  4420. {
  4421. Method (_L0B, 0, NotSerialized) // _Lxx: Level-Triggered GPE
  4422. {
  4423. Notify (\_SB.PCI0.P0P1, 0x02) // Device Wake
  4424. }
  4425. Method (_L03, 0, NotSerialized) // _Lxx: Level-Triggered GPE
  4426. {
  4427. Notify (\_SB.PCI0.USB1, 0x02) // Device Wake
  4428. }
  4429. Method (_L04, 0, NotSerialized) // _Lxx: Level-Triggered GPE
  4430. {
  4431. Notify (\_SB.PCI0.USB2, 0x02) // Device Wake
  4432. }
  4433. Method (_L0C, 0, NotSerialized) // _Lxx: Level-Triggered GPE
  4434. {
  4435. Notify (\_SB.PCI0.USB3, 0x02) // Device Wake
  4436. }
  4437. Method (_L0E, 0, NotSerialized) // _Lxx: Level-Triggered GPE
  4438. {
  4439. Notify (\_SB.PCI0.USB4, 0x02) // Device Wake
  4440. }
  4441. Method (_L05, 0, NotSerialized) // _Lxx: Level-Triggered GPE
  4442. {
  4443. Notify (\_SB.PCI0.USB5, 0x02) // Device Wake
  4444. }
  4445. Method (_L20, 0, NotSerialized) // _Lxx: Level-Triggered GPE
  4446. {
  4447. Notify (\_SB.PCI0.USB6, 0x02) // Device Wake
  4448. }
  4449. Method (_L25, 0, NotSerialized) // _Lxx: Level-Triggered GPE
  4450. {
  4451. Notify (\_SB.PCI0.USB7, 0x02) // Device Wake
  4452. }
  4453. }
  4454. }
  4455. Scope (\)
  4456. {
  4457. OperationRegion (IO_T, SystemIO, 0x1000, 0x10)
  4458. Field (IO_T, ByteAcc, NoLock, Preserve)
  4459. {
  4460. TRPI, 16,
  4461. Offset (0x04),
  4462. Offset (0x06),
  4463. Offset (0x08),
  4464. TRP0, 8,
  4465. Offset (0x0A),
  4466. Offset (0x0B),
  4467. Offset (0x0C),
  4468. Offset (0x0D),
  4469. Offset (0x0E),
  4470. Offset (0x0F),
  4471. Offset (0x10)
  4472. }
  4473. OperationRegion (IO_D, SystemIO, 0x0810, 0x04)
  4474. Field (IO_D, ByteAcc, NoLock, Preserve)
  4475. {
  4476. TRPD, 8
  4477. }
  4478. OperationRegion (IO_H, SystemIO, 0x1000, 0x04)
  4479. Field (IO_H, ByteAcc, NoLock, Preserve)
  4480. {
  4481. TRPH, 8
  4482. }
  4483. OperationRegion (PMIO, SystemIO, PMBS, 0x80)
  4484. Field (PMIO, ByteAcc, NoLock, Preserve)
  4485. {
  4486. Offset (0x28),
  4487. Offset (0x2A),
  4488. , 3,
  4489. GPE3, 1,
  4490. Offset (0x3C),
  4491. , 1,
  4492. UPRW, 1,
  4493. Offset (0x42),
  4494. , 1,
  4495. GPEC, 1
  4496. }
  4497. Field (PMIO, ByteAcc, NoLock, WriteAsZeros)
  4498. {
  4499. Offset (0x20),
  4500. Offset (0x22),
  4501. , 3,
  4502. GPS3, 1,
  4503. Offset (0x64),
  4504. , 9,
  4505. SCIS, 1,
  4506. Offset (0x66)
  4507. }
  4508. OperationRegion (GPIO, SystemIO, GPBS, 0x64)
  4509. Field (GPIO, ByteAcc, NoLock, Preserve)
  4510. {
  4511. GU00, 8,
  4512. GU01, 8,
  4513. GU02, 8,
  4514. GU03, 8,
  4515. GIO0, 8,
  4516. GIO1, 8,
  4517. GIO2, 8,
  4518. GIO3, 8,
  4519. Offset (0x0C),
  4520. GL00, 8,
  4521. GL01, 8,
  4522. GL02, 8,
  4523. GP24, 1,
  4524. , 2,
  4525. GP27, 1,
  4526. GP28, 1,
  4527. Offset (0x10),
  4528. Offset (0x18),
  4529. GB00, 8,
  4530. GB01, 8,
  4531. GB02, 8,
  4532. GB03, 8,
  4533. Offset (0x2C),
  4534. GIV0, 8,
  4535. GIV1, 8,
  4536. GIV2, 8,
  4537. GIV3, 8,
  4538. GU04, 8,
  4539. GU05, 8,
  4540. GU06, 8,
  4541. GU07, 8,
  4542. GIO4, 8,
  4543. GIO5, 8,
  4544. GIO6, 8,
  4545. GIO7, 8,
  4546. GL04, 8,
  4547. GL05, 8,
  4548. GL06, 8,
  4549. GL07, 8,
  4550. Offset (0x40),
  4551. GU08, 8,
  4552. GU09, 8,
  4553. GU0A, 8,
  4554. GU0B, 8,
  4555. GIO8, 8,
  4556. GIO9, 8,
  4557. GIOA, 8,
  4558. GIOB, 8,
  4559. GL08, 8,
  4560. GL09, 8,
  4561. GL0A, 8,
  4562. GL0B, 8
  4563. }
  4564. OperationRegion (RCRB, SystemMemory, SRCB, 0x4000)
  4565. Field (RCRB, DWordAcc, Lock, Preserve)
  4566. {
  4567. Offset (0x1000),
  4568. Offset (0x3000),
  4569. Offset (0x3404),
  4570. HPAS, 2,
  4571. , 5,
  4572. HPAE, 1,
  4573. Offset (0x3418),
  4574. , 1,
  4575. , 1,
  4576. SATD, 1,
  4577. SMBD, 1,
  4578. HDAD, 1,
  4579. Offset (0x341A),
  4580. RP1D, 1,
  4581. RP2D, 1,
  4582. RP3D, 1,
  4583. RP4D, 1,
  4584. RP5D, 1,
  4585. RP6D, 1,
  4586. RP7D, 1,
  4587. RP8D, 1,
  4588. Offset (0x359C),
  4589. UP0D, 1,
  4590. UP1D, 1,
  4591. UP2D, 1,
  4592. UP3D, 1,
  4593. UP4D, 1,
  4594. UP5D, 1,
  4595. UP6D, 1,
  4596. UP7D, 1,
  4597. UP8D, 1,
  4598. UP9D, 1,
  4599. UPAD, 1,
  4600. UPBD, 1,
  4601. UPCD, 1,
  4602. UPDD, 1,
  4603. , 1,
  4604. Offset (0x359E)
  4605. }
  4606. }
  4607. Scope (_SB.PCI0)
  4608. {
  4609. Device (GLAN)
  4610. {
  4611. Name (_ADR, 0x00190000) // _ADR: Address
  4612. Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
  4613. {
  4614. Return (GPRW (0x0D, 0x03))
  4615. }
  4616. }
  4617. Device (EHC1)
  4618. {
  4619. Name (_ADR, 0x001D0000) // _ADR: Address
  4620. OperationRegion (PWKE, PCI_Config, 0x62, 0x04)
  4621. Field (PWKE, DWordAcc, NoLock, Preserve)
  4622. {
  4623. , 1,
  4624. PWUC, 8
  4625. }
  4626. Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake
  4627. {
  4628. If (Arg0)
  4629. {
  4630. Store (Ones, PWUC) /* \_SB_.PCI0.EHC1.PWUC */
  4631. }
  4632. Else
  4633. {
  4634. Store (Zero, PWUC) /* \_SB_.PCI0.EHC1.PWUC */
  4635. }
  4636. }
  4637. Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
  4638. {
  4639. Return (0x02)
  4640. }
  4641. Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
  4642. {
  4643. Return (0x02)
  4644. }
  4645. Device (HUBN)
  4646. {
  4647. Name (_ADR, Zero) // _ADR: Address
  4648. Device (PR01)
  4649. {
  4650. Name (_ADR, One) // _ADR: Address
  4651. Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
  4652. {
  4653. Name (UPCA, Package (0x04)
  4654. {
  4655. 0xFF,
  4656. Zero,
  4657. Zero,
  4658. Zero
  4659. })
  4660. Return (UPCA) /* \_SB_.PCI0.EHC1.HUBN.PR01._UPC.UPCA */
  4661. }
  4662. Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
  4663. {
  4664. Name (PLDP, Package (0x01)
  4665. {
  4666. Buffer (0x10)
  4667. {
  4668. /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  4669. /* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  4670. }
  4671. })
  4672. Return (PLDP) /* \_SB_.PCI0.EHC1.HUBN.PR01._PLD.PLDP */
  4673. }
  4674. Device (PR11)
  4675. {
  4676. Name (_ADR, One) // _ADR: Address
  4677. Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
  4678. {
  4679. Name (UPCP, Package (0x04)
  4680. {
  4681. 0xFF,
  4682. 0xFF,
  4683. Zero,
  4684. Zero
  4685. })
  4686. Return (UPCP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR11._UPC.UPCP */
  4687. }
  4688. Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
  4689. {
  4690. Name (PLDP, Package (0x01)
  4691. {
  4692. Buffer (0x10)
  4693. {
  4694. /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  4695. /* 0008 */ 0xE1, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  4696. }
  4697. })
  4698. Return (PLDP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR11._PLD.PLDP */
  4699. }
  4700. }
  4701. Device (PR12)
  4702. {
  4703. Name (_ADR, 0x02) // _ADR: Address
  4704. Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
  4705. {
  4706. Name (UPCP, Package (0x04)
  4707. {
  4708. 0xFF,
  4709. 0xFF,
  4710. Zero,
  4711. Zero
  4712. })
  4713. Return (UPCP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR12._UPC.UPCP */
  4714. }
  4715. Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
  4716. {
  4717. Name (PLDP, Package (0x01)
  4718. {
  4719. Buffer (0x10)
  4720. {
  4721. /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  4722. /* 0008 */ 0xE1, 0x1D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  4723. }
  4724. })
  4725. Return (PLDP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR12._PLD.PLDP */
  4726. }
  4727. }
  4728. Device (PR13)
  4729. {
  4730. Name (_ADR, 0x03) // _ADR: Address
  4731. Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
  4732. {
  4733. Name (UPCP, Package (0x04)
  4734. {
  4735. 0xFF,
  4736. 0xFF,
  4737. Zero,
  4738. Zero
  4739. })
  4740. Return (UPCP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR13._UPC.UPCP */
  4741. }
  4742. Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
  4743. {
  4744. Name (PLDP, Package (0x01)
  4745. {
  4746. Buffer (0x10)
  4747. {
  4748. /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  4749. /* 0008 */ 0xE1, 0x1D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  4750. }
  4751. })
  4752. Return (PLDP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR13._PLD.PLDP */
  4753. }
  4754. Alias (SBV2, SDGV)
  4755. Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
  4756. {
  4757. If (LEqual (Arg0, Buffer (0x10)
  4758. {
  4759. /* 0000 */ 0x8F, 0x70, 0xFC, 0xA5, 0x75, 0x87, 0xA6, 0x4B,
  4760. /* 0008 */ 0xBD, 0x0C, 0xBA, 0x90, 0xA1, 0xEC, 0x72, 0xF8
  4761. }))
  4762. {
  4763. Name (T_0, Zero) // _T_x: Emitted by ASL Compiler
  4764. Store (ToInteger (Arg2), T_0) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR13._DSM.T_0 */
  4765. If (LEqual (T_0, Zero))
  4766. {
  4767. If (LEqual (Arg1, One))
  4768. {
  4769. Return (Buffer (One)
  4770. {
  4771. 0x07
  4772. })
  4773. }
  4774. Else
  4775. {
  4776. Return (Buffer (One)
  4777. {
  4778. 0x00
  4779. })
  4780. }
  4781. }
  4782. Else
  4783. {
  4784. If (LEqual (T_0, One))
  4785. {
  4786. If (LEqual (SDGV, 0xFF))
  4787. {
  4788. Return (Zero)
  4789. }
  4790. Else
  4791. {
  4792. Return (One)
  4793. }
  4794. }
  4795. Else
  4796. {
  4797. If (LEqual (T_0, 0x02))
  4798. {
  4799. Return (SDGV) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR13.SDGV */
  4800. }
  4801. }
  4802. }
  4803. }
  4804. Return (Zero)
  4805. }
  4806. }
  4807. Device (PR14)
  4808. {
  4809. Name (_ADR, 0x04) // _ADR: Address
  4810. Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
  4811. {
  4812. Name (UPCP, Package (0x04)
  4813. {
  4814. 0xFF,
  4815. 0xFF,
  4816. Zero,
  4817. Zero
  4818. })
  4819. Return (UPCP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR14._UPC.UPCP */
  4820. }
  4821. Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
  4822. {
  4823. If (LEqual (^^^^^LPCB.EC.ECOS, 0x02))
  4824. {
  4825. Return (Package (0x01)
  4826. {
  4827. Buffer (0x10)
  4828. {
  4829. /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  4830. /* 0008 */ 0xE0, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  4831. }
  4832. })
  4833. }
  4834. Return (Package (0x01)
  4835. {
  4836. Buffer (0x10)
  4837. {
  4838. /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  4839. /* 0008 */ 0xE1, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  4840. }
  4841. })
  4842. }
  4843. Alias (SBV1, SDGV)
  4844. Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
  4845. {
  4846. If (LEqual (Arg0, Buffer (0x10)
  4847. {
  4848. /* 0000 */ 0x8F, 0x70, 0xFC, 0xA5, 0x75, 0x87, 0xA6, 0x4B,
  4849. /* 0008 */ 0xBD, 0x0C, 0xBA, 0x90, 0xA1, 0xEC, 0x72, 0xF8
  4850. }))
  4851. {
  4852. Name (T_0, Zero) // _T_x: Emitted by ASL Compiler
  4853. Store (ToInteger (Arg2), T_0) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR14._DSM.T_0 */
  4854. If (LEqual (T_0, Zero))
  4855. {
  4856. If (LEqual (Arg1, One))
  4857. {
  4858. Return (Buffer (One)
  4859. {
  4860. 0x07
  4861. })
  4862. }
  4863. Else
  4864. {
  4865. Return (Buffer (One)
  4866. {
  4867. 0x00
  4868. })
  4869. }
  4870. }
  4871. Else
  4872. {
  4873. If (LEqual (T_0, One))
  4874. {
  4875. If (LEqual (SDGV, 0xFF))
  4876. {
  4877. Return (Zero)
  4878. }
  4879. Else
  4880. {
  4881. Return (One)
  4882. }
  4883. }
  4884. Else
  4885. {
  4886. If (LEqual (T_0, 0x02))
  4887. {
  4888. Return (SDGV) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR14.SDGV */
  4889. }
  4890. }
  4891. }
  4892. }
  4893. Return (Zero)
  4894. }
  4895. }
  4896. Device (PR15)
  4897. {
  4898. Name (_ADR, 0x05) // _ADR: Address
  4899. Name (_UPC, Package (0x04) // _UPC: USB Port Capabilities
  4900. {
  4901. 0xFF,
  4902. 0xFF,
  4903. Zero,
  4904. Zero
  4905. })
  4906. Name (_PLD, Package (0x01) // _PLD: Physical Location of Device
  4907. {
  4908. Buffer (0x10)
  4909. {
  4910. /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  4911. /* 0008 */ 0xE1, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  4912. /* Revision : 01 */
  4913. /* IgnoreColor : 01 */
  4914. /* Color : 000000 */
  4915. /* Width : 0000 */
  4916. /* Height : 0000 */
  4917. /* UserVisible : 01 */
  4918. /* Dock : 00 */
  4919. /* Lid : 00 */
  4920. /* Panel : 04 */
  4921. /* VerticalPosition : 03 */
  4922. /* HorizontalPosition : 02 */
  4923. /* Shape : 07 */
  4924. /* GroupOrientation : 00 */
  4925. /* GroupToken : 00 */
  4926. /* GroupPosition : 00 */
  4927. /* Bay : 00 */
  4928. /* Ejectable : 00 */
  4929. /* OspmEjectRequired : 00 */
  4930. /* CabinetNumber : 00 */
  4931. /* CardCageNumber : 00 */
  4932. /* Reference : 00 */
  4933. /* Rotation : 00 */
  4934. /* Order : 00 */
  4935. /* VerticalOffset : 0000 */
  4936. /* HorizontalOffset : 0000 */
  4937. }
  4938. })
  4939. }
  4940. Device (PR16)
  4941. {
  4942. Name (_ADR, 0x06) // _ADR: Address
  4943. Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
  4944. {
  4945. Name (UPCP, Package (0x04)
  4946. {
  4947. 0xFF,
  4948. 0xFF,
  4949. Zero,
  4950. Zero
  4951. })
  4952. Return (UPCP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR16._UPC.UPCP */
  4953. }
  4954. Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
  4955. {
  4956. If (LEqual (^^^^^LPCB.EC.ECOS, 0x02))
  4957. {
  4958. Return (Package (0x01)
  4959. {
  4960. Buffer (0x10)
  4961. {
  4962. /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  4963. /* 0008 */ 0xB0, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  4964. }
  4965. })
  4966. }
  4967. Return (Package (0x01)
  4968. {
  4969. Buffer (0x10)
  4970. {
  4971. /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  4972. /* 0008 */ 0xB1, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  4973. }
  4974. })
  4975. }
  4976. Alias (SBV1, SDGV)
  4977. Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
  4978. {
  4979. If (LEqual (Arg0, Buffer (0x10)
  4980. {
  4981. /* 0000 */ 0x8F, 0x70, 0xFC, 0xA5, 0x75, 0x87, 0xA6, 0x4B,
  4982. /* 0008 */ 0xBD, 0x0C, 0xBA, 0x90, 0xA1, 0xEC, 0x72, 0xF8
  4983. }))
  4984. {
  4985. Name (T_0, Zero) // _T_x: Emitted by ASL Compiler
  4986. Store (ToInteger (Arg2), T_0) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR16._DSM.T_0 */
  4987. If (LEqual (T_0, Zero))
  4988. {
  4989. If (LEqual (Arg1, One))
  4990. {
  4991. Return (Buffer (One)
  4992. {
  4993. 0x07
  4994. })
  4995. }
  4996. Else
  4997. {
  4998. Return (Buffer (One)
  4999. {
  5000. 0x00
  5001. })
  5002. }
  5003. }
  5004. Else
  5005. {
  5006. If (LEqual (T_0, One))
  5007. {
  5008. If (LEqual (SDGV, 0xFF))
  5009. {
  5010. Return (Zero)
  5011. }
  5012. Else
  5013. {
  5014. Return (One)
  5015. }
  5016. }
  5017. Else
  5018. {
  5019. If (LEqual (T_0, 0x02))
  5020. {
  5021. Return (SDGV) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR16.SDGV */
  5022. }
  5023. }
  5024. }
  5025. }
  5026. Return (Zero)
  5027. }
  5028. }
  5029. Device (PR17)
  5030. {
  5031. Name (_ADR, 0x07) // _ADR: Address
  5032. Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
  5033. {
  5034. Name (UPCP, Package (0x04)
  5035. {
  5036. 0xFF,
  5037. 0xFF,
  5038. Zero,
  5039. Zero
  5040. })
  5041. Return (UPCP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR17._UPC.UPCP */
  5042. }
  5043. Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
  5044. {
  5045. Name (PLDP, Package (0x01)
  5046. {
  5047. Buffer (0x10)
  5048. {
  5049. /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  5050. /* 0008 */ 0xB1, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  5051. }
  5052. })
  5053. Return (PLDP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR17._PLD.PLDP */
  5054. }
  5055. Alias (SBV2, SDGV)
  5056. Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
  5057. {
  5058. If (LEqual (Arg0, Buffer (0x10)
  5059. {
  5060. /* 0000 */ 0x8F, 0x70, 0xFC, 0xA5, 0x75, 0x87, 0xA6, 0x4B,
  5061. /* 0008 */ 0xBD, 0x0C, 0xBA, 0x90, 0xA1, 0xEC, 0x72, 0xF8
  5062. }))
  5063. {
  5064. Name (T_0, Zero) // _T_x: Emitted by ASL Compiler
  5065. Store (ToInteger (Arg2), T_0) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR17._DSM.T_0 */
  5066. If (LEqual (T_0, Zero))
  5067. {
  5068. If (LEqual (Arg1, One))
  5069. {
  5070. Return (Buffer (One)
  5071. {
  5072. 0x07
  5073. })
  5074. }
  5075. Else
  5076. {
  5077. Return (Buffer (One)
  5078. {
  5079. 0x00
  5080. })
  5081. }
  5082. }
  5083. Else
  5084. {
  5085. If (LEqual (T_0, One))
  5086. {
  5087. If (LEqual (SDGV, 0xFF))
  5088. {
  5089. Return (Zero)
  5090. }
  5091. Else
  5092. {
  5093. Return (One)
  5094. }
  5095. }
  5096. Else
  5097. {
  5098. If (LEqual (T_0, 0x02))
  5099. {
  5100. Return (SDGV) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR17.SDGV */
  5101. }
  5102. }
  5103. }
  5104. }
  5105. Return (Zero)
  5106. }
  5107. }
  5108. Device (PR18)
  5109. {
  5110. Name (_ADR, 0x08) // _ADR: Address
  5111. Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
  5112. {
  5113. Name (UPCP, Package (0x04)
  5114. {
  5115. 0xFF,
  5116. 0xFF,
  5117. Zero,
  5118. Zero
  5119. })
  5120. Return (UPCP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR18._UPC.UPCP */
  5121. }
  5122. Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
  5123. {
  5124. Name (PLDP, Package (0x01)
  5125. {
  5126. Buffer (0x10)
  5127. {
  5128. /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  5129. /* 0008 */ 0xB1, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  5130. }
  5131. })
  5132. Return (PLDP) /* \_SB_.PCI0.EHC1.HUBN.PR01.PR18._PLD.PLDP */
  5133. }
  5134. }
  5135. }
  5136. }
  5137. Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
  5138. {
  5139. Return (GPRW (0x0D, 0x03))
  5140. }
  5141. }
  5142. Device (EHC2)
  5143. {
  5144. Name (_ADR, 0x001A0000) // _ADR: Address
  5145. OperationRegion (PWKE, PCI_Config, 0x62, 0x04)
  5146. Field (PWKE, DWordAcc, NoLock, Preserve)
  5147. {
  5148. , 1,
  5149. PWUC, 6
  5150. }
  5151. Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake
  5152. {
  5153. If (Arg0)
  5154. {
  5155. Store (Ones, PWUC) /* \_SB_.PCI0.EHC2.PWUC */
  5156. }
  5157. Else
  5158. {
  5159. Store (Zero, PWUC) /* \_SB_.PCI0.EHC2.PWUC */
  5160. }
  5161. }
  5162. Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
  5163. {
  5164. Return (0x02)
  5165. }
  5166. Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
  5167. {
  5168. Return (0x02)
  5169. }
  5170. Device (HUBN)
  5171. {
  5172. Name (_ADR, Zero) // _ADR: Address
  5173. Device (PR01)
  5174. {
  5175. Name (_ADR, One) // _ADR: Address
  5176. Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
  5177. {
  5178. Name (UPCA, Package (0x04)
  5179. {
  5180. 0xFF,
  5181. Zero,
  5182. Zero,
  5183. Zero
  5184. })
  5185. Return (UPCA) /* \_SB_.PCI0.EHC2.HUBN.PR01._UPC.UPCA */
  5186. }
  5187. Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
  5188. {
  5189. Name (PLDP, Package (0x01)
  5190. {
  5191. Buffer (0x10)
  5192. {
  5193. /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  5194. /* 0008 */ 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  5195. }
  5196. })
  5197. Return (PLDP) /* \_SB_.PCI0.EHC2.HUBN.PR01._PLD.PLDP */
  5198. }
  5199. Device (PR11)
  5200. {
  5201. Name (_ADR, One) // _ADR: Address
  5202. Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
  5203. {
  5204. Name (UPCP, Package (0x04)
  5205. {
  5206. 0xFF,
  5207. 0xFF,
  5208. Zero,
  5209. Zero
  5210. })
  5211. Return (UPCP) /* \_SB_.PCI0.EHC2.HUBN.PR01.PR11._UPC.UPCP */
  5212. }
  5213. Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
  5214. {
  5215. Name (PLDP, Package (0x01)
  5216. {
  5217. Buffer (0x10)
  5218. {
  5219. /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  5220. /* 0008 */ 0xE1, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  5221. }
  5222. })
  5223. Return (PLDP) /* \_SB_.PCI0.EHC2.HUBN.PR01.PR11._PLD.PLDP */
  5224. }
  5225. }
  5226. Device (PR12)
  5227. {
  5228. Name (_ADR, 0x02) // _ADR: Address
  5229. Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
  5230. {
  5231. Name (UPCP, Package (0x04)
  5232. {
  5233. 0xFF,
  5234. 0xFF,
  5235. Zero,
  5236. Zero
  5237. })
  5238. Return (UPCP) /* \_SB_.PCI0.EHC2.HUBN.PR01.PR12._UPC.UPCP */
  5239. }
  5240. Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
  5241. {
  5242. Name (PLDP, Package (0x01)
  5243. {
  5244. Buffer (0x10)
  5245. {
  5246. /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  5247. /* 0008 */ 0xE1, 0x1D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  5248. }
  5249. })
  5250. Return (PLDP) /* \_SB_.PCI0.EHC2.HUBN.PR01.PR12._PLD.PLDP */
  5251. }
  5252. Alias (SBV1, SDGV)
  5253. Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
  5254. {
  5255. If (LEqual (Arg0, Buffer (0x10)
  5256. {
  5257. /* 0000 */ 0x8F, 0x70, 0xFC, 0xA5, 0x75, 0x87, 0xA6, 0x4B,
  5258. /* 0008 */ 0xBD, 0x0C, 0xBA, 0x90, 0xA1, 0xEC, 0x72, 0xF8
  5259. }))
  5260. {
  5261. Name (T_0, Zero) // _T_x: Emitted by ASL Compiler
  5262. Store (ToInteger (Arg2), T_0) /* \_SB_.PCI0.EHC2.HUBN.PR01.PR12._DSM.T_0 */
  5263. If (LEqual (T_0, Zero))
  5264. {
  5265. If (LEqual (Arg1, One))
  5266. {
  5267. Return (Buffer (One)
  5268. {
  5269. 0x07
  5270. })
  5271. }
  5272. Else
  5273. {
  5274. Return (Buffer (One)
  5275. {
  5276. 0x00
  5277. })
  5278. }
  5279. }
  5280. Else
  5281. {
  5282. If (LEqual (T_0, One))
  5283. {
  5284. If (LEqual (SDGV, 0xFF))
  5285. {
  5286. Return (Zero)
  5287. }
  5288. Else
  5289. {
  5290. Return (One)
  5291. }
  5292. }
  5293. Else
  5294. {
  5295. If (LEqual (T_0, 0x02))
  5296. {
  5297. Return (SDGV) /* \_SB_.PCI0.EHC2.HUBN.PR01.PR12.SDGV */
  5298. }
  5299. }
  5300. }
  5301. }
  5302. Return (Zero)
  5303. }
  5304. }
  5305. Device (PR13)
  5306. {
  5307. Name (_ADR, 0x03) // _ADR: Address
  5308. Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
  5309. {
  5310. Name (UPCP, Package (0x04)
  5311. {
  5312. 0xFF,
  5313. 0xFF,
  5314. Zero,
  5315. Zero
  5316. })
  5317. Return (UPCP) /* \_SB_.PCI0.EHC2.HUBN.PR01.PR13._UPC.UPCP */
  5318. }
  5319. Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
  5320. {
  5321. If (LEqual (^^^^^LPCB.EC.ECOS, 0x02))
  5322. {
  5323. Return (Package (0x01)
  5324. {
  5325. Buffer (0x10)
  5326. {
  5327. /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  5328. /* 0008 */ 0xE0, 0x1D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  5329. }
  5330. })
  5331. }
  5332. Return (Package (0x01)
  5333. {
  5334. Buffer (0x10)
  5335. {
  5336. /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  5337. /* 0008 */ 0xE1, 0x1D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  5338. }
  5339. })
  5340. }
  5341. }
  5342. Device (PR14)
  5343. {
  5344. Name (_ADR, 0x04) // _ADR: Address
  5345. Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
  5346. {
  5347. Name (UPCP, Package (0x04)
  5348. {
  5349. 0xFF,
  5350. 0xFF,
  5351. Zero,
  5352. Zero
  5353. })
  5354. Return (UPCP) /* \_SB_.PCI0.EHC2.HUBN.PR01.PR14._UPC.UPCP */
  5355. }
  5356. Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
  5357. {
  5358. Name (PLDP, Package (0x01)
  5359. {
  5360. Buffer (0x10)
  5361. {
  5362. /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  5363. /* 0008 */ 0xE1, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  5364. }
  5365. })
  5366. Return (PLDP) /* \_SB_.PCI0.EHC2.HUBN.PR01.PR14._PLD.PLDP */
  5367. }
  5368. }
  5369. Device (PR15)
  5370. {
  5371. Name (_ADR, 0x05) // _ADR: Address
  5372. Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
  5373. {
  5374. Name (UPCP, Package (0x04)
  5375. {
  5376. 0xFF,
  5377. 0xFF,
  5378. Zero,
  5379. Zero
  5380. })
  5381. Return (UPCP) /* \_SB_.PCI0.EHC2.HUBN.PR01.PR15._UPC.UPCP */
  5382. }
  5383. Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
  5384. {
  5385. Name (PLDP, Package (0x01)
  5386. {
  5387. Buffer (0x10)
  5388. {
  5389. /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  5390. /* 0008 */ 0xB1, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  5391. }
  5392. })
  5393. Return (PLDP) /* \_SB_.PCI0.EHC2.HUBN.PR01.PR15._PLD.PLDP */
  5394. }
  5395. }
  5396. Device (PR16)
  5397. {
  5398. Name (_ADR, 0x06) // _ADR: Address
  5399. Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
  5400. {
  5401. Name (UPCP, Package (0x04)
  5402. {
  5403. 0xFF,
  5404. 0xFF,
  5405. Zero,
  5406. Zero
  5407. })
  5408. Return (UPCP) /* \_SB_.PCI0.EHC2.HUBN.PR01.PR16._UPC.UPCP */
  5409. }
  5410. Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
  5411. {
  5412. Name (PLDP, Package (0x01)
  5413. {
  5414. Buffer (0x10)
  5415. {
  5416. /* 0000 */ 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  5417. /* 0008 */ 0xB1, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  5418. }
  5419. })
  5420. Return (PLDP) /* \_SB_.PCI0.EHC2.HUBN.PR01.PR16._PLD.PLDP */
  5421. }
  5422. }
  5423. }
  5424. }
  5425. Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
  5426. {
  5427. Return (GPRW (0x0D, 0x03))
  5428. }
  5429. }
  5430. Device (XHC)
  5431. {
  5432. Name (_ADR, 0x00140000) // _ADR: Address
  5433. OperationRegion (XPRT, PCI_Config, 0x74, 0x6C)
  5434. Field (XPRT, DWordAcc, NoLock, Preserve)
  5435. {
  5436. Offset (0x01),
  5437. PMEE, 1,
  5438. , 6,
  5439. PMES, 1,
  5440. Offset (0x5C),
  5441. PR2, 32,
  5442. PR2M, 32,
  5443. PR3, 32,
  5444. PR3M, 32
  5445. }
  5446. Name (XRST, Zero)
  5447. Method (CUID, 1, Serialized)
  5448. {
  5449. If (LEqual (Arg0, Buffer (0x10)
  5450. {
  5451. /* 0000 */ 0xA9, 0x12, 0x95, 0x7C, 0x05, 0x17, 0xB4, 0x4C,
  5452. /* 0008 */ 0xAF, 0x7D, 0x50, 0x6A, 0x24, 0x23, 0xAB, 0x71
  5453. }))
  5454. {
  5455. Return (One)
  5456. }
  5457. Return (Zero)
  5458. }
  5459. Method (POSC, 3, Serialized)
  5460. {
  5461. CreateDWordField (Arg2, Zero, CDW1)
  5462. CreateDWordField (Arg2, 0x08, CDW3)
  5463. If (LNotEqual (Arg1, One))
  5464. {
  5465. Or (CDW1, 0x08, CDW1) /* \_SB_.PCI0.XHC_.POSC.CDW1 */
  5466. }
  5467. If (LEqual (XHCI, Zero))
  5468. {
  5469. Or (CDW1, 0x02, CDW1) /* \_SB_.PCI0.XHC_.POSC.CDW1 */
  5470. }
  5471. If (LNot (And (CDW1, One)))
  5472. {
  5473. If (And (CDW3, One))
  5474. {
  5475. ESEL ()
  5476. }
  5477. Else
  5478. {
  5479. XSEL ()
  5480. }
  5481. }
  5482. Return (Arg2)
  5483. }
  5484. Method (XSEL, 0, Serialized)
  5485. {
  5486. If (LOr (LEqual (XHCI, 0x02), LEqual (XHCI, 0x03)))
  5487. {
  5488. Store (One, XUSB) /* \_SB_.XUSB */
  5489. Store (One, XRST) /* \_SB_.PCI0.XHC_.XRST */
  5490. Store (Zero, Local0)
  5491. And (PR3, 0xFFFFFFF0, Local0)
  5492. Or (Local0, XHPM, Local0)
  5493. And (Local0, PR3M, PR3) /* \_SB_.PCI0.XHC_.PR3_ */
  5494. Store (Zero, Local0)
  5495. And (PR2, 0xFFFFFFF0, Local0)
  5496. Or (Local0, XHPM, Local0)
  5497. And (Local0, PR2M, PR2) /* \_SB_.PCI0.XHC_.PR2_ */
  5498. }
  5499. }
  5500. Method (ESEL, 0, Serialized)
  5501. {
  5502. If (LOr (LEqual (XHCI, 0x02), LEqual (XHCI, 0x03)))
  5503. {
  5504. And (PR3, 0xFFFFFFF0, PR3) /* \_SB_.PCI0.XHC_.PR3_ */
  5505. And (PR2, 0xFFFFFFF0, PR2) /* \_SB_.PCI0.XHC_.PR2_ */
  5506. Store (Zero, XUSB) /* \_SB_.XUSB */
  5507. Store (Zero, XRST) /* \_SB_.PCI0.XHC_.XRST */
  5508. }
  5509. }
  5510. Method (XWAK, 0, Serialized)
  5511. {
  5512. If (LOr (LEqual (XUSB, One), LEqual (XRST, One)))
  5513. {
  5514. XSEL ()
  5515. }
  5516. }
  5517. Method (_S3D, 0, NotSerialized) // _S3D: S3 Device State
  5518. {
  5519. Return (0x02)
  5520. }
  5521. Method (_S4D, 0, NotSerialized) // _S4D: S4 Device State
  5522. {
  5523. Return (0x02)
  5524. }
  5525. Device (RHUB)
  5526. {
  5527. Name (_ADR, Zero) // _ADR: Address
  5528. Device (HSP1)
  5529. {
  5530. Name (_ADR, One) // _ADR: Address
  5531. Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
  5532. {
  5533. Name (UPCP, Package (0x04)
  5534. {
  5535. 0xFF,
  5536. 0x03,
  5537. Zero,
  5538. Zero
  5539. })
  5540. If (LNot (And (PR2, One)))
  5541. {
  5542. Store (Zero, Index (UPCP, Zero))
  5543. }
  5544. Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HSP1._UPC.UPCP */
  5545. }
  5546. Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
  5547. {
  5548. Name (PLDP, Package (0x01)
  5549. {
  5550. Buffer (0x10)
  5551. {
  5552. /* 0000 */ 0x01, 0xC6, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00,
  5553. /* 0008 */ 0x69, 0x0C, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00
  5554. }
  5555. })
  5556. CreateBitField (DerefOf (Index (PLDP, Zero)), 0x40, VIS)
  5557. If (LNot (And (PR2, One)))
  5558. {
  5559. And (VIS, Zero, VIS) /* \_SB_.PCI0.XHC_.RHUB.HSP1._PLD.VIS_ */
  5560. }
  5561. Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.HSP1._PLD.PLDP */
  5562. }
  5563. }
  5564. Device (HSP2)
  5565. {
  5566. Name (_ADR, 0x02) // _ADR: Address
  5567. Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
  5568. {
  5569. Name (UPCP, Package (0x04)
  5570. {
  5571. 0xFF,
  5572. 0x03,
  5573. Zero,
  5574. Zero
  5575. })
  5576. If (LNot (And (PR2, 0x02)))
  5577. {
  5578. Store (Zero, Index (UPCP, Zero))
  5579. }
  5580. Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HSP2._UPC.UPCP */
  5581. }
  5582. Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
  5583. {
  5584. Name (PLDP, Package (0x01)
  5585. {
  5586. Buffer (0x10)
  5587. {
  5588. /* 0000 */ 0x01, 0xC6, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00,
  5589. /* 0008 */ 0x69, 0x0C, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00
  5590. }
  5591. })
  5592. CreateBitField (DerefOf (Index (PLDP, Zero)), 0x40, VIS)
  5593. If (LNot (And (PR2, 0x02)))
  5594. {
  5595. And (VIS, Zero, VIS) /* \_SB_.PCI0.XHC_.RHUB.HSP2._PLD.VIS_ */
  5596. }
  5597. Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.HSP2._PLD.PLDP */
  5598. }
  5599. }
  5600. Device (HSP3)
  5601. {
  5602. Name (_ADR, 0x03) // _ADR: Address
  5603. Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
  5604. {
  5605. Name (UPCP, Package (0x04)
  5606. {
  5607. 0xFF,
  5608. 0x03,
  5609. Zero,
  5610. Zero
  5611. })
  5612. If (LNot (And (PR2, 0x04)))
  5613. {
  5614. Store (Zero, Index (UPCP, Zero))
  5615. }
  5616. Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HSP3._UPC.UPCP */
  5617. }
  5618. Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
  5619. {
  5620. Name (PLDP, Package (0x01)
  5621. {
  5622. Buffer (0x10)
  5623. {
  5624. /* 0000 */ 0x01, 0xC6, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00,
  5625. /* 0008 */ 0x69, 0x0C, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00
  5626. }
  5627. })
  5628. CreateBitField (DerefOf (Index (PLDP, Zero)), 0x40, VIS)
  5629. If (LNot (And (PR2, 0x04)))
  5630. {
  5631. And (VIS, Zero, VIS) /* \_SB_.PCI0.XHC_.RHUB.HSP3._PLD.VIS_ */
  5632. }
  5633. Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.HSP3._PLD.PLDP */
  5634. }
  5635. }
  5636. Device (HSP4)
  5637. {
  5638. Name (_ADR, 0x04) // _ADR: Address
  5639. Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
  5640. {
  5641. Name (UPCP, Package (0x04)
  5642. {
  5643. 0xFF,
  5644. 0x03,
  5645. Zero,
  5646. Zero
  5647. })
  5648. If (LNot (And (PR2, 0x08)))
  5649. {
  5650. Store (Zero, Index (UPCP, Zero))
  5651. }
  5652. Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.HSP4._UPC.UPCP */
  5653. }
  5654. Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
  5655. {
  5656. Name (PLDP, Package (0x01)
  5657. {
  5658. Buffer (0x10)
  5659. {
  5660. /* 0000 */ 0x01, 0xC6, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00,
  5661. /* 0008 */ 0x69, 0x0C, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00
  5662. }
  5663. })
  5664. CreateBitField (DerefOf (Index (PLDP, Zero)), 0x40, VIS)
  5665. If (LNot (And (PR2, 0x08)))
  5666. {
  5667. And (VIS, Zero, VIS) /* \_SB_.PCI0.XHC_.RHUB.HSP4._PLD.VIS_ */
  5668. }
  5669. Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.HSP4._PLD.PLDP */
  5670. }
  5671. }
  5672. Device (SSP1)
  5673. {
  5674. Name (_ADR, 0x05) // _ADR: Address
  5675. Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
  5676. {
  5677. Name (UPCP, Package (0x04)
  5678. {
  5679. 0xFF,
  5680. 0x03,
  5681. Zero,
  5682. Zero
  5683. })
  5684. If (LNot (And (PR3, One)))
  5685. {
  5686. Store (Zero, Index (UPCP, Zero))
  5687. }
  5688. Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.SSP1._UPC.UPCP */
  5689. }
  5690. Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
  5691. {
  5692. Name (PLDP, Package (0x01)
  5693. {
  5694. Buffer (0x10)
  5695. {
  5696. /* 0000 */ 0x01, 0xC6, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00,
  5697. /* 0008 */ 0x69, 0x0C, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00
  5698. }
  5699. })
  5700. CreateBitField (DerefOf (Index (PLDP, Zero)), 0x40, VIS)
  5701. If (LNot (And (PR3, One)))
  5702. {
  5703. And (VIS, Zero, VIS) /* \_SB_.PCI0.XHC_.RHUB.SSP1._PLD.VIS_ */
  5704. }
  5705. Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.SSP1._PLD.PLDP */
  5706. }
  5707. }
  5708. Device (SSP2)
  5709. {
  5710. Name (_ADR, 0x06) // _ADR: Address
  5711. Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
  5712. {
  5713. Name (UPCP, Package (0x04)
  5714. {
  5715. 0xFF,
  5716. 0x03,
  5717. Zero,
  5718. Zero
  5719. })
  5720. If (LNot (And (PR3, 0x02)))
  5721. {
  5722. Store (Zero, Index (UPCP, Zero))
  5723. }
  5724. Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.SSP2._UPC.UPCP */
  5725. }
  5726. Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
  5727. {
  5728. Name (PLDP, Package (0x01)
  5729. {
  5730. Buffer (0x10)
  5731. {
  5732. /* 0000 */ 0x01, 0xC6, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00,
  5733. /* 0008 */ 0x69, 0x0C, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00
  5734. }
  5735. })
  5736. CreateBitField (DerefOf (Index (PLDP, Zero)), 0x40, VIS)
  5737. If (LNot (And (PR3, 0x02)))
  5738. {
  5739. And (VIS, Zero, VIS) /* \_SB_.PCI0.XHC_.RHUB.SSP2._PLD.VIS_ */
  5740. }
  5741. Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.SSP2._PLD.PLDP */
  5742. }
  5743. }
  5744. Device (SSP3)
  5745. {
  5746. Name (_ADR, 0x07) // _ADR: Address
  5747. Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
  5748. {
  5749. Name (UPCP, Package (0x04)
  5750. {
  5751. 0xFF,
  5752. 0x03,
  5753. Zero,
  5754. Zero
  5755. })
  5756. If (LNot (And (PR3, 0x04)))
  5757. {
  5758. Store (Zero, Index (UPCP, Zero))
  5759. }
  5760. Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.SSP3._UPC.UPCP */
  5761. }
  5762. Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
  5763. {
  5764. Name (PLDP, Package (0x01)
  5765. {
  5766. Buffer (0x10)
  5767. {
  5768. /* 0000 */ 0x01, 0xC6, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00,
  5769. /* 0008 */ 0x69, 0x0C, 0x80, 0x01, 0x00, 0x00, 0x00, 0x00
  5770. }
  5771. })
  5772. CreateBitField (DerefOf (Index (PLDP, Zero)), 0x40, VIS)
  5773. If (LNot (And (PR3, 0x04)))
  5774. {
  5775. And (VIS, Zero, VIS) /* \_SB_.PCI0.XHC_.RHUB.SSP3._PLD.VIS_ */
  5776. }
  5777. Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.SSP3._PLD.PLDP */
  5778. }
  5779. }
  5780. Device (SSP4)
  5781. {
  5782. Name (_ADR, 0x08) // _ADR: Address
  5783. Method (_UPC, 0, Serialized) // _UPC: USB Port Capabilities
  5784. {
  5785. Name (UPCP, Package (0x04)
  5786. {
  5787. 0xFF,
  5788. 0x03,
  5789. Zero,
  5790. Zero
  5791. })
  5792. If (LNot (And (PR3, 0x08)))
  5793. {
  5794. Store (Zero, Index (UPCP, Zero))
  5795. }
  5796. Return (UPCP) /* \_SB_.PCI0.XHC_.RHUB.SSP4._UPC.UPCP */
  5797. }
  5798. Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device
  5799. {
  5800. Name (PLDP, Package (0x01)
  5801. {
  5802. Buffer (0x10)
  5803. {
  5804. /* 0000 */ 0x01, 0xC6, 0x72, 0x00, 0x00, 0x00, 0x00, 0x00,
  5805. /* 0008 */ 0x69, 0x0C, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00
  5806. }
  5807. })
  5808. CreateBitField (DerefOf (Index (PLDP, Zero)), 0x40, VIS)
  5809. If (LNot (And (PR3, 0x08)))
  5810. {
  5811. And (VIS, Zero, VIS) /* \_SB_.PCI0.XHC_.RHUB.SSP4._PLD.VIS_ */
  5812. }
  5813. Return (PLDP) /* \_SB_.PCI0.XHC_.RHUB.SSP4._PLD.PLDP */
  5814. }
  5815. }
  5816. }
  5817. Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
  5818. {
  5819. Return (GPRW (0x0D, 0x04))
  5820. }
  5821. }
  5822. Device (HDEF)
  5823. {
  5824. Name (_ADR, 0x001B0000) // _ADR: Address
  5825. OperationRegion (HDAR, PCI_Config, 0x4C, 0x10)
  5826. Field (HDAR, WordAcc, NoLock, Preserve)
  5827. {
  5828. DCKA, 1,
  5829. Offset (0x01),
  5830. DCKM, 1,
  5831. , 6,
  5832. DCKS, 1,
  5833. Offset (0x08),
  5834. , 15,
  5835. PMES, 1
  5836. }
  5837. Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
  5838. {
  5839. Return (GPRW (0x0D, 0x04))
  5840. }
  5841. }
  5842. Device (SAT0)
  5843. {
  5844. Name (_ADR, 0x001F0002) // _ADR: Address
  5845. }
  5846. Device (SAT1)
  5847. {
  5848. Name (_ADR, 0x001F0005) // _ADR: Address
  5849. }
  5850. Device (SBUS)
  5851. {
  5852. Name (_ADR, 0x001F0003) // _ADR: Address
  5853. OperationRegion (SMBP, PCI_Config, 0x40, 0xC0)
  5854. Field (SMBP, DWordAcc, NoLock, Preserve)
  5855. {
  5856. , 2,
  5857. I2CE, 1
  5858. }
  5859. OperationRegion (SMPB, PCI_Config, 0x20, 0x04)
  5860. Field (SMPB, DWordAcc, NoLock, Preserve)
  5861. {
  5862. , 5,
  5863. SBAR, 11
  5864. }
  5865. OperationRegion (SMBI, SystemIO, ShiftLeft (SBAR, 0x05), 0x10)
  5866. Field (SMBI, ByteAcc, NoLock, Preserve)
  5867. {
  5868. HSTS, 8,
  5869. Offset (0x02),
  5870. HCON, 8,
  5871. HCOM, 8,
  5872. TXSA, 8,
  5873. DAT0, 8,
  5874. DAT1, 8,
  5875. HBDR, 8,
  5876. PECR, 8,
  5877. RXSA, 8,
  5878. SDAT, 16
  5879. }
  5880. Method (SSXB, 2, Serialized)
  5881. {
  5882. If (STRT ())
  5883. {
  5884. Return (Zero)
  5885. }
  5886. Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
  5887. Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
  5888. Store (Arg0, TXSA) /* \_SB_.PCI0.SBUS.TXSA */
  5889. Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
  5890. Store (0x48, HCON) /* \_SB_.PCI0.SBUS.HCON */
  5891. If (COMP ())
  5892. {
  5893. Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
  5894. Return (One)
  5895. }
  5896. Return (Zero)
  5897. }
  5898. Method (SRXB, 1, Serialized)
  5899. {
  5900. If (STRT ())
  5901. {
  5902. Return (0xFFFF)
  5903. }
  5904. Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
  5905. Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
  5906. Store (Or (Arg0, One), TXSA) /* \_SB_.PCI0.SBUS.TXSA */
  5907. Store (0x44, HCON) /* \_SB_.PCI0.SBUS.HCON */
  5908. If (COMP ())
  5909. {
  5910. Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
  5911. Return (DAT0) /* \_SB_.PCI0.SBUS.DAT0 */
  5912. }
  5913. Return (0xFFFF)
  5914. }
  5915. Method (SWRB, 3, Serialized)
  5916. {
  5917. If (STRT ())
  5918. {
  5919. Return (Zero)
  5920. }
  5921. Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
  5922. Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
  5923. Store (Arg0, TXSA) /* \_SB_.PCI0.SBUS.TXSA */
  5924. Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
  5925. Store (Arg2, DAT0) /* \_SB_.PCI0.SBUS.DAT0 */
  5926. Store (0x48, HCON) /* \_SB_.PCI0.SBUS.HCON */
  5927. If (COMP ())
  5928. {
  5929. Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
  5930. Return (One)
  5931. }
  5932. Return (Zero)
  5933. }
  5934. Method (SRDB, 2, Serialized)
  5935. {
  5936. If (STRT ())
  5937. {
  5938. Return (0xFFFF)
  5939. }
  5940. Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
  5941. Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
  5942. Store (Or (Arg0, One), TXSA) /* \_SB_.PCI0.SBUS.TXSA */
  5943. Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
  5944. Store (0x48, HCON) /* \_SB_.PCI0.SBUS.HCON */
  5945. If (COMP ())
  5946. {
  5947. Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
  5948. Return (DAT0) /* \_SB_.PCI0.SBUS.DAT0 */
  5949. }
  5950. Return (0xFFFF)
  5951. }
  5952. Method (SWRW, 3, Serialized)
  5953. {
  5954. If (STRT ())
  5955. {
  5956. Return (Zero)
  5957. }
  5958. Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
  5959. Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
  5960. Store (Arg0, TXSA) /* \_SB_.PCI0.SBUS.TXSA */
  5961. Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
  5962. And (Arg2, 0xFF, DAT1) /* \_SB_.PCI0.SBUS.DAT1 */
  5963. And (ShiftRight (Arg2, 0x08), 0xFF, DAT0) /* \_SB_.PCI0.SBUS.DAT0 */
  5964. Store (0x4C, HCON) /* \_SB_.PCI0.SBUS.HCON */
  5965. If (COMP ())
  5966. {
  5967. Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
  5968. Return (One)
  5969. }
  5970. Return (Zero)
  5971. }
  5972. Method (SRDW, 2, Serialized)
  5973. {
  5974. If (STRT ())
  5975. {
  5976. Return (0xFFFF)
  5977. }
  5978. Store (Zero, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
  5979. Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
  5980. Store (Or (Arg0, One), TXSA) /* \_SB_.PCI0.SBUS.TXSA */
  5981. Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
  5982. Store (0x4C, HCON) /* \_SB_.PCI0.SBUS.HCON */
  5983. If (COMP ())
  5984. {
  5985. Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
  5986. Return (Or (ShiftLeft (DAT0, 0x08), DAT1))
  5987. }
  5988. Return (0xFFFFFFFF)
  5989. }
  5990. Method (SBLW, 4, Serialized)
  5991. {
  5992. If (STRT ())
  5993. {
  5994. Return (Zero)
  5995. }
  5996. Store (Arg3, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
  5997. Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
  5998. Store (Arg0, TXSA) /* \_SB_.PCI0.SBUS.TXSA */
  5999. Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
  6000. Store (SizeOf (Arg2), DAT0) /* \_SB_.PCI0.SBUS.DAT0 */
  6001. Store (Zero, Local1)
  6002. Store (DerefOf (Index (Arg2, Zero)), HBDR) /* \_SB_.PCI0.SBUS.HBDR */
  6003. Store (0x54, HCON) /* \_SB_.PCI0.SBUS.HCON */
  6004. While (LGreater (SizeOf (Arg2), Local1))
  6005. {
  6006. Store (0x0FA0, Local0)
  6007. While (LAnd (LNot (And (HSTS, 0x80)), Local0))
  6008. {
  6009. Decrement (Local0)
  6010. Stall (0x32)
  6011. }
  6012. If (LNot (Local0))
  6013. {
  6014. KILL ()
  6015. Return (Zero)
  6016. }
  6017. Store (0x80, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
  6018. Increment (Local1)
  6019. If (LGreater (SizeOf (Arg2), Local1))
  6020. {
  6021. Store (DerefOf (Index (Arg2, Local1)), HBDR) /* \_SB_.PCI0.SBUS.HBDR */
  6022. }
  6023. }
  6024. If (COMP ())
  6025. {
  6026. Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
  6027. Return (One)
  6028. }
  6029. Return (Zero)
  6030. }
  6031. Method (SBLR, 3, Serialized)
  6032. {
  6033. Name (TBUF, Buffer (0x0100) {})
  6034. If (STRT ())
  6035. {
  6036. Return (Zero)
  6037. }
  6038. Store (Arg2, I2CE) /* \_SB_.PCI0.SBUS.I2CE */
  6039. Store (0xBF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
  6040. Store (Or (Arg0, One), TXSA) /* \_SB_.PCI0.SBUS.TXSA */
  6041. Store (Arg1, HCOM) /* \_SB_.PCI0.SBUS.HCOM */
  6042. Store (0x54, HCON) /* \_SB_.PCI0.SBUS.HCON */
  6043. Store (0x0FA0, Local0)
  6044. While (LAnd (LNot (And (HSTS, 0x80)), Local0))
  6045. {
  6046. Decrement (Local0)
  6047. Stall (0x32)
  6048. }
  6049. If (LNot (Local0))
  6050. {
  6051. KILL ()
  6052. Return (Zero)
  6053. }
  6054. Store (DAT0, Index (TBUF, Zero))
  6055. Store (0x80, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
  6056. Store (One, Local1)
  6057. While (LLess (Local1, DerefOf (Index (TBUF, Zero))))
  6058. {
  6059. Store (0x0FA0, Local0)
  6060. While (LAnd (LNot (And (HSTS, 0x80)), Local0))
  6061. {
  6062. Decrement (Local0)
  6063. Stall (0x32)
  6064. }
  6065. If (LNot (Local0))
  6066. {
  6067. KILL ()
  6068. Return (Zero)
  6069. }
  6070. Store (HBDR, Index (TBUF, Local1))
  6071. Store (0x80, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
  6072. Increment (Local1)
  6073. }
  6074. If (COMP ())
  6075. {
  6076. Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
  6077. Return (TBUF) /* \_SB_.PCI0.SBUS.SBLR.TBUF */
  6078. }
  6079. Return (Zero)
  6080. }
  6081. Method (STRT, 0, Serialized)
  6082. {
  6083. Store (0xC8, Local0)
  6084. While (Local0)
  6085. {
  6086. If (And (HSTS, 0x40))
  6087. {
  6088. Decrement (Local0)
  6089. Sleep (One)
  6090. If (LEqual (Local0, Zero))
  6091. {
  6092. Return (One)
  6093. }
  6094. }
  6095. Else
  6096. {
  6097. Store (Zero, Local0)
  6098. }
  6099. }
  6100. Store (0x0FA0, Local0)
  6101. While (Local0)
  6102. {
  6103. If (And (HSTS, One))
  6104. {
  6105. Decrement (Local0)
  6106. Stall (0x32)
  6107. If (LEqual (Local0, Zero))
  6108. {
  6109. KILL ()
  6110. }
  6111. }
  6112. Else
  6113. {
  6114. Return (Zero)
  6115. }
  6116. }
  6117. Return (One)
  6118. }
  6119. Method (COMP, 0, Serialized)
  6120. {
  6121. Store (0x0FA0, Local0)
  6122. While (Local0)
  6123. {
  6124. If (And (HSTS, 0x02))
  6125. {
  6126. Return (One)
  6127. }
  6128. Else
  6129. {
  6130. Decrement (Local0)
  6131. Stall (0x32)
  6132. If (LEqual (Local0, Zero))
  6133. {
  6134. KILL ()
  6135. }
  6136. }
  6137. }
  6138. Return (Zero)
  6139. }
  6140. Method (KILL, 0, Serialized)
  6141. {
  6142. Or (HCON, 0x02, HCON) /* \_SB_.PCI0.SBUS.HCON */
  6143. Or (HSTS, 0xFF, HSTS) /* \_SB_.PCI0.SBUS.HSTS */
  6144. }
  6145. }
  6146. }
  6147. Scope (_SB.PCI0.LPCB)
  6148. {
  6149. OperationRegion (CPSB, SystemMemory, 0xCA077E18, 0x10)
  6150. Field (CPSB, AnyAcc, NoLock, Preserve)
  6151. {
  6152. RTCX, 1,
  6153. SBB0, 7,
  6154. SBB1, 8,
  6155. SBB2, 8,
  6156. SBB3, 8,
  6157. SBB4, 8,
  6158. SBB5, 8,
  6159. SBB6, 8,
  6160. SBB7, 8,
  6161. SBB8, 8,
  6162. SBB9, 8,
  6163. SBBA, 8,
  6164. SBBB, 8,
  6165. SBBC, 8,
  6166. SBBD, 8,
  6167. SBBE, 8,
  6168. SBBF, 8
  6169. }
  6170. Method (SPTS, 1, NotSerialized)
  6171. {
  6172. Store (One, SLPX) /* \_SB_.PCI0.LPCB.SLPX */
  6173. Store (One, SLPE) /* \_SB_.PCI0.LPCB.SLPE */
  6174. }
  6175. Method (SWAK, 1, NotSerialized)
  6176. {
  6177. Store (Zero, SLPE) /* \_SB_.PCI0.LPCB.SLPE */
  6178. If (RTCX) {}
  6179. Else
  6180. {
  6181. Notify (PWRB, 0x02) // Device Wake
  6182. }
  6183. }
  6184. OperationRegion (SMIE, SystemIO, PMBS, 0x04)
  6185. Field (SMIE, ByteAcc, NoLock, Preserve)
  6186. {
  6187. , 10,
  6188. RTCS, 1,
  6189. , 3,
  6190. PEXS, 1,
  6191. WAKS, 1,
  6192. Offset (0x03),
  6193. PWBT, 1,
  6194. Offset (0x04)
  6195. }
  6196. OperationRegion (SLPR, SystemIO, SMCR, 0x08)
  6197. Field (SLPR, ByteAcc, NoLock, Preserve)
  6198. {
  6199. , 4,
  6200. SLPE, 1,
  6201. , 31,
  6202. SLPX, 1,
  6203. Offset (0x08)
  6204. }
  6205. }
  6206. Scope (_SB.PCI0.RP01)
  6207. {
  6208. Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
  6209. {
  6210. Return (GPRW (0x09, 0x04))
  6211. }
  6212. }
  6213. Scope (_SB.PCI0.RP02)
  6214. {
  6215. Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
  6216. {
  6217. Return (GPRW (0x09, 0x04))
  6218. }
  6219. }
  6220. Scope (_SB.PCI0.RP03)
  6221. {
  6222. Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
  6223. {
  6224. Return (GPRW (0x09, 0x04))
  6225. }
  6226. }
  6227. Scope (_SB.PCI0.RP04)
  6228. {
  6229. Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
  6230. {
  6231. Return (GPRW (0x09, 0x04))
  6232. }
  6233. }
  6234. Scope (_SB.PCI0.RP05)
  6235. {
  6236. Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
  6237. {
  6238. Return (GPRW (0x09, 0x04))
  6239. }
  6240. }
  6241. Scope (_SB.PCI0.RP06)
  6242. {
  6243. Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
  6244. {
  6245. Return (GPRW (0x09, 0x04))
  6246. }
  6247. }
  6248. Scope (_SB.PCI0.RP07)
  6249. {
  6250. Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
  6251. {
  6252. Return (GPRW (0x09, 0x04))
  6253. }
  6254. }
  6255. Scope (_SB.PCI0.RP08)
  6256. {
  6257. Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
  6258. {
  6259. Return (GPRW (0x09, 0x04))
  6260. }
  6261. }
  6262. OperationRegion (_SB.PCI0.LPCB.LPCR, PCI_Config, 0x80, 0x04)
  6263. Field (\_SB.PCI0.LPCB.LPCR, ByteAcc, NoLock, Preserve)
  6264. {
  6265. CADR, 3,
  6266. , 1,
  6267. CBDR, 3,
  6268. Offset (0x01),
  6269. LTDR, 2,
  6270. , 2,
  6271. FDDR, 1,
  6272. Offset (0x02),
  6273. CALE, 1,
  6274. CBLE, 1,
  6275. LTLE, 1,
  6276. FDLE, 1,
  6277. Offset (0x03),
  6278. GLLE, 1,
  6279. GHLE, 1,
  6280. KCLE, 1,
  6281. MCLE, 1,
  6282. C1LE, 1,
  6283. C2LE, 1,
  6284. Offset (0x04)
  6285. }
  6286. Method (UXDV, 1, NotSerialized)
  6287. {
  6288. Store (0xFF, Local0)
  6289. Name (T_0, Zero) // _T_x: Emitted by ASL Compiler
  6290. Store (Add (Arg0, Zero), T_0) /* \UXDV.T_0 */
  6291. If (LEqual (T_0, 0x03F8))
  6292. {
  6293. Store (Zero, Local0)
  6294. }
  6295. Else
  6296. {
  6297. If (LEqual (T_0, 0x02F8))
  6298. {
  6299. Store (One, Local0)
  6300. }
  6301. Else
  6302. {
  6303. If (LEqual (T_0, 0x0220))
  6304. {
  6305. Store (0x02, Local0)
  6306. }
  6307. Else
  6308. {
  6309. If (LEqual (T_0, 0x0228))
  6310. {
  6311. Store (0x03, Local0)
  6312. }
  6313. Else
  6314. {
  6315. If (LEqual (T_0, 0x0238))
  6316. {
  6317. Store (0x04, Local0)
  6318. }
  6319. Else
  6320. {
  6321. If (LEqual (T_0, 0x02E8))
  6322. {
  6323. Store (0x05, Local0)
  6324. }
  6325. Else
  6326. {
  6327. If (LEqual (T_0, 0x0338))
  6328. {
  6329. Store (0x06, Local0)
  6330. }
  6331. Else
  6332. {
  6333. If (LEqual (T_0, 0x03E8))
  6334. {
  6335. Store (0x07, Local0)
  6336. }
  6337. }
  6338. }
  6339. }
  6340. }
  6341. }
  6342. }
  6343. }
  6344. Return (Local0)
  6345. }
  6346. Method (RRIO, 4, NotSerialized)
  6347. {
  6348. Name (T_0, Zero) // _T_x: Emitted by ASL Compiler
  6349. Store (Add (Arg0, Zero), T_0) /* \RRIO.T_0 */
  6350. If (LEqual (T_0, Zero))
  6351. {
  6352. Store (Zero, CALE) /* \CALE */
  6353. Store (UXDV (Arg2), Local0)
  6354. If (LNotEqual (Local0, 0xFF))
  6355. {
  6356. Store (Local0, CADR) /* \CADR */
  6357. }
  6358. If (Arg1)
  6359. {
  6360. Store (One, CALE) /* \CALE */
  6361. }
  6362. }
  6363. Else
  6364. {
  6365. If (LEqual (T_0, One))
  6366. {
  6367. Store (Zero, CBLE) /* \CBLE */
  6368. Store (UXDV (Arg2), Local0)
  6369. If (LNotEqual (Local0, 0xFF))
  6370. {
  6371. Store (Local0, CBDR) /* \CBDR */
  6372. }
  6373. If (Arg1)
  6374. {
  6375. Store (One, CBLE) /* \CBLE */
  6376. }
  6377. }
  6378. Else
  6379. {
  6380. If (LEqual (T_0, 0x02))
  6381. {
  6382. Store (Zero, LTLE) /* \LTLE */
  6383. If (LEqual (Arg2, 0x0378))
  6384. {
  6385. Store (Zero, LTDR) /* \LTDR */
  6386. }
  6387. If (LEqual (Arg2, 0x0278))
  6388. {
  6389. Store (One, LTDR) /* \LTDR */
  6390. }
  6391. If (LEqual (Arg2, 0x03BC))
  6392. {
  6393. Store (0x02, LTDR) /* \LTDR */
  6394. }
  6395. If (Arg1)
  6396. {
  6397. Store (One, LTLE) /* \LTLE */
  6398. }
  6399. }
  6400. Else
  6401. {
  6402. If (LEqual (T_0, 0x03))
  6403. {
  6404. Store (Zero, FDLE) /* \FDLE */
  6405. If (LEqual (Arg2, 0x03F0))
  6406. {
  6407. Store (Zero, FDDR) /* \FDDR */
  6408. }
  6409. If (LEqual (Arg2, 0x0370))
  6410. {
  6411. Store (One, FDDR) /* \FDDR */
  6412. }
  6413. If (Arg1)
  6414. {
  6415. Store (One, FDLE) /* \FDLE */
  6416. }
  6417. }
  6418. Else
  6419. {
  6420. If (LEqual (T_0, 0x08))
  6421. {
  6422. If (LEqual (Arg2, 0x0200))
  6423. {
  6424. If (Arg1)
  6425. {
  6426. Store (One, GLLE) /* \GLLE */
  6427. }
  6428. Else
  6429. {
  6430. Store (Zero, GLLE) /* \GLLE */
  6431. }
  6432. }
  6433. If (LEqual (Arg2, 0x0208))
  6434. {
  6435. If (Arg1)
  6436. {
  6437. Store (One, GHLE) /* \GHLE */
  6438. }
  6439. Else
  6440. {
  6441. Store (Zero, GHLE) /* \GHLE */
  6442. }
  6443. }
  6444. }
  6445. Else
  6446. {
  6447. If (LEqual (T_0, 0x09))
  6448. {
  6449. If (LEqual (Arg2, 0x0200))
  6450. {
  6451. If (Arg1)
  6452. {
  6453. Store (One, GLLE) /* \GLLE */
  6454. }
  6455. Else
  6456. {
  6457. Store (Zero, GLLE) /* \GLLE */
  6458. }
  6459. }
  6460. If (LEqual (Arg2, 0x0208))
  6461. {
  6462. If (Arg1)
  6463. {
  6464. Store (One, GHLE) /* \GHLE */
  6465. }
  6466. Else
  6467. {
  6468. Store (Zero, GHLE) /* \GHLE */
  6469. }
  6470. }
  6471. }
  6472. Else
  6473. {
  6474. If (LEqual (T_0, 0x0A))
  6475. {
  6476. If (LOr (LEqual (Arg2, 0x60), LEqual (Arg2, 0x64)))
  6477. {
  6478. If (Arg1)
  6479. {
  6480. Store (One, KCLE) /* \KCLE */
  6481. }
  6482. Else
  6483. {
  6484. Store (Zero, KCLE) /* \KCLE */
  6485. }
  6486. }
  6487. }
  6488. Else
  6489. {
  6490. If (LEqual (T_0, 0x0B))
  6491. {
  6492. If (LOr (LEqual (Arg2, 0x62), LEqual (Arg2, 0x66)))
  6493. {
  6494. If (Arg1)
  6495. {
  6496. Store (One, MCLE) /* \MCLE */
  6497. }
  6498. Else
  6499. {
  6500. Store (Zero, MCLE) /* \MCLE */
  6501. }
  6502. }
  6503. }
  6504. Else
  6505. {
  6506. If (LEqual (T_0, 0x0C))
  6507. {
  6508. If (LEqual (Arg2, 0x2E))
  6509. {
  6510. If (Arg1)
  6511. {
  6512. Store (One, C1LE) /* \C1LE */
  6513. }
  6514. Else
  6515. {
  6516. Store (Zero, C1LE) /* \C1LE */
  6517. }
  6518. }
  6519. If (LEqual (Arg2, 0x4E))
  6520. {
  6521. If (Arg1)
  6522. {
  6523. Store (One, C2LE) /* \C2LE */
  6524. }
  6525. Else
  6526. {
  6527. Store (Zero, C2LE) /* \C2LE */
  6528. }
  6529. }
  6530. }
  6531. Else
  6532. {
  6533. If (LEqual (T_0, 0x0D))
  6534. {
  6535. If (LEqual (Arg2, 0x2E))
  6536. {
  6537. If (Arg1)
  6538. {
  6539. Store (One, C1LE) /* \C1LE */
  6540. }
  6541. Else
  6542. {
  6543. Store (Zero, C1LE) /* \C1LE */
  6544. }
  6545. }
  6546. If (LEqual (Arg2, 0x4E))
  6547. {
  6548. If (Arg1)
  6549. {
  6550. Store (One, C2LE) /* \C2LE */
  6551. }
  6552. Else
  6553. {
  6554. Store (Zero, C2LE) /* \C2LE */
  6555. }
  6556. }
  6557. }
  6558. }
  6559. }
  6560. }
  6561. }
  6562. }
  6563. }
  6564. }
  6565. }
  6566. }
  6567. }
  6568. Method (RDMA, 3, NotSerialized)
  6569. {
  6570. }
  6571. Scope (_SB.PCI0)
  6572. {
  6573. Method (NPTS, 1, NotSerialized)
  6574. {
  6575. }
  6576. Method (NWAK, 1, NotSerialized)
  6577. {
  6578. }
  6579. }
  6580. Scope (_SB.PCI0.PEG0)
  6581. {
  6582. Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
  6583. {
  6584. Return (GPRW (0x09, 0x04))
  6585. }
  6586. }
  6587. Scope (_SB.PCI0.PEG0.PEGP)
  6588. {
  6589. OperationRegion (DGFX, PCI_Config, Zero, 0xF0)
  6590. Field (DGFX, DWordAcc, Lock, Preserve)
  6591. {
  6592. Offset (0x0B),
  6593. LNKV, 8
  6594. }
  6595. Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
  6596. {
  6597. Return (GPRW (0x09, 0x04))
  6598. }
  6599. }
  6600. Scope (_SB.PCI0.PEG1)
  6601. {
  6602. Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
  6603. {
  6604. Return (GPRW (0x09, 0x04))
  6605. }
  6606. }
  6607. Scope (_SB.PCI0.PEG2)
  6608. {
  6609. Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
  6610. {
  6611. Return (GPRW (0x09, 0x04))
  6612. }
  6613. }
  6614. Scope (_SB.PCI0.PEG3)
  6615. {
  6616. Method (_PRW, 0, NotSerialized) // _PRW: Power Resources for Wake
  6617. {
  6618. Return (GPRW (0x09, 0x04))
  6619. }
  6620. }
  6621. Scope (_SB.PCI0)
  6622. {
  6623. }
  6624. Scope (_PR)
  6625. {
  6626. Processor (CPU0, 0x01, 0x00000410, 0x06)
  6627. {
  6628. }
  6629. Processor (CPU1, 0x02, 0x00000410, 0x06)
  6630. {
  6631. }
  6632. Processor (CPU2, 0x03, 0x00000410, 0x06)
  6633. {
  6634. }
  6635. Processor (CPU3, 0x04, 0x00000410, 0x06)
  6636. {
  6637. }
  6638. Processor (CPU4, 0x05, 0x00000410, 0x06)
  6639. {
  6640. }
  6641. Processor (CPU5, 0x06, 0x00000410, 0x06)
  6642. {
  6643. }
  6644. Processor (CPU6, 0x07, 0x00000410, 0x06)
  6645. {
  6646. }
  6647. Processor (CPU7, 0x08, 0x00000410, 0x06)
  6648. {
  6649. }
  6650. }
  6651. Mutex (MUTX, 0x00)
  6652. OperationRegion (DEB0, SystemIO, 0x80, One)
  6653. Field (DEB0, ByteAcc, NoLock, Preserve)
  6654. {
  6655. DBG8, 8
  6656. }
  6657. OperationRegion (DEB1, SystemIO, 0x90, 0x02)
  6658. Field (DEB1, WordAcc, NoLock, Preserve)
  6659. {
  6660. DBG9, 16
  6661. }
  6662. OperationRegion (PRT0, SystemIO, 0x80, 0x04)
  6663. Field (PRT0, DWordAcc, Lock, Preserve)
  6664. {
  6665. P80H, 32
  6666. }
  6667. Method (P8XH, 2, Serialized)
  6668. {
  6669. If (LEqual (Arg0, Zero))
  6670. {
  6671. Store (Or (And (P80D, 0xFFFFFF00), Arg1), P80D) /* \P80D */
  6672. }
  6673. If (LEqual (Arg0, One))
  6674. {
  6675. Store (Or (And (P80D, 0xFFFF00FF), ShiftLeft (Arg1, 0x08)
  6676. ), P80D) /* \P80D */
  6677. }
  6678. If (LEqual (Arg0, 0x02))
  6679. {
  6680. Store (Or (And (P80D, 0xFF00FFFF), ShiftLeft (Arg1, 0x10)
  6681. ), P80D) /* \P80D */
  6682. }
  6683. If (LEqual (Arg0, 0x03))
  6684. {
  6685. Store (Or (And (P80D, 0x00FFFFFF), ShiftLeft (Arg1, 0x18)
  6686. ), P80D) /* \P80D */
  6687. }
  6688. Store (P80D, P80H) /* \P80H */
  6689. }
  6690. OperationRegion (SPRT, SystemIO, 0xB2, 0x02)
  6691. Field (SPRT, ByteAcc, Lock, Preserve)
  6692. {
  6693. SSMP, 8,
  6694. SSMD, 8
  6695. }
  6696. Method (_PIC, 1, NotSerialized) // _PIC: Interrupt Model
  6697. {
  6698. Store (Arg0, GPIC) /* \GPIC */
  6699. Store (Arg0, PICM) /* \PICM */
  6700. }
  6701. Method (_PTS, 1, NotSerialized) // _PTS: Prepare To Sleep
  6702. {
  6703. Store (Zero, P80D) /* \P80D */
  6704. P8XH (Zero, Arg0)
  6705. PTS (Arg0)
  6706. If (LEqual (Arg0, 0x03))
  6707. {
  6708. If (LAnd (DTSE, LGreater (TCNT, One)))
  6709. {
  6710. TRAP (TRTD, 0x1E)
  6711. }
  6712. }
  6713. }
  6714. Method (_WAK, 1, Serialized) // _WAK: Wake
  6715. {
  6716. P8XH (One, 0xAB)
  6717. WAK (Arg0)
  6718. If (NEXP)
  6719. {
  6720. If (And (OSCC, 0x02))
  6721. {
  6722. \_SB.PCI0.NHPG ()
  6723. }
  6724. If (And (OSCC, 0x04))
  6725. {
  6726. \_SB.PCI0.NPME ()
  6727. }
  6728. }
  6729. If (LEqual (Arg0, 0x03))
  6730. {
  6731. If (LEqual (Zero, ACTT)) {}
  6732. }
  6733. If (LOr (LEqual (Arg0, 0x03), LEqual (Arg0, 0x04)))
  6734. {
  6735. If (LAnd (DTSE, LGreater (TCNT, One)))
  6736. {
  6737. TRAP (TRTD, 0x14)
  6738. }
  6739. If (LEqual (OSYS, 0x07D2))
  6740. {
  6741. If (And (CFGD, One))
  6742. {
  6743. If (LGreater (\_PR.CPU0._PPC, Zero))
  6744. {
  6745. Subtract (\_PR.CPU0._PPC, One, \_PR.CPU0._PPC) /* External reference */
  6746. PNOT ()
  6747. Add (\_PR.CPU0._PPC, One, \_PR.CPU0._PPC) /* External reference */
  6748. PNOT ()
  6749. }
  6750. Else
  6751. {
  6752. Add (\_PR.CPU0._PPC, One, \_PR.CPU0._PPC) /* External reference */
  6753. PNOT ()
  6754. Subtract (\_PR.CPU0._PPC, One, \_PR.CPU0._PPC) /* External reference */
  6755. PNOT ()
  6756. }
  6757. }
  6758. }
  6759. If (LLess (OSYS, 0x07DC))
  6760. {
  6761. Store (One, \_SB.PCI0.LPCB.EC.BRIC)
  6762. }
  6763. If (LEqual (RP1D, Zero))
  6764. {
  6765. Notify (\_SB.PCI0.RP01, Zero) // Bus Check
  6766. }
  6767. If (LEqual (RP2D, Zero))
  6768. {
  6769. Notify (\_SB.PCI0.RP02, Zero) // Bus Check
  6770. }
  6771. If (LEqual (RP3D, Zero))
  6772. {
  6773. Notify (\_SB.PCI0.RP03, Zero) // Bus Check
  6774. }
  6775. If (LEqual (RP4D, Zero))
  6776. {
  6777. Notify (\_SB.PCI0.RP04, Zero) // Bus Check
  6778. }
  6779. If (LEqual (RP5D, Zero))
  6780. {
  6781. Notify (\_SB.PCI0.RP05, Zero) // Bus Check
  6782. }
  6783. If (LEqual (RP6D, Zero))
  6784. {
  6785. Notify (\_SB.PCI0.RP06, Zero) // Bus Check
  6786. }
  6787. If (LEqual (RP7D, Zero))
  6788. {
  6789. If (LEqual (DSTS, Zero))
  6790. {
  6791. Notify (\_SB.PCI0.RP07, Zero) // Bus Check
  6792. }
  6793. }
  6794. If (LEqual (RP8D, Zero))
  6795. {
  6796. If (LEqual (DSTS, Zero))
  6797. {
  6798. Notify (\_SB.PCI0.RP08, Zero) // Bus Check
  6799. }
  6800. }
  6801. }
  6802. If (LOr (LEqual (Arg0, 0x03), LEqual (Arg0, 0x04)))
  6803. {
  6804. \_SB.PCI0.XHC.XWAK ()
  6805. }
  6806. Return (Package (0x02)
  6807. {
  6808. Zero,
  6809. Zero
  6810. })
  6811. }
  6812. Method (GETB, 3, Serialized)
  6813. {
  6814. Multiply (Arg0, 0x08, Local0)
  6815. Multiply (Arg1, 0x08, Local1)
  6816. CreateField (Arg2, Local0, Local1, TBF3)
  6817. Return (TBF3) /* \GETB.TBF3 */
  6818. }
  6819. Method (PNOT, 0, Serialized)
  6820. {
  6821. If (LGreater (TCNT, One))
  6822. {
  6823. If (And (PDC0, 0x08))
  6824. {
  6825. Notify (\_PR.CPU0, 0x80) // Performance Capability Change
  6826. If (And (PDC0, 0x10))
  6827. {
  6828. Sleep (0x64)
  6829. Notify (\_PR.CPU0, 0x81) // C-State Change
  6830. }
  6831. }
  6832. If (And (PDC1, 0x08))
  6833. {
  6834. Notify (\_PR.CPU1, 0x80) // Performance Capability Change
  6835. If (And (PDC1, 0x10))
  6836. {
  6837. Sleep (0x64)
  6838. Notify (\_PR.CPU1, 0x81) // C-State Change
  6839. }
  6840. }
  6841. If (And (PDC2, 0x08))
  6842. {
  6843. Notify (\_PR.CPU2, 0x80) // Performance Capability Change
  6844. If (And (PDC2, 0x10))
  6845. {
  6846. Sleep (0x64)
  6847. Notify (\_PR.CPU2, 0x81) // C-State Change
  6848. }
  6849. }
  6850. If (And (PDC3, 0x08))
  6851. {
  6852. Notify (\_PR.CPU3, 0x80) // Performance Capability Change
  6853. If (And (PDC3, 0x10))
  6854. {
  6855. Sleep (0x64)
  6856. Notify (\_PR.CPU3, 0x81) // C-State Change
  6857. }
  6858. }
  6859. If (And (PDC4, 0x08))
  6860. {
  6861. Notify (\_PR.CPU4, 0x80) // Performance Capability Change
  6862. If (And (PDC4, 0x10))
  6863. {
  6864. Sleep (0x64)
  6865. Notify (\_PR.CPU4, 0x81) // C-State Change
  6866. }
  6867. }
  6868. If (And (PDC5, 0x08))
  6869. {
  6870. Notify (\_PR.CPU5, 0x80) // Performance Capability Change
  6871. If (And (PDC5, 0x10))
  6872. {
  6873. Sleep (0x64)
  6874. Notify (\_PR.CPU5, 0x81) // C-State Change
  6875. }
  6876. }
  6877. If (And (PDC6, 0x08))
  6878. {
  6879. Notify (\_PR.CPU6, 0x80) // Performance Capability Change
  6880. If (And (PDC6, 0x10))
  6881. {
  6882. Sleep (0x64)
  6883. Notify (\_PR.CPU6, 0x81) // C-State Change
  6884. }
  6885. }
  6886. If (And (PDC7, 0x08))
  6887. {
  6888. Notify (\_PR.CPU7, 0x80) // Performance Capability Change
  6889. If (And (PDC7, 0x10))
  6890. {
  6891. Sleep (0x64)
  6892. Notify (\_PR.CPU7, 0x81) // C-State Change
  6893. }
  6894. }
  6895. }
  6896. Else
  6897. {
  6898. Notify (\_PR.CPU0, 0x80) // Performance Capability Change
  6899. Sleep (0x64)
  6900. Notify (\_PR.CPU0, 0x81) // C-State Change
  6901. }
  6902. }
  6903. Method (TRAP, 2, Serialized)
  6904. {
  6905. Store (Arg1, SMIF) /* \SMIF */
  6906. If (LEqual (Arg0, TRTP))
  6907. {
  6908. Store (Zero, TRP0) /* \TRP0 */
  6909. }
  6910. If (LEqual (Arg0, TRTD))
  6911. {
  6912. Store (Arg1, DTSF) /* \DTSF */
  6913. Store (Zero, TRPD) /* \TRPD */
  6914. Return (DTSF) /* \DTSF */
  6915. }
  6916. If (LEqual (Arg0, TRTI))
  6917. {
  6918. Store (Zero, TRPH) /* \TRPH */
  6919. }
  6920. Return (SMIF) /* \SMIF */
  6921. }
  6922. Scope (_SB.PCI0)
  6923. {
  6924. Method (_INI, 0, NotSerialized) // _INI: Initialize
  6925. {
  6926. Store (0x07D0, OSYS) /* \OSYS */
  6927. If (CondRefOf (_OSI, Local0))
  6928. {
  6929. If (_OSI ("Linux"))
  6930. {
  6931. Store (0x03E8, OSYS) /* \OSYS */
  6932. }
  6933. If (_OSI ("Windows 2001"))
  6934. {
  6935. Store (0x07D1, OSYS) /* \OSYS */
  6936. }
  6937. If (_OSI ("Windows 2001 SP1"))
  6938. {
  6939. Store (0x07D1, OSYS) /* \OSYS */
  6940. }
  6941. If (_OSI ("Windows 2001 SP2"))
  6942. {
  6943. Store (0x07D2, OSYS) /* \OSYS */
  6944. }
  6945. If (_OSI ("Windows 2001.1"))
  6946. {
  6947. Store (0x07D3, OSYS) /* \OSYS */
  6948. }
  6949. If (_OSI ("Windows 2006"))
  6950. {
  6951. Store (0x07D6, OSYS) /* \OSYS */
  6952. }
  6953. If (_OSI ("Windows 2009"))
  6954. {
  6955. Store (0x07D9, OSYS) /* \OSYS */
  6956. }
  6957. }
  6958. }
  6959. Method (NHPG, 0, Serialized)
  6960. {
  6961. Store (Zero, ^RP01.HPEX) /* \_SB_.PCI0.RP01.HPEX */
  6962. Store (Zero, ^RP02.HPEX) /* \_SB_.PCI0.RP02.HPEX */
  6963. Store (Zero, ^RP03.HPEX) /* \_SB_.PCI0.RP03.HPEX */
  6964. Store (Zero, ^RP04.HPEX) /* \_SB_.PCI0.RP04.HPEX */
  6965. Store (One, ^RP01.HPSX) /* \_SB_.PCI0.RP01.HPSX */
  6966. Store (One, ^RP02.HPSX) /* \_SB_.PCI0.RP02.HPSX */
  6967. Store (One, ^RP03.HPSX) /* \_SB_.PCI0.RP03.HPSX */
  6968. Store (One, ^RP04.HPSX) /* \_SB_.PCI0.RP04.HPSX */
  6969. }
  6970. Method (NPME, 0, Serialized)
  6971. {
  6972. Store (Zero, ^RP01.PMEX) /* \_SB_.PCI0.RP01.PMEX */
  6973. Store (Zero, ^RP02.PMEX) /* \_SB_.PCI0.RP02.PMEX */
  6974. Store (Zero, ^RP03.PMEX) /* \_SB_.PCI0.RP03.PMEX */
  6975. Store (Zero, ^RP04.PMEX) /* \_SB_.PCI0.RP04.PMEX */
  6976. Store (Zero, ^RP05.PMEX) /* \_SB_.PCI0.RP05.PMEX */
  6977. Store (Zero, ^RP06.PMEX) /* \_SB_.PCI0.RP06.PMEX */
  6978. Store (Zero, ^RP07.PMEX) /* \_SB_.PCI0.RP07.PMEX */
  6979. Store (Zero, ^RP08.PMEX) /* \_SB_.PCI0.RP08.PMEX */
  6980. Store (One, ^RP01.PMSX) /* \_SB_.PCI0.RP01.PMSX */
  6981. Store (One, ^RP02.PMSX) /* \_SB_.PCI0.RP02.PMSX */
  6982. Store (One, ^RP03.PMSX) /* \_SB_.PCI0.RP03.PMSX */
  6983. Store (One, ^RP04.PMSX) /* \_SB_.PCI0.RP04.PMSX */
  6984. Store (One, ^RP05.PMSX) /* \_SB_.PCI0.RP05.PMSX */
  6985. Store (One, ^RP06.PMSX) /* \_SB_.PCI0.RP06.PMSX */
  6986. Store (One, ^RP07.PMSX) /* \_SB_.PCI0.RP07.PMSX */
  6987. Store (One, ^RP08.PMSX) /* \_SB_.PCI0.RP08.PMSX */
  6988. }
  6989. }
  6990. Scope (\)
  6991. {
  6992. Name (PICM, Zero)
  6993. Name (PRWP, Package (0x02)
  6994. {
  6995. Zero,
  6996. Zero
  6997. })
  6998. Method (GPRW, 2, NotSerialized)
  6999. {
  7000. Store (Arg0, Index (PRWP, Zero))
  7001. Store (ShiftLeft (SS1, One), Local0)
  7002. Or (Local0, ShiftLeft (SS2, 0x02), Local0)
  7003. Or (Local0, ShiftLeft (SS3, 0x03), Local0)
  7004. Or (Local0, ShiftLeft (SS4, 0x04), Local0)
  7005. If (And (ShiftLeft (One, Arg1), Local0))
  7006. {
  7007. Store (Arg1, Index (PRWP, One))
  7008. }
  7009. Else
  7010. {
  7011. ShiftRight (Local0, One, Local0)
  7012. FindSetLeftBit (Local0, Index (PRWP, One))
  7013. }
  7014. Return (PRWP) /* \PRWP */
  7015. }
  7016. }
  7017. Scope (_SB.PCI0)
  7018. {
  7019. Device (PDRC)
  7020. {
  7021. Name (_HID, EisaId ("PNP0C02") /* PNP Motherboard Resources */) // _HID: Hardware ID
  7022. Name (_UID, One) // _UID: Unique ID
  7023. Name (BUF0, ResourceTemplate ()
  7024. {
  7025. Memory32Fixed (ReadWrite,
  7026. 0x00000000, // Address Base
  7027. 0x00004000, // Address Length
  7028. _Y11)
  7029. Memory32Fixed (ReadWrite,
  7030. 0x00000000, // Address Base
  7031. 0x00008000, // Address Length
  7032. _Y13)
  7033. Memory32Fixed (ReadWrite,
  7034. 0x00000000, // Address Base
  7035. 0x00001000, // Address Length
  7036. _Y14)
  7037. Memory32Fixed (ReadWrite,
  7038. 0x00000000, // Address Base
  7039. 0x00001000, // Address Length
  7040. _Y15)
  7041. Memory32Fixed (ReadWrite,
  7042. 0x00000000, // Address Base
  7043. 0x00000000, // Address Length
  7044. _Y16)
  7045. Memory32Fixed (ReadWrite,
  7046. 0xFED20000, // Address Base
  7047. 0x00020000, // Address Length
  7048. )
  7049. Memory32Fixed (ReadOnly,
  7050. 0xFED90000, // Address Base
  7051. 0x00004000, // Address Length
  7052. )
  7053. Memory32Fixed (ReadWrite,
  7054. 0xFED45000, // Address Base
  7055. 0x0004B000, // Address Length
  7056. )
  7057. Memory32Fixed (ReadOnly,
  7058. 0xFF000000, // Address Base
  7059. 0x01000000, // Address Length
  7060. )
  7061. Memory32Fixed (ReadOnly,
  7062. 0xFEE00000, // Address Base
  7063. 0x00100000, // Address Length
  7064. )
  7065. Memory32Fixed (ReadWrite,
  7066. 0x00000000, // Address Base
  7067. 0x00001000, // Address Length
  7068. _Y12)
  7069. })
  7070. Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings
  7071. {
  7072. CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y11._BAS, RBR0) // _BAS: Base Address
  7073. ShiftLeft (^^LPCB.RCBA, 0x0E, RBR0) /* \_SB_.PCI0.PDRC._CRS.RBR0 */
  7074. CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y12._BAS, TBR0) // _BAS: Base Address
  7075. Store (TBAB, TBR0) /* \_SB_.PCI0.PDRC._CRS.TBR0 */
  7076. CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y12._LEN, TBLN) // _LEN: Length
  7077. If (LEqual (TBAB, Zero))
  7078. {
  7079. Store (Zero, TBLN) /* \_SB_.PCI0.PDRC._CRS.TBLN */
  7080. }
  7081. CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y13._BAS, MBR0) // _BAS: Base Address
  7082. ShiftLeft (MHBR, 0x0F, MBR0) /* \_SB_.PCI0.PDRC._CRS.MBR0 */
  7083. CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y14._BAS, DBR0) // _BAS: Base Address
  7084. ShiftLeft (DIBR, 0x0C, DBR0) /* \_SB_.PCI0.PDRC._CRS.DBR0 */
  7085. CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y15._BAS, EBR0) // _BAS: Base Address
  7086. ShiftLeft (EPBR, 0x0C, EBR0) /* \_SB_.PCI0.PDRC._CRS.EBR0 */
  7087. CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y16._BAS, XBR0) // _BAS: Base Address
  7088. ShiftLeft (PXBR, 0x1A, XBR0) /* \_SB_.PCI0.PDRC._CRS.XBR0 */
  7089. CreateDWordField (BUF0, \_SB.PCI0.PDRC._Y16._LEN, XSZ0) // _LEN: Length
  7090. ShiftRight (0x10000000, PXSZ, XSZ0) /* \_SB_.PCI0.PDRC._CRS.XSZ0 */
  7091. Return (BUF0) /* \_SB_.PCI0.PDRC.BUF0 */
  7092. }
  7093. }
  7094. }
  7095. Scope (_GPE)
  7096. {
  7097. Method (_L09, 0, NotSerialized) // _Lxx: Level-Triggered GPE
  7098. {
  7099. If (LEqual (RP1D, Zero))
  7100. {
  7101. \_SB.PCI0.RP01.HPME ()
  7102. Notify (\_SB.PCI0.RP01, 0x02) // Device Wake
  7103. }
  7104. If (LEqual (RP2D, Zero))
  7105. {
  7106. \_SB.PCI0.RP02.HPME ()
  7107. Notify (\_SB.PCI0.RP02, 0x02) // Device Wake
  7108. }
  7109. If (LEqual (RP3D, Zero))
  7110. {
  7111. \_SB.PCI0.RP03.HPME ()
  7112. Notify (\_SB.PCI0.RP03, 0x02) // Device Wake
  7113. }
  7114. If (LEqual (RP4D, Zero))
  7115. {
  7116. \_SB.PCI0.RP04.HPME ()
  7117. Notify (\_SB.PCI0.RP04, 0x02) // Device Wake
  7118. }
  7119. If (LEqual (RP5D, Zero))
  7120. {
  7121. \_SB.PCI0.RP05.HPME ()
  7122. Notify (\_SB.PCI0.RP05, 0x02) // Device Wake
  7123. }
  7124. If (LEqual (RP6D, Zero))
  7125. {
  7126. \_SB.PCI0.RP06.HPME ()
  7127. Notify (\_SB.PCI0.RP06, 0x02) // Device Wake
  7128. }
  7129. If (LEqual (RP7D, Zero))
  7130. {
  7131. \_SB.PCI0.RP07.HPME ()
  7132. Notify (\_SB.PCI0.RP07, 0x02) // Device Wake
  7133. }
  7134. If (LEqual (RP8D, Zero))
  7135. {
  7136. \_SB.PCI0.RP08.HPME ()
  7137. Notify (\_SB.PCI0.RP08, 0x02) // Device Wake
  7138. }
  7139. Notify (\_SB.PCI0.PEG0, 0x02) // Device Wake
  7140. Notify (\_SB.PCI0.PEG0.PEGP, 0x02) // Device Wake
  7141. Notify (\_SB.PCI0.PEG1, 0x02) // Device Wake
  7142. Notify (\_SB.PCI0.PEG2, 0x02) // Device Wake
  7143. Notify (\_SB.PCI0.PEG3, 0x02) // Device Wake
  7144. }
  7145. Method (_L0D, 0, NotSerialized) // _Lxx: Level-Triggered GPE
  7146. {
  7147. Notify (\_SB.PCI0.EHC1, 0x02) // Device Wake
  7148. Notify (\_SB.PCI0.EHC2, 0x02) // Device Wake
  7149. Notify (\_SB.PCI0.HDEF, 0x02) // Device Wake
  7150. Notify (\_SB.PCI0.GLAN, 0x02) // Device Wake
  7151. Notify (\_SB.PCI0.XHC, 0x02) // Device Wake
  7152. If (LAnd (\_SB.PCI0.XHC.PMES, \_SB.PCI0.XHC.PMES))
  7153. {
  7154. Store (One, \_SB.PCI0.XHC.PMES)
  7155. }
  7156. }
  7157. Method (_L01, 0, NotSerialized) // _Lxx: Level-Triggered GPE
  7158. {
  7159. Add (L01C, One, L01C) /* \L01C */
  7160. P8XH (Zero, One)
  7161. P8XH (One, L01C)
  7162. If (LAnd (LEqual (RP1D, Zero), \_SB.PCI0.RP01.HPSX))
  7163. {
  7164. Sleep (0x64)
  7165. If (\_SB.PCI0.RP01.PDCX)
  7166. {
  7167. Store (One, \_SB.PCI0.RP01.PDCX)
  7168. Store (One, \_SB.PCI0.RP01.HPSX)
  7169. If (LNot (\_SB.PCI0.RP01.PDSX))
  7170. {
  7171. Store (Zero, \_SB.PCI0.RP01.L0SE)
  7172. }
  7173. Notify (\_SB.PCI0.RP01, Zero) // Bus Check
  7174. }
  7175. Else
  7176. {
  7177. Store (One, \_SB.PCI0.RP01.HPSX)
  7178. }
  7179. }
  7180. If (LAnd (LEqual (RP2D, Zero), \_SB.PCI0.RP02.HPSX))
  7181. {
  7182. Sleep (0x64)
  7183. If (\_SB.PCI0.RP02.PDCX)
  7184. {
  7185. Store (One, \_SB.PCI0.RP02.PDCX)
  7186. Store (One, \_SB.PCI0.RP02.HPSX)
  7187. If (LNot (\_SB.PCI0.RP02.PDSX))
  7188. {
  7189. Store (Zero, \_SB.PCI0.RP02.L0SE)
  7190. }
  7191. Notify (\_SB.PCI0.RP02, Zero) // Bus Check
  7192. }
  7193. Else
  7194. {
  7195. Store (One, \_SB.PCI0.RP02.HPSX)
  7196. }
  7197. }
  7198. If (LAnd (LEqual (RP3D, Zero), \_SB.PCI0.RP03.HPSX))
  7199. {
  7200. Sleep (0x64)
  7201. If (\_SB.PCI0.RP03.PDCX)
  7202. {
  7203. Store (One, \_SB.PCI0.RP03.PDCX)
  7204. Store (One, \_SB.PCI0.RP03.HPSX)
  7205. If (LNot (\_SB.PCI0.RP03.PDSX))
  7206. {
  7207. Store (Zero, \_SB.PCI0.RP03.L0SE)
  7208. }
  7209. Notify (\_SB.PCI0.RP03, Zero) // Bus Check
  7210. }
  7211. Else
  7212. {
  7213. Store (One, \_SB.PCI0.RP03.HPSX)
  7214. }
  7215. }
  7216. If (LAnd (LEqual (RP4D, Zero), \_SB.PCI0.RP04.HPSX))
  7217. {
  7218. Sleep (0x64)
  7219. If (\_SB.PCI0.RP04.PDCX)
  7220. {
  7221. Store (One, \_SB.PCI0.RP04.PDCX)
  7222. Store (One, \_SB.PCI0.RP04.HPSX)
  7223. If (LNot (\_SB.PCI0.RP04.PDSX))
  7224. {
  7225. Store (Zero, \_SB.PCI0.RP04.L0SE)
  7226. }
  7227. Notify (\_SB.PCI0.RP04, Zero) // Bus Check
  7228. }
  7229. Else
  7230. {
  7231. Store (One, \_SB.PCI0.RP04.HPSX)
  7232. }
  7233. }
  7234. If (LAnd (LEqual (RP5D, Zero), \_SB.PCI0.RP05.HPSX))
  7235. {
  7236. Sleep (0x64)
  7237. If (\_SB.PCI0.RP05.PDCX)
  7238. {
  7239. Store (One, \_SB.PCI0.RP05.PDCX)
  7240. Store (One, \_SB.PCI0.RP05.HPSX)
  7241. If (LNot (\_SB.PCI0.RP05.PDSX))
  7242. {
  7243. Store (Zero, \_SB.PCI0.RP05.L0SE)
  7244. }
  7245. Notify (\_SB.PCI0.RP05, Zero) // Bus Check
  7246. }
  7247. Else
  7248. {
  7249. Store (One, \_SB.PCI0.RP05.HPSX)
  7250. }
  7251. }
  7252. If (LAnd (LEqual (RP6D, Zero), \_SB.PCI0.RP06.HPSX))
  7253. {
  7254. Sleep (0x64)
  7255. If (\_SB.PCI0.RP06.PDCX)
  7256. {
  7257. Store (One, \_SB.PCI0.RP06.PDCX)
  7258. Store (One, \_SB.PCI0.RP06.HPSX)
  7259. If (LNot (\_SB.PCI0.RP06.PDSX))
  7260. {
  7261. Store (Zero, \_SB.PCI0.RP06.L0SE)
  7262. }
  7263. Notify (\_SB.PCI0.RP06, Zero) // Bus Check
  7264. }
  7265. Else
  7266. {
  7267. Store (One, \_SB.PCI0.RP06.HPSX)
  7268. }
  7269. }
  7270. If (LAnd (LEqual (RP7D, Zero), \_SB.PCI0.RP07.HPSX))
  7271. {
  7272. Sleep (0x64)
  7273. If (\_SB.PCI0.RP07.PDCX)
  7274. {
  7275. Store (One, \_SB.PCI0.RP07.PDCX)
  7276. Store (One, \_SB.PCI0.RP07.HPSX)
  7277. If (LNot (\_SB.PCI0.RP07.PDSX))
  7278. {
  7279. Store (Zero, \_SB.PCI0.RP07.L0SE)
  7280. }
  7281. }
  7282. Else
  7283. {
  7284. Store (One, \_SB.PCI0.RP07.HPSX)
  7285. }
  7286. }
  7287. If (LAnd (LEqual (RP8D, Zero), \_SB.PCI0.RP08.HPSX))
  7288. {
  7289. Sleep (0x64)
  7290. If (\_SB.PCI0.RP08.PDCX)
  7291. {
  7292. Store (One, \_SB.PCI0.RP08.PDCX)
  7293. Store (One, \_SB.PCI0.RP08.HPSX)
  7294. If (LNot (\_SB.PCI0.RP08.PDSX))
  7295. {
  7296. Store (Zero, \_SB.PCI0.RP08.L0SE)
  7297. }
  7298. }
  7299. Else
  7300. {
  7301. Store (One, \_SB.PCI0.RP08.HPSX)
  7302. }
  7303. }
  7304. }
  7305. Method (_L02, 0, NotSerialized) // _Lxx: Level-Triggered GPE
  7306. {
  7307. Store (Zero, GPEC) /* \GPEC */
  7308. If (CondRefOf (\_SB.PCI0.IEIT.EITV))
  7309. {
  7310. \_SB.PCI0.IEIT.EITV ()
  7311. }
  7312. If (CondRefOf (TNOT))
  7313. {
  7314. TNOT ()
  7315. }
  7316. }
  7317. Method (_L06, 0, NotSerialized) // _Lxx: Level-Triggered GPE
  7318. {
  7319. If (LAnd (\_SB.PCI0.GFX0.GSSE, LNot (GSMI)))
  7320. {
  7321. \_SB.PCI0.GFX0.GSCI ()
  7322. }
  7323. }
  7324. Method (_L07, 0, NotSerialized) // _Lxx: Level-Triggered GPE
  7325. {
  7326. Store (0x20, \_SB.PCI0.SBUS.HSTS)
  7327. }
  7328. }
  7329. Scope (_SB.PCI0.SAT0)
  7330. {
  7331. Device (PRT2)
  7332. {
  7333. Name (_ADR, 0x0002FFFF) // _ADR: Address
  7334. Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method
  7335. {
  7336. If (LEqual (Arg0, Buffer (0x10)
  7337. {
  7338. /* 0000 */ 0x30, 0xEF, 0xFA, 0xBD, 0xBB, 0xAE, 0xDE, 0x11,
  7339. /* 0008 */ 0x8A, 0x39, 0x08, 0x00, 0x20, 0x0C, 0x9A, 0x66
  7340. }))
  7341. {
  7342. Name (T_0, Zero) // _T_x: Emitted by ASL Compiler
  7343. Store (ToInteger (Arg2), T_0) /* \_SB_.PCI0.SAT0.PRT2._DSM.T_0 */
  7344. If (LEqual (T_0, Zero))
  7345. {
  7346. Name (T_1, Zero) // _T_x: Emitted by ASL Compiler
  7347. Store (ToInteger (Arg1), T_1) /* \_SB_.PCI0.SAT0.PRT2._DSM.T_1 */
  7348. If (LEqual (T_1, One))
  7349. {
  7350. If (LEqual (PFLV, FDTP))
  7351. {
  7352. Return (Buffer (One)
  7353. {
  7354. 0x00
  7355. })
  7356. }
  7357. Return (Buffer (One)
  7358. {
  7359. 0x0F
  7360. })
  7361. }
  7362. Else
  7363. {
  7364. Return (Buffer (One)
  7365. {
  7366. 0x00
  7367. })
  7368. }
  7369. }
  7370. Else
  7371. {
  7372. If (LEqual (T_0, One))
  7373. {
  7374. Return (One)
  7375. }
  7376. Else
  7377. {
  7378. If (LEqual (T_0, 0x02))
  7379. {
  7380. Store (Zero, GPE3) /* \GPE3 */
  7381. If (LEqual (And (GL00, 0x08), 0x08))
  7382. {
  7383. Or (GIV0, 0x08, GIV0) /* \GIV0 */
  7384. }
  7385. Else
  7386. {
  7387. And (GIV0, 0xF7, GIV0) /* \GIV0 */
  7388. }
  7389. And (GL08, 0xEF, GL08) /* \GL08 */
  7390. Sleep (0xC8)
  7391. Store (One, GPS3) /* \GPS3 */
  7392. Store (One, GPE3) /* \GPE3 */
  7393. Return (One)
  7394. }
  7395. Else
  7396. {
  7397. If (LEqual (T_0, 0x03))
  7398. {
  7399. Store (Zero, GPE3) /* \GPE3 */
  7400. Store (One, GPS3) /* \GPS3 */
  7401. Or (GL08, 0x10, GL08) /* \GL08 */
  7402. Return (One)
  7403. }
  7404. Else
  7405. {
  7406. Return (Zero)
  7407. }
  7408. }
  7409. }
  7410. }
  7411. }
  7412. Else
  7413. {
  7414. Return (Zero)
  7415. }
  7416. }
  7417. }
  7418. }
  7419. Scope (_GPE)
  7420. {
  7421. Method (_L13, 0, NotSerialized) // _Lxx: Level-Triggered GPE
  7422. {
  7423. If (LEqual (PFLV, FDTP))
  7424. {
  7425. Return (Zero)
  7426. }
  7427. Store (Zero, GPE3) /* \GPE3 */
  7428. Or (GL08, 0x10, GL08) /* \GL08 */
  7429. Notify (\_SB.PCI0.SAT0, 0x82) // Device-Specific Change
  7430. Return (Zero)
  7431. }
  7432. }
  7433. Scope (_SB.PCI0)
  7434. {
  7435. Method (CPTS, 1, NotSerialized)
  7436. {
  7437. If (LEqual (Arg0, 0x03))
  7438. {
  7439. Store (0x05, SSMD) /* \SSMD */
  7440. Store (0xE6, SSMP) /* \SSMP */
  7441. }
  7442. If (LEqual (Arg0, 0x04))
  7443. {
  7444. Store (One, SSMD) /* \SSMD */
  7445. Store (0xE6, SSMP) /* \SSMP */
  7446. Store (0x02, SSMD) /* \SSMD */
  7447. Store (0xE6, SSMP) /* \SSMP */
  7448. Store (0x05, SSMD) /* \SSMD */
  7449. Store (0xE6, SSMP) /* \SSMP */
  7450. }
  7451. If (LEqual (Arg0, 0x05))
  7452. {
  7453. Store (One, SSMD) /* \SSMD */
  7454. Store (0xE6, SSMP) /* \SSMP */
  7455. Store (0x07, SSMD) /* \SSMD */
  7456. Store (0xE6, SSMP) /* \SSMP */
  7457. }
  7458. }
  7459. }
  7460. Scope (_SB.PCI0)
  7461. {
  7462. Method (CWAK, 1, NotSerialized)
  7463. {
  7464. If (LEqual (Arg0, 0x03)) {}
  7465. If (LEqual (Arg0, 0x04)) {}
  7466. If (LEqual (Arg0, 0x05)) {}
  7467. }
  7468. }
  7469. Scope (_SB.PCI0.LPCB)
  7470. {
  7471. Device (EC)
  7472. {
  7473. Name (_HID, EisaId ("PNP0C09") /* Embedded Controller Device */) // _HID: Hardware ID
  7474. Name (_GPE, 0x17) // _GPE: General Purpose Events
  7475. Name (ECOK, Zero)
  7476. Name (B15C, Zero)
  7477. Name (A15C, Zero)
  7478. Name (ADPS, Zero)
  7479. Method (_REG, 2, NotSerialized) // _REG: Region Availability
  7480. {
  7481. Store (Zero, B15C) /* \_SB_.PCI0.LPCB.EC__.B15C */
  7482. Store (Zero, A15C) /* \_SB_.PCI0.LPCB.EC__.A15C */
  7483. If (LEqual (ADP, One))
  7484. {
  7485. Store (Zero, ADPS) /* \_SB_.PCI0.LPCB.EC__.ADPS */
  7486. }
  7487. Else
  7488. {
  7489. Store (One, ADPS) /* \_SB_.PCI0.LPCB.EC__.ADPS */
  7490. }
  7491. Store (ADP, PWRS) /* \PWRS */
  7492. If (LEqual (Arg0, 0x03))
  7493. {
  7494. Store (Arg1, ECOK) /* \_SB_.PCI0.LPCB.EC__.ECOK */
  7495. If (LLess (OSYS, 0x07DC))
  7496. {
  7497. Store (One, BRIC) /* \_SB_.PCI0.LPCB.EC__.BRIC */
  7498. }
  7499. }
  7500. }
  7501. Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
  7502. {
  7503. IO (Decode16,
  7504. 0x0062, // Range Minimum
  7505. 0x0062, // Range Maximum
  7506. 0x00, // Alignment
  7507. 0x01, // Length
  7508. )
  7509. IO (Decode16,
  7510. 0x0066, // Range Minimum
  7511. 0x0066, // Range Maximum
  7512. 0x00, // Alignment
  7513. 0x01, // Length
  7514. )
  7515. })
  7516. OperationRegion (RAM, EmbeddedControl, Zero, 0xFF)
  7517. Field (RAM, ByteAcc, Lock, Preserve)
  7518. {
  7519. NMSG, 8,
  7520. SLED, 4,
  7521. Offset (0x02),
  7522. MODE, 1,
  7523. FAN0, 1,
  7524. TME0, 1,
  7525. TME1, 1,
  7526. FAN1, 1,
  7527. , 2,
  7528. Offset (0x03),
  7529. LIDS, 1,
  7530. LSW0, 1,
  7531. LWKE, 1,
  7532. WAKF, 1,
  7533. , 2,
  7534. PWKE, 1,
  7535. MWKE, 1,
  7536. AC0, 16,
  7537. PSV, 16,
  7538. CRT, 16,
  7539. TMP, 16,
  7540. AC1, 16,
  7541. SLPT, 8,
  7542. SWEJ, 1,
  7543. SWCH, 1,
  7544. Offset (0x10),
  7545. ADP, 1,
  7546. AFLT, 1,
  7547. BAT0, 1,
  7548. BAT1, 1,
  7549. , 3,
  7550. PWOF, 1,
  7551. WFNO, 8,
  7552. BPU0, 32,
  7553. BDC0, 32,
  7554. BFC0, 32,
  7555. BTC0, 32,
  7556. BDV0, 32,
  7557. BST0, 32,
  7558. BPR0, 32,
  7559. BRC0, 32,
  7560. BPV0, 32,
  7561. BTP0, 16,
  7562. BRS0, 16,
  7563. BCW0, 32,
  7564. BCL0, 32,
  7565. BCG0, 32,
  7566. BG20, 32,
  7567. BMO0, 64,
  7568. BIF0, 64,
  7569. BSN0, 32,
  7570. BTY0, 64,
  7571. BCC0, 16,
  7572. ECOS, 8,
  7573. REV0, 8,
  7574. REV1, 32,
  7575. REV3, 32,
  7576. PRCL, 8,
  7577. PRC0, 8,
  7578. PRC1, 8,
  7579. PRCM, 8,
  7580. PRIN, 8,
  7581. PSTE, 8,
  7582. PCAD, 8,
  7583. PEWL, 8,
  7584. PWRL, 8,
  7585. PECD, 8,
  7586. PEHI, 8,
  7587. PECI, 8,
  7588. PEPL, 8,
  7589. PEPM, 8,
  7590. PWFC, 8,
  7591. PECC, 8,
  7592. PDT0, 8,
  7593. PDT1, 8,
  7594. PDT2, 8,
  7595. PDT3, 8,
  7596. PRFC, 8,
  7597. PRS0, 8,
  7598. PRS1, 8,
  7599. PRS2, 8,
  7600. PRS3, 8,
  7601. PRS4, 8,
  7602. PRCS, 8,
  7603. PEC0, 8,
  7604. PEC1, 8,
  7605. PEC2, 8,
  7606. PEC3, 8,
  7607. CMDR, 8,
  7608. CVRT, 8,
  7609. GTVR, 8,
  7610. FANT, 8,
  7611. SKNT, 8,
  7612. AMBT, 8,
  7613. MCRT, 8,
  7614. DIM0, 8,
  7615. DIM1, 8,
  7616. PMAX, 8,
  7617. PPDT, 8,
  7618. PECH, 8,
  7619. PMDT, 8,
  7620. TSD0, 8,
  7621. TSD1, 8,
  7622. TSD2, 8,
  7623. TSD3, 8,
  7624. CPUP, 16,
  7625. MCHP, 16,
  7626. SYSP, 16,
  7627. CPAP, 16,
  7628. MCAP, 16,
  7629. SYAP, 16,
  7630. CFSP, 16,
  7631. CPUE, 16,
  7632. Offset (0xC6),
  7633. BCC1, 8,
  7634. CTHE, 8,
  7635. OEM1, 8,
  7636. OEM2, 8,
  7637. OEM3, 8,
  7638. , 4,
  7639. CBB5, 1,
  7640. Offset (0xCC),
  7641. OEM4, 8,
  7642. Offset (0xD9),
  7643. , 7,
  7644. CLED, 1,
  7645. BRIC, 1,
  7646. P80E, 1,
  7647. TREN, 1,
  7648. Offset (0xDB),
  7649. , 4,
  7650. DBB5, 1,
  7651. Offset (0xDC),
  7652. Offset (0xDD),
  7653. BTST, 1,
  7654. WLST, 1,
  7655. DLED, 1,
  7656. , 3,
  7657. IRST, 1,
  7658. ISCT, 1,
  7659. Offset (0xF0),
  7660. PL1L, 8,
  7661. PL1H, 8,
  7662. PL2L, 8,
  7663. PL2H, 8,
  7664. PTAU, 8,
  7665. Offset (0xF8),
  7666. FCMD, 8,
  7667. FDAT, 8,
  7668. FBUF, 8
  7669. }
  7670. Method (_Q0A, 0, NotSerialized) // _Qxx: EC Query
  7671. {
  7672. P8XH (Zero, 0x0A)
  7673. Store (OEM4, ^^^^WMI.EVNT) /* \_SB_.WMI_.EVNT */
  7674. Notify (WMI, 0xD0) // Hardware-Specific
  7675. }
  7676. Method (_Q0B, 0, NotSerialized) // _Qxx: EC Query
  7677. {
  7678. P8XH (Zero, 0x0B)
  7679. Store (OEM4, ^^^^WMI.EVNT) /* \_SB_.WMI_.EVNT */
  7680. Notify (WMI, 0xD0) // Hardware-Specific
  7681. }
  7682. Method (_Q0C, 0, NotSerialized) // _Qxx: EC Query
  7683. {
  7684. P8XH (Zero, 0x0C)
  7685. Store (0xFB, ^^^^WMI.EVNT) /* \_SB_.WMI_.EVNT */
  7686. Notify (WMI, 0xD0) // Hardware-Specific
  7687. }
  7688. Method (_Q0D, 0, NotSerialized) // _Qxx: EC Query
  7689. {
  7690. P8XH (Zero, 0x0D)
  7691. Notify (SLPB, 0x80) // Status Change
  7692. }
  7693. Method (_Q0E, 0, NotSerialized) // _Qxx: EC Query
  7694. {
  7695. P8XH (Zero, 0x0E)
  7696. Store (0xFA, ^^^^WMI.EVNT) /* \_SB_.WMI_.EVNT */
  7697. Notify (WMI, 0xD0) // Hardware-Specific
  7698. }
  7699. Method (_Q0F, 0, NotSerialized) // _Qxx: EC Query
  7700. {
  7701. P8XH (Zero, 0x0F)
  7702. Store (0xFA, ^^^^WMI.EVNT) /* \_SB_.WMI_.EVNT */
  7703. Notify (WMI, 0xD0) // Hardware-Specific
  7704. }
  7705. Method (_Q10, 0, NotSerialized) // _Qxx: EC Query
  7706. {
  7707. P8XH (Zero, 0x10)
  7708. If (LEqual (OSYS, 0x03E8))
  7709. {
  7710. Notify (GFX0, 0x80) // Status Change
  7711. }
  7712. Else
  7713. {
  7714. ^^^GFX0.SWIT ()
  7715. If (LNotEqual (CSTE, NSTE))
  7716. {
  7717. Store (One, ^^^GFX0.CEVT) /* \_SB_.PCI0.GFX0.CEVT */
  7718. Store (0x03, ^^^GFX0.CSTS) /* \_SB_.PCI0.GFX0.CSTS */
  7719. Notify (GFX0, Zero) // Bus Check
  7720. Sleep (0x02EE)
  7721. Notify (GFX0, 0x80) // Status Change
  7722. }
  7723. }
  7724. }
  7725. Method (_Q11, 0, NotSerialized) // _Qxx: EC Query
  7726. {
  7727. If (LEqual (^^^GFX0.CDDS (0x0410), 0x1F))
  7728. {
  7729. P8XH (Zero, 0x11)
  7730. Notify (^^^GFX0.LCD0, 0x87) // Device-Specific
  7731. If (LEqual (ECOS, 0x02))
  7732. {
  7733. Store (0xE0, ^^^^WMI.EVNT) /* \_SB_.WMI_.EVNT */
  7734. Notify (WMI, 0xD0) // Hardware-Specific
  7735. }
  7736. Else
  7737. {
  7738. Add (OEM2, 0xE0, ^^^^WMI.EVNT) /* \_SB_.WMI_.EVNT */
  7739. Notify (WMI, 0xD0) // Hardware-Specific
  7740. }
  7741. }
  7742. }
  7743. Method (_Q12, 0, NotSerialized) // _Qxx: EC Query
  7744. {
  7745. P8XH (Zero, 0x12)
  7746. If (LEqual (^^^GFX0.CDDS (0x0410), 0x1F))
  7747. {
  7748. If (LEqual (ECOS, 0x02))
  7749. {
  7750. If (LEqual (OEM2, 0x0A))
  7751. {
  7752. Store (0xE7, ^^^^WMI.EVNT) /* \_SB_.WMI_.EVNT */
  7753. Notify (WMI, 0xD0) // Hardware-Specific
  7754. }
  7755. }
  7756. Else
  7757. {
  7758. If (LEqual (OEM2, 0x07))
  7759. {
  7760. Store (0xE7, ^^^^WMI.EVNT) /* \_SB_.WMI_.EVNT */
  7761. Notify (WMI, 0xD0) // Hardware-Specific
  7762. }
  7763. }
  7764. Notify (^^^GFX0.LCD0, 0x86) // Device-Specific
  7765. }
  7766. }
  7767. Method (_Q13, 0, NotSerialized) // _Qxx: EC Query
  7768. {
  7769. P8XH (Zero, 0x13)
  7770. Store (OEM4, ^^^^WMI.EVNT) /* \_SB_.WMI_.EVNT */
  7771. Notify (WMI, 0xD0) // Hardware-Specific
  7772. }
  7773. Method (_Q14, 0, NotSerialized) // _Qxx: EC Query
  7774. {
  7775. P8XH (Zero, 0x14)
  7776. Store (OEM4, ^^^^WMI.EVNT) /* \_SB_.WMI_.EVNT */
  7777. Notify (WMI, 0xD0) // Hardware-Specific
  7778. }
  7779. Method (_Q15, 0, NotSerialized) // _Qxx: EC Query
  7780. {
  7781. P8XH (Zero, 0x15)
  7782. Store (OEM4, ^^^^WMI.EVNT) /* \_SB_.WMI_.EVNT */
  7783. Notify (WMI, 0xD0) // Hardware-Specific
  7784. }
  7785. Method (_Q16, 0, NotSerialized) // _Qxx: EC Query
  7786. {
  7787. P8XH (Zero, 0x16)
  7788. Notify (AC, 0x80) // Status Change
  7789. If (LEqual (ADP, One))
  7790. {
  7791. Store (Zero, ADPS) /* \_SB_.PCI0.LPCB.EC__.ADPS */
  7792. }
  7793. Else
  7794. {
  7795. Store (One, ADPS) /* \_SB_.PCI0.LPCB.EC__.ADPS */
  7796. }
  7797. Store (ADP, PWRS) /* \PWRS */
  7798. ADJP ()
  7799. If (BAT0)
  7800. {
  7801. Notify (BAT, 0x80) // Status Change
  7802. Notify (BAT, 0x81) // Information Change
  7803. }
  7804. }
  7805. Method (_Q17, 0, NotSerialized) // _Qxx: EC Query
  7806. {
  7807. P8XH (Zero, 0x17)
  7808. Notify (BAT, 0x81) // Information Change
  7809. }
  7810. Method (_Q19, 0, NotSerialized) // _Qxx: EC Query
  7811. {
  7812. P8XH (Zero, 0x19)
  7813. Notify (BAT, 0x81) // Information Change
  7814. }
  7815. Method (_Q1B, 0, NotSerialized) // _Qxx: EC Query
  7816. {
  7817. P8XH (Zero, 0x1B)
  7818. Notify (LID0, 0x80) // Status Change
  7819. }
  7820. Method (_Q1C, 0, NotSerialized) // _Qxx: EC Query
  7821. {
  7822. P8XH (Zero, 0x1C)
  7823. Notify (\_TZ.TZ0, 0x80) // Thermal Status Change
  7824. Notify (\_TZ.TZ0, 0x81) // Thermal Trip Point Change
  7825. ADJP ()
  7826. }
  7827. Method (_Q1D, 0, NotSerialized) // _Qxx: EC Query
  7828. {
  7829. P8XH (Zero, 0x1D)
  7830. Notify (PWRB, 0x80) // Status Change
  7831. }
  7832. Method (_Q36, 0, NotSerialized) // _Qxx: EC Query
  7833. {
  7834. P8XH (Zero, 0x36)
  7835. }
  7836. Method (_Q37, 0, NotSerialized) // _Qxx: EC Query
  7837. {
  7838. P8XH (Zero, 0x37)
  7839. If (LEqual (CBB5, One))
  7840. {
  7841. Store (One, B15C) /* \_SB_.PCI0.LPCB.EC__.B15C */
  7842. }
  7843. Else
  7844. {
  7845. Store (Zero, B15C) /* \_SB_.PCI0.LPCB.EC__.B15C */
  7846. }
  7847. ADJP ()
  7848. }
  7849. Method (_Q39, 0, NotSerialized) // _Qxx: EC Query
  7850. {
  7851. P8XH (Zero, 0x39)
  7852. Store (OEM4, ^^^^WMI.EVNT) /* \_SB_.WMI_.EVNT */
  7853. Notify (WMI, 0xD0) // Hardware-Specific
  7854. }
  7855. Method (_Q42, 0, NotSerialized) // _Qxx: EC Query
  7856. {
  7857. P8XH (Zero, 0x42)
  7858. If (LEqual (DBB5, One))
  7859. {
  7860. Store (One, A15C) /* \_SB_.PCI0.LPCB.EC__.A15C */
  7861. }
  7862. Else
  7863. {
  7864. Store (Zero, A15C) /* \_SB_.PCI0.LPCB.EC__.A15C */
  7865. }
  7866. ADJP ()
  7867. }
  7868. Method (_Q46, 0, NotSerialized) // _Qxx: EC Query
  7869. {
  7870. P8XH (Zero, 0x46)
  7871. }
  7872. Method (_Q4A, 0, NotSerialized) // _Qxx: EC Query
  7873. {
  7874. P8XH (Zero, 0x4A)
  7875. Store (OEM4, Local0)
  7876. If (LEqual (Local0, 0xCC))
  7877. {
  7878. Store (0xBA, ^^^^WMI.EVNT) /* \_SB_.WMI_.EVNT */
  7879. Notify (WMI, 0xD0) // Hardware-Specific
  7880. }
  7881. Else
  7882. {
  7883. If (LEqual (Local0, 0xCB))
  7884. {
  7885. Store (0xBB, ^^^^WMI.EVNT) /* \_SB_.WMI_.EVNT */
  7886. Notify (WMI, 0xD0) // Hardware-Specific
  7887. }
  7888. }
  7889. }
  7890. Method (_Q50, 0, NotSerialized) // _Qxx: EC Query
  7891. {
  7892. P8XH (Zero, 0x50)
  7893. Store (OEM4, Local0)
  7894. Name (T_0, Zero) // _T_x: Emitted by ASL Compiler
  7895. Store (Local0, T_0) /* \_SB_.PCI0.LPCB.EC__._Q50.T_0 */
  7896. If (LEqual (T_0, 0xA8))
  7897. {
  7898. P8XH (Zero, 0xDB)
  7899. Store (0x9A, ^^^^WMI.EVNT) /* \_SB_.WMI_.EVNT */
  7900. Notify (WMI, 0xD0) // Hardware-Specific
  7901. }
  7902. Else
  7903. {
  7904. If (LEqual (T_0, 0xDB))
  7905. {
  7906. P8XH (Zero, 0xDB)
  7907. Store (0xA3, ^^^^WMI.EVNT) /* \_SB_.WMI_.EVNT */
  7908. Notify (WMI, 0xD0) // Hardware-Specific
  7909. }
  7910. Else
  7911. {
  7912. If (LEqual (T_0, 0xC7))
  7913. {
  7914. P8XH (Zero, 0xC7)
  7915. Store (0xC7, ^^^^WMI.EVNT) /* \_SB_.WMI_.EVNT */
  7916. Notify (WMI, 0xD0) // Hardware-Specific
  7917. }
  7918. Else
  7919. {
  7920. If (LEqual (T_0, 0xC8))
  7921. {
  7922. P8XH (Zero, 0xC8)
  7923. Store (0xC8, ^^^^WMI.EVNT) /* \_SB_.WMI_.EVNT */
  7924. Notify (WMI, 0xD0) // Hardware-Specific
  7925. }
  7926. Else
  7927. {
  7928. If (LEqual (T_0, 0xC9))
  7929. {
  7930. P8XH (Zero, 0xC9)
  7931. Store (0xC9, ^^^^WMI.EVNT) /* \_SB_.WMI_.EVNT */
  7932. Notify (WMI, 0xD0) // Hardware-Specific
  7933. }
  7934. Else
  7935. {
  7936. If (LEqual (T_0, 0xCA))
  7937. {
  7938. P8XH (Zero, 0xCA)
  7939. Store (0xCA, ^^^^WMI.EVNT) /* \_SB_.WMI_.EVNT */
  7940. Notify (WMI, 0xD0) // Hardware-Specific
  7941. }
  7942. Else
  7943. {
  7944. If (LEqual (T_0, 0xCF))
  7945. {
  7946. P8XH (Zero, 0xCF)
  7947. Store (0xCB, ^^^^WMI.EVNT) /* \_SB_.WMI_.EVNT */
  7948. Notify (WMI, 0xD0) // Hardware-Specific
  7949. }
  7950. Else
  7951. {
  7952. If (LEqual (T_0, 0xD0))
  7953. {
  7954. P8XH (Zero, 0xD0)
  7955. Store (0xCC, ^^^^WMI.EVNT) /* \_SB_.WMI_.EVNT */
  7956. Notify (WMI, 0xD0) // Hardware-Specific
  7957. }
  7958. }
  7959. }
  7960. }
  7961. }
  7962. }
  7963. }
  7964. }
  7965. }
  7966. Device (BAT)
  7967. {
  7968. Name (_HID, EisaId ("PNP0C0A") /* Control Method Battery */) // _HID: Hardware ID
  7969. Name (_UID, Zero) // _UID: Unique ID
  7970. Name (_PCL, Package (0x01) // _PCL: Power Consumer List
  7971. {
  7972. _SB
  7973. })
  7974. Method (_STA, 0, NotSerialized) // _STA: Status
  7975. {
  7976. If (ECOK)
  7977. {
  7978. If (BAT0)
  7979. {
  7980. Return (0x1F)
  7981. }
  7982. Else
  7983. {
  7984. Return (0x0F)
  7985. }
  7986. }
  7987. Else
  7988. {
  7989. Return (0x0F)
  7990. }
  7991. }
  7992. Name (PBIF, Package (0x0D)
  7993. {
  7994. One,
  7995. 0xFFFFFFFF,
  7996. 0xFFFFFFFF,
  7997. One,
  7998. 0x39D0,
  7999. Zero,
  8000. Zero,
  8001. 0x40,
  8002. 0x40,
  8003. "BAT",
  8004. "0001",
  8005. "LION",
  8006. "NOTEBOOK"
  8007. })
  8008. Name (SNBF, Buffer (0x06)
  8009. {
  8010. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
  8011. })
  8012. Method (IVBI, 0, NotSerialized)
  8013. {
  8014. Store (0xFFFFFFFF, Index (PBIF, One))
  8015. Store (0xFFFFFFFF, Index (PBIF, 0x02))
  8016. Store (0xFFFFFFFF, Index (PBIF, 0x04))
  8017. Store (" ", Index (PBIF, 0x09))
  8018. Store (" ", Index (PBIF, 0x0A))
  8019. Store (" ", Index (PBIF, 0x0B))
  8020. Store (" ", Index (PBIF, 0x0C))
  8021. }
  8022. Method (UPBI, 0, NotSerialized)
  8023. {
  8024. If (BAT0)
  8025. {
  8026. And (BDC0, 0xFFFF, Local0)
  8027. Store (Local0, Index (PBIF, One))
  8028. And (BFC0, 0xFFFF, Local0)
  8029. Store (Local0, Index (PBIF, 0x02))
  8030. And (BDV0, 0xFFFF, Local0)
  8031. Store (Local0, Index (PBIF, 0x04))
  8032. And (BCW0, 0xFFFF, Local0)
  8033. Store (Local0, Index (PBIF, 0x05))
  8034. And (BCL0, 0xFFFF, Local0)
  8035. Store (Local0, Index (PBIF, 0x06))
  8036. Store ("BAT", Index (PBIF, 0x09))
  8037. Store ("0001", Index (PBIF, 0x0A))
  8038. Store ("LION", Index (PBIF, 0x0B))
  8039. Store ("NOTEBOOK", Index (PBIF, 0x0C))
  8040. }
  8041. Else
  8042. {
  8043. IVBI ()
  8044. }
  8045. }
  8046. Method (_BIF, 0, NotSerialized) // _BIF: Battery Information
  8047. {
  8048. If (ECOK)
  8049. {
  8050. UPBI ()
  8051. }
  8052. Else
  8053. {
  8054. IVBI ()
  8055. }
  8056. Return (PBIF) /* \_SB_.PCI0.LPCB.EC__.BAT_.PBIF */
  8057. }
  8058. Name (PBST, Package (0x04)
  8059. {
  8060. Zero,
  8061. 0xFFFFFFFF,
  8062. 0xFFFFFFFF,
  8063. 0x3D90
  8064. })
  8065. Method (IVBS, 0, NotSerialized)
  8066. {
  8067. Store (Zero, Index (PBST, Zero))
  8068. Store (0xFFFFFFFF, Index (PBST, One))
  8069. Store (0xFFFFFFFF, Index (PBST, 0x02))
  8070. Store (0x2710, Index (PBST, 0x03))
  8071. }
  8072. Method (UPBS, 0, NotSerialized)
  8073. {
  8074. If (BAT0)
  8075. {
  8076. Store (Zero, Local0)
  8077. Store (Zero, Local1)
  8078. If (ADP)
  8079. {
  8080. If (LEqual (And (BST0, 0x02), 0x02))
  8081. {
  8082. Or (Local0, 0x02, Local0)
  8083. And (BPR0, 0xFFFF, Local1)
  8084. }
  8085. }
  8086. Else
  8087. {
  8088. Or (Local0, One, Local0)
  8089. And (BPR0, 0xFFFF, Local1)
  8090. }
  8091. And (Local1, 0x8000, Local7)
  8092. If (LEqual (Local7, 0x8000))
  8093. {
  8094. Store (0xFFFFFFFF, Local1)
  8095. }
  8096. And (BRC0, 0xFFFF, Local2)
  8097. And (BPV0, 0xFFFF, Local3)
  8098. Store (Local0, Index (PBST, Zero))
  8099. Store (Local1, Index (PBST, One))
  8100. Store (Local2, Index (PBST, 0x02))
  8101. Store (Local3, Index (PBST, 0x03))
  8102. }
  8103. Else
  8104. {
  8105. IVBS ()
  8106. }
  8107. }
  8108. Method (_BST, 0, NotSerialized) // _BST: Battery Status
  8109. {
  8110. If (ECOK)
  8111. {
  8112. UPBS ()
  8113. }
  8114. Else
  8115. {
  8116. IVBS ()
  8117. }
  8118. Return (PBST) /* \_SB_.PCI0.LPCB.EC__.BAT_.PBST */
  8119. }
  8120. }
  8121. Name (IGNR, Zero)
  8122. Method (ADJP, 0, NotSerialized)
  8123. {
  8124. Store (Zero, Local2)
  8125. If (LEqual (A15C, One))
  8126. {
  8127. Store (0x03, Local2)
  8128. }
  8129. Else
  8130. {
  8131. If (LEqual (B15C, One))
  8132. {
  8133. Store (0x03, Local2)
  8134. }
  8135. Else
  8136. {
  8137. If (LEqual (\_TZ.TFLG, One))
  8138. {
  8139. Store (0x02, Local2)
  8140. }
  8141. Else
  8142. {
  8143. If (LEqual (^^^PEG0.PEGP.DGON, One))
  8144. {
  8145. Store (One, Local2)
  8146. }
  8147. Else
  8148. {
  8149. If (LEqual (SYSM, One))
  8150. {
  8151. Store (0x02, Local2)
  8152. }
  8153. Else
  8154. {
  8155. If (LEqual (ADPS, One))
  8156. {
  8157. If (LEqual (SYSM, 0x02))
  8158. {
  8159. Store (Zero, Local2)
  8160. }
  8161. Else
  8162. {
  8163. Store (0x02, Local2)
  8164. }
  8165. }
  8166. }
  8167. }
  8168. }
  8169. }
  8170. }
  8171. If (And (CFGD, One))
  8172. {
  8173. If (LEqual (Local2, Zero))
  8174. {
  8175. Store (0x04, SSMD) /* \SSMD */
  8176. Store (0xE6, SSMP) /* \SSMP */
  8177. Sleep (0x64)
  8178. Store (Zero, Local0)
  8179. }
  8180. If (LEqual (Local2, One))
  8181. {
  8182. Store (0x03, SSMD) /* \SSMD */
  8183. Store (0xE6, SSMP) /* \SSMP */
  8184. Sleep (0x64)
  8185. Store (One, Local0)
  8186. }
  8187. If (LEqual (Local2, 0x02))
  8188. {
  8189. Store (0x03, SSMD) /* \SSMD */
  8190. Store (0xE6, SSMP) /* \SSMP */
  8191. Sleep (0x64)
  8192. Store (\_PR.CPU0._PSS, Local0)
  8193. Store (SizeOf (Local0), Local1)
  8194. If (LAnd (CFGD, 0x02000000))
  8195. {
  8196. Increment (Local1)
  8197. }
  8198. If (LGreater (Local1, 0x02))
  8199. {
  8200. ShiftRight (Local1, One, Local0)
  8201. Increment (Local0)
  8202. }
  8203. Else
  8204. {
  8205. Store (Local1, Local0)
  8206. }
  8207. }
  8208. If (LEqual (Local2, 0x03))
  8209. {
  8210. Store (0x03, SSMD) /* \SSMD */
  8211. Store (0xE6, SSMP) /* \SSMP */
  8212. Sleep (0x64)
  8213. Store (\_PR.CPU0._PSS, Local0)
  8214. Store (SizeOf (Local0), Local1)
  8215. If (LAnd (CFGD, 0x02000000))
  8216. {
  8217. Increment (Local1)
  8218. }
  8219. Store (Local1, Local0)
  8220. }
  8221. Store (Local0, \_PR.CPU0._PPC) /* External reference */
  8222. PNOT ()
  8223. }
  8224. }
  8225. }
  8226. }
  8227. Scope (_SB)
  8228. {
  8229. Device (PWRB)
  8230. {
  8231. Name (_HID, EisaId ("PNP0C0C") /* Power Button Device */) // _HID: Hardware ID
  8232. Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
  8233. {
  8234. 0x08,
  8235. 0x03
  8236. })
  8237. }
  8238. Device (SLPB)
  8239. {
  8240. Name (_HID, EisaId ("PNP0C0E") /* Sleep Button Device */) // _HID: Hardware ID
  8241. Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
  8242. {
  8243. 0x08,
  8244. 0x03
  8245. })
  8246. }
  8247. Device (LID0)
  8248. {
  8249. Name (_HID, EisaId ("PNP0C0D") /* Lid Device */) // _HID: Hardware ID
  8250. Method (_LID, 0, NotSerialized) // _LID: Lid Status
  8251. {
  8252. If (^^PCI0.LPCB.EC.ECOK)
  8253. {
  8254. Sleep (0x14)
  8255. Return (^^PCI0.LPCB.EC.LIDS) /* \_SB_.PCI0.LPCB.EC__.LIDS */
  8256. }
  8257. Else
  8258. {
  8259. Return (One)
  8260. }
  8261. }
  8262. Name (_PRW, Package (0x02) // _PRW: Power Resources for Wake
  8263. {
  8264. 0x08,
  8265. 0x03
  8266. })
  8267. Method (_PSW, 1, NotSerialized) // _PSW: Power State Wake
  8268. {
  8269. If (^^PCI0.LPCB.EC.ECOK)
  8270. {
  8271. Store (Arg0, ^^PCI0.LPCB.EC.LWKE) /* \_SB_.PCI0.LPCB.EC__.LWKE */
  8272. }
  8273. }
  8274. }
  8275. Device (AC)
  8276. {
  8277. Name (_HID, "ACPI0003" /* Power Source Device */) // _HID: Hardware ID
  8278. Name (_PCL, Package (0x01) // _PCL: Power Consumer List
  8279. {
  8280. _SB
  8281. })
  8282. Method (_PSR, 0, NotSerialized) // _PSR: Power Source
  8283. {
  8284. If (^^PCI0.LPCB.EC.ECOK)
  8285. {
  8286. Return (^^PCI0.LPCB.EC.ADP) /* \_SB_.PCI0.LPCB.EC__.ADP_ */
  8287. }
  8288. Else
  8289. {
  8290. Return (Zero)
  8291. }
  8292. If (LEqual (^^PCI0.LPCB.EC.ADP, One))
  8293. {
  8294. Store (Zero, ^^PCI0.LPCB.EC.ADPS) /* \_SB_.PCI0.LPCB.EC__.ADPS */
  8295. }
  8296. Else
  8297. {
  8298. Store (One, ^^PCI0.LPCB.EC.ADPS) /* \_SB_.PCI0.LPCB.EC__.ADPS */
  8299. }
  8300. ^^PCI0.LPCB.EC.ADJP ()
  8301. }
  8302. Method (_STA, 0, NotSerialized) // _STA: Status
  8303. {
  8304. Return (0x0F)
  8305. }
  8306. }
  8307. }
  8308. Scope (_SB)
  8309. {
  8310. Name (SYSM, Zero)
  8311. Device (WMI)
  8312. {
  8313. Name (_HID, "PNP0C14" /* Windows Management Instrumentation Device */) // _HID: Hardware ID
  8314. Name (_UID, Zero) // _UID: Unique ID
  8315. Name (_WDG, Buffer (0x3C)
  8316. {
  8317. /* 0000 */ 0x6D, 0x0F, 0xBC, 0xAB, 0xA1, 0x8E, 0xD1, 0x11,
  8318. /* 0008 */ 0x00, 0xA0, 0xC9, 0x06, 0x29, 0x10, 0x00, 0x00,
  8319. /* 0010 */ 0x42, 0x42, 0x01, 0x02, 0x6B, 0x0F, 0xBC, 0xAB,
  8320. /* 0018 */ 0xA1, 0x8E, 0xD1, 0x11, 0x00, 0xA0, 0xC9, 0x06,
  8321. /* 0020 */ 0x29, 0x10, 0x00, 0x00, 0xD0, 0x00, 0x01, 0x08,
  8322. /* 0028 */ 0x6C, 0x0F, 0xBC, 0xAB, 0xA1, 0x8E, 0xD1, 0x11,
  8323. /* 0030 */ 0x00, 0xA0, 0xC9, 0x06, 0x29, 0x10, 0x00, 0x00,
  8324. /* 0038 */ 0xD1, 0x00, 0x01, 0x08
  8325. })
  8326. Name (EVNT, Zero)
  8327. Name (EVID, Zero)
  8328. Name (MIN4, Zero)
  8329. Name (SEC4, Zero)
  8330. Method (WMBB, 3, NotSerialized)
  8331. {
  8332. If (SizeOf (Arg2))
  8333. {
  8334. CreateByteField (Arg2, Zero, ARGS)
  8335. }
  8336. Store (Zero, Local1)
  8337. Store (0xA1, ^^PCI0.LPCB.EC.FDAT) /* \_SB_.PCI0.LPCB.EC__.FDAT */
  8338. Store (0xB8, ^^PCI0.LPCB.EC.FCMD) /* \_SB_.PCI0.LPCB.EC__.FCMD */
  8339. Store (^^PCI0.LPCB.EC.FDAT, Local1)
  8340. Store (Zero, Local0)
  8341. Name (T_0, Zero) // _T_x: Emitted by ASL Compiler
  8342. Store (Arg1, T_0) /* \_SB_.WMI_.WMBB.T_0 */
  8343. If (LEqual (T_0, One))
  8344. {
  8345. Store (EVNT, Local0)
  8346. }
  8347. Else
  8348. {
  8349. If (LEqual (T_0, 0x05))
  8350. {
  8351. If (And (^^PCI0.LPCB.EC.OEM3, 0x08))
  8352. {
  8353. If (And (Local1, 0x02))
  8354. {
  8355. Store (One, Local0)
  8356. }
  8357. Else
  8358. {
  8359. Store (Zero, Local0)
  8360. }
  8361. }
  8362. Else
  8363. {
  8364. Store (0x02, Local0)
  8365. }
  8366. }
  8367. Else
  8368. {
  8369. If (LEqual (T_0, 0x06))
  8370. {
  8371. If (And (^^PCI0.LPCB.EC.OEM3, 0x04))
  8372. {
  8373. If (And (Local1, One))
  8374. {
  8375. Store (One, Local0)
  8376. }
  8377. Else
  8378. {
  8379. Store (Zero, Local0)
  8380. }
  8381. }
  8382. Else
  8383. {
  8384. Store (0x02, Local0)
  8385. }
  8386. }
  8387. Else
  8388. {
  8389. If (LEqual (T_0, 0x07))
  8390. {
  8391. If (And (^^PCI0.LPCB.EC.OEM3, 0x10))
  8392. {
  8393. If (And (Local1, 0x04))
  8394. {
  8395. Store (One, Local0)
  8396. }
  8397. Else
  8398. {
  8399. Store (Zero, Local0)
  8400. }
  8401. }
  8402. Else
  8403. {
  8404. Store (0x02, Local0)
  8405. }
  8406. }
  8407. Else
  8408. {
  8409. If (LEqual (T_0, 0x09))
  8410. {
  8411. If (And (Local1, 0x10))
  8412. {
  8413. Store (One, Local0)
  8414. }
  8415. Else
  8416. {
  8417. Store (Zero, Local0)
  8418. }
  8419. }
  8420. Else
  8421. {
  8422. If (LEqual (T_0, 0x0A))
  8423. {
  8424. If (And (^^PCI0.LPCB.EC.OEM3, 0x20))
  8425. {
  8426. If (And (Local1, 0x08))
  8427. {
  8428. Store (One, Local0)
  8429. }
  8430. Else
  8431. {
  8432. Store (Zero, Local0)
  8433. }
  8434. }
  8435. Else
  8436. {
  8437. Store (0x02, Local0)
  8438. }
  8439. }
  8440. Else
  8441. {
  8442. If (LEqual (T_0, 0x11))
  8443. {
  8444. If (And (Local1, 0x40))
  8445. {
  8446. Store (One, Local0)
  8447. }
  8448. Else
  8449. {
  8450. Store (Zero, Local0)
  8451. }
  8452. }
  8453. Else
  8454. {
  8455. If (LEqual (T_0, 0x13))
  8456. {
  8457. If (^^PCI0.LPCB.EC.ECOK)
  8458. {
  8459. Store (^^PCI0.LPCB.EC.BFC0, Local0)
  8460. }
  8461. Else
  8462. {
  8463. Store (0xFFFF, Local0)
  8464. }
  8465. }
  8466. Else
  8467. {
  8468. If (LEqual (T_0, 0x1E))
  8469. {
  8470. Store (0xC1, ^^PCI0.LPCB.EC.FDAT) /* \_SB_.PCI0.LPCB.EC__.FDAT */
  8471. Store (0xA7, ^^PCI0.LPCB.EC.FBUF) /* \_SB_.PCI0.LPCB.EC__.FBUF */
  8472. Store (0xB8, ^^PCI0.LPCB.EC.FCMD) /* \_SB_.PCI0.LPCB.EC__.FCMD */
  8473. }
  8474. Else
  8475. {
  8476. If (LEqual (T_0, 0x20)) {}
  8477. Else
  8478. {
  8479. If (LEqual (T_0, 0x21))
  8480. {
  8481. If (And (^^PCI0.LPCB.EC.OEM3, 0x10))
  8482. {
  8483. Store (0xC1, ^^PCI0.LPCB.EC.FDAT) /* \_SB_.PCI0.LPCB.EC__.FDAT */
  8484. Store (0xA3, ^^PCI0.LPCB.EC.FBUF) /* \_SB_.PCI0.LPCB.EC__.FBUF */
  8485. Store (0xB8, ^^PCI0.LPCB.EC.FCMD) /* \_SB_.PCI0.LPCB.EC__.FCMD */
  8486. }
  8487. }
  8488. Else
  8489. {
  8490. If (LEqual (T_0, 0x22))
  8491. {
  8492. If (And (^^PCI0.LPCB.EC.OEM3, 0x04))
  8493. {
  8494. Store (0xC1, ^^PCI0.LPCB.EC.FDAT) /* \_SB_.PCI0.LPCB.EC__.FDAT */
  8495. Store (0xA1, ^^PCI0.LPCB.EC.FBUF) /* \_SB_.PCI0.LPCB.EC__.FBUF */
  8496. Store (0xB8, ^^PCI0.LPCB.EC.FCMD) /* \_SB_.PCI0.LPCB.EC__.FCMD */
  8497. }
  8498. }
  8499. Else
  8500. {
  8501. If (LEqual (T_0, 0x2A))
  8502. {
  8503. Store (0xC1, ^^PCI0.LPCB.EC.FDAT) /* \_SB_.PCI0.LPCB.EC__.FDAT */
  8504. Store (0xA5, ^^PCI0.LPCB.EC.FBUF) /* \_SB_.PCI0.LPCB.EC__.FBUF */
  8505. Store (0xB8, ^^PCI0.LPCB.EC.FCMD) /* \_SB_.PCI0.LPCB.EC__.FCMD */
  8506. }
  8507. Else
  8508. {
  8509. If (LEqual (T_0, 0x32))
  8510. {
  8511. If (^^PCI0.LPCB.EC.ECOK)
  8512. {
  8513. Store (^^PCI0.LPCB.EC.BDC0, Local0)
  8514. }
  8515. Else
  8516. {
  8517. Store (0xFFFF, Local0)
  8518. }
  8519. }
  8520. Else
  8521. {
  8522. If (LEqual (T_0, 0x3C))
  8523. {
  8524. If (^^PCI0.GFX0.PDDS (0x0300))
  8525. {
  8526. Store (One, Local0)
  8527. }
  8528. Else
  8529. {
  8530. Store (Zero, Local0)
  8531. }
  8532. }
  8533. Else
  8534. {
  8535. If (LEqual (T_0, 0x45))
  8536. {
  8537. Store (^^PCI0.LPCB.EC.OEM2, Local0)
  8538. }
  8539. Else
  8540. {
  8541. If (LEqual (T_0, 0x46))
  8542. {
  8543. Store (0x0100, Local0)
  8544. }
  8545. Else
  8546. {
  8547. If (LEqual (T_0, 0x48))
  8548. {
  8549. Store (0x48, Local0)
  8550. }
  8551. Else
  8552. {
  8553. If (LEqual (T_0, 0x4A))
  8554. {
  8555. Store (One, ^^PCI0.LPCB.EC.FDAT) /* \_SB_.PCI0.LPCB.EC__.FDAT */
  8556. Store (0xB9, ^^PCI0.LPCB.EC.FCMD) /* \_SB_.PCI0.LPCB.EC__.FCMD */
  8557. }
  8558. Else
  8559. {
  8560. If (LEqual (T_0, 0x4C))
  8561. {
  8562. If (And (^^PCI0.LPCB.EC.OEM3, 0x20))
  8563. {
  8564. Store (0xC1, ^^PCI0.LPCB.EC.FDAT) /* \_SB_.PCI0.LPCB.EC__.FDAT */
  8565. Store (0xA4, ^^PCI0.LPCB.EC.FBUF) /* \_SB_.PCI0.LPCB.EC__.FBUF */
  8566. Store (0xB8, ^^PCI0.LPCB.EC.FCMD) /* \_SB_.PCI0.LPCB.EC__.FCMD */
  8567. }
  8568. }
  8569. Else
  8570. {
  8571. If (LEqual (T_0, 0x4F))
  8572. {
  8573. Name (T_1, Zero) // _T_x: Emitted by ASL Compiler
  8574. Store (ARGS, T_1) /* \_SB_.WMI_.WMBB.T_1 */
  8575. If (LEqual (T_1, Zero))
  8576. {
  8577. If (^^PCI0.LPCB.EC.ECOK)
  8578. {
  8579. Store (0x02, SYSM) /* \_SB_.SYSM */
  8580. ^^PCI0.LPCB.EC.ADJP ()
  8581. }
  8582. }
  8583. Else
  8584. {
  8585. If (LEqual (T_1, One))
  8586. {
  8587. If (^^PCI0.LPCB.EC.ECOK)
  8588. {
  8589. Store (One, SYSM) /* \_SB_.SYSM */
  8590. ^^PCI0.LPCB.EC.ADJP ()
  8591. }
  8592. }
  8593. Else
  8594. {
  8595. If (LEqual (T_1, 0x02))
  8596. {
  8597. If (^^PCI0.LPCB.EC.ECOK)
  8598. {
  8599. Store (Zero, SYSM) /* \_SB_.SYSM */
  8600. ^^PCI0.LPCB.EC.ADJP ()
  8601. }
  8602. }
  8603. }
  8604. }
  8605. Store (0x4F, Local0)
  8606. }
  8607. Else
  8608. {
  8609. If (LEqual (T_0, 0x52))
  8610. {
  8611. Store (0x0E24, Local0)
  8612. }
  8613. Else
  8614. {
  8615. If (LEqual (T_0, 0x55))
  8616. {
  8617. If (ARGS) {}
  8618. Else
  8619. {
  8620. }
  8621. Store (One, ^^PCI0.LPCB.EC.WLST) /* \_SB_.PCI0.LPCB.EC__.WLST */
  8622. Store (0x55, Local0)
  8623. }
  8624. Else
  8625. {
  8626. If (LEqual (T_0, 0x56))
  8627. {
  8628. If (^^PCI0.LPCB.EC.ECOK)
  8629. {
  8630. P8XH (Zero, ARGS)
  8631. If (And (ARGS, One))
  8632. {
  8633. P8XH (Zero, 0x51)
  8634. Store (Zero, ^^PCI0.LPCB.EC.FDAT) /* \_SB_.PCI0.LPCB.EC__.FDAT */
  8635. Store (0xBE, ^^PCI0.LPCB.EC.FCMD) /* \_SB_.PCI0.LPCB.EC__.FCMD */
  8636. P8XH (Zero, 0x54)
  8637. Sleep (0x64)
  8638. }
  8639. Else
  8640. {
  8641. P8XH (Zero, 0x52)
  8642. Store (One, ^^PCI0.LPCB.EC.FDAT) /* \_SB_.PCI0.LPCB.EC__.FDAT */
  8643. Store (0xBE, ^^PCI0.LPCB.EC.FCMD) /* \_SB_.PCI0.LPCB.EC__.FCMD */
  8644. P8XH (Zero, 0x53)
  8645. Sleep (0x64)
  8646. }
  8647. If (And (ARGS, 0x02))
  8648. {
  8649. Store (One, ^^PCI0.LPCB.EC.DLED) /* \_SB_.PCI0.LPCB.EC__.DLED */
  8650. }
  8651. Else
  8652. {
  8653. Store (Zero, ^^PCI0.LPCB.EC.DLED) /* \_SB_.PCI0.LPCB.EC__.DLED */
  8654. }
  8655. }
  8656. }
  8657. Else
  8658. {
  8659. If (LEqual (T_0, 0x5E))
  8660. {
  8661. Store (0xC1, ^^PCI0.LPCB.EC.FDAT) /* \_SB_.PCI0.LPCB.EC__.FDAT */
  8662. Store (0xA6, ^^PCI0.LPCB.EC.FBUF) /* \_SB_.PCI0.LPCB.EC__.FBUF */
  8663. Store (0xB8, ^^PCI0.LPCB.EC.FCMD) /* \_SB_.PCI0.LPCB.EC__.FCMD */
  8664. }
  8665. Else
  8666. {
  8667. If (LEqual (T_0, 0x6A))
  8668. {
  8669. CreateByteField (Arg2, Zero, SEC4)
  8670. CreateByteField (Arg2, One, MIN4)
  8671. Store (MIN4, ^^PCI0.LPCB.EC.FDAT) /* \_SB_.PCI0.LPCB.EC__.FDAT */
  8672. Store (SEC4, ^^PCI0.LPCB.EC.FBUF) /* \_SB_.PCI0.LPCB.EC__.FBUF */
  8673. Store (0xBA, ^^PCI0.LPCB.EC.FCMD) /* \_SB_.PCI0.LPCB.EC__.FCMD */
  8674. }
  8675. Else
  8676. {
  8677. If (LEqual (T_0, 0x6C))
  8678. {
  8679. If (ARGS)
  8680. {
  8681. Store (One, ^^PCI0.LPCB.EC.CLED) /* \_SB_.PCI0.LPCB.EC__.CLED */
  8682. }
  8683. Else
  8684. {
  8685. Store (Zero, ^^PCI0.LPCB.EC.CLED) /* \_SB_.PCI0.LPCB.EC__.CLED */
  8686. }
  8687. }
  8688. Else
  8689. {
  8690. Store (0xFFFFFFFF, Local0)
  8691. }
  8692. }
  8693. }
  8694. }
  8695. }
  8696. }
  8697. }
  8698. }
  8699. }
  8700. }
  8701. }
  8702. }
  8703. }
  8704. }
  8705. }
  8706. }
  8707. }
  8708. }
  8709. }
  8710. }
  8711. }
  8712. }
  8713. }
  8714. }
  8715. }
  8716. }
  8717. }
  8718. Return (Local0)
  8719. }
  8720. Method (_WED, 1, NotSerialized) // _Wxx: Wake Event
  8721. {
  8722. Return (Zero)
  8723. }
  8724. }
  8725. }
  8726. Scope (_TZ)
  8727. {
  8728. Name (DTMP, 0x32)
  8729. Name (DCRT, 0x96)
  8730. Name (DPSV, 0x5D)
  8731. Name (TFLG, Zero)
  8732. ThermalZone (TZ0)
  8733. {
  8734. Method (_CRT, 0, Serialized) // _CRT: Critical Temperature
  8735. {
  8736. Multiply (DCRT, 0x0A, Local0)
  8737. Add (Local0, 0x0AAA, Local0)
  8738. Return (Local0)
  8739. }
  8740. Method (_TMP, 0, Serialized) // _TMP: Temperature
  8741. {
  8742. Store (Zero, TFLG) /* \_TZ_.TFLG */
  8743. If (\_SB.PCI0.LPCB.EC.ECOK)
  8744. {
  8745. Return (\_SB.PCI0.LPCB.EC.TMP)
  8746. }
  8747. Else
  8748. {
  8749. Multiply (DTMP, 0x0A, Local0)
  8750. Add (Local0, 0x0AAA, Local0)
  8751. Return (Local0)
  8752. }
  8753. }
  8754. Method (_SCP, 1, NotSerialized) // _SCP: Set Cooling Policy
  8755. {
  8756. Store (Arg0, Local0)
  8757. }
  8758. }
  8759. }
  8760. Scope (_SB.PCI0)
  8761. {
  8762. Device (GFX0)
  8763. {
  8764. Name (_ADR, 0x00020000) // _ADR: Address
  8765. Method (_INI, 0, NotSerialized) // _INI: Initialize
  8766. {
  8767. Store (LIDS, CLID) /* \_SB_.PCI0.GFX0.CLID */
  8768. }
  8769. Method (_DOS, 1, NotSerialized) // _DOS: Disable Output Switching
  8770. {
  8771. Store (And (Arg0, 0x07), DSEN) /* \DSEN */
  8772. }
  8773. Method (_DOD, 0, NotSerialized) // _DOD: Display Output Devices
  8774. {
  8775. Return (Package (0x03)
  8776. {
  8777. 0x80010100,
  8778. 0x80010300,
  8779. 0x80010410
  8780. })
  8781. }
  8782. Device (CRT0)
  8783. {
  8784. Name (_ADR, 0x0100) // _ADR: Address
  8785. Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status
  8786. {
  8787. Return (CDDS (0x0100))
  8788. }
  8789. Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State
  8790. {
  8791. If (And (NSTE, 0x0101))
  8792. {
  8793. Return (One)
  8794. }
  8795. Return (Zero)
  8796. }
  8797. Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
  8798. {
  8799. If (LEqual (And (Arg0, 0xC0000000), 0xC0000000))
  8800. {
  8801. Store (NSTE, CSTE) /* \CSTE */
  8802. }
  8803. }
  8804. }
  8805. Device (HDMI)
  8806. {
  8807. Name (_ADR, 0x0300) // _ADR: Address
  8808. Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status
  8809. {
  8810. Return (CDDS (0x0300))
  8811. }
  8812. Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State
  8813. {
  8814. If (And (NSTE, 0x0202))
  8815. {
  8816. Return (One)
  8817. }
  8818. Return (Zero)
  8819. }
  8820. Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
  8821. {
  8822. If (LEqual (And (Arg0, 0xC0000000), 0xC0000000))
  8823. {
  8824. Store (NSTE, CSTE) /* \CSTE */
  8825. }
  8826. }
  8827. }
  8828. Device (LCD0)
  8829. {
  8830. Name (_ADR, 0x0410) // _ADR: Address
  8831. Method (_DCS, 0, NotSerialized) // _DCS: Display Current Status
  8832. {
  8833. Return (CDDS (0x0400))
  8834. }
  8835. Method (_DGS, 0, NotSerialized) // _DGS: Display Graphics State
  8836. {
  8837. If (And (NSTE, 0x0808))
  8838. {
  8839. Return (One)
  8840. }
  8841. Return (Zero)
  8842. }
  8843. Method (_DSS, 1, NotSerialized) // _DSS: Device Set State
  8844. {
  8845. If (LEqual (And (Arg0, 0xC0000000), 0xC0000000))
  8846. {
  8847. Store (NSTE, CSTE) /* \CSTE */
  8848. }
  8849. }
  8850. Method (_BCL, 0, NotSerialized) // _BCL: Brightness Control Levels
  8851. {
  8852. If (LEqual (^^^LPCB.EC.ECOS, 0x02))
  8853. {
  8854. Return (Package (0x0D)
  8855. {
  8856. 0x50,
  8857. 0x1E,
  8858. Zero,
  8859. 0x0A,
  8860. 0x14,
  8861. 0x1E,
  8862. 0x28,
  8863. 0x32,
  8864. 0x3C,
  8865. 0x46,
  8866. 0x50,
  8867. 0x5A,
  8868. 0x64
  8869. })
  8870. }
  8871. Return (Package (0x0A)
  8872. {
  8873. 0x54,
  8874. 0x1C,
  8875. Zero,
  8876. 0x0E,
  8877. 0x1C,
  8878. 0x2A,
  8879. 0x38,
  8880. 0x46,
  8881. 0x54,
  8882. 0x64
  8883. })
  8884. }
  8885. Method (_BCM, 1, NotSerialized) // _BCM: Brightness Control Method
  8886. {
  8887. If (LEqual (Arg0, Zero))
  8888. {
  8889. Store (Arg0, ^^^LPCB.EC.OEM2) /* \_SB_.PCI0.LPCB.EC__.OEM2 */
  8890. }
  8891. Else
  8892. {
  8893. If (LEqual (^^^LPCB.EC.ECOS, 0x02))
  8894. {
  8895. Divide (Arg0, 0x0A, Local0, ^^^LPCB.EC.OEM2) /* \_SB_.PCI0.LPCB.EC__.OEM2 */
  8896. }
  8897. Else
  8898. {
  8899. Divide (Arg0, 0x0E, Local0, ^^^LPCB.EC.OEM2) /* \_SB_.PCI0.LPCB.EC__.OEM2 */
  8900. }
  8901. }
  8902. If (^^^LPCB.EC.ECOK)
  8903. {
  8904. If (LEqual (^^^LPCB.EC.ECOS, 0x02))
  8905. {
  8906. Store (0xE0, ^^^^WMI.EVNT) /* \_SB_.WMI_.EVNT */
  8907. }
  8908. Else
  8909. {
  8910. Add (^^^LPCB.EC.OEM2, 0xE0, ^^^^WMI.EVNT) /* \_SB_.WMI_.EVNT */
  8911. }
  8912. Notify (WMI, 0xD0) // Hardware-Specific
  8913. }
  8914. }
  8915. Method (_BQC, 0, NotSerialized) // _BQC: Brightness Query Current
  8916. {
  8917. If (^^^LPCB.EC.ECOK)
  8918. {
  8919. If (LEqual (^^^LPCB.EC.ECOS, 0x02))
  8920. {
  8921. If (LEqual (^^^LPCB.EC.OEM2, 0x0A))
  8922. {
  8923. Return (0x64)
  8924. }
  8925. Multiply (^^^LPCB.EC.OEM2, 0x0A, Local0)
  8926. }
  8927. Else
  8928. {
  8929. If (LEqual (^^^LPCB.EC.OEM2, 0x07))
  8930. {
  8931. Return (0x64)
  8932. }
  8933. Multiply (^^^LPCB.EC.OEM2, 0x0E, Local0)
  8934. }
  8935. Return (Local0)
  8936. }
  8937. Else
  8938. {
  8939. Return (0x64)
  8940. }
  8941. }
  8942. }
  8943. Method (CDDS, 1, NotSerialized)
  8944. {
  8945. Store (And (Arg0, 0x0F0F), Local0)
  8946. If (LEqual (Zero, Local0))
  8947. {
  8948. Return (0x1D)
  8949. }
  8950. If (LEqual (And (CADL, 0x0F0F), Local0))
  8951. {
  8952. Return (0x1F)
  8953. }
  8954. If (LEqual (And (CAL2, 0x0F0F), Local0))
  8955. {
  8956. Return (0x1F)
  8957. }
  8958. If (LEqual (And (CAL3, 0x0F0F), Local0))
  8959. {
  8960. Return (0x1F)
  8961. }
  8962. If (LEqual (And (CAL4, 0x0F0F), Local0))
  8963. {
  8964. Return (0x1F)
  8965. }
  8966. If (LEqual (And (CAL5, 0x0F0F), Local0))
  8967. {
  8968. Return (0x1F)
  8969. }
  8970. If (LEqual (And (CAL6, 0x0F0F), Local0))
  8971. {
  8972. Return (0x1F)
  8973. }
  8974. If (LEqual (And (CAL7, 0x0F0F), Local0))
  8975. {
  8976. Return (0x1F)
  8977. }
  8978. If (LEqual (And (CAL8, 0x0F0F), Local0))
  8979. {
  8980. Return (0x1F)
  8981. }
  8982. Return (0x1D)
  8983. }
  8984. Method (PDDS, 1, NotSerialized)
  8985. {
  8986. Store (And (Arg0, 0x0F0F), Local0)
  8987. If (LEqual (Zero, Local0))
  8988. {
  8989. Return (Zero)
  8990. }
  8991. If (LEqual (And (CPDL, 0x0F0F), Local0))
  8992. {
  8993. Return (One)
  8994. }
  8995. If (LEqual (And (CPL2, 0x0F0F), Local0))
  8996. {
  8997. Return (One)
  8998. }
  8999. If (LEqual (And (CPL3, 0x0F0F), Local0))
  9000. {
  9001. Return (One)
  9002. }
  9003. If (LEqual (And (CPL4, 0x0F0F), Local0))
  9004. {
  9005. Return (One)
  9006. }
  9007. If (LEqual (And (CPL5, 0x0F0F), Local0))
  9008. {
  9009. Return (One)
  9010. }
  9011. If (LEqual (And (CPL6, 0x0F0F), Local0))
  9012. {
  9013. Return (One)
  9014. }
  9015. If (LEqual (And (CPL7, 0x0F0F), Local0))
  9016. {
  9017. Return (One)
  9018. }
  9019. If (LEqual (And (CPL8, 0x0F0F), Local0))
  9020. {
  9021. Return (One)
  9022. }
  9023. Return (Zero)
  9024. }
  9025. Method (SWIT, 0, NotSerialized)
  9026. {
  9027. Store (Zero, Local0)
  9028. Store (Zero, Local1)
  9029. Store (0x08, Local2)
  9030. If (LEqual (CDDS (0x0100), 0x1F))
  9031. {
  9032. Or (One, Local0, Local0)
  9033. }
  9034. If (LEqual (CDDS (0x0300), 0x1F))
  9035. {
  9036. Or (0x02, Local0, Local0)
  9037. }
  9038. If (LEqual (CDDS (0x0410), 0x1F))
  9039. {
  9040. Or (0x08, Local0, Local0)
  9041. }
  9042. If (PDDS (0x0100))
  9043. {
  9044. Or (One, Local2, Local2)
  9045. }
  9046. If (PDDS (0x0300))
  9047. {
  9048. Or (0x02, Local2, Local2)
  9049. }
  9050. And (Local0, Local2, Local1)
  9051. Store (Local0, CSTE) /* \CSTE */
  9052. Store (GNAD (Local1, Local2), Local1)
  9053. Store (Local1, NSTE) /* \NSTE */
  9054. Store (Or (Local0, ShiftLeft (Local1, 0x04)), P80H) /* \P80H */
  9055. }
  9056. Method (GNAD, 2, NotSerialized)
  9057. {
  9058. Store (Arg0, Local0)
  9059. Store (Arg1, Local1)
  9060. While (Local1)
  9061. {
  9062. If (LEqual (Local0, One))
  9063. {
  9064. Store (0x02, Local0)
  9065. }
  9066. Else
  9067. {
  9068. If (LEqual (Local0, 0x02))
  9069. {
  9070. Store (0x09, Local0)
  9071. }
  9072. Else
  9073. {
  9074. If (LEqual (Local0, 0x08))
  9075. {
  9076. Store (One, Local0)
  9077. }
  9078. Else
  9079. {
  9080. If (LEqual (Local0, 0x03))
  9081. {
  9082. Store (0x08, Local0)
  9083. }
  9084. Else
  9085. {
  9086. If (LEqual (Local0, 0x09))
  9087. {
  9088. Store (0x0A, Local0)
  9089. }
  9090. Else
  9091. {
  9092. If (LEqual (Local0, 0x0A))
  9093. {
  9094. Store (0x03, Local0)
  9095. }
  9096. }
  9097. }
  9098. }
  9099. }
  9100. }
  9101. If (LEqual (And (Local0, Local1), Local0))
  9102. {
  9103. Store (Zero, Local1)
  9104. }
  9105. }
  9106. Return (Local0)
  9107. }
  9108. Scope (^^PCI0)
  9109. {
  9110. OperationRegion (MCHP, PCI_Config, 0x40, 0xC0)
  9111. Field (MCHP, AnyAcc, NoLock, Preserve)
  9112. {
  9113. Offset (0x14),
  9114. , 1,
  9115. D1EN, 1,
  9116. , 1,
  9117. D2F0, 1,
  9118. Offset (0x60),
  9119. TASM, 10,
  9120. Offset (0x62)
  9121. }
  9122. }
  9123. OperationRegion (IGDP, PCI_Config, Zero, 0x0100)
  9124. Field (IGDP, AnyAcc, NoLock, Preserve)
  9125. {
  9126. VID, 16,
  9127. DID, 16,
  9128. Offset (0x52),
  9129. , 1,
  9130. GIVD, 1,
  9131. , 2,
  9132. GUMA, 3,
  9133. Offset (0x54),
  9134. , 4,
  9135. GMFN, 1,
  9136. Offset (0x58),
  9137. Offset (0xE4),
  9138. ASLE, 8,
  9139. Offset (0xE8),
  9140. GSSE, 1,
  9141. GSSB, 14,
  9142. GSES, 1,
  9143. Offset (0xF0),
  9144. , 12,
  9145. CDVL, 1,
  9146. Offset (0xF2),
  9147. Offset (0xF5),
  9148. LBPC, 8,
  9149. Offset (0xFC),
  9150. ASLS, 32
  9151. }
  9152. OperationRegion (IGDM, SystemMemory, ASLB, 0x2000)
  9153. Field (IGDM, AnyAcc, NoLock, Preserve)
  9154. {
  9155. SIGN, 128,
  9156. SIZE, 32,
  9157. OVER, 32,
  9158. SVER, 256,
  9159. VVER, 128,
  9160. GVER, 128,
  9161. MBOX, 32,
  9162. DMOD, 32,
  9163. Offset (0x100),
  9164. DRDY, 32,
  9165. CSTS, 32,
  9166. CEVT, 32,
  9167. Offset (0x120),
  9168. DIDL, 32,
  9169. DDL2, 32,
  9170. DDL3, 32,
  9171. DDL4, 32,
  9172. DDL5, 32,
  9173. DDL6, 32,
  9174. DDL7, 32,
  9175. DDL8, 32,
  9176. CPDL, 32,
  9177. CPL2, 32,
  9178. CPL3, 32,
  9179. CPL4, 32,
  9180. CPL5, 32,
  9181. CPL6, 32,
  9182. CPL7, 32,
  9183. CPL8, 32,
  9184. CADL, 32,
  9185. CAL2, 32,
  9186. CAL3, 32,
  9187. CAL4, 32,
  9188. CAL5, 32,
  9189. CAL6, 32,
  9190. CAL7, 32,
  9191. CAL8, 32,
  9192. NADL, 32,
  9193. NDL2, 32,
  9194. NDL3, 32,
  9195. NDL4, 32,
  9196. NDL5, 32,
  9197. NDL6, 32,
  9198. NDL7, 32,
  9199. NDL8, 32,
  9200. ASLP, 32,
  9201. TIDX, 32,
  9202. CHPD, 32,
  9203. CLID, 32,
  9204. CDCK, 32,
  9205. SXSW, 32,
  9206. EVTS, 32,
  9207. CNOT, 32,
  9208. NRDY, 32,
  9209. Offset (0x200),
  9210. SCIE, 1,
  9211. GEFC, 4,
  9212. GXFC, 3,
  9213. GESF, 8,
  9214. Offset (0x204),
  9215. PARM, 32,
  9216. DSLP, 32,
  9217. Offset (0x300),
  9218. ARDY, 32,
  9219. ASLC, 32,
  9220. TCHE, 32,
  9221. ALSI, 32,
  9222. BCLP, 32,
  9223. PFIT, 32,
  9224. CBLV, 32,
  9225. BCLM, 320,
  9226. CPFM, 32,
  9227. EPFM, 32,
  9228. PLUT, 592,
  9229. PFMB, 32,
  9230. CCDV, 32,
  9231. PCFT, 32,
  9232. Offset (0x400),
  9233. GVD1, 49152,
  9234. PHED, 32,
  9235. BDDC, 2048
  9236. }
  9237. Name (DBTB, Package (0x15)
  9238. {
  9239. Zero,
  9240. 0x07,
  9241. 0x38,
  9242. 0x01C0,
  9243. 0x0E00,
  9244. 0x3F,
  9245. 0x01C7,
  9246. 0x0E07,
  9247. 0x01F8,
  9248. 0x0E38,
  9249. 0x0FC0,
  9250. Zero,
  9251. Zero,
  9252. Zero,
  9253. Zero,
  9254. Zero,
  9255. 0x7000,
  9256. 0x7007,
  9257. 0x7038,
  9258. 0x71C0,
  9259. 0x7E00
  9260. })
  9261. Name (CDCT, Package (0x05)
  9262. {
  9263. Package (0x02)
  9264. {
  9265. 0xE4,
  9266. 0x0140
  9267. },
  9268. Package (0x02)
  9269. {
  9270. 0xDE,
  9271. 0x014D
  9272. },
  9273. Package (0x02)
  9274. {
  9275. 0xDE,
  9276. 0x014D
  9277. },
  9278. Package (0x02)
  9279. {
  9280. Zero,
  9281. Zero
  9282. },
  9283. Package (0x02)
  9284. {
  9285. 0xDE,
  9286. 0x014D
  9287. }
  9288. })
  9289. Name (SUCC, One)
  9290. Name (NVLD, 0x02)
  9291. Name (CRIT, 0x04)
  9292. Name (NCRT, 0x06)
  9293. Method (GSCI, 0, Serialized)
  9294. {
  9295. Method (GBDA, 0, Serialized)
  9296. {
  9297. If (LEqual (GESF, Zero))
  9298. {
  9299. Store (0x0679, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9300. Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
  9301. Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
  9302. }
  9303. If (LEqual (GESF, One))
  9304. {
  9305. Store (0x0240, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9306. Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
  9307. Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
  9308. }
  9309. If (LEqual (GESF, 0x04))
  9310. {
  9311. And (PARM, 0xEFFF0000, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9312. And (PARM, ShiftLeft (DerefOf (Index (DBTB, IBTT)), 0x10),
  9313. PARM) /* \_SB_.PCI0.GFX0.PARM */
  9314. Or (IBTT, PARM, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9315. Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
  9316. Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
  9317. }
  9318. If (LEqual (GESF, 0x05))
  9319. {
  9320. Store (IPSC, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9321. Or (PARM, ShiftLeft (IPAT, 0x08), PARM) /* \_SB_.PCI0.GFX0.PARM */
  9322. Add (PARM, 0x0100, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9323. Or (PARM, ShiftLeft (LIDS, 0x10), PARM) /* \_SB_.PCI0.GFX0.PARM */
  9324. Add (PARM, 0x00010000, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9325. Or (PARM, ShiftLeft (IBIA, 0x14), PARM) /* \_SB_.PCI0.GFX0.PARM */
  9326. Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
  9327. Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
  9328. }
  9329. If (LEqual (GESF, 0x06))
  9330. {
  9331. Store (ITVF, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9332. Or (PARM, ShiftLeft (ITVM, 0x04), PARM) /* \_SB_.PCI0.GFX0.PARM */
  9333. Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
  9334. Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
  9335. }
  9336. If (LEqual (GESF, 0x07))
  9337. {
  9338. Store (GIVD, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9339. XOr (PARM, One, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9340. Or (PARM, ShiftLeft (GMFN, One), PARM) /* \_SB_.PCI0.GFX0.PARM */
  9341. Or (PARM, 0x1800, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9342. Or (PARM, ShiftLeft (IDMS, 0x11), PARM) /* \_SB_.PCI0.GFX0.PARM */
  9343. Or (ShiftLeft (DerefOf (Index (DerefOf (Index (CDCT, HVCO)), CDVL
  9344. )), 0x15), PARM, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9345. Store (One, GESF) /* \_SB_.PCI0.GFX0.GESF */
  9346. Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
  9347. }
  9348. If (LEqual (GESF, 0x0A))
  9349. {
  9350. Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9351. If (ISSC)
  9352. {
  9353. Or (PARM, 0x03, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9354. }
  9355. Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
  9356. Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
  9357. }
  9358. If (LEqual (GESF, 0x0B))
  9359. {
  9360. Store (KSV0, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9361. Store (KSV1, GESF) /* \_SB_.PCI0.GFX0.GESF */
  9362. Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
  9363. }
  9364. Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
  9365. Return (CRIT) /* \_SB_.PCI0.GFX0.CRIT */
  9366. }
  9367. Method (SBCB, 0, Serialized)
  9368. {
  9369. If (LEqual (GESF, Zero))
  9370. {
  9371. Store (0x000F87FD, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9372. Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
  9373. Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
  9374. }
  9375. If (LEqual (GESF, One))
  9376. {
  9377. Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
  9378. Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9379. Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
  9380. }
  9381. If (LEqual (GESF, 0x03))
  9382. {
  9383. Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
  9384. Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9385. Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
  9386. }
  9387. If (LEqual (GESF, 0x04))
  9388. {
  9389. Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
  9390. Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9391. Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
  9392. }
  9393. If (LEqual (GESF, 0x05))
  9394. {
  9395. Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
  9396. Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9397. Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
  9398. }
  9399. If (LEqual (GESF, 0x06))
  9400. {
  9401. Store (And (PARM, 0x0F), ITVF) /* \ITVF */
  9402. Store (ShiftRight (And (PARM, 0xF0), 0x04), ITVM) /* \ITVM */
  9403. Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
  9404. Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9405. Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
  9406. }
  9407. If (LEqual (GESF, 0x07))
  9408. {
  9409. If (LEqual (PARM, Zero)) {}
  9410. Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
  9411. Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9412. Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
  9413. }
  9414. If (LEqual (GESF, 0x08))
  9415. {
  9416. Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
  9417. Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9418. Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
  9419. }
  9420. If (LEqual (GESF, 0x09))
  9421. {
  9422. And (PARM, 0xFF, IBTT) /* \IBTT */
  9423. Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
  9424. Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9425. Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
  9426. }
  9427. If (LEqual (GESF, 0x0A))
  9428. {
  9429. And (PARM, 0xFF, IPSC) /* \IPSC */
  9430. If (And (ShiftRight (PARM, 0x08), 0xFF))
  9431. {
  9432. And (ShiftRight (PARM, 0x08), 0xFF, IPAT) /* \IPAT */
  9433. Decrement (IPAT)
  9434. }
  9435. And (ShiftRight (PARM, 0x14), 0x07, IBIA) /* \IBIA */
  9436. Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
  9437. Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9438. Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
  9439. }
  9440. If (LEqual (GESF, 0x0B))
  9441. {
  9442. And (ShiftRight (PARM, One), One, IF1E) /* \IF1E */
  9443. If (And (PARM, 0x0001E000))
  9444. {
  9445. And (ShiftRight (PARM, 0x0D), 0x0F, IDMS) /* \IDMS */
  9446. }
  9447. Else
  9448. {
  9449. And (ShiftRight (PARM, 0x11), 0x0F, IDMS) /* \IDMS */
  9450. }
  9451. Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
  9452. Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9453. Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
  9454. }
  9455. If (LEqual (GESF, 0x10))
  9456. {
  9457. Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
  9458. Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9459. Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
  9460. }
  9461. If (LEqual (GESF, 0x11))
  9462. {
  9463. Store (ShiftLeft (LIDS, 0x08), PARM) /* \_SB_.PCI0.GFX0.PARM */
  9464. Add (PARM, 0x0100, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9465. Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
  9466. Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
  9467. }
  9468. If (LEqual (GESF, 0x12))
  9469. {
  9470. If (And (PARM, One))
  9471. {
  9472. If (LEqual (ShiftRight (PARM, One), One))
  9473. {
  9474. Store (One, ISSC) /* \ISSC */
  9475. }
  9476. Else
  9477. {
  9478. Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
  9479. Return (CRIT) /* \_SB_.PCI0.GFX0.CRIT */
  9480. }
  9481. }
  9482. Else
  9483. {
  9484. Store (Zero, ISSC) /* \ISSC */
  9485. }
  9486. Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
  9487. Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9488. Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
  9489. }
  9490. If (LEqual (GESF, 0x13))
  9491. {
  9492. Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
  9493. Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9494. Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
  9495. }
  9496. If (LEqual (GESF, 0x14))
  9497. {
  9498. And (PARM, 0x0F, PAVP) /* \PAVP */
  9499. Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
  9500. Store (Zero, PARM) /* \_SB_.PCI0.GFX0.PARM */
  9501. Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
  9502. }
  9503. Store (Zero, GESF) /* \_SB_.PCI0.GFX0.GESF */
  9504. Return (SUCC) /* \_SB_.PCI0.GFX0.SUCC */
  9505. }
  9506. If (LEqual (GEFC, 0x04))
  9507. {
  9508. Store (GBDA (), GXFC) /* \_SB_.PCI0.GFX0.GXFC */
  9509. }
  9510. If (LEqual (GEFC, 0x06))
  9511. {
  9512. Store (SBCB (), GXFC) /* \_SB_.PCI0.GFX0.GXFC */
  9513. }
  9514. Store (Zero, GEFC) /* \_SB_.PCI0.GFX0.GEFC */
  9515. Store (One, SCIS) /* \SCIS */
  9516. Store (Zero, GSSE) /* \_SB_.PCI0.GFX0.GSSE */
  9517. Store (Zero, SCIE) /* \_SB_.PCI0.GFX0.SCIE */
  9518. Return (Zero)
  9519. }
  9520. Device (^^MEM2)
  9521. {
  9522. Name (_HID, EisaId ("PNP0C01") /* System Board */) // _HID: Hardware ID
  9523. Name (_UID, 0x02) // _UID: Unique ID
  9524. Name (CRS, ResourceTemplate ()
  9525. {
  9526. Memory32Fixed (ReadWrite,
  9527. 0x20000000, // Address Base
  9528. 0x00200000, // Address Length
  9529. )
  9530. Memory32Fixed (ReadWrite,
  9531. 0x40000000, // Address Base
  9532. 0x00200000, // Address Length
  9533. )
  9534. })
  9535. Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings
  9536. {
  9537. If (IGDS)
  9538. {
  9539. Return (CRS) /* \_SB_.MEM2.CRS_ */
  9540. }
  9541. Return (Buffer (One) {Zero})
  9542. }
  9543. }
  9544. }
  9545. }
  9546. Device (_SB.PCI0.LPCB.TPM)
  9547. {
  9548. Method (_HID, 0, NotSerialized) // _HID: Hardware ID
  9549. {
  9550. If (TCMF) {}
  9551. Else
  9552. {
  9553. Return (0x0201D824)
  9554. }
  9555. Return (Zero)
  9556. }
  9557. Name (_CID, EisaId ("PNP0C31")) // _CID: Compatible ID
  9558. Name (_STR, Unicode ("TPM 1.2 Device")) // _STR: Description String
  9559. Name (_UID, One) // _UID: Unique ID
  9560. Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
  9561. {
  9562. Memory32Fixed (ReadOnly,
  9563. 0xFED40000, // Address Base
  9564. 0x00005000, // Address Length
  9565. )
  9566. })
  9567. OperationRegion (TMMB, SystemMemory, 0xFED40000, 0x5000)
  9568. Field (TMMB, ByteAcc, Lock, Preserve)
  9569. {
  9570. ACCS, 8,
  9571. Offset (0x18),
  9572. TSTA, 8,
  9573. TBCA, 8,
  9574. Offset (0xF00),
  9575. TVID, 16,
  9576. TDID, 16
  9577. }
  9578. Method (_STA, 0, NotSerialized) // _STA: Status
  9579. {
  9580. If (LEqual (VIDT, 0x8086))
  9581. {
  9582. Return (Zero)
  9583. }
  9584. Else
  9585. {
  9586. If (TPMF)
  9587. {
  9588. Return (0x0F)
  9589. }
  9590. Return (Zero)
  9591. }
  9592. }
  9593. }
  9594. Scope (_SB.PCI0.LPCB.TPM)
  9595. {
  9596. OperationRegion (TSMI, SystemIO, SMIT, 0x02)
  9597. Field (TSMI, ByteAcc, NoLock, Preserve)
  9598. {
  9599. INQ, 8,
  9600. DAT, 8
  9601. }
  9602. Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
  9603. {
  9604. If (LEqual (Arg0, Buffer (0x10)
  9605. {
  9606. /* 0000 */ 0xA6, 0xFA, 0xDD, 0x3D, 0x1B, 0x36, 0xB4, 0x4E,
  9607. /* 0008 */ 0xA4, 0x24, 0x8D, 0x10, 0x08, 0x9D, 0x16, 0x53
  9608. }))
  9609. {
  9610. Name (T_0, Zero) // _T_x: Emitted by ASL Compiler
  9611. Store (ToInteger (Arg2), T_0) /* \_SB_.PCI0.LPCB.TPM_._DSM.T_0 */
  9612. If (LEqual (T_0, Zero))
  9613. {
  9614. Return (Buffer (0x02)
  9615. {
  9616. 0xFF, 0x01
  9617. })
  9618. }
  9619. Else
  9620. {
  9621. If (LEqual (T_0, One))
  9622. {
  9623. Return ("1.2")
  9624. }
  9625. Else
  9626. {
  9627. If (LEqual (T_0, 0x02))
  9628. {
  9629. ToInteger (DerefOf (Index (Arg3, Zero)), TMF2) /* \TMF2 */
  9630. Store (0x12, TMF1) /* \TMF1 */
  9631. Store (TMF1, DAT) /* \_SB_.PCI0.LPCB.TPM_.DAT_ */
  9632. Store (OFST, INQ) /* \_SB_.PCI0.LPCB.TPM_.INQ_ */
  9633. If (LEqual (DAT, 0xFF))
  9634. {
  9635. Return (0x02)
  9636. }
  9637. Store (TMF2, DAT) /* \_SB_.PCI0.LPCB.TPM_.DAT_ */
  9638. Store (OFST, INQ) /* \_SB_.PCI0.LPCB.TPM_.INQ_ */
  9639. If (LEqual (DAT, 0xFF))
  9640. {
  9641. Return (0x02)
  9642. }
  9643. If (LEqual (DAT, 0xF1))
  9644. {
  9645. Return (One)
  9646. }
  9647. Return (Zero)
  9648. }
  9649. Else
  9650. {
  9651. If (LEqual (T_0, 0x03))
  9652. {
  9653. Name (PPI1, Package (0x02)
  9654. {
  9655. Zero,
  9656. Zero
  9657. })
  9658. Store (0x11, DAT) /* \_SB_.PCI0.LPCB.TPM_.DAT_ */
  9659. Store (OFST, INQ) /* \_SB_.PCI0.LPCB.TPM_.INQ_ */
  9660. If (LEqual (DAT, 0xFF))
  9661. {
  9662. Return (One)
  9663. }
  9664. Store (DAT, Index (PPI1, One))
  9665. Return (PPI1) /* \_SB_.PCI0.LPCB.TPM_._DSM.PPI1 */
  9666. }
  9667. Else
  9668. {
  9669. If (LEqual (T_0, 0x04))
  9670. {
  9671. Return (TRST) /* \TRST */
  9672. }
  9673. Else
  9674. {
  9675. If (LEqual (T_0, 0x05))
  9676. {
  9677. Name (PPI2, Package (0x03)
  9678. {
  9679. Zero,
  9680. Zero,
  9681. Zero
  9682. })
  9683. Store (0x21, DAT) /* \_SB_.PCI0.LPCB.TPM_.DAT_ */
  9684. Store (OFST, INQ) /* \_SB_.PCI0.LPCB.TPM_.INQ_ */
  9685. Store (DAT, Index (PPI2, One))
  9686. If (LEqual (DAT, 0xFF))
  9687. {
  9688. Return (0x02)
  9689. }
  9690. Store (0x31, DAT) /* \_SB_.PCI0.LPCB.TPM_.DAT_ */
  9691. Store (OFST, INQ) /* \_SB_.PCI0.LPCB.TPM_.INQ_ */
  9692. If (LEqual (DAT, 0xFF))
  9693. {
  9694. Return (0x02)
  9695. }
  9696. If (LEqual (DAT, 0xF0))
  9697. {
  9698. Store (0x51, DAT) /* \_SB_.PCI0.LPCB.TPM_.DAT_ */
  9699. Store (OFST, INQ) /* \_SB_.PCI0.LPCB.TPM_.INQ_ */
  9700. If (LEqual (DAT, 0xFF))
  9701. {
  9702. Store (0xFFFFFFF0, Index (PPI2, 0x02))
  9703. Return (PPI2) /* \_SB_.PCI0.LPCB.TPM_._DSM.PPI2 */
  9704. }
  9705. }
  9706. Else
  9707. {
  9708. If (LEqual (DAT, 0xF1))
  9709. {
  9710. Store (0x51, DAT) /* \_SB_.PCI0.LPCB.TPM_.DAT_ */
  9711. Store (OFST, INQ) /* \_SB_.PCI0.LPCB.TPM_.INQ_ */
  9712. If (LEqual (DAT, 0xFF))
  9713. {
  9714. Store (0xFFFFFFF1, Index (PPI2, 0x02))
  9715. Return (PPI2) /* \_SB_.PCI0.LPCB.TPM_._DSM.PPI2 */
  9716. }
  9717. }
  9718. Else
  9719. {
  9720. Store (DAT, Index (PPI2, 0x02))
  9721. }
  9722. }
  9723. Return (PPI2) /* \_SB_.PCI0.LPCB.TPM_._DSM.PPI2 */
  9724. }
  9725. Else
  9726. {
  9727. If (LEqual (T_0, 0x06))
  9728. {
  9729. Return (0x03)
  9730. }
  9731. Else
  9732. {
  9733. If (LEqual (T_0, 0x07))
  9734. {
  9735. ToInteger (DerefOf (Index (Arg3, Zero)), TMF2) /* \TMF2 */
  9736. Store (0x12, TMF1) /* \TMF1 */
  9737. Store (TMF1, DAT) /* \_SB_.PCI0.LPCB.TPM_.DAT_ */
  9738. Store (OFST, INQ) /* \_SB_.PCI0.LPCB.TPM_.INQ_ */
  9739. If (LEqual (DAT, 0xFF))
  9740. {
  9741. Return (0x02)
  9742. }
  9743. Store (TMF2, DAT) /* \_SB_.PCI0.LPCB.TPM_.DAT_ */
  9744. Store (OFST, INQ) /* \_SB_.PCI0.LPCB.TPM_.INQ_ */
  9745. If (LEqual (DAT, 0xFF))
  9746. {
  9747. Return (0x02)
  9748. }
  9749. If (LEqual (DAT, 0xF1))
  9750. {
  9751. Return (One)
  9752. }
  9753. Return (Zero)
  9754. }
  9755. Else
  9756. {
  9757. If (LEqual (T_0, 0x08))
  9758. {
  9759. ToInteger (DerefOf (Index (Arg3, Zero)), TMF2) /* \TMF2 */
  9760. Store (0x43, TMF1) /* \TMF1 */
  9761. Store (TMF1, DAT) /* \_SB_.PCI0.LPCB.TPM_.DAT_ */
  9762. Store (OFST, INQ) /* \_SB_.PCI0.LPCB.TPM_.INQ_ */
  9763. Store (TMF2, DAT) /* \_SB_.PCI0.LPCB.TPM_.DAT_ */
  9764. Store (OFST, INQ) /* \_SB_.PCI0.LPCB.TPM_.INQ_ */
  9765. Return (DAT) /* \_SB_.PCI0.LPCB.TPM_.DAT_ */
  9766. }
  9767. Else
  9768. {
  9769. }
  9770. }
  9771. }
  9772. }
  9773. }
  9774. }
  9775. }
  9776. }
  9777. }
  9778. }
  9779. Else
  9780. {
  9781. If (LEqual (Arg0, Buffer (0x10)
  9782. {
  9783. /* 0000 */ 0xED, 0x54, 0x60, 0x37, 0x13, 0xCC, 0x75, 0x46,
  9784. /* 0008 */ 0x90, 0x1C, 0x47, 0x56, 0xD7, 0xF2, 0xD4, 0x5D
  9785. }))
  9786. {
  9787. Name (T_1, Zero) // _T_x: Emitted by ASL Compiler
  9788. Store (ToInteger (Arg2), T_1) /* \_SB_.PCI0.LPCB.TPM_._DSM.T_1 */
  9789. If (LEqual (T_1, Zero))
  9790. {
  9791. Return (Buffer (One)
  9792. {
  9793. 0x03
  9794. })
  9795. }
  9796. Else
  9797. {
  9798. If (LEqual (T_1, One))
  9799. {
  9800. Store (0x22, TMF1) /* \TMF1 */
  9801. Store (TMF1, DAT) /* \_SB_.PCI0.LPCB.TPM_.DAT_ */
  9802. Store (OFST, INQ) /* \_SB_.PCI0.LPCB.TPM_.INQ_ */
  9803. If (LEqual (DAT, 0xFF))
  9804. {
  9805. Return (0x02)
  9806. }
  9807. ToInteger (DerefOf (Index (Arg3, Zero)), TMF1) /* \TMF1 */
  9808. Store (TMF1, DAT) /* \_SB_.PCI0.LPCB.TPM_.DAT_ */
  9809. Store (OFST, INQ) /* \_SB_.PCI0.LPCB.TPM_.INQ_ */
  9810. If (LEqual (DAT, 0xFF))
  9811. {
  9812. Return (0x02)
  9813. }
  9814. Return (Zero)
  9815. }
  9816. Else
  9817. {
  9818. }
  9819. }
  9820. }
  9821. }
  9822. Return (Buffer (One)
  9823. {
  9824. 0x00
  9825. })
  9826. }
  9827. }
  9828. Scope (_SB.PCI0)
  9829. {
  9830. OperationRegion (ITPD, PCI_Config, 0xE8, 0x04)
  9831. Field (ITPD, DWordAcc, NoLock, Preserve)
  9832. {
  9833. , 15,
  9834. TPDI, 1
  9835. }
  9836. OperationRegion (TVID, SystemMemory, 0xFED40F00, 0x02)
  9837. Field (TVID, WordAcc, NoLock, Preserve)
  9838. {
  9839. VIDT, 16
  9840. }
  9841. }
  9842. Device (_SB.PCI0.ITPM)
  9843. {
  9844. Name (_HID, "INTC0102") // _HID: Hardware ID
  9845. Name (_CID, EisaId ("PNP0C31")) // _CID: Compatible ID
  9846. Name (_STR, Unicode ("TPM 1.2 Device")) // _STR: Description String
  9847. Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
  9848. {
  9849. Memory32Fixed (ReadOnly,
  9850. 0xFED40000, // Address Base
  9851. 0x00005000, // Address Length
  9852. )
  9853. })
  9854. OperationRegion (TSMI, SystemIO, SMIT, 0x02)
  9855. Field (TSMI, ByteAcc, NoLock, Preserve)
  9856. {
  9857. INQ, 8,
  9858. DAT, 8
  9859. }
  9860. OperationRegion (TPMR, SystemMemory, 0xFED40000, 0x5000)
  9861. Field (TPMR, AnyAcc, NoLock, Preserve)
  9862. {
  9863. ACC0, 8
  9864. }
  9865. Method (_STA, 0, NotSerialized) // _STA: Status
  9866. {
  9867. If (LNotEqual (ACC0, 0xFF))
  9868. {
  9869. If (LEqual (VIDT, 0x8086))
  9870. {
  9871. If (TPMF)
  9872. {
  9873. Return (0x0F)
  9874. }
  9875. Return (Zero)
  9876. }
  9877. }
  9878. Return (Zero)
  9879. }
  9880. Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
  9881. {
  9882. If (LEqual (Arg0, Buffer (0x10)
  9883. {
  9884. /* 0000 */ 0xA6, 0xFA, 0xDD, 0x3D, 0x1B, 0x36, 0xB4, 0x4E,
  9885. /* 0008 */ 0xA4, 0x24, 0x8D, 0x10, 0x08, 0x9D, 0x16, 0x53
  9886. }))
  9887. {
  9888. Name (T_0, Zero) // _T_x: Emitted by ASL Compiler
  9889. Store (ToInteger (Arg2), T_0) /* \_SB_.PCI0.ITPM._DSM.T_0 */
  9890. If (LEqual (T_0, Zero))
  9891. {
  9892. Return (Buffer (One)
  9893. {
  9894. 0x7F
  9895. })
  9896. }
  9897. Else
  9898. {
  9899. If (LEqual (T_0, One))
  9900. {
  9901. Return ("1.0")
  9902. }
  9903. Else
  9904. {
  9905. If (LEqual (T_0, 0x02))
  9906. {
  9907. ToInteger (DerefOf (Index (Arg3, Zero)), TMF2) /* \TMF2 */
  9908. Store (0x12, TMF1) /* \TMF1 */
  9909. Store (TMF1, DAT) /* \_SB_.PCI0.ITPM.DAT_ */
  9910. Store (OFST, INQ) /* \_SB_.PCI0.ITPM.INQ_ */
  9911. If (LEqual (DAT, 0xFF))
  9912. {
  9913. Return (0x02)
  9914. }
  9915. Store (TMF2, DAT) /* \_SB_.PCI0.ITPM.DAT_ */
  9916. Store (OFST, INQ) /* \_SB_.PCI0.ITPM.INQ_ */
  9917. If (LEqual (DAT, 0xFF))
  9918. {
  9919. Return (0x02)
  9920. }
  9921. Return (Zero)
  9922. }
  9923. Else
  9924. {
  9925. If (LEqual (T_0, 0x03))
  9926. {
  9927. Name (PPI1, Package (0x02)
  9928. {
  9929. Zero,
  9930. Zero
  9931. })
  9932. Store (0x11, DAT) /* \_SB_.PCI0.ITPM.DAT_ */
  9933. Store (OFST, INQ) /* \_SB_.PCI0.ITPM.INQ_ */
  9934. If (LEqual (DAT, 0xFF))
  9935. {
  9936. Return (One)
  9937. }
  9938. Store (DAT, Index (PPI1, One))
  9939. Return (PPI1) /* \_SB_.PCI0.ITPM._DSM.PPI1 */
  9940. }
  9941. Else
  9942. {
  9943. If (LEqual (T_0, 0x04))
  9944. {
  9945. Return (One)
  9946. }
  9947. Else
  9948. {
  9949. If (LEqual (T_0, 0x05))
  9950. {
  9951. Name (PPI2, Package (0x03)
  9952. {
  9953. Zero,
  9954. Zero,
  9955. Zero
  9956. })
  9957. Store (0x21, DAT) /* \_SB_.PCI0.ITPM.DAT_ */
  9958. Store (OFST, INQ) /* \_SB_.PCI0.ITPM.INQ_ */
  9959. Store (DAT, Index (PPI2, One))
  9960. If (LEqual (DAT, 0xFF))
  9961. {
  9962. Return (0x02)
  9963. }
  9964. Store (DAT, Index (PPI2, One))
  9965. Store (0x31, DAT) /* \_SB_.PCI0.ITPM.DAT_ */
  9966. Store (OFST, INQ) /* \_SB_.PCI0.ITPM.INQ_ */
  9967. If (LEqual (DAT, 0xFF))
  9968. {
  9969. Return (0x02)
  9970. }
  9971. If (LEqual (DAT, 0xFFF0))
  9972. {
  9973. Store (0xFFFFFFF0, Index (PPI2, 0x02))
  9974. }
  9975. Else
  9976. {
  9977. If (LEqual (DAT, 0xFFF1))
  9978. {
  9979. Store (0xFFFFFFF1, Index (PPI2, 0x02))
  9980. }
  9981. Else
  9982. {
  9983. Store (DAT, Index (PPI2, 0x02))
  9984. }
  9985. }
  9986. Return (PPI2) /* \_SB_.PCI0.ITPM._DSM.PPI2 */
  9987. }
  9988. Else
  9989. {
  9990. If (LEqual (T_0, 0x06))
  9991. {
  9992. Return (Zero)
  9993. }
  9994. Else
  9995. {
  9996. }
  9997. }
  9998. }
  9999. }
  10000. }
  10001. }
  10002. }
  10003. }
  10004. Else
  10005. {
  10006. If (LEqual (Arg0, Buffer (0x10)
  10007. {
  10008. /* 0000 */ 0xED, 0x54, 0x60, 0x37, 0x13, 0xCC, 0x75, 0x46,
  10009. /* 0008 */ 0x90, 0x1C, 0x47, 0x56, 0xD7, 0xF2, 0xD4, 0x5D
  10010. }))
  10011. {
  10012. Name (T_1, Zero) // _T_x: Emitted by ASL Compiler
  10013. Store (ToInteger (Arg2), T_1) /* \_SB_.PCI0.ITPM._DSM.T_1 */
  10014. If (LEqual (T_1, Zero))
  10015. {
  10016. Return (Buffer (One)
  10017. {
  10018. 0x03
  10019. })
  10020. }
  10021. Else
  10022. {
  10023. If (LEqual (T_1, One))
  10024. {
  10025. Store (0x22, TMF1) /* \TMF1 */
  10026. Store (TMF1, DAT) /* \_SB_.PCI0.ITPM.DAT_ */
  10027. Store (OFST, INQ) /* \_SB_.PCI0.ITPM.INQ_ */
  10028. If (LEqual (DAT, 0xFF))
  10029. {
  10030. Return (0x02)
  10031. }
  10032. ToInteger (DerefOf (Index (Arg3, Zero)), TMF1) /* \TMF1 */
  10033. Store (TMF1, DAT) /* \_SB_.PCI0.ITPM.DAT_ */
  10034. Store (OFST, INQ) /* \_SB_.PCI0.ITPM.INQ_ */
  10035. If (LEqual (DAT, 0xFF))
  10036. {
  10037. Return (0x02)
  10038. }
  10039. Return (Zero)
  10040. }
  10041. Else
  10042. {
  10043. }
  10044. }
  10045. }
  10046. }
  10047. Return (Buffer (One)
  10048. {
  10049. 0x00
  10050. })
  10051. }
  10052. }
  10053. Name (_S0, Package (0x04) // _S0_: S0 System State
  10054. {
  10055. Zero,
  10056. Zero,
  10057. Zero,
  10058. Zero
  10059. })
  10060. If (SS1)
  10061. {
  10062. Name (_S1, Package (0x04) // _S1_: S1 System State
  10063. {
  10064. One,
  10065. Zero,
  10066. Zero,
  10067. Zero
  10068. })
  10069. }
  10070. If (SS3)
  10071. {
  10072. Name (_S3, Package (0x04) // _S3_: S3 System State
  10073. {
  10074. 0x05,
  10075. Zero,
  10076. Zero,
  10077. Zero
  10078. })
  10079. }
  10080. If (SS4)
  10081. {
  10082. Name (_S4, Package (0x04) // _S4_: S4 System State
  10083. {
  10084. 0x06,
  10085. Zero,
  10086. Zero,
  10087. Zero
  10088. })
  10089. }
  10090. Name (_S5, Package (0x04) // _S5_: S5 System State
  10091. {
  10092. 0x07,
  10093. Zero,
  10094. Zero,
  10095. Zero
  10096. })
  10097. Method (PTS, 1, NotSerialized)
  10098. {
  10099. If (Arg0)
  10100. {
  10101. \_SB.PCI0.LPCB.SPTS (Arg0)
  10102. \_SB.PCI0.NPTS (Arg0)
  10103. \_SB.PCI0.CPTS (Arg0)
  10104. }
  10105. }
  10106. Method (WAK, 1, NotSerialized)
  10107. {
  10108. \_SB.PCI0.LPCB.SWAK (Arg0)
  10109. \_SB.PCI0.NWAK (Arg0)
  10110. \_SB.PCI0.CWAK (Arg0)
  10111. }
  10112. }
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