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Mar 6th, 2015
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  1. /*** DEVCFG0 ***/
  2.  
  3. #pragma config DEBUG = OFF
  4. #pragma config ICESEL = ICS_PGx2
  5. #pragma config PWP = 0xff
  6. #pragma config BWP = OFF
  7. #pragma config CP = OFF
  8.  
  9. /*** DEVCFG1 ***/
  10.  
  11. #pragma config FNOSC = PRIPLL
  12. #pragma config FSOSCEN = ON
  13. #pragma config IESO = ON
  14. #pragma config POSCMOD = XT
  15. #pragma config OSCIOFNC = OFF
  16. #pragma config FPBDIV = DIV_8
  17. #pragma config FCKSM = CSDCMD
  18. #pragma config WDTPS = PS1048576
  19. #pragma config FWDTEN = ON
  20.  
  21. /*** DEVCFG2 ***/
  22.  
  23. #pragma config FPLLIDIV = DIV_2
  24. #pragma config FPLLMUL = MUL_20
  25. #pragma config FPLLODIV = DIV_1
  26. #pragma config UPLLIDIV = DIV_2
  27. #pragma config UPLLEN = ON
  28.  
  29. /*** DEVCFG3 ***/
  30.  
  31. #pragma config USERID = 0xffff
  32. #pragma config FSRSSEL = PRIORITY_7
  33. #pragma config FMIIEN = ON
  34. #pragma config FETHIO = ON
  35. #pragma config FCANIO = ON
  36. #pragma config FUSBIDIO = ON
  37. #pragma config FVBUSONIO = ON
  38.  
  39.  
  40.  
  41. void __ISR(_ADC_VECTOR, IPL7SRS) ADCHandler(void) // interrupt every 8 samples
  42. {
  43. APP_ADC_INTERUPT_CALLBACK();
  44. IFS1bits.AD1IF = 0; // clear interrupt flag
  45. }
  46.  
  47.  
  48.  
  49. void __ISR(_DMA0_VECTOR, ipl5) _IntHandlerSysDmaCh0(void)
  50. {
  51.  
  52. int dmaFlags=DCH0INT&0xff; // read the interrupt flags
  53. APP_DMA_INTERUPT_CALLBACK();
  54. /*
  55. perform application specific operations in response to any interrupt flag set
  56. */
  57. DCH0INTCLR=0x000000ff; // clear the DMA channel interrupt flags
  58. IFS1CLR = 0x00010000; // Be sure to clear the DMA0 interrupt flags
  59. // before exiting the service routine.
  60. }
  61.  
  62. void APP_Initialize(void) {
  63. /* Place the App state machine in its initial state. */
  64. appData.state = APP_STATE_INIT;
  65.  
  66. INTDisableInterrupts(); // disable interrupts before configuring ADC
  67. initADC();
  68. initDMA();
  69. INTEnableSystemMultiVectoredInt(); // enable interrupts at CPU
  70.  
  71. }
  72.  
  73. unsigned int __attribute__((always_inline)) _VirtToPhys(const void* p) {
  74. return (int) p < 0 ? ((int) p & 0x1fffffffL) : (unsigned int) ((unsigned char*) p + 0x40000000L);
  75. }
  76.  
  77. void initADC(void) {
  78.  
  79.  
  80. AD1PCFG = 0xFFFB; // PORTB = Digital; RB2 = analog
  81. AD1CON1 = 0x0000; // SAMP bit = 0 ends sampling
  82. // and starts converting
  83.  
  84. // turn ADC on | unsigned 32-bit int output | auto-convert after sample finished |
  85. // don?t stop conversions at interrupt | auto-sample after conversion finished
  86. AD1CON1 = (1 << 15) | (4 << 8) | (7 << 5) | (0 << 4) | (1 << 2);
  87.  
  88.  
  89. IPC6bits.AD1IP = 7; // INT priority level 7, for shadow register set
  90. IFS1bits.AD1IF = 0; // clear interrupt flag
  91. IEC1bits.AD1IE = 1; // enable interrupts
  92.  
  93. AD1CHS = 0x00020000; // Connect RB2/AN2 as CH0 input
  94.  
  95. AD1CON1SET = 0x8000; // turn on the ADC
  96. }
  97.  
  98. void initDMA(void) {
  99.  
  100.  
  101. IEC1CLR=0x00010000; // disable DMA channel 0 interrupts
  102. IFS1CLR=0x00010000; // clear any existing DMA channel 0 interrupt flag
  103. DMACONSET=0x00008000; // enable the DMA controller
  104. DCH0CON=0x03; // channel off, priority 3, no chaining
  105. DCH0ECON=0;
  106. DCH0ECONbits.CHSIRQ=_ADC_IRQ; // This should map the AD1 ? ADC1 Convert Done Interrupt to start the dma IRQ no. 33 Vector no. 27
  107. // program the transfer
  108. DCH0SSA=_VirtToPhys(&ADC1BUF0); // transfer source physical address
  109. DCH0DSA=_VirtToPhys(appData.adcValues); // transfer destination physical address
  110. DCH0SSIZ=16; // source size 16 bytes
  111. DCH0DSIZ=NUM_SAMPS; // destination size NUM_SAMPS bytes
  112. DCH0CSIZ=16; // 16 bytes transferred per event
  113. DCH0INTCLR=0x00ff00ff; // clear existing events, disable all interrupts
  114. //DCH0INTSET=0x00090000; // enable Block Complete and error interrupts
  115.  
  116. DCH0INTbits.CHDDIF=1; //1 = Channel Destination Pointer has reached end of destination (CHDPTR = CHDSIZ)
  117.  
  118. IPC9CLR=0x0000001f; // clear the DMA channel 0 priority and sub-priority
  119. IPC9SET=0x00000016; // set IPL 5, sub-priority 2
  120. IEC1SET=0x00010000; // enable DMA channel 0 interrupt
  121. DCH0CONSET=0x80; // turn channel on
  122. // initiate a transfer
  123. // DCH0ECONSET=0x00000080; // set CFORCE to 1
  124. }
  125.  
  126.  
  127. void APP_Tasks(void) {
  128. /* Check the application's current state. */
  129. switch (appData.state) {
  130. /* Application's initial state. */
  131. case APP_STATE_INIT:
  132. {
  133.  
  134. changeState(APP_STATE_RUNNING);
  135. break;
  136. }
  137. case APP_STATE_RUNNING:
  138. {
  139. BSP_LEDOn(BSP_LED_2);
  140. break;
  141. }
  142.  
  143.  
  144.  
  145. /* The default state should never be executed. */
  146. default:
  147. {
  148. /* TODO: Handle error in application's state machine. */
  149. break;
  150. }
  151. }
  152. }
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