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hawaii_bcmpmu_ss_kyleve_rev00.dtsi

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Jan 3rd, 2015
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  1. / {
  2. bcmpmu {
  3. compatible = "Broadcom,bcmpmu";
  4. initdata = <
  5. /* Add Val Mask Map */
  6. 0x14 0x75 0xFF 0
  7. /* enable PC3 function */
  8. 0x15 0x0E 0xFF 0
  9. /* Selecting 0.87V */
  10. 0xC9 0x30 0xFF 0
  11. /* Mask Interrupt */
  12. 0x30 0xFF 0xFF 0
  13. 0x31 0xFF 0xFF 0
  14. 0x32 0xFF 0xFF 0
  15. 0x33 0xFF 0xFF 0
  16. 0x34 0xFF 0xFF 0
  17. 0x35 0xFF 0xFF 0
  18. 0x36 0xFF 0xFF 0
  19. 0x37 0xFF 0xFF 0
  20. 0x38 0xFF 0xFF 0
  21. 0x39 0xFF 0xFF 0
  22. 0x3A 0xFF 0xFF 0
  23. 0x3B 0xFF 0xFF 0
  24. 0x3C 0xFF 0xFF 0
  25. 0x3D 0xFF 0xFF 0
  26. 0x3E 0xFF 0xFF 0
  27. 0x3F 0xFF 0xFF 0
  28. /* Trickle charging timer setting */
  29. 0x40 0x38 0x38 0
  30. /* disable software charger timer */
  31. 0x41 0x0 0x04 0
  32. /* SWUP */
  33. 0x42 0x04 0x04 0
  34. /* Enable BC12_EN */
  35. 0x44 0x01 0x01 0
  36. /* ICCMAX to 1500mA*/
  37. 0x47 0x0B 0xFF 0
  38. /*fcc boot curr to 0 */
  39. 0x49 0x0 0xFF 0
  40. /* NTC Hot Temperature Comparator*/
  41. 0xCC 0x43 0xFF 1
  42. /* NTC Hot Temperature Comparator*/
  43. 0xCD 0x7F 0xFF 1
  44. /* NTC Cold Temperature Comparator*/
  45. 0xCE 0x3B 0xFF 1
  46. /* NTC Cold Temperature Comparator*/
  47. 0xCF 0xF8 0xFF 1
  48. /* NTC Hot Temperature Comparator bit 9,8 */
  49. 0xD0 0x09 0xFF 1
  50. /* ID detection ,current source Trimming */
  51. 0x47 0xD2 0xFF 1
  52. 0x48 0x98 0xFF 1
  53. 0x49 0xF0 0xFF 1
  54. /*ADP_THR_RATIO*/
  55. 0x4A 0x58 0xFF 1
  56. /* Enable ADP_PRB ADP_DSCHG comparators */
  57. 0x4B 0xC3 0xFF 1
  58. /*FG EOC CURR TH*/
  59. 0xBF 0x64 0xFF 1
  60. /*RTC_C2C1_XOTRIM*/
  61. 0xEF 0x44 0xFF 1
  62. /* PWMLEDCTRL1 */
  63. 0x00 0x23 0xFF 1
  64. /* HSCP3*/
  65. 0x82 0x00 0xFF 1
  66. /* HS audio powerdown feedback path */
  67. 0x7B 0x0C 0xFF 1
  68. /* NTC BiasSynchronous Mode,Host Enable Control NTC_PM0 Disable*/
  69. 0xD5 0x12 0xFF 1
  70. 0xD6 0x0 0xFF 1
  71. 0xD7 0x12 0xFF 1
  72. 0xD8 0x0 0xFF 1
  73. /* EN_SESS_VALID enable ID detection */
  74. 0x40 0x18 0xFF 1
  75. /* MMSR LPM voltage - 0.88V */
  76. 0xCA 0x04 0x3F 0
  77. /* SDSR1 LPM volt 0.9V*/
  78. 0xCD 0x06 0x3F 0
  79. /* SDSR2 LPM voltage - 1.24V */
  80. 0xD0 0x28 0x3F 0
  81. /* IOSR1 LPM voltage - 1.8V */
  82. 0xC4 0x3E 0x3f 0
  83. /* CSR LPM voltage - 1.24V */
  84. 0xC0 0x28 0x3F 0
  85.  
  86. /* PASRCTRL MobC00256738*/
  87. 0x08 0x00 0x06 1
  88. 0x0D 0x00 0xF0 1
  89. 0x0E 0x00 0x3F 1
  90.  
  91. /* FG */
  92. 0xA0 0x40 0xFF 1
  93. 0xA2 0x01 0xFF 1
  94. 0xA3 0x04 0xFF 1
  95.  
  96. /*otg boost ctrl1-2*/
  97. 0x4c 0xd4 0xFF 1
  98. 0x4d 0x1b 0xFF 1
  99.  
  100. /*MBC_CC_BOOST*/
  101. 0x5c 0x5 0x0F 0
  102.  
  103. /*otgctrl1 disable boost bydefault*/
  104. 0x40 0x0 0x4 1
  105.  
  106. /* pll */
  107. 0x1A 0x0 0xFF 0
  108.  
  109. /* enable PASR mode */
  110. /* PMU_REG_GPIOCTRL3 */
  111. 0x16 0x02 0xFF 0
  112. /* PMU_REG_PASRCTRL1 */
  113. 0x08 0x19 0xFF 1
  114. /* PMU_REG_PASRCTRL2 */
  115. 0x09 0x02 0xFF 1
  116.  
  117. /*turn of synthesizer when no PLL request */
  118. 0x1A 0xfe 0xff 0
  119. >;
  120. };
  121. };
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