; =========================================================================
; LFSR 128-bit algorithm (MMX required)
; by Andrey Breeze
; Implemented in x86 assembly using MASM32
; Bus taps: 128,126,101,99
; =========================================================================
; A linear feedback shift register (LFSR) is a shift register
; whose input bit is a linear function of its previous state.
; =========================================================================
.586
.MMX
.MODEL flat,stdcall
option casemap :none
; =========================================================================
; includes
; -------------------------------------------------------------------------
include \masm32\macros\macros.asm
include \masm32\include\masm32.inc
include \masm32\include\kernel32.inc
; libraries
; -------------------------------------------------------------------------
includelib \masm32\lib\masm32.lib
includelib \masm32\lib\kernel32.lib
includelib \masm32\lib\msvcrt.lib
; prototypes
; -------------------------------------------------------------------------
LFSR PROTO STDCALL :DWORD,:DWORD,:QWORD,:QWORD,:QWORD,:QWORD
; =========================================================================
.data
SH_ dq 0FFFFFFFFFFFFFFFFh ; Sequence[127-64]
SL_ dq 0FFFFFFFFFFFFFFFFh ; [63-0]
MH_ dq 00000000000000000h ; Mask[127-64] taps: 128,126,101,99
ML_ dq 00000000028000005h ; [63-0]
RR_ dd 00000FFFFh ; Amount of result DWORDS
.code
start:
; =========================================================================
call main
inkey
exit
; =========================================================================
main proc
cls
mov ecx, RR_
l1:
push ecx
lea eax,SH_
lea ebx,SL_
invoke LFSR,eax,ebx,SH_,SL_,MH_,ML_
call ShowBinary
pop ecx
loop l1
ret
main endp
; -------------------------------------------------------------------------
; inс: eax
ShowBinary proc
mov ecx,020h
mov ebx,eax
mov esi,04h
xor edx,edx
push edx
l1:
xor eax,eax
inc eax
and eax,ebx
ror ebx,01h
add eax,030h
or dl,al
dec esi
test esi,esi
jz l3
sal edx,08h
loop l1
l3:
push edx
xor edx,edx
mov esi,04h
loop l1
l4:
mov edx,esp
print edx
mov ecx,09h
l2:
pop eax
loop l2
ret
ShowBinary endp
; -------------------------------------------------------------------------
; out: eax
LFSR proc STDCALL ptrSH:DWORD,ptrSL:DWORD,SH:QWORD,SL:QWORD,\
MH:QWORD,ML:QWORD
inRSH = 0
inRSL = 1
inRMH = 2
inRML = 3
inRSHcp = 4
inRSLcp = 5
inRTmpH = 6
inRTmpL = 7
inRTmp = 6
; Initialize MMX registers
movq mm(inRSH),SH
movq mm(inRSL),SL
movq mm(inRMH),MH
movq mm(inRML),ML
movq mm(inRSHcp),mm(inRSH)
movq mm(inRSLcp),mm(inRSL)
; edx - DWORD of result code
xor edx,edx
mov si,0
l1:
; Apply LFSR mask
movq mm(inRTmpH),mm(inRSHcp)
pand mm(inRTmpH),mm(inRMH)
movq mm(inRTmpL),mm(inRSLcp)
pand mm(inRTmpL),mm(inRML)
; Reset parity
xor ecx,ecx
; Parity check for high bits [127-64]
; skiped, because 128-bit LFSR
; has bus taps: 128,126,101,99
;movd ebx,mm(inRTmpH)
;call P1
;psrlq mm(inRTmpH),020h
;movd ebx,mm(inRTmpH)
;call P1
; Parity check for low bits [63-0]
movd ebx,mm(inRTmpL)
call P1
; psrlq mm(inRTmpL),020h
; movd ebx,mm(inRTmpL)
; call P1
sar cl,02h
; Right-shift low bits by 1 bit
psrlq mm(inRSLcp),01h
movq mm(inRTmp),mm(inRSHcp)
psllq mm(inRTmp),03Fh
por mm(inRSLcp),mm(inRTmp)
; Right-shift high bits by 1 bit
psrlq mm(inRSHcp),01h
movd mm(inRTmp), ecx
psllq mm(inRTmp),03Fh
por mm(inRSHcp),mm(inRTmp)
; Append LFSR result bit to EDX as least significant bit
movd ecx,mm(inRSLcp)
and ecx,01h
or dl,cl
inc si
cmp si,020h
je l2
sal edx,01h
jmp l1
l2:
; Store new sequence bits in memory
mov edi,ptrSH
movq [edi],mm(inRSHcp)
mov edi,ptrSL
movq [edi],mm(inRSLcp)
; Move 32 bits of LFSR result to EAX and return
mov eax,edx
ret
LFSR endp
; -------------------------------------------------------------------------
; inс: ebx, cl
; out: cl
; Parity check for EBX
P1 proc
or ebx,0h
lahf
xor cl,ah
sar ebx,08h
lahf
xor cl,ah
sar ebx,08h
lahf
xor cl,ah
sar ebx,08h
lahf
xor cl,ah
ret
P1 endp
; =========================================================================
end start