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  1. /*
  2. cheali-charger - open source firmware for a variety of LiPo chargers
  3. Copyright (C) 2014 Pawel Stawicki. All right reserved.
  4.  
  5. This program is free software: you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation, either version 3 of the License, or
  8. (at your option) any later version.
  9.  
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14.  
  15. You should have received a copy of the GNU General Public License
  16. along with this program. If not, see <http://www.gnu.org/licenses/>.
  17. */
  18. #ifndef IMAXB6_PINS_H_
  19. #define IMAXB6_PINS_H_
  20.  
  21. // pin configuration
  22.  
  23. #define MUX0_Z_D_PIN 1 //ok?(7+3*12) P1.0 - T2, AIN0, nWRL
  24. //pin 2 voltage divider to 5V
  25. //pin 3 one-wire to header
  26. //pin 4 - nRST //(4) nRST (debug wire)
  27.  
  28. #define RX_HW_SERIAL_PIN 5 //ok(5) P3.0 - RXD[2], ACMP1_N
  29.  
  30. //pin 6 - AVSS //(6) AVSS
  31. //[HW Uart Tx pin: 7(P3.1) or 38(P0.2) - selectable (not connected)]
  32.  
  33. #define TX_HW_SERIAL_PIN 7 //ok(7) P3.1 - TXD[2], ACMP1_P
  34. #define UART_TX_PIN 7 //(9+3*12) P1.2 - RXD1[2], AIN2
  35. //#define T_EXTERNAL_PIN 45 //(9+3*12)
  36. //[HW Uart Tx pin: 7(P3.1) or 38(P0.2) - selectable
  37. #define MUX_ADR2_PIN 8 //ok(1+2*12) P2.5 - PWM5, AD13, SDA1[2]
  38. #define MUX_ADR1_PIN 9 //ok(4+2*12) P4.4 - nCS, SCL1
  39. #define LCD_D0_PIN 10 //ok(11+2*12) P0.4 - SPISS1, AD4
  40. #define LCD_D1_PIN 11 //ok(10+2*12) P0.5 - MOSI_1, AD5
  41. #define MUX_ADR0_PIN 12 //ok(5+2*12) P4.5 - ALE, SDA1
  42. #define LCD_D2_PIN 13 //ok(9+2*12) P0.6 - MISO_1, AD6
  43. #define LCD_D3_PIN 14 //ok(8+2*12) P0.7 - SPICLK1, AD7
  44.  
  45. //pin 15 - XTAL2 //(3+12) XTAL2
  46. //pin 16 - XTAL1 //(4+12) XTAL1
  47. //pin 17 - VSS //(5+12) VSS
  48. //pin 18 - LDO_CAP //(6+12) LDO_CAP (internnal voltage regulator CAP)
  49.  
  50. #define LCD_ENABLE_PIN 19 //ok(12+2*12) P4.1 - PWM1[2], T3EX
  51. #define LCD_RS_PIN 20 //ok(1+3*12) P0.3 - RTS0, AD3, RXD[2]
  52. // pin 21 not connected
  53. #define T_EXTERNAL_PIN 21
  54. #define SMPS_DISABLE_PIN 22 //ok(3+2*12) P2.7 - PWM7, AD15
  55. #define DISCHARGE_VALUE_PIN 23 //ok(8+12) P2.1 - PWM1[2], AD9
  56. #define SMPS_VALUE_BOOST_PIN 23 //ok(8+12)
  57. //[the same pin for charge and discharge: pin 23]
  58. #define SMPS_VALUE_BUCK_PIN 25 //ok(2+2*12)
  59. // pin 26 nc??
  60. // pin 27 nc??
  61. #define BUTTON_STOP_PIN 31 //ok(8) P3.2 - nINT0, STADC, T0EX
  62. #define BUTTON_DEC_PIN 29 //ok?(9) P3.3 - nINT1, MCLK, T1EX
  63. #define BUTTON_INC_PIN 30 //ok?(10) P3.4 - T0, SDA
  64. #define BUTTON_START_PIN 28 //ok(11) P3.5 - T1, SCL, CKO[2]
  65. #define BUZZER_PIN 32 //ok(12) P4.3 - PWM3[2]
  66. #define DISCHARGE_DISABLE_PIN 33 //ok(8+3*12) P1.1 - T3, AIN1, nWRH
  67. #define BALANCER1_LOAD_PIN 34 //ok(12+12) P4.0 - PWM0[2], T2EX
  68. #define BALANCER2_LOAD_PIN 35 //ok(10+12) P2.3 - PWM3[2], AD11
  69. //pin 36 not connected
  70. #define BALANCER3_LOAD_PIN 37 //ok(9+12) P2.2 - PWM2[2], AD10
  71. #define BALANCER4_LOAD_PIN 38 //ok(2+12) P3.7 - nRD
  72. #define BALANCER5_LOAD_PIN 39 //ok(1+12) P3.6 - nWR, CKO, ACMP0_O
  73. #define BALANCER6_LOAD_PIN 40 //ok(11+12) P2.4 - PWM4, AD12, SCL1[2]
  74.  
  75. //pin 41 - VDD //(5+3*12) VDD
  76. //pin 42 - AVDD //(6+3*12) AVDD
  77. #define V_IN_PIN 43 //ok(10+3*12) P1.3 - TXD1[2], AIN3
  78. #define OUTPUT_VOLTAGE_PLUS_PIN 44 //ok(2) P1.6 - MISO_0, AIN6, ACMP2_N
  79. #define OUTPUT_VOLTAGE_MINUS_PIN 45 //ok(1) P1.5 - MOSI_0, AIN5, ACMP0_P
  80. #define SMPS_CURRENT_PIN 46 //ok(11+3*12) P1.4 - SPISS0, AIN4, ACMP0_N
  81. #define DISCHARGE_CURRENT_PIN 47 //ok(3) P1.7 - SPICLK0, AIN7, ACMP2_P
  82. #define OUTPUT_DISABLE_PIN 48 //ok(7+12) P2.0 - PWM0[2], AD8
  83.  
  84.  
  85.  
  86. //virtual pin
  87. #define T_INTERNAL_PIN 3+128
  88.  
  89. //Multiplexer addresses:
  90. #define MADDR_V_BALANSER_BATT_MINUS 0 // GND
  91. #define MADDR_V_BALANSER1 6
  92. #define MADDR_V_BALANSER2 5
  93. #define MADDR_V_BALANSER3 4
  94. #define MADDR_V_BALANSER4 3
  95. #define MADDR_V_BALANSER5 2
  96. #define MADDR_V_BALANSER6 1
  97. #define MADDR_T_EXTERN 7 // GND
  98.  
  99.  
  100. #endif /* 4x6s50W_PINS_H_ */
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