1 signals are not completely routed. See the minsoc_par.unroutes file for a list of all unrouted signals.

WARNING:Par:100 - Design is not completely routed. There are 1 signals that are not
   completely routed in this design. See the "minsoc_par.unroutes" file for a list of
   all unrouted signals. Check for other warnings in your PAR report that might
   indicate why these nets are unroutable. These nets can also be evaluated
   in FPGA Editor by selecting "Unrouted Nets" in the List Window.

Total REAL time to PAR completion: 2 mins 25 secs
Total CPU time to PAR completion: 2 mins 21 secs

Peak Memory Usage:  205 MB

Placer: Placement generated during map.
Routing: Completed - errors found.

Number of error messages: 0
Number of warning messages: 4
Number of info messages: 1

Writing design to file minsoc_par.ncd



PAR done!
make: *** [minsoc_par.ncd] Error 30