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changes for spi sd card interface on raspberry pi

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  1. /*
  2.  *  linux/arch/arm/mach-bcm2708/bcm2708.c
  3.  *
  4.  *  Copyright (C) 2010 Broadcom
  5.  *
  6.  * This program is free software; you can redistribute it and/or modify
  7.  * it under the terms of the GNU General Public License as published by
  8.  * the Free Software Foundation; either version 2 of the License, or
  9.  * (at your option) any later version.
  10.  *
  11.  * This program is distributed in the hope that it will be useful,
  12.  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13.  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14.  * GNU General Public License for more details.
  15.  *
  16.  * You should have received a copy of the GNU General Public License
  17.  * along with this program; if not, write to the Free Software
  18.  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19.  */
  20.  
  21. #include <linux/init.h>
  22. #include <linux/device.h>
  23. #include <linux/dma-mapping.h>
  24. #include <linux/serial_8250.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/syscore_ops.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/amba/bus.h>
  29. #include <linux/amba/clcd.h>
  30. #include <linux/clockchips.h>
  31. #include <linux/cnt32_to_63.h>
  32. #include <linux/io.h>
  33. #include <linux/module.h>
  34. #include <linux/spi/spi.h>
  35. /* added begin */
  36. #include <linux/spi/spi_bitbang.h>
  37. #include <linux/gpio.h>
  38. /* added end */
  39. #include <linux/w1-gpio.h>
  40.  
  41. #include <linux/version.h>
  42. #include <linux/clkdev.h>
  43. #include <asm/system.h>
  44. #include <mach/hardware.h>
  45. #include <asm/irq.h>
  46. #include <linux/leds.h>
  47. #include <asm/mach-types.h>
  48. #include <linux/sched_clock.h>
  49.  
  50. #include <asm/mach/arch.h>
  51. #include <asm/mach/flash.h>
  52. #include <asm/mach/irq.h>
  53. #include <asm/mach/time.h>
  54. #include <asm/mach/map.h>
  55.  
  56. #include <mach/timex.h>
  57. #include <mach/dma.h>
  58. #include <mach/vcio.h>
  59. #include <mach/system.h>
  60.  
  61. #include <linux/delay.h>
  62.  
  63. #include "bcm2708.h"
  64. #include "armctrl.h"
  65. #include "clock.h"
  66.  
  67. #ifdef CONFIG_BCM_VC_CMA
  68. #include <linux/broadcom/vc_cma.h>
  69. #endif
  70.  
  71.  
  72. /* Effectively we have an IOMMU (ARM<->VideoCore map) that is set up to
  73.  * give us IO access only to 64Mbytes of physical memory (26 bits).  We could
  74.  * represent this window by setting our dmamasks to 26 bits but, in fact
  75.  * we're not going to use addresses outside this range (they're not in real
  76.  * memory) so we don't bother.
  77.  *
  78.  * In the future we might include code to use this IOMMU to remap other
  79.  * physical addresses onto VideoCore memory then the use of 32-bits would be
  80.  * more legitimate.
  81.  */
  82. #define DMA_MASK_BITS_COMMON 32
  83.  
  84. // use GPIO 4 for the one-wire GPIO pin, if enabled
  85. #define W1_GPIO 4
  86. // ensure one-wire GPIO pullup is disabled by default
  87. #define W1_PULLUP -1
  88.  
  89. /* command line parameters */
  90. static unsigned boardrev, serial;
  91. static unsigned uart_clock;
  92. static unsigned disk_led_gpio = 16;
  93. static unsigned disk_led_active_low = 1;
  94. static unsigned reboot_part = 0;
  95. static unsigned w1_gpio_pin = W1_GPIO;
  96. static unsigned w1_gpio_pullup = W1_PULLUP;
  97.  
  98. static void __init bcm2708_init_led(void);
  99.  
  100. void __init bcm2708_init_irq(void)
  101. {
  102.     armctrl_init(__io_address(ARMCTRL_IC_BASE), 0, 0, 0);
  103. }
  104.  
  105. static struct map_desc bcm2708_io_desc[] __initdata = {
  106.     {
  107.      .virtual = IO_ADDRESS(ARMCTRL_BASE),
  108.      .pfn = __phys_to_pfn(ARMCTRL_BASE),
  109.      .length = SZ_4K,
  110.      .type = MT_DEVICE},
  111.     {
  112.      .virtual = IO_ADDRESS(UART0_BASE),
  113.      .pfn = __phys_to_pfn(UART0_BASE),
  114.      .length = SZ_4K,
  115.      .type = MT_DEVICE},
  116.     {
  117.      .virtual = IO_ADDRESS(UART1_BASE),
  118.      .pfn = __phys_to_pfn(UART1_BASE),
  119.      .length = SZ_4K,
  120.      .type = MT_DEVICE},
  121.     {
  122.      .virtual = IO_ADDRESS(DMA_BASE),
  123.      .pfn = __phys_to_pfn(DMA_BASE),
  124.      .length = SZ_4K,
  125.      .type = MT_DEVICE},
  126.     {
  127.      .virtual = IO_ADDRESS(MCORE_BASE),
  128.      .pfn = __phys_to_pfn(MCORE_BASE),
  129.      .length = SZ_4K,
  130.      .type = MT_DEVICE},
  131.     {
  132.      .virtual = IO_ADDRESS(ST_BASE),
  133.      .pfn = __phys_to_pfn(ST_BASE),
  134.      .length = SZ_4K,
  135.      .type = MT_DEVICE},
  136.     {
  137.      .virtual = IO_ADDRESS(USB_BASE),
  138.      .pfn = __phys_to_pfn(USB_BASE),
  139.      .length = SZ_128K,
  140.      .type = MT_DEVICE},
  141.     {
  142.      .virtual = IO_ADDRESS(PM_BASE),
  143.      .pfn = __phys_to_pfn(PM_BASE),
  144.      .length = SZ_4K,
  145.      .type = MT_DEVICE},
  146.     {
  147.      .virtual = IO_ADDRESS(GPIO_BASE),
  148.      .pfn = __phys_to_pfn(GPIO_BASE),
  149.      .length = SZ_4K,
  150.      .type = MT_DEVICE}
  151. };
  152.  
  153. /* added begin */
  154.  
  155. static struct spi_gpio_platform_data spi_gpio_data = {
  156.        .sck = 11,
  157.        .mosi = 10,
  158.        .miso = 9,
  159.  
  160.        .num_chipselect = 2,
  161. };
  162.  
  163. static struct platform_device bcm2708_spi_gpio = {
  164.        .name      = "spi_gpio",
  165.        .id      = 0,
  166.        .dev      = {
  167.                .platform_data   = &spi_gpio_data,
  168.        },
  169.  
  170. };
  171.  
  172. static struct spi_board_info gpio_spi_devices[] = {
  173.        {
  174.                .modalias = "mmc_spi",
  175.                .max_speed_hz = 1000000,
  176.                .chip_select = 0,
  177.                .controller_data = (void *) 8,
  178.        },
  179. };
  180.  
  181. /* added end */
  182.  
  183. void __init bcm2708_map_io(void)
  184. {
  185.     iotable_init(bcm2708_io_desc, ARRAY_SIZE(bcm2708_io_desc));
  186. }
  187.  
  188. /* The STC is a free running counter that increments at the rate of 1MHz */
  189. #define STC_FREQ_HZ 1000000
  190.  
  191. static inline uint32_t timer_read(void)
  192. {
  193.     /* STC: a free running counter that increments at the rate of 1MHz */
  194.     return readl(__io_address(ST_BASE + 0x04));
  195. }
  196.  
  197. static unsigned long bcm2708_read_current_timer(void)
  198. {
  199.     return timer_read();
  200. }
  201.  
  202. static u32 notrace bcm2708_read_sched_clock(void)
  203. {
  204.     return timer_read();
  205. }
  206.  
  207. static cycle_t clksrc_read(struct clocksource *cs)
  208. {
  209.     return timer_read();
  210. }
  211.  
  212. static struct clocksource clocksource_stc = {
  213.     .name = "stc",
  214.     .rating = 300,
  215.     .read = clksrc_read,
  216.     .mask = CLOCKSOURCE_MASK(32),
  217.     .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  218. };
  219.  
  220. unsigned long frc_clock_ticks32(void)
  221. {
  222.     return timer_read();
  223. }
  224.  
  225. static void __init bcm2708_clocksource_init(void)
  226. {
  227.     if (clocksource_register_hz(&clocksource_stc, STC_FREQ_HZ)) {
  228.         printk(KERN_ERR "timer: failed to initialize clock "
  229.                "source %s\n", clocksource_stc.name);
  230.     }
  231. }
  232.  
  233.  
  234. /*
  235.  * These are fixed clocks.
  236.  */
  237. static struct clk ref24_clk = {
  238.     .rate = UART0_CLOCK,    /* The UART is clocked at 3MHz via APB_CLK */
  239. };
  240.  
  241. static struct clk osc_clk = {
  242. #ifdef CONFIG_ARCH_BCM2708_CHIPIT
  243.     .rate = 27000000,
  244. #else
  245.     .rate = 500000000,  /* ARM clock is set from the VideoCore booter */
  246. #endif
  247. };
  248.  
  249. /* warning - the USB needs a clock > 34MHz */
  250.  
  251. static struct clk sdhost_clk = {
  252. #ifdef CONFIG_ARCH_BCM2708_CHIPIT
  253.     .rate = 4000000,    /* 4MHz */
  254. #else
  255.     .rate = 250000000,  /* 250MHz */
  256. #endif
  257. };
  258.  
  259. static struct clk_lookup lookups[] = {
  260.     {           /* UART0 */
  261.      .dev_id = "dev:f1",
  262.      .clk = &ref24_clk,
  263.      },
  264.     {           /* USB */
  265.      .dev_id = "bcm2708_usb",
  266.      .clk = &osc_clk,
  267.      }, {   /* SPI */
  268.          .dev_id = "bcm2708_spi.0",
  269.          .clk = &sdhost_clk,
  270.      }, {   /* BSC0 */
  271.          .dev_id = "bcm2708_i2c.0",
  272.          .clk = &sdhost_clk,
  273.      }, {   /* BSC1 */
  274.          .dev_id = "bcm2708_i2c.1",
  275.          .clk = &sdhost_clk,
  276.      }
  277. };
  278.  
  279. #define UART0_IRQ   { IRQ_UART, 0 /*NO_IRQ*/ }
  280. #define UART0_DMA   { 15, 14 }
  281.  
  282. AMBA_DEVICE(uart0, "dev:f1", UART0, NULL);
  283.  
  284. static struct amba_device *amba_devs[] __initdata = {
  285.     &uart0_device,
  286. };
  287.  
  288. static struct resource bcm2708_dmaman_resources[] = {
  289.     {
  290.      .start = DMA_BASE,
  291.      .end = DMA_BASE + SZ_4K - 1,
  292.      .flags = IORESOURCE_MEM,
  293.      }
  294. };
  295.  
  296. static struct platform_device bcm2708_dmaman_device = {
  297.     .name = BCM_DMAMAN_DRIVER_NAME,
  298.     .id = 0,        /* first bcm2708_dma */
  299.     .resource = bcm2708_dmaman_resources,
  300.     .num_resources = ARRAY_SIZE(bcm2708_dmaman_resources),
  301. };
  302.  
  303. #if defined(CONFIG_W1_MASTER_GPIO) || defined(CONFIG_W1_MASTER_GPIO_MODULE)
  304. static struct w1_gpio_platform_data w1_gpio_pdata = {
  305.     .pin = W1_GPIO,
  306.         .ext_pullup_enable_pin = W1_PULLUP,
  307.     .is_open_drain = 0,
  308. };
  309.  
  310. static struct platform_device w1_device = {
  311.     .name = "w1-gpio",
  312.     .id = -1,
  313.     .dev.platform_data = &w1_gpio_pdata,
  314. };
  315. #endif
  316.  
  317. static u64 fb_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON);
  318.  
  319. static struct platform_device bcm2708_fb_device = {
  320.     .name = "bcm2708_fb",
  321.     .id = -1,       /* only one bcm2708_fb */
  322.     .resource = NULL,
  323.     .num_resources = 0,
  324.     .dev = {
  325.         .dma_mask = &fb_dmamask,
  326.         .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON),
  327.         },
  328. };
  329.  
  330. static struct plat_serial8250_port bcm2708_uart1_platform_data[] = {
  331.     {
  332.      .mapbase = UART1_BASE + 0x40,
  333.      .irq = IRQ_AUX,
  334.      .uartclk = 125000000,
  335.      .regshift = 2,
  336.      .iotype = UPIO_MEM,
  337.      .flags = UPF_FIXED_TYPE | UPF_IOREMAP | UPF_SKIP_TEST,
  338.      .type = PORT_8250,
  339.      },
  340.     {},
  341. };
  342.  
  343. static struct platform_device bcm2708_uart1_device = {
  344.     .name = "serial8250",
  345.     .id = PLAT8250_DEV_PLATFORM,
  346.     .dev = {
  347.         .platform_data = bcm2708_uart1_platform_data,
  348.         },
  349. };
  350.  
  351. static struct resource bcm2708_usb_resources[] = {
  352.     [0] = {
  353.            .start = USB_BASE,
  354.            .end = USB_BASE + SZ_128K - 1,
  355.            .flags = IORESOURCE_MEM,
  356.            },
  357.     [1] = {
  358.         .start = MPHI_BASE,
  359.         .end = MPHI_BASE + SZ_4K - 1,
  360.         .flags = IORESOURCE_MEM,
  361.           },
  362.     [2] = {
  363.            .start = IRQ_HOSTPORT,
  364.            .end = IRQ_HOSTPORT,
  365.            .flags = IORESOURCE_IRQ,
  366.            },
  367.     [3] = {
  368.             .start = IRQ_USB,
  369.             .end = IRQ_USB,
  370.             .flags = IORESOURCE_IRQ,
  371.             },
  372. };
  373.  
  374.  
  375. static u64 usb_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON);
  376.  
  377. static struct platform_device bcm2708_usb_device = {
  378.     .name = "bcm2708_usb",
  379.     .id = -1,       /* only one bcm2708_usb */
  380.     .resource = bcm2708_usb_resources,
  381.     .num_resources = ARRAY_SIZE(bcm2708_usb_resources),
  382.     .dev = {
  383.         .dma_mask = &usb_dmamask,
  384.         .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON),
  385.         },
  386. };
  387.  
  388. static struct resource bcm2708_vcio_resources[] = {
  389.     [0] = {         /* mailbox/semaphore/doorbell access */
  390.            .start = MCORE_BASE,
  391.            .end = MCORE_BASE + SZ_4K - 1,
  392.            .flags = IORESOURCE_MEM,
  393.            },
  394. };
  395.  
  396. static u64 vcio_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON);
  397.  
  398. static struct platform_device bcm2708_vcio_device = {
  399.     .name = BCM_VCIO_DRIVER_NAME,
  400.     .id = -1,       /* only one VideoCore I/O area */
  401.     .resource = bcm2708_vcio_resources,
  402.     .num_resources = ARRAY_SIZE(bcm2708_vcio_resources),
  403.     .dev = {
  404.         .dma_mask = &vcio_dmamask,
  405.         .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON),
  406.         },
  407. };
  408.  
  409. #ifdef CONFIG_BCM2708_GPIO
  410. #define BCM_GPIO_DRIVER_NAME "bcm2708_gpio"
  411.  
  412. static struct resource bcm2708_gpio_resources[] = {
  413.     [0] = {         /* general purpose I/O */
  414.            .start = GPIO_BASE,
  415.            .end = GPIO_BASE + SZ_4K - 1,
  416.            .flags = IORESOURCE_MEM,
  417.            },
  418. };
  419.  
  420. static u64 gpio_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON);
  421.  
  422. static struct platform_device bcm2708_gpio_device = {
  423.     .name = BCM_GPIO_DRIVER_NAME,
  424.     .id = -1,       /* only one VideoCore I/O area */
  425.     .resource = bcm2708_gpio_resources,
  426.     .num_resources = ARRAY_SIZE(bcm2708_gpio_resources),
  427.     .dev = {
  428.         .dma_mask = &gpio_dmamask,
  429.         .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON),
  430.         },
  431. };
  432. #endif
  433.  
  434. static struct resource bcm2708_systemtimer_resources[] = {
  435.     [0] = {         /* system timer access */
  436.            .start = ST_BASE,
  437.            .end = ST_BASE + SZ_4K - 1,
  438.            .flags = IORESOURCE_MEM,
  439.            },
  440.     {
  441.      .start = IRQ_TIMER3,
  442.      .end = IRQ_TIMER3,
  443.      .flags = IORESOURCE_IRQ,
  444.      }
  445.  
  446. };
  447.  
  448. static u64 systemtimer_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON);
  449.  
  450. static struct platform_device bcm2708_systemtimer_device = {
  451.     .name = "bcm2708_systemtimer",
  452.     .id = -1,       /* only one VideoCore I/O area */
  453.     .resource = bcm2708_systemtimer_resources,
  454.     .num_resources = ARRAY_SIZE(bcm2708_systemtimer_resources),
  455.     .dev = {
  456.         .dma_mask = &systemtimer_dmamask,
  457.         .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON),
  458.         },
  459. };
  460.  
  461. #ifdef CONFIG_MMC_SDHCI_BCM2708 /* Arasan emmc SD */
  462. static struct resource bcm2708_emmc_resources[] = {
  463.     [0] = {
  464.            .start = EMMC_BASE,
  465.            .end = EMMC_BASE + SZ_256 - 1,   /* we only need this area */
  466.            /* the memory map actually makes SZ_4K available  */
  467.            .flags = IORESOURCE_MEM,
  468.            },
  469.     [1] = {
  470.            .start = IRQ_ARASANSDIO,
  471.            .end = IRQ_ARASANSDIO,
  472.            .flags = IORESOURCE_IRQ,
  473.            },
  474. };
  475.  
  476. static u64 bcm2708_emmc_dmamask = 0xffffffffUL;
  477.  
  478. struct platform_device bcm2708_emmc_device = {
  479.     .name = "bcm2708_sdhci",
  480.     .id = 0,
  481.     .num_resources = ARRAY_SIZE(bcm2708_emmc_resources),
  482.     .resource = bcm2708_emmc_resources,
  483.     .dev = {
  484.         .dma_mask = &bcm2708_emmc_dmamask,
  485.         .coherent_dma_mask = 0xffffffffUL},
  486. };
  487. #endif /* CONFIG_MMC_SDHCI_BCM2708 */
  488.  
  489. static struct resource bcm2708_powerman_resources[] = {
  490.     [0] = {
  491.            .start = PM_BASE,
  492.            .end = PM_BASE + SZ_256 - 1,
  493.            .flags = IORESOURCE_MEM,
  494.            },
  495. };
  496.  
  497. static u64 powerman_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON);
  498.  
  499. struct platform_device bcm2708_powerman_device = {
  500.     .name = "bcm2708_powerman",
  501.     .id = 0,
  502.     .num_resources = ARRAY_SIZE(bcm2708_powerman_resources),
  503.     .resource = bcm2708_powerman_resources,
  504.     .dev = {
  505.         .dma_mask = &powerman_dmamask,
  506.         .coherent_dma_mask = 0xffffffffUL},
  507. };
  508.  
  509.  
  510. static struct platform_device bcm2708_alsa_devices[] = {
  511.     [0] = {
  512.            .name = "bcm2835_AUD0",
  513.            .id = 0,     /* first audio device */
  514.            .resource = 0,
  515.            .num_resources = 0,
  516.            },
  517.     [1] = {
  518.            .name = "bcm2835_AUD1",
  519.            .id = 1,     /* second audio device */
  520.            .resource = 0,
  521.            .num_resources = 0,
  522.            },
  523.     [2] = {
  524.            .name = "bcm2835_AUD2",
  525.            .id = 2,     /* third audio device */
  526.            .resource = 0,
  527.            .num_resources = 0,
  528.            },
  529.     [3] = {
  530.            .name = "bcm2835_AUD3",
  531.            .id = 3,     /* forth audio device */
  532.            .resource = 0,
  533.            .num_resources = 0,
  534.            },
  535.     [4] = {
  536.            .name = "bcm2835_AUD4",
  537.            .id = 4,     /* fifth audio device */
  538.            .resource = 0,
  539.            .num_resources = 0,
  540.            },
  541.     [5] = {
  542.            .name = "bcm2835_AUD5",
  543.            .id = 5,     /* sixth audio device */
  544.            .resource = 0,
  545.            .num_resources = 0,
  546.            },
  547.     [6] = {
  548.            .name = "bcm2835_AUD6",
  549.            .id = 6,     /* seventh audio device */
  550.            .resource = 0,
  551.            .num_resources = 0,
  552.            },
  553.     [7] = {
  554.            .name = "bcm2835_AUD7",
  555.            .id = 7,     /* eighth audio device */
  556.            .resource = 0,
  557.            .num_resources = 0,
  558.            },
  559. };
  560.  
  561. static struct resource bcm2708_spi_resources[] = {
  562.     {
  563.         .start = SPI0_BASE,
  564.         .end = SPI0_BASE + SZ_256 - 1,
  565.         .flags = IORESOURCE_MEM,
  566.     }, {
  567.         .start = IRQ_SPI,
  568.         .end = IRQ_SPI,
  569.         .flags = IORESOURCE_IRQ,
  570.     }
  571. };
  572.  
  573.  
  574. static u64 bcm2708_spi_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON);
  575. static struct platform_device bcm2708_spi_device = {
  576.     .name = "bcm2708_spi",
  577.     .id = 0,
  578.     .num_resources = ARRAY_SIZE(bcm2708_spi_resources),
  579.     .resource = bcm2708_spi_resources,
  580.     .dev = {
  581.         .dma_mask = &bcm2708_spi_dmamask,
  582.         .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON)},
  583. };
  584.  
  585. #ifdef CONFIG_BCM2708_SPIDEV
  586. static struct spi_board_info bcm2708_spi_devices[] = {
  587. #ifdef CONFIG_SPI_SPIDEV
  588.     {
  589.         .modalias = "spidev",
  590.         .max_speed_hz = 500000,
  591.         .bus_num = 0,
  592.         .chip_select = 0,
  593.         .mode = SPI_MODE_0,
  594.     }, {
  595.         .modalias = "spidev",
  596.         .max_speed_hz = 500000,
  597.         .bus_num = 0,
  598.         .chip_select = 1,
  599.         .mode = SPI_MODE_0,
  600.     }
  601. #endif
  602. };
  603. #endif
  604.  
  605. static struct resource bcm2708_bsc0_resources[] = {
  606.     {
  607.         .start = BSC0_BASE,
  608.         .end = BSC0_BASE + SZ_256 - 1,
  609.         .flags = IORESOURCE_MEM,
  610.     }, {
  611.         .start = INTERRUPT_I2C,
  612.         .end = INTERRUPT_I2C,
  613.         .flags = IORESOURCE_IRQ,
  614.     }
  615. };
  616.  
  617. static struct platform_device bcm2708_bsc0_device = {
  618.     .name = "bcm2708_i2c",
  619.     .id = 0,
  620.     .num_resources = ARRAY_SIZE(bcm2708_bsc0_resources),
  621.     .resource = bcm2708_bsc0_resources,
  622. };
  623.  
  624.  
  625. static struct resource bcm2708_bsc1_resources[] = {
  626.     {
  627.         .start = BSC1_BASE,
  628.         .end = BSC1_BASE + SZ_256 - 1,
  629.         .flags = IORESOURCE_MEM,
  630.     }, {
  631.         .start = INTERRUPT_I2C,
  632.         .end = INTERRUPT_I2C,
  633.         .flags = IORESOURCE_IRQ,
  634.     }
  635. };
  636.  
  637. static struct platform_device bcm2708_bsc1_device = {
  638.     .name = "bcm2708_i2c",
  639.     .id = 1,
  640.     .num_resources = ARRAY_SIZE(bcm2708_bsc1_resources),
  641.     .resource = bcm2708_bsc1_resources,
  642. };
  643.  
  644. static struct platform_device bcm2835_hwmon_device = {
  645.     .name = "bcm2835_hwmon",
  646. };
  647.  
  648. static struct platform_device bcm2835_thermal_device = {
  649.     .name = "bcm2835_thermal",
  650. };
  651.  
  652. #ifdef CONFIG_SND_BCM2708_SOC_I2S_MODULE
  653. static struct resource bcm2708_i2s_resources[] = {
  654.     {
  655.         .start = I2S_BASE,
  656.         .end = I2S_BASE + 0x20,
  657.         .flags = IORESOURCE_MEM,
  658.     },
  659.         {
  660.         .start = PCM_CLOCK_BASE,
  661.         .end = PCM_CLOCK_BASE + 0x02,
  662.         .flags = IORESOURCE_MEM,
  663.     }
  664. };
  665.  
  666. static struct platform_device bcm2708_i2s_device = {
  667.     .name = "bcm2708-i2s",
  668.     .id = 0,
  669.     .num_resources = ARRAY_SIZE(bcm2708_i2s_resources),
  670.     .resource = bcm2708_i2s_resources,
  671. };
  672. #endif
  673.  
  674. #if defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) || defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC_MODULE)
  675. static struct platform_device snd_hifiberry_dac_device = {
  676.         .name = "snd-hifiberry-dac",
  677.         .id = 0,
  678.         .num_resources = 0,
  679. };
  680.  
  681. static struct platform_device snd_pcm5102a_codec_device = {
  682.         .name = "pcm5102a-codec",
  683.         .id = -1,
  684.         .num_resources = 0,
  685. };
  686. #endif
  687.  
  688. #if defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI) || defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI_MODULE)
  689. static struct platform_device snd_hifiberry_digi_device = {
  690.         .name = "snd-hifiberry-digi",
  691.         .id = 0,
  692.         .num_resources = 0,
  693. };
  694.  
  695. static struct i2c_board_info __initdata snd_wm8804_i2c_devices[] = {
  696.         {
  697.                 I2C_BOARD_INFO("wm8804", 0x3b)
  698.         },
  699. };
  700.  
  701. #endif
  702.  
  703. #if defined(CONFIG_SND_BCM2708_SOC_RPI_DAC) || defined(CONFIG_SND_BCM2708_SOC_RPI_DAC_MODULE)
  704. static struct platform_device snd_rpi_dac_device = {
  705.         .name = "snd-rpi-dac",
  706.         .id = 0,
  707.         .num_resources = 0,
  708. };
  709.  
  710. static struct platform_device snd_pcm1794a_codec_device = {
  711.         .name = "pcm1794a-codec",
  712.         .id = -1,
  713.         .num_resources = 0,
  714. };
  715. #endif
  716.  
  717.  
  718. #if defined(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) || defined(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC_MODULE)
  719. static struct platform_device snd_rpi_iqaudio_dac_device = {
  720.         .name = "snd-rpi-iqaudio-dac",
  721.         .id = 0,
  722.         .num_resources = 0,
  723. };
  724.  
  725. // Use the actual device name rather than generic driver name
  726. static struct i2c_board_info __initdata snd_pcm512x_i2c_devices[] = {
  727.     {
  728.         I2C_BOARD_INFO("pcm5122", 0x4c)
  729.     },
  730. };
  731. #endif
  732.  
  733. int __init bcm_register_device(struct platform_device *pdev)
  734. {
  735.     int ret;
  736.  
  737.     ret = platform_device_register(pdev);
  738.     if (ret)
  739.         pr_debug("Unable to register platform device '%s': %d\n",
  740.              pdev->name, ret);
  741.  
  742.     return ret;
  743. }
  744.  
  745. int calc_rsts(int partition)
  746. {
  747.     return PM_PASSWORD |
  748.         ((partition & (1 << 0))  << 0) |
  749.         ((partition & (1 << 1))  << 1) |
  750.         ((partition & (1 << 2))  << 2) |
  751.         ((partition & (1 << 3))  << 3) |
  752.         ((partition & (1 << 4))  << 4) |
  753.         ((partition & (1 << 5))  << 5);
  754. }
  755.  
  756. static void bcm2708_restart(enum reboot_mode mode, const char *cmd)
  757. {
  758.     extern char bcm2708_reboot_mode;
  759.     uint32_t pm_rstc, pm_wdog;
  760.     uint32_t timeout = 10;
  761.     uint32_t pm_rsts = 0;
  762.  
  763.     if(bcm2708_reboot_mode == 'q')
  764.     {
  765.         // NOOBS < 1.3 booting with reboot=q
  766.         pm_rsts = readl(__io_address(PM_RSTS));
  767.         pm_rsts = PM_PASSWORD | pm_rsts | PM_RSTS_HADWRQ_SET;
  768.     }
  769.     else if(bcm2708_reboot_mode == 'p')
  770.     {
  771.         // NOOBS < 1.3 halting
  772.         pm_rsts = readl(__io_address(PM_RSTS));
  773.         pm_rsts = PM_PASSWORD | pm_rsts | PM_RSTS_HADWRH_SET;
  774.     }
  775.     else
  776.     {
  777.         pm_rsts = calc_rsts(reboot_part);
  778.     }
  779.  
  780.     writel(pm_rsts, __io_address(PM_RSTS));
  781.  
  782.     /* Setup watchdog for reset */
  783.     pm_rstc = readl(__io_address(PM_RSTC));
  784.  
  785.     pm_wdog = PM_PASSWORD | (timeout & PM_WDOG_TIME_SET); // watchdog timer = timer clock / 16; need password (31:16) + value (11:0)
  786.     pm_rstc = PM_PASSWORD | (pm_rstc & PM_RSTC_WRCFG_CLR) | PM_RSTC_WRCFG_FULL_RESET;
  787.  
  788.     writel(pm_wdog, __io_address(PM_WDOG));
  789.     writel(pm_rstc, __io_address(PM_RSTC));
  790. }
  791.  
  792. /* We can't really power off, but if we do the normal reset scheme, and indicate to bootcode.bin not to reboot, then most of the chip will be powered off */
  793. static void bcm2708_power_off(void)
  794. {
  795.     extern char bcm2708_reboot_mode;
  796.     if(bcm2708_reboot_mode == 'q')
  797.     {
  798.         // NOOBS < v1.3
  799.         bcm2708_restart('p', "");
  800.     }
  801.     else
  802.     {
  803.         /* partition 63 is special code for HALT the bootloader knows not to boot*/
  804.         reboot_part = 63;
  805.         /* continue with normal reset mechanism */
  806.         bcm2708_restart(0, "");
  807.     }
  808. }
  809.  
  810. void __init bcm2708_init(void)
  811. {
  812.     int i;
  813.  
  814. #if defined(CONFIG_BCM_VC_CMA)
  815.     vc_cma_early_init();
  816. #endif
  817.     printk("bcm2708.uart_clock = %d\n", uart_clock);
  818.     pm_power_off = bcm2708_power_off;
  819.  
  820.     if (uart_clock)
  821.         lookups[0].clk->rate = uart_clock;
  822.  
  823.     for (i = 0; i < ARRAY_SIZE(lookups); i++)
  824.         clkdev_add(&lookups[i]);
  825.  
  826.     bcm_register_device(&bcm2708_dmaman_device);
  827.     bcm_register_device(&bcm2708_vcio_device);
  828. #ifdef CONFIG_BCM2708_GPIO
  829.     bcm_register_device(&bcm2708_gpio_device);
  830. #endif
  831. #if defined(CONFIG_W1_MASTER_GPIO) || defined(CONFIG_W1_MASTER_GPIO_MODULE)
  832.     w1_gpio_pdata.pin = w1_gpio_pin;
  833.     w1_gpio_pdata.ext_pullup_enable_pin = w1_gpio_pullup;
  834.     platform_device_register(&w1_device);
  835. #endif
  836.     bcm_register_device(&bcm2708_systemtimer_device);
  837.     bcm_register_device(&bcm2708_fb_device);
  838.     bcm_register_device(&bcm2708_usb_device);
  839.     bcm_register_device(&bcm2708_uart1_device);
  840.     bcm_register_device(&bcm2708_powerman_device);
  841.  
  842. #ifdef CONFIG_MMC_SDHCI_BCM2708
  843.     bcm_register_device(&bcm2708_emmc_device);
  844. #endif
  845.  
  846. /* added begin */
  847. bcm_register_device(&bcm2708_spi_gpio);
  848.        spi_register_board_info(gpio_spi_devices,
  849.                        ARRAY_SIZE(gpio_spi_devices));
  850. /* added end */
  851.  
  852.     bcm2708_init_led();
  853.     for (i = 0; i < ARRAY_SIZE(bcm2708_alsa_devices); i++)
  854.         bcm_register_device(&bcm2708_alsa_devices[i]);
  855.  
  856.     bcm_register_device(&bcm2708_spi_device);
  857.     bcm_register_device(&bcm2708_bsc0_device);
  858.     bcm_register_device(&bcm2708_bsc1_device);
  859.  
  860.     bcm_register_device(&bcm2835_hwmon_device);
  861.     bcm_register_device(&bcm2835_thermal_device);
  862.  
  863. #ifdef CONFIG_SND_BCM2708_SOC_I2S_MODULE
  864.     bcm_register_device(&bcm2708_i2s_device);
  865. #endif
  866.  
  867. #if defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) || defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC_MODULE)
  868.         bcm_register_device(&snd_hifiberry_dac_device);
  869.         bcm_register_device(&snd_pcm5102a_codec_device);
  870. #endif
  871.  
  872. #if defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI) || defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI_MODULE)
  873.         bcm_register_device(&snd_hifiberry_digi_device);
  874.         i2c_register_board_info(1, snd_wm8804_i2c_devices, ARRAY_SIZE(snd_wm8804_i2c_devices));
  875. #endif
  876.  
  877. #if defined(CONFIG_SND_BCM2708_SOC_RPI_DAC) || defined(CONFIG_SND_BCM2708_SOC_RPI_DAC_MODULE)
  878.         bcm_register_device(&snd_rpi_dac_device);
  879.         bcm_register_device(&snd_pcm1794a_codec_device);
  880. #endif
  881.  
  882. #if defined(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) || defined(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC_MODULE)
  883.         bcm_register_device(&snd_rpi_iqaudio_dac_device);
  884.         i2c_register_board_info(1, snd_pcm512x_i2c_devices, ARRAY_SIZE(snd_pcm512x_i2c_devices));
  885. #endif
  886.  
  887.  
  888.     for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
  889.         struct amba_device *d = amba_devs[i];
  890.         amba_device_register(d, &iomem_resource);
  891.     }
  892.     system_rev = boardrev;
  893.     system_serial_low = serial;
  894.  
  895. #ifdef CONFIG_BCM2708_SPIDEV
  896.     spi_register_board_info(bcm2708_spi_devices,
  897.             ARRAY_SIZE(bcm2708_spi_devices));
  898. #endif
  899. }
  900.  
  901. static void timer_set_mode(enum clock_event_mode mode,
  902.                struct clock_event_device *clk)
  903. {
  904.     switch (mode) {
  905.     case CLOCK_EVT_MODE_ONESHOT: /* Leave the timer disabled, .set_next_event will enable it */
  906.     case CLOCK_EVT_MODE_SHUTDOWN:
  907.         break;
  908.     case CLOCK_EVT_MODE_PERIODIC:
  909.  
  910.     case CLOCK_EVT_MODE_UNUSED:
  911.     case CLOCK_EVT_MODE_RESUME:
  912.  
  913.     default:
  914.         printk(KERN_ERR "timer_set_mode: unhandled mode:%d\n",
  915.                (int)mode);
  916.         break;
  917.     }
  918.  
  919. }
  920.  
  921. static int timer_set_next_event(unsigned long cycles,
  922.                 struct clock_event_device *unused)
  923. {
  924.     unsigned long stc;
  925.     do {
  926.         stc = readl(__io_address(ST_BASE + 0x04));
  927.         /* We could take a FIQ here, which may push ST above STC3 */
  928.         writel(stc + cycles, __io_address(ST_BASE + 0x18));
  929.     } while ((signed long) cycles >= 0 &&
  930.                 (signed long) (readl(__io_address(ST_BASE + 0x04)) - stc)
  931.                 >= (signed long) cycles);
  932.     return 0;
  933. }
  934.  
  935. static struct clock_event_device timer0_clockevent = {
  936.     .name = "timer0",
  937.     .shift = 32,
  938.     .features = CLOCK_EVT_FEAT_ONESHOT,
  939.     .set_mode = timer_set_mode,
  940.     .set_next_event = timer_set_next_event,
  941. };
  942.  
  943. /*
  944.  * IRQ handler for the timer
  945.  */
  946. static irqreturn_t bcm2708_timer_interrupt(int irq, void *dev_id)
  947. {
  948.     struct clock_event_device *evt = &timer0_clockevent;
  949.  
  950.     writel(1 << 3, __io_address(ST_BASE + 0x00));   /* stcs clear timer int */
  951.  
  952.     evt->event_handler(evt);
  953.  
  954.     return IRQ_HANDLED;
  955. }
  956.  
  957. static struct irqaction bcm2708_timer_irq = {
  958.     .name = "BCM2708 Timer Tick",
  959.     .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
  960.     .handler = bcm2708_timer_interrupt,
  961. };
  962.  
  963. /*
  964.  * Set up timer interrupt, and return the current time in seconds.
  965.  */
  966.  
  967. static struct delay_timer bcm2708_delay_timer = {
  968.     .read_current_timer = bcm2708_read_current_timer,
  969.     .freq = STC_FREQ_HZ,
  970. };
  971.  
  972. static void __init bcm2708_timer_init(void)
  973. {
  974.     /* init high res timer */
  975.     bcm2708_clocksource_init();
  976.  
  977.     /*
  978.      * Initialise to a known state (all timers off)
  979.      */
  980.     writel(0, __io_address(ARM_T_CONTROL));
  981.     /*
  982.      * Make irqs happen for the system timer
  983.      */
  984.     setup_irq(IRQ_TIMER3, &bcm2708_timer_irq);
  985.  
  986.     setup_sched_clock(bcm2708_read_sched_clock, 32, STC_FREQ_HZ);
  987.  
  988.     timer0_clockevent.mult =
  989.         div_sc(STC_FREQ_HZ, NSEC_PER_SEC, timer0_clockevent.shift);
  990.     timer0_clockevent.max_delta_ns =
  991.         clockevent_delta2ns(0xffffffff, &timer0_clockevent);
  992.     timer0_clockevent.min_delta_ns =
  993.         clockevent_delta2ns(0xf, &timer0_clockevent);
  994.  
  995.     timer0_clockevent.cpumask = cpumask_of(0);
  996.     clockevents_register_device(&timer0_clockevent);
  997.  
  998.     register_current_timer_delay(&bcm2708_delay_timer);
  999. }
  1000.  
  1001. #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
  1002. #include <linux/leds.h>
  1003.  
  1004. static struct gpio_led bcm2708_leds[] = {
  1005.     [0] = {
  1006.            .gpio = 16,
  1007.            .name = "led0",
  1008.            .default_trigger = "mmc0",
  1009.            .active_low = 1,
  1010.            },
  1011. };
  1012.  
  1013. static struct gpio_led_platform_data bcm2708_led_pdata = {
  1014.     .num_leds = ARRAY_SIZE(bcm2708_leds),
  1015.     .leds = bcm2708_leds,
  1016. };
  1017.  
  1018. static struct platform_device bcm2708_led_device = {
  1019.     .name = "leds-gpio",
  1020.     .id = -1,
  1021.     .dev = {
  1022.         .platform_data = &bcm2708_led_pdata,
  1023.         },
  1024. };
  1025.  
  1026. static void __init bcm2708_init_led(void)
  1027. {
  1028.   bcm2708_leds[0].gpio = disk_led_gpio;
  1029.   bcm2708_leds[0].active_low = disk_led_active_low;
  1030.   platform_device_register(&bcm2708_led_device);
  1031. }
  1032. #else
  1033. static inline void bcm2708_init_led(void)
  1034. {
  1035. }
  1036. #endif
  1037.  
  1038. void __init bcm2708_init_early(void)
  1039. {
  1040.     /*
  1041.      * Some devices allocate their coherent buffers from atomic
  1042.      * context. Increase size of atomic coherent pool to make sure such
  1043.      * the allocations won't fail.
  1044.      */
  1045.     init_dma_coherent_pool_size(SZ_4M);
  1046. }
  1047.  
  1048. static void __init board_reserve(void)
  1049. {
  1050. #if defined(CONFIG_BCM_VC_CMA)
  1051.     vc_cma_reserve();
  1052. #endif
  1053. }
  1054.  
  1055. MACHINE_START(BCM2708, "BCM2708")
  1056.     /* Maintainer: Broadcom Europe Ltd. */
  1057.     .map_io = bcm2708_map_io,
  1058.     .init_irq = bcm2708_init_irq,
  1059.     .init_time = bcm2708_timer_init,
  1060.     .init_machine = bcm2708_init,
  1061.     .init_early = bcm2708_init_early,
  1062.     .reserve = board_reserve,
  1063.     .restart    = bcm2708_restart,
  1064. MACHINE_END
  1065.  
  1066. module_param(boardrev, uint, 0644);
  1067. module_param(serial, uint, 0644);
  1068. module_param(uart_clock, uint, 0644);
  1069. module_param(disk_led_gpio, uint, 0644);
  1070. module_param(disk_led_active_low, uint, 0644);
  1071. module_param(reboot_part, uint, 0644);
  1072. module_param(w1_gpio_pin, uint, 0644);
  1073. module_param(w1_gpio_pullup, uint, 0644);
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