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- #ifndef NRF_H_
- #define NRF_H_
- #include "stm32l1xx_hal.h"
- volatile uint8_t mode;
- #define RX_MODE 1
- #define TX_MODE 0
- /* Registers */
- #define NRF_CONFIG 0x00
- #define NRF_EN_AA 0x01
- #define NRF_EN_RXADDR 0x02
- #define NRF_SETUP_AW 0x03
- #define NRF_SETUP_RETR 0x04
- #define NRF_RF_CH 0x05
- #define NRF_RF_SETUP 0x06
- #define NRF_STATUS 0x07
- #define NRF_OBSERVE_TX 0x08
- #define NRF_CD 0x09
- #define NRF_RX_ADDR_P0 0x0A
- #define NRF_RX_ADDR_P1 0x0B
- #define NRF_RX_ADDR_P2 0x0C
- #define NRF_RX_ADDR_P3 0x0D
- #define NRF_RX_ADDR_P4 0x0E
- #define NRF_RX_ADDR_P5 0x0F
- #define NRF_TX_ADDR 0x10
- #define NRF_RX_PW_P0 0x11
- #define NRF_RX_PW_P1 0x12
- #define NRF_RX_PW_P2 0x13
- #define NRF_RX_PW_P3 0x14
- #define NRF_RX_PW_P4 0x15
- #define NRF_RX_PW_P5 0x16
- #define NRF_FIFO_STATUS 0x17
- #define NRF_DYNPD 0x1C
- #define NRF_FEATURE 0x1D
- /* Commands */
- #define NRF_CMD_R_REGISTER 0x00
- #define NRF_CMD_W_REGISTER 0x20
- #define NRF_CMD_R_RX_PAYLOAD 0x61
- #define NRF_CMD_W_TX_PAYLOAD 0xA0
- #define NRF_CMD_FLUSH_TX 0xE1
- #define NRF_CMD_FLUSH_RX 0xE2
- #define NRF_CMD_REUSE_TX_PL 0xE3
- #define NRF_CMD_ACTIVATE 0x50
- #define NRF_CMD_R_RX_PL_WID 0x60
- #define NRF_CMD_W_ACK_PAYLOAD 0xA8
- #define NRF_CMD_W_TX_PAYLOAD_NOACK 0xB0
- #define NRF_CMD_NOP 0xFF
- #define NRF_SPI_TIMEOUT 100000
- typedef enum{
- NRF_DATA_RATE_250KBPS=1,
- NRF_DATA_RATE_1MBPS=0,
- NRF_DATA_RATE_2MBPS=2
- } NRF_DATA_RATE;
- typedef enum{
- NRF_TX_PWR_M18dBm=0,
- NRF_TX_PWR_M12dBm=1,
- NRF_TX_PWR_M6dBm=2,
- NRF_TX_PWR_0dBm=3
- } NRF_TX_PWR;
- typedef enum{
- NRF_ADDR_WIDTH_3=1,
- NRF_ADDR_WIDTH_4=2,
- NRF_ADDR_WIDTH_5=3
- } NRF_ADDR_WIDTH;
- typedef enum{
- NRF_CRC_WIDTH_1B=0,
- NRF_CRC_WIDTH_2B=1
- } NRF_CRC_WIDTH;
- typedef enum{
- NRF_STATE_RX=1,
- NRF_STATE_TX=0
- } NRF_TXRX_STATE;
- typedef enum{
- NRF_OK,
- NRF_ERROR
- } NRF_RESULT;
- #define NRF_CS_ENABLE HAL_GPIO_WritePin(GPIOB, GPIO_PIN_6, GPIO_PIN_RESET)
- #define NRF_CS_DISABLE HAL_GPIO_WritePin(GPIOB, GPIO_PIN_6, GPIO_PIN_SET)
- #define NRF_CE_ENABLE HAL_GPIO_WritePin(GPIOC, GPIO_PIN_7, GPIO_PIN_SET)
- #define NRF_CE_DISABLE HAL_GPIO_WritePin(GPIOC, GPIO_PIN_7, GPIO_PIN_RESET)
- SPI_HandleTypeDef *nrf_spi;
- UART_HandleTypeDef *nrf_uart;
- void NRF_Init(SPI_HandleTypeDef *spi, UART_HandleTypeDef* uart)
- {
- nrf_spi = spi;
- nrf_uart = uart;
- }
- NRF_RESULT NRF_SendCommand(uint8_t cmd, uint8_t* tx, uint8_t* rx,
- uint8_t len) {
- uint8_t myTX[len + 1];
- uint8_t myRX[len + 1];
- myTX[0] = cmd;
- int i = 0;
- for (i = 0; i < len; i++) {
- myTX[1 + i] = tx[i];
- myRX[i] = 0;
- }
- NRF_CS_ENABLE;
- if (HAL_SPI_TransmitReceive(nrf_spi, myTX, myRX, 1 + len, NRF_SPI_TIMEOUT)
- != HAL_OK) {
- return NRF_ERROR;
- }
- for (i = 0; i < len; i++) {
- rx[i] = myRX[1 + i];
- }
- NRF_CS_DISABLE;;
- return NRF_OK;
- }
- NRF_RESULT NRF_ReadRegister(uint8_t reg, uint8_t* data) {
- uint8_t tx = 0;
- if (NRF_SendCommand(NRF_CMD_R_REGISTER | reg, &tx, data, 1) != NRF_OK) {
- return NRF_ERROR;
- }
- return NRF_OK;
- }
- NRF_RESULT NRF_WriteRegister(uint8_t reg, uint8_t* data) {
- uint8_t rx = 0;
- if (NRF_SendCommand(NRF_CMD_W_REGISTER | reg, data, &rx, 1) != NRF_OK) {
- return NRF_ERROR;
- }
- return NRF_OK;
- }
- NRF_RESULT NRF_PowerUp(uint8_t powerUp) {
- uint8_t reg = 0;
- if (NRF_ReadRegister(NRF_CONFIG, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- if (powerUp) {
- reg |= 1 << 1;
- } else {
- reg &= ~(1 << 1);
- }
- if (NRF_WriteRegister(NRF_CONFIG, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- return NRF_OK;
- }
- NRF_RESULT NRF_EnableCRC(uint8_t activate) {
- uint8_t reg = 0;
- if (NRF_ReadRegister(NRF_CONFIG, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- if (activate) {
- reg |= 1 << 3;
- } else {
- reg &= ~(1 << 3);
- }
- if (NRF_WriteRegister(NRF_CONFIG, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- return NRF_OK;
- }
- NRF_RESULT NRF_SetCRCWidth(NRF_CRC_WIDTH width) {
- uint8_t reg = 0;
- if (NRF_ReadRegister(NRF_CONFIG, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- if (width == NRF_CRC_WIDTH_2B) {
- reg |= 1 << 2;
- } else {
- reg &= ~(1 << 3);
- }
- if (NRF_WriteRegister(NRF_CONFIG, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- return NRF_OK;
- }
- NRF_RESULT NRF_RXTXControl(NRF_TXRX_STATE rx) {
- uint8_t reg = 0;
- if (NRF_ReadRegister(NRF_CONFIG, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- if (rx) {
- reg |= 1;
- } else {
- reg &= ~(1);
- }
- if (NRF_WriteRegister(NRF_CONFIG, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- return NRF_OK;
- }
- NRF_RESULT NRF_SetRetransmittionCount(uint8_t count) {
- count &= 0x0F;
- uint8_t reg = 0;
- if (NRF_ReadRegister(NRF_SETUP_RETR, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- reg &= 0xF0; // clearing bits 0,1,2,3
- reg |= count; // setting count
- if (NRF_WriteRegister(NRF_SETUP_RETR, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- return NRF_OK;
- }
- NRF_RESULT NRF_SetRetransmittionDelay(uint8_t delay) {
- delay &= 0x0F;
- uint8_t reg = 0;
- if (NRF_ReadRegister(NRF_SETUP_RETR, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- reg &= 0x0F; // clearing bits 1,2,6,7
- reg |= delay << 4; // setting delay
- if (NRF_WriteRegister(NRF_SETUP_RETR, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- return NRF_OK;
- }
- NRF_RESULT NRF_SetAddressWidth(NRF_ADDR_WIDTH width) {
- uint8_t reg = 0;
- if (NRF_ReadRegister(NRF_SETUP_AW, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- reg &= 0x03; // clearing bits 0,1
- reg |= width; // setting delay
- if (NRF_WriteRegister(NRF_SETUP_AW, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- return NRF_OK;
- }
- NRF_RESULT NRF_EnableRXPipe(uint8_t pipe) {
- uint8_t reg = 0;
- if (NRF_ReadRegister(NRF_EN_RXADDR, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- reg |= 1 << pipe;
- if (NRF_WriteRegister(NRF_EN_RXADDR, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- return NRF_OK;
- }
- NRF_RESULT NRF_EnableAutoAcknowledgement(uint8_t pipe) {
- uint8_t reg = 0;
- if (NRF_ReadRegister(NRF_EN_AA, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- reg |= 1 << pipe;
- if (NRF_WriteRegister(NRF_EN_AA, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- return NRF_OK;
- }
- NRF_RESULT NRF_SetRFChannel(uint8_t ch) {
- ch &= 0x7F;
- uint8_t reg = 0;
- if (NRF_ReadRegister(NRF_RF_CH, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- reg |= ch; // setting channel
- if (NRF_WriteRegister(NRF_RF_CH, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- return NRF_OK;
- }
- NRF_RESULT NRF_SetTXPower(NRF_TX_PWR pwr) {
- uint8_t reg = 0;
- if (NRF_ReadRegister(NRF_RF_SETUP, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- reg &= 0xF9; // clear bits 1,2
- reg |= pwr << 1; // set bits 1,2
- if (NRF_WriteRegister(NRF_RF_SETUP, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- return NRF_OK;
- }
- NRF_RESULT NRF_SetCCW(uint8_t activate) {
- uint8_t reg = 0;
- if (NRF_ReadRegister(NRF_RF_SETUP, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- if (activate) {
- reg |= 0x80;
- } else {
- reg &= 0x7F;
- }
- if (NRF_WriteRegister(NRF_RF_SETUP, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- return NRF_OK;
- }
- NRF_RESULT NRF_SetDataRate(NRF_DATA_RATE rate) {
- uint8_t reg = 0;
- if (NRF_ReadRegister(NRF_RF_SETUP, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- if (rate & 1) { // low bit set
- reg |= 1 << 5;
- } else { // low bit clear
- reg &= ~(1 << 5);
- }
- if (rate & 2) { // high bit set
- reg |= 1 << 3;
- } else { // high bit clear
- reg &= ~(1 << 3);
- }
- if (NRF_WriteRegister(NRF_RF_SETUP, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- return NRF_OK;
- }
- NRF_RESULT NRF_ClearInterrupts() {
- uint8_t reg = 0;
- if (NRF_ReadRegister(NRF_STATUS, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- reg |= 7 << 4; // setting bits 4,5,6
- if (NRF_WriteRegister(NRF_STATUS, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- return NRF_OK;
- }
- NRF_RESULT NRF_FlushTX() {
- uint8_t rx = 0;
- uint8_t tx = 0;
- if (NRF_SendCommand(NRF_CMD_FLUSH_TX, &tx, &rx, 0) != NRF_OK) {
- return NRF_ERROR;
- }
- return NRF_OK;
- }
- NRF_RESULT NRF_FlushRX() {
- uint8_t rx = 0;
- uint8_t tx = 0;
- if (NRF_SendCommand(NRF_CMD_FLUSH_RX, &tx, &rx, 0) != NRF_OK) {
- return NRF_ERROR;
- }
- return NRF_OK;
- }
- NRF_RESULT NRF_ReadRXPayload(uint8_t* data, uint8_t len) {
- uint8_t tx[32];
- if (NRF_SendCommand(NRF_CMD_R_RX_PAYLOAD, tx, data, len) != NRF_OK) {
- return NRF_ERROR;
- }
- return NRF_OK;
- }
- NRF_RESULT NRF_WriteTXPayload(uint8_t* data, uint8_t len) {
- uint8_t rx[32];
- if (NRF_SendCommand(NRF_CMD_W_TX_PAYLOAD, data, rx, len) != NRF_OK) {
- return NRF_ERROR;
- }
- return NRF_OK;
- }
- NRF_RESULT NRF_EnableRXDataReadyIRQ(uint8_t activate) {
- uint8_t reg = 0;
- if (NRF_ReadRegister(NRF_CONFIG, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- if (!activate) {
- reg |= 1 << 6;
- } else {
- reg &= ~(1 << 6);
- }
- if (NRF_WriteRegister(NRF_CONFIG, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- return NRF_OK;
- }
- NRF_RESULT NRF_EnableTXDataSentIRQ(uint8_t activate) {
- uint8_t reg = 0;
- if (NRF_ReadRegister(NRF_CONFIG, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- if (!activate) {
- reg |= 1 << 5;
- } else {
- reg &= ~(1 << 5);
- }
- if (NRF_WriteRegister(NRF_CONFIG, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- return NRF_OK;
- }
- NRF_RESULT NRF_EnableMaxRetransmitIRQ(uint8_t activate) {
- uint8_t reg = 0;
- if (NRF_ReadRegister(NRF_CONFIG, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- if (!activate) {
- reg |= 1 << 4;
- } else {
- reg &= ~(1 << 4);
- }
- if (NRF_WriteRegister(NRF_CONFIG, ®) != NRF_OK) {
- return NRF_ERROR;
- }
- return NRF_OK;
- }
- NRF_RESULT NRF_SetRXAddress(uint8_t* address, uint8_t PX, uint8_t len) {
- uint8_t rx[5];
- if (PX > 5) {
- return NRF_ERROR;
- }
- if (NRF_SendCommand(NRF_CMD_W_REGISTER | (NRF_RX_ADDR_P0+PX), address, rx, len) != NRF_OK) {
- return NRF_ERROR;
- }
- return NRF_OK;
- }
- NRF_RESULT NRF_SetRXPayloadWidth_PX(uint8_t PX, uint8_t width) {
- width &= 0x3F;
- if (PX > 5) {
- return NRF_ERROR;
- }
- if (NRF_WriteRegister(NRF_RX_PW_P0+PX, &width) != NRF_OK) {
- return NRF_ERROR;
- }
- return NRF_OK;
- }
- NRF_RESULT NRF_SetTXAddress(uint8_t* address) {
- uint8_t rx[5];
- if (NRF_SendCommand(NRF_CMD_W_REGISTER | NRF_TX_ADDR, address, rx, 5) != NRF_OK) {
- return NRF_ERROR;
- }
- return NRF_OK;
- }
- void PRINT_LN(const char *data)
- {
- uint8_t datax[32];
- uint8_t i = 0;
- while(data[i] != '\0')
- {
- datax[i] = data[i];
- i++;
- }
- HAL_UART_Transmit(nrf_uart, datax, i, 1000);
- uint8_t ln = '\n';
- HAL_UART_Transmit(nrf_uart, &ln, 1, 1000);
- }
- void PRINT_ARRAY(uint8_t *data, uint8_t len)
- {
- HAL_UART_Transmit(nrf_uart, data, len, 1000);
- uint8_t ln = '\n';
- HAL_UART_Transmit(nrf_uart, &ln, 1, 1000);
- }
- void NRF_test(void)
- {
- const uint8_t PAYLOAD_SIZE = 8;
- uint8_t config = 0xFF;
- uint8_t addr_p0[] = {0x01, 0x02, 0x03, 0x04, 0x05};
- uint8_t addr_p1[] = {0x06, 0x07, 0x08, 0x09, 0x10};
- uint8_t addr_p2[] = {0x11};
- uint8_t addr_p3[] = {0x12};
- uint8_t addr_p4[] = {0x13};
- uint8_t addr_p5[] = {0x14};
- uint8_t dados[32];
- for (config = 0; config < 32; config++) {
- dados[config] = 'A' + config;
- }
- NRF_CE_DISABLE;
- NRF_CS_DISABLE;
- NRF_PowerUp(0);
- HAL_Delay(500);
- NRF_PowerUp(1);
- HAL_Delay(500);
- do {
- NRF_ReadRegister(NRF_CONFIG, &config);
- }while ((config & 0x02) == 0);
- NRF_SetRXPayloadWidth_PX(0, PAYLOAD_SIZE);
- NRF_SetRXPayloadWidth_PX(1, PAYLOAD_SIZE);
- NRF_SetRXPayloadWidth_PX(2, PAYLOAD_SIZE);
- NRF_SetRXPayloadWidth_PX(3, PAYLOAD_SIZE);
- NRF_SetRXPayloadWidth_PX(4, PAYLOAD_SIZE);
- NRF_SetRXPayloadWidth_PX(5, PAYLOAD_SIZE);
- NRF_SetRXAddress(addr_p0, 0, 5);
- NRF_SetRXAddress(addr_p1, 1, 5);
- NRF_SetRXAddress(addr_p2, 2, 1);
- NRF_SetRXAddress(addr_p3, 3, 1);
- NRF_SetRXAddress(addr_p4, 4, 1);
- NRF_SetRXAddress(addr_p5, 5, 1);
- NRF_SetTXAddress(addr_p0);
- NRF_EnableTXDataSentIRQ(1);
- NRF_EnableRXDataReadyIRQ(1);
- NRF_EnableMaxRetransmitIRQ(1);
- NRF_EnableCRC(1);
- NRF_SetCRCWidth(NRF_CRC_WIDTH_1B);
- NRF_SetAddressWidth(NRF_ADDR_WIDTH_5);
- NRF_SetRetransmittionCount(15);
- NRF_SetRetransmittionDelay(15);
- NRF_SetRFChannel(60);
- //NRF_SetTXPower(NRF_TX_PWR_0dBm); //NRF_SetDataRate(NRF_DATA_RATE_1MBPS);
- config = 0x0f;
- NRF_WriteRegister(NRF_RF_SETUP, &config);
- NRF_EnableRXPipe(0);
- NRF_EnableRXPipe(1);
- NRF_EnableRXPipe(2);
- NRF_EnableRXPipe(3);
- NRF_EnableRXPipe(4);
- NRF_EnableRXPipe(5);
- NRF_EnableAutoAcknowledgement(0);
- NRF_EnableAutoAcknowledgement(1);
- NRF_EnableAutoAcknowledgement(2);
- NRF_EnableAutoAcknowledgement(3);
- NRF_EnableAutoAcknowledgement(4);
- NRF_EnableAutoAcknowledgement(5);
- NRF_ClearInterrupts();
- NRF_CE_DISABLE;
- NRF_RXTXControl(NRF_STATE_RX);
- NRF_CE_ENABLE;
- NRF_FlushRX();
- uint8_t status, fifo_status, busy = 0, rxpo;
- mode = RX_MODE;
- for ( ; ; )
- {
- if (NRF_ReadRegister(NRF_STATUS, &status) == NRF_OK)
- {
- if (status & (1 << 6)) // RX_RD -> PACKET RECEIVED
- {
- PRINT_LN("RX_RD\0");
- NRF_CE_DISABLE;
- rxpo = (0x07 & (status >> 1));
- NRF_ReadRegister(NRF_FIFO_STATUS, &fifo_status);
- if ((fifo_status & 0x01) == 0 && (rxpo != 0x07)) // CHECK IF RX FIFO IS NOT EMPTY
- {
- PRINT_LN("FIFO RX\0");
- NRF_ReadRXPayload(dados, PAYLOAD_SIZE);
- PRINT_ARRAY(dados, PAYLOAD_SIZE);
- status |= (1<<6);
- NRF_WriteRegister(NRF_STATUS, &status);
- NRF_FlushRX();
- } else {
- PRINT_LN("FIFO EMPTY\0");
- }
- NRF_CE_ENABLE;
- NRF_RXTXControl(NRF_STATE_RX);
- }
- if (status & (1 << 5)) // TX_RD -> DATA SENT
- {
- PRINT_LN("TX SD\0");
- status |= 1 << 5; // clear the interrupt flag
- NRF_CE_DISABLE;
- NRF_RXTXControl(NRF_STATE_RX);
- NRF_CE_ENABLE;
- NRF_WriteRegister(NRF_STATUS, &status);
- busy = 0;
- dados[0] ++;
- }
- if (status & (1 << 4)) // MAX RT REACHED
- {
- PRINT_LN("MAX RT REACHED\0");
- status |= 1 << 4;
- NRF_FlushTX();
- NRF_CE_DISABLE;
- NRF_RXTXControl(NRF_STATE_RX);
- NRF_CE_ENABLE;
- NRF_WriteRegister(NRF_STATUS, &status);
- busy = 0;
- }
- }
- if (TX_MODE == mode)
- {
- {
- PRINT_LN("SENDING...");
- PRINT_ARRAY(dados, PAYLOAD_SIZE);
- busy = 1;
- NRF_CE_DISABLE;
- NRF_RXTXControl(NRF_STATE_TX);
- NRF_WriteTXPayload(dados, PAYLOAD_SIZE);
- NRF_CE_ENABLE;
- }
- mode = RX_MODE;
- }
- }
- }
- void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
- {
- if (huart->Instance == USART2)
- {
- HAL_UART_Receive_IT(&huart2, &input_data, 1);
- if (input_data == '1')
- {
- mode = RX_MODE;
- PRINT_LN("RX_MODE");
- }
- else if (input_data == '2')
- {
- mode = TX_MODE;
- PRINT_LN("TX_MODE");
- }
- }
- }
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