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  1. /*
  2.  * AssemblerApplication1.asm
  3.  *
  4.  *  Created: 2014-10-26 22:08:08
  5.  *   Author: Szymon
  6.  */
  7.  .include "m16def.inc"
  8.  .EQU   ADC_DATA_ADDR = 0x0060
  9. .org 0x00   jmp start
  10. .org 0x02   jmp Ext_int0_irq
  11. .org 0x04   jmp ext_int1_irq
  12. .org 0x06   jmp tim2_comp_irq      
  13. .org 0x08   jmp tim2_ovf_irq      
  14. .org 0x0A   jmp tim1_capt_irq      
  15. .org 0x0C   jmp tim1_comp_a_irq
  16. .org 0x0E   jmp tim1_comp_b_irq    
  17. .org 0x10   jmp tim1_ovf_irq    
  18. .org 0x12   jmp tim0_ovf_irq      
  19. .org 0x14   jmp spi_stc_irq      
  20. .org 0x16   jmp usart_rxc_irq  
  21. .org 0x18   jmp usart_udre_irq
  22. .org 0x1A   jmp usart_txc_irq
  23. .org 0x1C   jmp adc_irq
  24. .org 0x1E   jmp ee_rdy_irq  
  25. .org 0x20   jmp ana_comp_irq
  26. .org 0x22   jmp twsi_irq
  27. .org 0x24   jmp ext_int2_irq
  28. .org 0x26   jmp tim0_comp_irq
  29. .org 0x28   jmp spm_rdy_irq
  30.  
  31. Ext_int0_irq:   reti
  32. ext_int1_irq:   reti
  33. tim2_comp_irq:  reti
  34. tim2_ovf_irq:   reti
  35. tim1_capt_irq:  reti
  36. ;   tim1_comp_a_irq:reti - active
  37. tim1_comp_b_irq:reti
  38. tim1_ovf_irq:   reti
  39. tim0_ovf_irq:   reti
  40. spi_stc_irq:    reti
  41. usart_rxc_irq:  reti
  42. usart_udre_irq: reti
  43. usart_txc_irq:  reti
  44. ;   adc_irq:        reti - active
  45. ee_rdy_irq:     reti
  46. ana_comp_irq:   reti
  47. twsi_irq:       reti
  48. ext_int2_irq:   reti
  49. spm_rdy_irq:    reti
  50. tim0_comp_irq:  reti
  51.  
  52. start:
  53. ; status register
  54.     eor r16, r16
  55.     OUT SREG, r16
  56.  
  57. ; set stack pointer
  58.     LDI R16, high(RAMEND)
  59.     OUT SPH, R16
  60.     LDI R16, low(RAMEND)
  61.     OUT SPL, R16
  62.  
  63. ; config timer1
  64.     LDI r16,    8   ;
  65.     OUT TCCR1A, r16 ;   foc1a
  66.  
  67.     LDI r16,    12  ;
  68.     OUT TCCR1B, r16 ;   ctc, div by 256
  69.  
  70.     LDI r16,    40  ;
  71.     LDI r17,    35  ;
  72.     OUT OCR1AH, r17 ;
  73.     OUT OCR1AL, r16 ;   ocr1a 512
  74.    
  75.     LDI r16,    0   ;
  76.     LDI r17,    0   ;
  77.     OUT TCNT1H, r17 ;
  78.     OUT TCNT1L, r16 ;
  79.  
  80.     LDI r16,    16  ;
  81.     OUT TIMSK,  r16 ;   output compare interrupt enable
  82.  
  83. ; congig adc
  84.     LDI r16, 32 ;
  85.     OUT ADMUX, r16  ; only adlar set
  86.     LDI R16, 0xEF   ;
  87.     OUT ADCSRA, r16 ;
  88.        
  89. ; cfg io
  90.     SBI PORTB,  3   ;
  91.     SBI DDRB,   3   ;
  92.  
  93.     CBI PORTD,  0
  94.     CBI DDRD,   0
  95.  
  96. ; enable interrupt
  97.     sei
  98.  
  99. ; main loop
  100. hop: rjmp hop
  101.  
  102. tim1_comp_a_irq:
  103.     IN r18, SREG
  104.     cli
  105.     IN  r16, PORTB
  106.     LDI r17, 8
  107.     EOR r16, r17
  108.     OUT PORTB, R16
  109.     LDS r19, 0x0060
  110.     LDS R20, 0x0061
  111.     OUT OCR1AH, r19
  112.     OUT OCR1AL, r20
  113.     OUT SREG, r18
  114.     reti
  115.  
  116. adc_irq:
  117.     IN r16, SREG
  118.     cli
  119.     IN R17, ADCH
  120.     IN R18, ADCL
  121.    
  122.     STS 0x0060, R17
  123.     STS 0x0061, R18
  124.  
  125.     OUT SREG, r16
  126.     reti
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