`timescale 1 ns / 1 ns

module CORDIC_ABS_tb;

  localparam pi = 3.1415926535897932384626433832795;

  wire start;
  reg signed [15:0] X;
  reg signed [15:0] Y;
  wire [15:0] abs;
  wire ce_out;

  reg clk = 0;

  reg [4:0] cnt = 0;

  real phase1 = 0;
  real phase2 = 0;

  assign start = (cnt == 0);

  always
    #5 clk = !clk;

  always @(posedge clk)
    cnt <= cnt + 1'b1;

  always @(posedge clk) begin
    if (start) begin
      phase1 <= phase1 + (pi / 20);
      phase2 <= phase2 + (pi / 300);
      X <= $rtoi(($cos(phase1) * (1 + 0.5 * $sin(phase2))) * 15'b010_0000_0000_0000);
      Y <= $rtoi(($sin(phase1) * (1 + 0.5 * $sin(phase2))) * 15'b010_0000_0000_0000);
    end
  end

  CORDIC_ABS CORDIC_ABS_inst (
    .clk(clk),
    .start(start),
    .X(X),
    .Y(Y),
    .abs(abs),
    .ce_out(ce_out)
  );
endmodule