Advertisement
Guest User

linux.usb.general/78194/first_enum

a guest
Feb 26th, 2013
67
0
Never
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
text 52.78 KB | None | 0 0
  1. [ 335.440190] xhci_hcd 0000:04:00.0: Port Status Change Event for port 4
  2. [ 335.440196] xhci_hcd 0000:04:00.0: resume root hub
  3. [ 335.440206] xhci_hcd 0000:04:00.0: handle_port_status: starting port polling.
  4. [ 335.440228] usb usb3: usb wakeup-resume
  5. [ 335.440233] usb usb3: usb auto-resume
  6. [ 335.440256] hub 3-0:1.0: hub_resume
  7. [ 335.440263] xhci_hcd 0000:04:00.0: get port status, actual port 0 status = 0x2a0
  8. [ 335.440266] xhci_hcd 0000:04:00.0: Get port status returned 0x100
  9. [ 335.440272] xhci_hcd 0000:04:00.0: get port status, actual port 1 status = 0x2a0
  10. [ 335.440274] xhci_hcd 0000:04:00.0: Get port status returned 0x100
  11. [ 335.440279] xhci_hcd 0000:04:00.0: get port status, actual port 2 status = 0x2a0
  12. [ 335.440281] xhci_hcd 0000:04:00.0: Get port status returned 0x100
  13. [ 335.440286] xhci_hcd 0000:04:00.0: get port status, actual port 3 status = 0x206e1
  14. [ 335.440288] xhci_hcd 0000:04:00.0: Get port status returned 0x10101
  15. [ 335.440292] hub 3-0:1.0: port 4: status 0101 change 0001
  16. [ 335.440299] xhci_hcd 0000:04:00.0: clear port connect change, actual port 3 status = 0x6e1
  17. [ 335.543873] hub 3-0:1.0: state 7 ports 4 chg 0010 evt 0000
  18. [ 335.543884] xhci_hcd 0000:04:00.0: get port status, actual port 3 status = 0x6e1
  19. [ 335.543887] xhci_hcd 0000:04:00.0: Get port status returned 0x101
  20. [ 335.543892] hub 3-0:1.0: port 4, status 0101, change 0000, 12 Mb/s
  21. [ 335.543897] xhci_hcd 0000:04:00.0: // Ding dong!
  22. [ 335.543920] xhci_hcd 0000:04:00.0: Slot 1 output ctx = 0x2d0d4000 (dma)
  23. [ 335.543924] xhci_hcd 0000:04:00.0: Slot 1 input ctx = 0x2d1ed000 (dma)
  24. [ 335.543931] xhci_hcd 0000:04:00.0: Set slot id 1 dcbaa entry f0534008 to 0x2d0d4000
  25. [ 335.543942] xhci_hcd 0000:04:00.0: set port reset, actual port 3 status = 0x6f1
  26. [ 335.547811] xhci_hcd 0000:04:00.0: xhci_hub_status_data: stopping port polling.
  27. [ 335.594172] xhci_hcd 0000:04:00.0: Port Status Change Event for port 4
  28. [ 335.594180] xhci_hcd 0000:04:00.0: handle_port_status: starting port polling.
  29. [ 335.599854] xhci_hcd 0000:04:00.0: get port status, actual port 3 status = 0x200e03
  30. [ 335.599859] xhci_hcd 0000:04:00.0: Get port status returned 0x100503
  31. [ 335.655867] xhci_hcd 0000:04:00.0: clear port reset change, actual port 3 status = 0xe03
  32. [ 335.655874] usb 3-4: new high-speed USB device number 2 using xhci_hcd
  33. [ 335.655878] xhci_hcd 0000:04:00.0: Set root hub portnum to 4
  34. [ 335.655881] xhci_hcd 0000:04:00.0: Set fake root hub portnum to 4
  35. [ 335.655883] xhci_hcd 0000:04:00.0: udev->tt = (null)
  36. [ 335.655886] xhci_hcd 0000:04:00.0: udev->ttport = 0x0
  37. [ 335.655888] xhci_hcd 0000:04:00.0: Slot ID 1 Input Context:
  38. [ 335.655892] xhci_hcd 0000:04:00.0: @ed1ed000 (virt) @2d1ed000 (dma) 0x000000 - drop flags
  39. [ 335.655895] xhci_hcd 0000:04:00.0: @ed1ed004 (virt) @2d1ed004 (dma) 0x000003 - add flags
  40. [ 335.655897] xhci_hcd 0000:04:00.0: @ed1ed008 (virt) @2d1ed008 (dma) 0x000000 - rsvd2[0]
  41. [ 335.655900] xhci_hcd 0000:04:00.0: @ed1ed00c (virt) @2d1ed00c (dma) 0x000000 - rsvd2[1]
  42. [ 335.655903] xhci_hcd 0000:04:00.0: @ed1ed010 (virt) @2d1ed010 (dma) 0x000000 - rsvd2[2]
  43. [ 335.655906] xhci_hcd 0000:04:00.0: @ed1ed014 (virt) @2d1ed014 (dma) 0x000000 - rsvd2[3]
  44. [ 335.655908] xhci_hcd 0000:04:00.0: @ed1ed018 (virt) @2d1ed018 (dma) 0x000000 - rsvd2[4]
  45. [ 335.655911] xhci_hcd 0000:04:00.0: @ed1ed01c (virt) @2d1ed01c (dma) 0x000000 - rsvd2[5]
  46. [ 335.655914] xhci_hcd 0000:04:00.0: @ed1ed020 (virt) @2d1ed020 (dma) 0x000000 - rsvd64[0]
  47. [ 335.655917] xhci_hcd 0000:04:00.0: @ed1ed028 (virt) @2d1ed028 (dma) 0x000000 - rsvd64[1]
  48. [ 335.655920] xhci_hcd 0000:04:00.0: @ed1ed030 (virt) @2d1ed030 (dma) 0x000000 - rsvd64[2]
  49. [ 335.655922] xhci_hcd 0000:04:00.0: @ed1ed038 (virt) @2d1ed038 (dma) 0x000000 - rsvd64[3]
  50. [ 335.655925] xhci_hcd 0000:04:00.0: Slot Context:
  51. [ 335.655927] xhci_hcd 0000:04:00.0: @ed1ed040 (virt) @2d1ed040 (dma) 0x8300000 - dev_info
  52. [ 335.655930] xhci_hcd 0000:04:00.0: @ed1ed044 (virt) @2d1ed044 (dma) 0x040000 - dev_info2
  53. [ 335.655933] xhci_hcd 0000:04:00.0: @ed1ed048 (virt) @2d1ed048 (dma) 0x000000 - tt_info
  54. [ 335.655936] xhci_hcd 0000:04:00.0: @ed1ed04c (virt) @2d1ed04c (dma) 0x000000 - dev_state
  55. [ 335.655938] xhci_hcd 0000:04:00.0: @ed1ed050 (virt) @2d1ed050 (dma) 0x000000 - rsvd[0]
  56. [ 335.655941] xhci_hcd 0000:04:00.0: @ed1ed054 (virt) @2d1ed054 (dma) 0x000000 - rsvd[1]
  57. [ 335.655944] xhci_hcd 0000:04:00.0: @ed1ed058 (virt) @2d1ed058 (dma) 0x000000 - rsvd[2]
  58. [ 335.655947] xhci_hcd 0000:04:00.0: @ed1ed05c (virt) @2d1ed05c (dma) 0x000000 - rsvd[3]
  59. [ 335.655949] xhci_hcd 0000:04:00.0: @ed1ed060 (virt) @2d1ed060 (dma) 0x000000 - rsvd64[0]
  60. [ 335.655952] xhci_hcd 0000:04:00.0: @ed1ed068 (virt) @2d1ed068 (dma) 0x000000 - rsvd64[1]
  61. [ 335.655955] xhci_hcd 0000:04:00.0: @ed1ed070 (virt) @2d1ed070 (dma) 0x000000 - rsvd64[2]
  62. [ 335.655958] xhci_hcd 0000:04:00.0: @ed1ed078 (virt) @2d1ed078 (dma) 0x000000 - rsvd64[3]
  63. [ 335.655960] xhci_hcd 0000:04:00.0: Endpoint 00 Context:
  64. [ 335.655963] xhci_hcd 0000:04:00.0: @ed1ed080 (virt) @2d1ed080 (dma) 0x000000 - ep_info
  65. [ 335.655966] xhci_hcd 0000:04:00.0: @ed1ed084 (virt) @2d1ed084 (dma) 0x400026 - ep_info2
  66. [ 335.655969] xhci_hcd 0000:04:00.0: @ed1ed088 (virt) @2d1ed088 (dma) 0x30536801 - deq
  67. [ 335.655971] xhci_hcd 0000:04:00.0: @ed1ed090 (virt) @2d1ed090 (dma) 0x000000 - tx_info
  68. [ 335.655974] xhci_hcd 0000:04:00.0: @ed1ed094 (virt) @2d1ed094 (dma) 0x000000 - rsvd[0]
  69. [ 335.655977] xhci_hcd 0000:04:00.0: @ed1ed098 (virt) @2d1ed098 (dma) 0x000000 - rsvd[1]
  70. [ 335.655980] xhci_hcd 0000:04:00.0: @ed1ed09c (virt) @2d1ed09c (dma) 0x000000 - rsvd[2]
  71. [ 335.655982] xhci_hcd 0000:04:00.0: @ed1ed0a0 (virt) @2d1ed0a0 (dma) 0x000000 - rsvd64[0]
  72. [ 335.655985] xhci_hcd 0000:04:00.0: @ed1ed0a8 (virt) @2d1ed0a8 (dma) 0x000000 - rsvd64[1]
  73. [ 335.655988] xhci_hcd 0000:04:00.0: @ed1ed0b0 (virt) @2d1ed0b0 (dma) 0x000000 - rsvd64[2]
  74. [ 335.655991] xhci_hcd 0000:04:00.0: @ed1ed0b8 (virt) @2d1ed0b8 (dma) 0x000000 - rsvd64[3]
  75. [ 335.655993] xhci_hcd 0000:04:00.0: Endpoint 01 Context:
  76. [ 335.655996] xhci_hcd 0000:04:00.0: @ed1ed0c0 (virt) @2d1ed0c0 (dma) 0x000000 - ep_info
  77. [ 335.655998] xhci_hcd 0000:04:00.0: @ed1ed0c4 (virt) @2d1ed0c4 (dma) 0x000000 - ep_info2
  78. [ 335.656001] xhci_hcd 0000:04:00.0: @ed1ed0c8 (virt) @2d1ed0c8 (dma) 0x000000 - deq
  79. [ 335.656004] xhci_hcd 0000:04:00.0: @ed1ed0d0 (virt) @2d1ed0d0 (dma) 0x000000 - tx_info
  80. [ 335.656006] xhci_hcd 0000:04:00.0: @ed1ed0d4 (virt) @2d1ed0d4 (dma) 0x000000 - rsvd[0]
  81. [ 335.656009] xhci_hcd 0000:04:00.0: @ed1ed0d8 (virt) @2d1ed0d8 (dma) 0x000000 - rsvd[1]
  82. [ 335.656012] xhci_hcd 0000:04:00.0: @ed1ed0dc (virt) @2d1ed0dc (dma) 0x000000 - rsvd[2]
  83. [ 335.656015] xhci_hcd 0000:04:00.0: @ed1ed0e0 (virt) @2d1ed0e0 (dma) 0x000000 - rsvd64[0]
  84. [ 335.656017] xhci_hcd 0000:04:00.0: @ed1ed0e8 (virt) @2d1ed0e8 (dma) 0x000000 - rsvd64[1]
  85. [ 335.656020] xhci_hcd 0000:04:00.0: @ed1ed0f0 (virt) @2d1ed0f0 (dma) 0x000000 - rsvd64[2]
  86. [ 335.656023] xhci_hcd 0000:04:00.0: @ed1ed0f8 (virt) @2d1ed0f8 (dma) 0x000000 - rsvd64[3]
  87. [ 335.656025] xhci_hcd 0000:04:00.0: Endpoint 02 Context:
  88. [ 335.656028] xhci_hcd 0000:04:00.0: @ed1ed100 (virt) @2d1ed100 (dma) 0x000000 - ep_info
  89. [ 335.656030] xhci_hcd 0000:04:00.0: @ed1ed104 (virt) @2d1ed104 (dma) 0x000000 - ep_info2
  90. [ 335.656033] xhci_hcd 0000:04:00.0: @ed1ed108 (virt) @2d1ed108 (dma) 0x000000 - deq
  91. [ 335.656036] xhci_hcd 0000:04:00.0: @ed1ed110 (virt) @2d1ed110 (dma) 0x000000 - tx_info
  92. [ 335.656038] xhci_hcd 0000:04:00.0: @ed1ed114 (virt) @2d1ed114 (dma) 0x000000 - rsvd[0]
  93. [ 335.656041] xhci_hcd 0000:04:00.0: @ed1ed118 (virt) @2d1ed118 (dma) 0x000000 - rsvd[1]
  94. [ 335.656044] xhci_hcd 0000:04:00.0: @ed1ed11c (virt) @2d1ed11c (dma) 0x000000 - rsvd[2]
  95. [ 335.656047] xhci_hcd 0000:04:00.0: @ed1ed120 (virt) @2d1ed120 (dma) 0x000000 - rsvd64[0]
  96. [ 335.656049] xhci_hcd 0000:04:00.0: @ed1ed128 (virt) @2d1ed128 (dma) 0x000000 - rsvd64[1]
  97. [ 335.656052] xhci_hcd 0000:04:00.0: @ed1ed130 (virt) @2d1ed130 (dma) 0x000000 - rsvd64[2]
  98. [ 335.656055] xhci_hcd 0000:04:00.0: @ed1ed138 (virt) @2d1ed138 (dma) 0x000000 - rsvd64[3]
  99. [ 335.656058] xhci_hcd 0000:04:00.0: // Ding dong!
  100. [ 335.656181] xhci_hcd 0000:04:00.0: Successful Address Device command
  101. [ 335.656190] xhci_hcd 0000:04:00.0: Op regs DCBAA ptr = 0x00000030534000
  102. [ 335.656193] xhci_hcd 0000:04:00.0: Slot ID 1 dcbaa entry @f0534008 = 0x0000002d0d4000
  103. [ 335.656196] xhci_hcd 0000:04:00.0: Output Context DMA address = 0x2d0d4000
  104. [ 335.656198] xhci_hcd 0000:04:00.0: Slot ID 1 Input Context:
  105. [ 335.656202] xhci_hcd 0000:04:00.0: @ed1ed000 (virt) @2d1ed000 (dma) 0x000000 - drop flags
  106. [ 335.656204] xhci_hcd 0000:04:00.0: @ed1ed004 (virt) @2d1ed004 (dma) 0x000003 - add flags
  107. [ 335.656207] xhci_hcd 0000:04:00.0: @ed1ed008 (virt) @2d1ed008 (dma) 0x000000 - rsvd2[0]
  108. [ 335.656210] xhci_hcd 0000:04:00.0: @ed1ed00c (virt) @2d1ed00c (dma) 0x000000 - rsvd2[1]
  109. [ 335.656213] xhci_hcd 0000:04:00.0: @ed1ed010 (virt) @2d1ed010 (dma) 0x000000 - rsvd2[2]
  110. [ 335.656216] xhci_hcd 0000:04:00.0: @ed1ed014 (virt) @2d1ed014 (dma) 0x000000 - rsvd2[3]
  111. [ 335.656219] xhci_hcd 0000:04:00.0: @ed1ed018 (virt) @2d1ed018 (dma) 0x000000 - rsvd2[4]
  112. [ 335.656221] xhci_hcd 0000:04:00.0: @ed1ed01c (virt) @2d1ed01c (dma) 0x000000 - rsvd2[5]
  113. [ 335.656224] xhci_hcd 0000:04:00.0: @ed1ed020 (virt) @2d1ed020 (dma) 0x000000 - rsvd64[0]
  114. [ 335.656227] xhci_hcd 0000:04:00.0: @ed1ed028 (virt) @2d1ed028 (dma) 0x000000 - rsvd64[1]
  115. [ 335.656230] xhci_hcd 0000:04:00.0: @ed1ed030 (virt) @2d1ed030 (dma) 0x000000 - rsvd64[2]
  116. [ 335.656233] xhci_hcd 0000:04:00.0: @ed1ed038 (virt) @2d1ed038 (dma) 0x000000 - rsvd64[3]
  117. [ 335.656235] xhci_hcd 0000:04:00.0: Slot Context:
  118. [ 335.656238] xhci_hcd 0000:04:00.0: @ed1ed040 (virt) @2d1ed040 (dma) 0x8300000 - dev_info
  119. [ 335.656240] xhci_hcd 0000:04:00.0: @ed1ed044 (virt) @2d1ed044 (dma) 0x040000 - dev_info2
  120. [ 335.656243] xhci_hcd 0000:04:00.0: @ed1ed048 (virt) @2d1ed048 (dma) 0x000000 - tt_info
  121. [ 335.656246] xhci_hcd 0000:04:00.0: @ed1ed04c (virt) @2d1ed04c (dma) 0x000000 - dev_state
  122. [ 335.656249] xhci_hcd 0000:04:00.0: @ed1ed050 (virt) @2d1ed050 (dma) 0x000000 - rsvd[0]
  123. [ 335.656251] xhci_hcd 0000:04:00.0: @ed1ed054 (virt) @2d1ed054 (dma) 0x000000 - rsvd[1]
  124. [ 335.656254] xhci_hcd 0000:04:00.0: @ed1ed058 (virt) @2d1ed058 (dma) 0x000000 - rsvd[2]
  125. [ 335.656257] xhci_hcd 0000:04:00.0: @ed1ed05c (virt) @2d1ed05c (dma) 0x000000 - rsvd[3]
  126. [ 335.656260] xhci_hcd 0000:04:00.0: @ed1ed060 (virt) @2d1ed060 (dma) 0x000000 - rsvd64[0]
  127. [ 335.656263] xhci_hcd 0000:04:00.0: @ed1ed068 (virt) @2d1ed068 (dma) 0x000000 - rsvd64[1]
  128. [ 335.656265] xhci_hcd 0000:04:00.0: @ed1ed070 (virt) @2d1ed070 (dma) 0x000000 - rsvd64[2]
  129. [ 335.656268] xhci_hcd 0000:04:00.0: @ed1ed078 (virt) @2d1ed078 (dma) 0x000000 - rsvd64[3]
  130. [ 335.656270] xhci_hcd 0000:04:00.0: Endpoint 00 Context:
  131. [ 335.656273] xhci_hcd 0000:04:00.0: @ed1ed080 (virt) @2d1ed080 (dma) 0x000000 - ep_info
  132. [ 335.656276] xhci_hcd 0000:04:00.0: @ed1ed084 (virt) @2d1ed084 (dma) 0x400026 - ep_info2
  133. [ 335.656279] xhci_hcd 0000:04:00.0: @ed1ed088 (virt) @2d1ed088 (dma) 0x30536801 - deq
  134. [ 335.656281] xhci_hcd 0000:04:00.0: @ed1ed090 (virt) @2d1ed090 (dma) 0x000000 - tx_info
  135. [ 335.656284] xhci_hcd 0000:04:00.0: @ed1ed094 (virt) @2d1ed094 (dma) 0x000000 - rsvd[0]
  136. [ 335.656287] xhci_hcd 0000:04:00.0: @ed1ed098 (virt) @2d1ed098 (dma) 0x000000 - rsvd[1]
  137. [ 335.656290] xhci_hcd 0000:04:00.0: @ed1ed09c (virt) @2d1ed09c (dma) 0x000000 - rsvd[2]
  138. [ 335.656292] xhci_hcd 0000:04:00.0: @ed1ed0a0 (virt) @2d1ed0a0 (dma) 0x000000 - rsvd64[0]
  139. [ 335.656295] xhci_hcd 0000:04:00.0: @ed1ed0a8 (virt) @2d1ed0a8 (dma) 0x000000 - rsvd64[1]
  140. [ 335.656298] xhci_hcd 0000:04:00.0: @ed1ed0b0 (virt) @2d1ed0b0 (dma) 0x000000 - rsvd64[2]
  141. [ 335.656301] xhci_hcd 0000:04:00.0: @ed1ed0b8 (virt) @2d1ed0b8 (dma) 0x000000 - rsvd64[3]
  142. [ 335.656303] xhci_hcd 0000:04:00.0: Endpoint 01 Context:
  143. [ 335.656306] xhci_hcd 0000:04:00.0: @ed1ed0c0 (virt) @2d1ed0c0 (dma) 0x000000 - ep_info
  144. [ 335.656308] xhci_hcd 0000:04:00.0: @ed1ed0c4 (virt) @2d1ed0c4 (dma) 0x000000 - ep_info2
  145. [ 335.656311] xhci_hcd 0000:04:00.0: @ed1ed0c8 (virt) @2d1ed0c8 (dma) 0x000000 - deq
  146. [ 335.656314] xhci_hcd 0000:04:00.0: @ed1ed0d0 (virt) @2d1ed0d0 (dma) 0x000000 - tx_info
  147. [ 335.656316] xhci_hcd 0000:04:00.0: @ed1ed0d4 (virt) @2d1ed0d4 (dma) 0x000000 - rsvd[0]
  148. [ 335.656319] xhci_hcd 0000:04:00.0: @ed1ed0d8 (virt) @2d1ed0d8 (dma) 0x000000 - rsvd[1]
  149. [ 335.656322] xhci_hcd 0000:04:00.0: @ed1ed0dc (virt) @2d1ed0dc (dma) 0x000000 - rsvd[2]
  150. [ 335.656325] xhci_hcd 0000:04:00.0: @ed1ed0e0 (virt) @2d1ed0e0 (dma) 0x000000 - rsvd64[0]
  151. [ 335.656327] xhci_hcd 0000:04:00.0: @ed1ed0e8 (virt) @2d1ed0e8 (dma) 0x000000 - rsvd64[1]
  152. [ 335.656330] xhci_hcd 0000:04:00.0: @ed1ed0f0 (virt) @2d1ed0f0 (dma) 0x000000 - rsvd64[2]
  153. [ 335.656333] xhci_hcd 0000:04:00.0: @ed1ed0f8 (virt) @2d1ed0f8 (dma) 0x000000 - rsvd64[3]
  154. [ 335.656335] xhci_hcd 0000:04:00.0: Endpoint 02 Context:
  155. [ 335.656338] xhci_hcd 0000:04:00.0: @ed1ed100 (virt) @2d1ed100 (dma) 0x000000 - ep_info
  156. [ 335.656341] xhci_hcd 0000:04:00.0: @ed1ed104 (virt) @2d1ed104 (dma) 0x000000 - ep_info2
  157. [ 335.656343] xhci_hcd 0000:04:00.0: @ed1ed108 (virt) @2d1ed108 (dma) 0x000000 - deq
  158. [ 335.656346] xhci_hcd 0000:04:00.0: @ed1ed110 (virt) @2d1ed110 (dma) 0x000000 - tx_info
  159. [ 335.656349] xhci_hcd 0000:04:00.0: @ed1ed114 (virt) @2d1ed114 (dma) 0x000000 - rsvd[0]
  160. [ 335.656351] xhci_hcd 0000:04:00.0: @ed1ed118 (virt) @2d1ed118 (dma) 0x000000 - rsvd[1]
  161. [ 335.656354] xhci_hcd 0000:04:00.0: @ed1ed11c (virt) @2d1ed11c (dma) 0x000000 - rsvd[2]
  162. [ 335.656357] xhci_hcd 0000:04:00.0: @ed1ed120 (virt) @2d1ed120 (dma) 0x000000 - rsvd64[0]
  163. [ 335.656360] xhci_hcd 0000:04:00.0: @ed1ed128 (virt) @2d1ed128 (dma) 0x000000 - rsvd64[1]
  164. [ 335.656362] xhci_hcd 0000:04:00.0: @ed1ed130 (virt) @2d1ed130 (dma) 0x000000 - rsvd64[2]
  165. [ 335.656365] xhci_hcd 0000:04:00.0: @ed1ed138 (virt) @2d1ed138 (dma) 0x000000 - rsvd64[3]
  166. [ 335.656368] xhci_hcd 0000:04:00.0: Slot ID 1 Output Context:
  167. [ 335.656370] xhci_hcd 0000:04:00.0: Slot Context:
  168. [ 335.656372] xhci_hcd 0000:04:00.0: @ed0d4000 (virt) @2d0d4000 (dma) 0x8300000 - dev_info
  169. [ 335.656375] xhci_hcd 0000:04:00.0: @ed0d4004 (virt) @2d0d4004 (dma) 0x040000 - dev_info2
  170. [ 335.656378] xhci_hcd 0000:04:00.0: @ed0d4008 (virt) @2d0d4008 (dma) 0x000000 - tt_info
  171. [ 335.656381] xhci_hcd 0000:04:00.0: @ed0d400c (virt) @2d0d400c (dma) 0x10000001 - dev_state
  172. [ 335.656383] xhci_hcd 0000:04:00.0: @ed0d4010 (virt) @2d0d4010 (dma) 0x000000 - rsvd[0]
  173. [ 335.656386] xhci_hcd 0000:04:00.0: @ed0d4014 (virt) @2d0d4014 (dma) 0x000000 - rsvd[1]
  174. [ 335.656389] xhci_hcd 0000:04:00.0: @ed0d4018 (virt) @2d0d4018 (dma) 0x000000 - rsvd[2]
  175. [ 335.656392] xhci_hcd 0000:04:00.0: @ed0d401c (virt) @2d0d401c (dma) 0x000000 - rsvd[3]
  176. [ 335.656394] xhci_hcd 0000:04:00.0: @ed0d4020 (virt) @2d0d4020 (dma) 0x000000 - rsvd64[0]
  177. [ 335.656397] xhci_hcd 0000:04:00.0: @ed0d4028 (virt) @2d0d4028 (dma) 0x000000 - rsvd64[1]
  178. [ 335.656400] xhci_hcd 0000:04:00.0: @ed0d4030 (virt) @2d0d4030 (dma) 0x000000 - rsvd64[2]
  179. [ 335.656403] xhci_hcd 0000:04:00.0: @ed0d4038 (virt) @2d0d4038 (dma) 0x000000 - rsvd64[3]
  180. [ 335.656405] xhci_hcd 0000:04:00.0: Endpoint 00 Context:
  181. [ 335.656408] xhci_hcd 0000:04:00.0: @ed0d4040 (virt) @2d0d4040 (dma) 0x000001 - ep_info
  182. [ 335.656410] xhci_hcd 0000:04:00.0: @ed0d4044 (virt) @2d0d4044 (dma) 0x400026 - ep_info2
  183. [ 335.656413] xhci_hcd 0000:04:00.0: @ed0d4048 (virt) @2d0d4048 (dma) 0x30536801 - deq
  184. [ 335.656416] xhci_hcd 0000:04:00.0: @ed0d4050 (virt) @2d0d4050 (dma) 0x000000 - tx_info
  185. [ 335.656419] xhci_hcd 0000:04:00.0: @ed0d4054 (virt) @2d0d4054 (dma) 0x000000 - rsvd[0]
  186. [ 335.656421] xhci_hcd 0000:04:00.0: @ed0d4058 (virt) @2d0d4058 (dma) 0x000000 - rsvd[1]
  187. [ 335.656424] xhci_hcd 0000:04:00.0: @ed0d405c (virt) @2d0d405c (dma) 0x000000 - rsvd[2]
  188. [ 335.656427] xhci_hcd 0000:04:00.0: @ed0d4060 (virt) @2d0d4060 (dma) 0x000000 - rsvd64[0]
  189. [ 335.656430] xhci_hcd 0000:04:00.0: @ed0d4068 (virt) @2d0d4068 (dma) 0x000000 - rsvd64[1]
  190. [ 335.656432] xhci_hcd 0000:04:00.0: @ed0d4070 (virt) @2d0d4070 (dma) 0x000000 - rsvd64[2]
  191. [ 335.656435] xhci_hcd 0000:04:00.0: @ed0d4078 (virt) @2d0d4078 (dma) 0x000000 - rsvd64[3]
  192. [ 335.656437] xhci_hcd 0000:04:00.0: Endpoint 01 Context:
  193. [ 335.656440] xhci_hcd 0000:04:00.0: @ed0d4080 (virt) @2d0d4080 (dma) 0x000000 - ep_info
  194. [ 335.656443] xhci_hcd 0000:04:00.0: @ed0d4084 (virt) @2d0d4084 (dma) 0x000000 - ep_info2
  195. [ 335.656445] xhci_hcd 0000:04:00.0: @ed0d4088 (virt) @2d0d4088 (dma) 0x000000 - deq
  196. [ 335.656448] xhci_hcd 0000:04:00.0: @ed0d4090 (virt) @2d0d4090 (dma) 0x000000 - tx_info
  197. [ 335.656451] xhci_hcd 0000:04:00.0: @ed0d4094 (virt) @2d0d4094 (dma) 0x000000 - rsvd[0]
  198. [ 335.656453] xhci_hcd 0000:04:00.0: @ed0d4098 (virt) @2d0d4098 (dma) 0x000000 - rsvd[1]
  199. [ 335.656456] xhci_hcd 0000:04:00.0: @ed0d409c (virt) @2d0d409c (dma) 0x000000 - rsvd[2]
  200. [ 335.656459] xhci_hcd 0000:04:00.0: @ed0d40a0 (virt) @2d0d40a0 (dma) 0x000000 - rsvd64[0]
  201. [ 335.656462] xhci_hcd 0000:04:00.0: @ed0d40a8 (virt) @2d0d40a8 (dma) 0x000000 - rsvd64[1]
  202. [ 335.656464] xhci_hcd 0000:04:00.0: @ed0d40b0 (virt) @2d0d40b0 (dma) 0x000000 - rsvd64[2]
  203. [ 335.656467] xhci_hcd 0000:04:00.0: @ed0d40b8 (virt) @2d0d40b8 (dma) 0x000000 - rsvd64[3]
  204. [ 335.656470] xhci_hcd 0000:04:00.0: Endpoint 02 Context:
  205. [ 335.656472] xhci_hcd 0000:04:00.0: @ed0d40c0 (virt) @2d0d40c0 (dma) 0x000000 - ep_info
  206. [ 335.656475] xhci_hcd 0000:04:00.0: @ed0d40c4 (virt) @2d0d40c4 (dma) 0x000000 - ep_info2
  207. [ 335.656477] xhci_hcd 0000:04:00.0: @ed0d40c8 (virt) @2d0d40c8 (dma) 0x000000 - deq
  208. [ 335.656480] xhci_hcd 0000:04:00.0: @ed0d40d0 (virt) @2d0d40d0 (dma) 0x000000 - tx_info
  209. [ 335.656483] xhci_hcd 0000:04:00.0: @ed0d40d4 (virt) @2d0d40d4 (dma) 0x000000 - rsvd[0]
  210. [ 335.656485] xhci_hcd 0000:04:00.0: @ed0d40d8 (virt) @2d0d40d8 (dma) 0x000000 - rsvd[1]
  211. [ 335.656488] xhci_hcd 0000:04:00.0: @ed0d40dc (virt) @2d0d40dc (dma) 0x000000 - rsvd[2]
  212. [ 335.656491] xhci_hcd 0000:04:00.0: @ed0d40e0 (virt) @2d0d40e0 (dma) 0x000000 - rsvd64[0]
  213. [ 335.656494] xhci_hcd 0000:04:00.0: @ed0d40e8 (virt) @2d0d40e8 (dma) 0x000000 - rsvd64[1]
  214. [ 335.656496] xhci_hcd 0000:04:00.0: @ed0d40f0 (virt) @2d0d40f0 (dma) 0x000000 - rsvd64[2]
  215. [ 335.656499] xhci_hcd 0000:04:00.0: @ed0d40f8 (virt) @2d0d40f8 (dma) 0x000000 - rsvd64[3]
  216. [ 335.656502] xhci_hcd 0000:04:00.0: Internal device address = 2
  217. [ 335.673823] xhci_hcd 0000:04:00.0: test port 3 software LPM
  218. [ 335.687821] xhci_hcd 0000:04:00.0: port 3 entered L1 state, port status 0xe43
  219. [ 335.689042] xhci_hcd 0000:04:00.0: Port Status Change Event for port 4
  220. [ 335.689050] xhci_hcd 0000:04:00.0: handle_port_status: starting port polling.
  221. [ 335.689059] xhci_hcd 0000:04:00.0: xhci_hub_status_data: stopping port polling.
  222. [ 335.703850] xhci_hcd 0000:04:00.0: resumed port 3 status 0xe03
  223. [ 335.703855] xhci_hcd 0000:04:00.0: software LPM test succeed
  224. [ 335.705917] usb 3-4: skipped 3 descriptors after interface
  225. [ 335.706274] xhci_hcd 0000:04:00.0: Waiting for status stage event
  226. [ 335.706382] usb 3-4: default language 0x0409
  227. [ 335.706750] xhci_hcd 0000:04:00.0: Waiting for status stage event
  228. [ 335.707232] xhci_hcd 0000:04:00.0: Waiting for status stage event
  229. [ 335.707696] xhci_hcd 0000:04:00.0: Waiting for status stage event
  230. [ 335.707868] usb 3-4: udev 2, busnum 3, minor = 257
  231. [ 335.707874] usb 3-4: New USB device found, idVendor=0bda, idProduct=8152
  232. [ 335.707877] usb 3-4: New USB device strings: Mfr=1, Product=2, SerialNumber=3
  233. [ 335.707880] usb 3-4: Product: USB 10/100 LAN
  234. [ 335.707882] usb 3-4: Manufacturer: Realtek
  235. [ 335.707885] usb 3-4: SerialNumber: 00E04C361000
  236. [ 335.708069] usb 3-4: usb_probe_device
  237. [ 335.708075] usb 3-4: configuration #2 chosen from 2 choices
  238. [ 335.708084] xhci_hcd 0000:04:00.0: add ep 0x83, slot id 1, new drop flags = 0x0, new add flags = 0x80, new slot info = 0x38300000
  239. [ 335.708087] xhci_hcd 0000:04:00.0: xhci_check_bandwidth called for udev ed56c400
  240. [ 335.708090] xhci_hcd 0000:04:00.0: New Input Control Context:
  241. [ 335.708093] xhci_hcd 0000:04:00.0: @ed1ed000 (virt) @2d1ed000 (dma) 0x000000 - drop flags
  242. [ 335.708096] xhci_hcd 0000:04:00.0: @ed1ed004 (virt) @2d1ed004 (dma) 0x000081 - add flags
  243. [ 335.708099] xhci_hcd 0000:04:00.0: @ed1ed008 (virt) @2d1ed008 (dma) 0x000000 - rsvd2[0]
  244. [ 335.708101] xhci_hcd 0000:04:00.0: @ed1ed00c (virt) @2d1ed00c (dma) 0x000000 - rsvd2[1]
  245. [ 335.708104] xhci_hcd 0000:04:00.0: @ed1ed010 (virt) @2d1ed010 (dma) 0x000000 - rsvd2[2]
  246. [ 335.708107] xhci_hcd 0000:04:00.0: @ed1ed014 (virt) @2d1ed014 (dma) 0x000000 - rsvd2[3]
  247. [ 335.708110] xhci_hcd 0000:04:00.0: @ed1ed018 (virt) @2d1ed018 (dma) 0x000000 - rsvd2[4]
  248. [ 335.708112] xhci_hcd 0000:04:00.0: @ed1ed01c (virt) @2d1ed01c (dma) 0x000000 - rsvd2[5]
  249. [ 335.708115] xhci_hcd 0000:04:00.0: @ed1ed020 (virt) @2d1ed020 (dma) 0x000000 - rsvd64[0]
  250. [ 335.708118] xhci_hcd 0000:04:00.0: @ed1ed028 (virt) @2d1ed028 (dma) 0x000000 - rsvd64[1]
  251. [ 335.708121] xhci_hcd 0000:04:00.0: @ed1ed030 (virt) @2d1ed030 (dma) 0x000000 - rsvd64[2]
  252. [ 335.708124] xhci_hcd 0000:04:00.0: @ed1ed038 (virt) @2d1ed038 (dma) 0x000000 - rsvd64[3]
  253. [ 335.708126] xhci_hcd 0000:04:00.0: Slot Context:
  254. [ 335.708129] xhci_hcd 0000:04:00.0: @ed1ed040 (virt) @2d1ed040 (dma) 0x38300000 - dev_info
  255. [ 335.708132] xhci_hcd 0000:04:00.0: @ed1ed044 (virt) @2d1ed044 (dma) 0x040000 - dev_info2
  256. [ 335.708134] xhci_hcd 0000:04:00.0: @ed1ed048 (virt) @2d1ed048 (dma) 0x000000 - tt_info
  257. [ 335.708137] xhci_hcd 0000:04:00.0: @ed1ed04c (virt) @2d1ed04c (dma) 0x000000 - dev_state
  258. [ 335.708140] xhci_hcd 0000:04:00.0: @ed1ed050 (virt) @2d1ed050 (dma) 0x000000 - rsvd[0]
  259. [ 335.708143] xhci_hcd 0000:04:00.0: @ed1ed054 (virt) @2d1ed054 (dma) 0x000000 - rsvd[1]
  260. [ 335.708145] xhci_hcd 0000:04:00.0: @ed1ed058 (virt) @2d1ed058 (dma) 0x000000 - rsvd[2]
  261. [ 335.708148] xhci_hcd 0000:04:00.0: @ed1ed05c (virt) @2d1ed05c (dma) 0x000000 - rsvd[3]
  262. [ 335.708151] xhci_hcd 0000:04:00.0: @ed1ed060 (virt) @2d1ed060 (dma) 0x000000 - rsvd64[0]
  263. [ 335.708154] xhci_hcd 0000:04:00.0: @ed1ed068 (virt) @2d1ed068 (dma) 0x000000 - rsvd64[1]
  264. [ 335.708156] xhci_hcd 0000:04:00.0: @ed1ed070 (virt) @2d1ed070 (dma) 0x000000 - rsvd64[2]
  265. [ 335.708159] xhci_hcd 0000:04:00.0: @ed1ed078 (virt) @2d1ed078 (dma) 0x000000 - rsvd64[3]
  266. [ 335.708162] xhci_hcd 0000:04:00.0: Endpoint 00 Context:
  267. [ 335.708164] xhci_hcd 0000:04:00.0: @ed1ed080 (virt) @2d1ed080 (dma) 0x000000 - ep_info
  268. [ 335.708167] xhci_hcd 0000:04:00.0: @ed1ed084 (virt) @2d1ed084 (dma) 0x400026 - ep_info2
  269. [ 335.708170] xhci_hcd 0000:04:00.0: @ed1ed088 (virt) @2d1ed088 (dma) 0x30536801 - deq
  270. [ 335.708173] xhci_hcd 0000:04:00.0: @ed1ed090 (virt) @2d1ed090 (dma) 0x000000 - tx_info
  271. [ 335.708175] xhci_hcd 0000:04:00.0: @ed1ed094 (virt) @2d1ed094 (dma) 0x000000 - rsvd[0]
  272. [ 335.708178] xhci_hcd 0000:04:00.0: @ed1ed098 (virt) @2d1ed098 (dma) 0x000000 - rsvd[1]
  273. [ 335.708181] xhci_hcd 0000:04:00.0: @ed1ed09c (virt) @2d1ed09c (dma) 0x000000 - rsvd[2]
  274. [ 335.708184] xhci_hcd 0000:04:00.0: @ed1ed0a0 (virt) @2d1ed0a0 (dma) 0x000000 - rsvd64[0]
  275. [ 335.708186] xhci_hcd 0000:04:00.0: @ed1ed0a8 (virt) @2d1ed0a8 (dma) 0x000000 - rsvd64[1]
  276. [ 335.708189] xhci_hcd 0000:04:00.0: @ed1ed0b0 (virt) @2d1ed0b0 (dma) 0x000000 - rsvd64[2]
  277. [ 335.708192] xhci_hcd 0000:04:00.0: @ed1ed0b8 (virt) @2d1ed0b8 (dma) 0x000000 - rsvd64[3]
  278. [ 335.708194] xhci_hcd 0000:04:00.0: Endpoint 01 Context:
  279. [ 335.708197] xhci_hcd 0000:04:00.0: @ed1ed0c0 (virt) @2d1ed0c0 (dma) 0x000000 - ep_info
  280. [ 335.708199] xhci_hcd 0000:04:00.0: @ed1ed0c4 (virt) @2d1ed0c4 (dma) 0x000000 - ep_info2
  281. [ 335.708202] xhci_hcd 0000:04:00.0: @ed1ed0c8 (virt) @2d1ed0c8 (dma) 0x000000 - deq
  282. [ 335.708205] xhci_hcd 0000:04:00.0: @ed1ed0d0 (virt) @2d1ed0d0 (dma) 0x000000 - tx_info
  283. [ 335.708208] xhci_hcd 0000:04:00.0: @ed1ed0d4 (virt) @2d1ed0d4 (dma) 0x000000 - rsvd[0]
  284. [ 335.708210] xhci_hcd 0000:04:00.0: @ed1ed0d8 (virt) @2d1ed0d8 (dma) 0x000000 - rsvd[1]
  285. [ 335.708213] xhci_hcd 0000:04:00.0: @ed1ed0dc (virt) @2d1ed0dc (dma) 0x000000 - rsvd[2]
  286. [ 335.708216] xhci_hcd 0000:04:00.0: @ed1ed0e0 (virt) @2d1ed0e0 (dma) 0x000000 - rsvd64[0]
  287. [ 335.708219] xhci_hcd 0000:04:00.0: @ed1ed0e8 (virt) @2d1ed0e8 (dma) 0x000000 - rsvd64[1]
  288. [ 335.708221] xhci_hcd 0000:04:00.0: @ed1ed0f0 (virt) @2d1ed0f0 (dma) 0x000000 - rsvd64[2]
  289. [ 335.708224] xhci_hcd 0000:04:00.0: @ed1ed0f8 (virt) @2d1ed0f8 (dma) 0x000000 - rsvd64[3]
  290. [ 335.708227] xhci_hcd 0000:04:00.0: Endpoint 02 Context:
  291. [ 335.708229] xhci_hcd 0000:04:00.0: @ed1ed100 (virt) @2d1ed100 (dma) 0x000000 - ep_info
  292. [ 335.708232] xhci_hcd 0000:04:00.0: @ed1ed104 (virt) @2d1ed104 (dma) 0x000000 - ep_info2
  293. [ 335.708234] xhci_hcd 0000:04:00.0: @ed1ed108 (virt) @2d1ed108 (dma) 0x000000 - deq
  294. [ 335.708237] xhci_hcd 0000:04:00.0: @ed1ed110 (virt) @2d1ed110 (dma) 0x000000 - tx_info
  295. [ 335.708240] xhci_hcd 0000:04:00.0: @ed1ed114 (virt) @2d1ed114 (dma) 0x000000 - rsvd[0]
  296. [ 335.708242] xhci_hcd 0000:04:00.0: @ed1ed118 (virt) @2d1ed118 (dma) 0x000000 - rsvd[1]
  297. [ 335.708245] xhci_hcd 0000:04:00.0: @ed1ed11c (virt) @2d1ed11c (dma) 0x000000 - rsvd[2]
  298. [ 335.708248] xhci_hcd 0000:04:00.0: @ed1ed120 (virt) @2d1ed120 (dma) 0x000000 - rsvd64[0]
  299. [ 335.708251] xhci_hcd 0000:04:00.0: @ed1ed128 (virt) @2d1ed128 (dma) 0x000000 - rsvd64[1]
  300. [ 335.708253] xhci_hcd 0000:04:00.0: @ed1ed130 (virt) @2d1ed130 (dma) 0x000000 - rsvd64[2]
  301. [ 335.708256] xhci_hcd 0000:04:00.0: @ed1ed138 (virt) @2d1ed138 (dma) 0x000000 - rsvd64[3]
  302. [ 335.708259] xhci_hcd 0000:04:00.0: Endpoint 03 Context:
  303. [ 335.708261] xhci_hcd 0000:04:00.0: @ed1ed140 (virt) @2d1ed140 (dma) 0x000000 - ep_info
  304. [ 335.708264] xhci_hcd 0000:04:00.0: @ed1ed144 (virt) @2d1ed144 (dma) 0x000000 - ep_info2
  305. [ 335.708266] xhci_hcd 0000:04:00.0: @ed1ed148 (virt) @2d1ed148 (dma) 0x000000 - deq
  306. [ 335.708269] xhci_hcd 0000:04:00.0: @ed1ed150 (virt) @2d1ed150 (dma) 0x000000 - tx_info
  307. [ 335.708272] xhci_hcd 0000:04:00.0: @ed1ed154 (virt) @2d1ed154 (dma) 0x000000 - rsvd[0]
  308. [ 335.708275] xhci_hcd 0000:04:00.0: @ed1ed158 (virt) @2d1ed158 (dma) 0x000000 - rsvd[1]
  309. [ 335.708277] xhci_hcd 0000:04:00.0: @ed1ed15c (virt) @2d1ed15c (dma) 0x000000 - rsvd[2]
  310. [ 335.708280] xhci_hcd 0000:04:00.0: @ed1ed160 (virt) @2d1ed160 (dma) 0x000000 - rsvd64[0]
  311. [ 335.708283] xhci_hcd 0000:04:00.0: @ed1ed168 (virt) @2d1ed168 (dma) 0x000000 - rsvd64[1]
  312. [ 335.708286] xhci_hcd 0000:04:00.0: @ed1ed170 (virt) @2d1ed170 (dma) 0x000000 - rsvd64[2]
  313. [ 335.708288] xhci_hcd 0000:04:00.0: @ed1ed178 (virt) @2d1ed178 (dma) 0x000000 - rsvd64[3]
  314. [ 335.708291] xhci_hcd 0000:04:00.0: Endpoint 04 Context:
  315. [ 335.708293] xhci_hcd 0000:04:00.0: @ed1ed180 (virt) @2d1ed180 (dma) 0x000000 - ep_info
  316. [ 335.708296] xhci_hcd 0000:04:00.0: @ed1ed184 (virt) @2d1ed184 (dma) 0x000000 - ep_info2
  317. [ 335.708298] xhci_hcd 0000:04:00.0: @ed1ed188 (virt) @2d1ed188 (dma) 0x000000 - deq
  318. [ 335.708301] xhci_hcd 0000:04:00.0: @ed1ed190 (virt) @2d1ed190 (dma) 0x000000 - tx_info
  319. [ 335.708304] xhci_hcd 0000:04:00.0: @ed1ed194 (virt) @2d1ed194 (dma) 0x000000 - rsvd[0]
  320. [ 335.708307] xhci_hcd 0000:04:00.0: @ed1ed198 (virt) @2d1ed198 (dma) 0x000000 - rsvd[1]
  321. [ 335.708309] xhci_hcd 0000:04:00.0: @ed1ed19c (virt) @2d1ed19c (dma) 0x000000 - rsvd[2]
  322. [ 335.708312] xhci_hcd 0000:04:00.0: @ed1ed1a0 (virt) @2d1ed1a0 (dma) 0x000000 - rsvd64[0]
  323. [ 335.708315] xhci_hcd 0000:04:00.0: @ed1ed1a8 (virt) @2d1ed1a8 (dma) 0x000000 - rsvd64[1]
  324. [ 335.708318] xhci_hcd 0000:04:00.0: @ed1ed1b0 (virt) @2d1ed1b0 (dma) 0x000000 - rsvd64[2]
  325. [ 335.708320] xhci_hcd 0000:04:00.0: @ed1ed1b8 (virt) @2d1ed1b8 (dma) 0x000000 - rsvd64[3]
  326. [ 335.708323] xhci_hcd 0000:04:00.0: Endpoint 05 Context:
  327. [ 335.708325] xhci_hcd 0000:04:00.0: @ed1ed1c0 (virt) @2d1ed1c0 (dma) 0x000000 - ep_info
  328. [ 335.708328] xhci_hcd 0000:04:00.0: @ed1ed1c4 (virt) @2d1ed1c4 (dma) 0x000000 - ep_info2
  329. [ 335.708331] xhci_hcd 0000:04:00.0: @ed1ed1c8 (virt) @2d1ed1c8 (dma) 0x000000 - deq
  330. [ 335.708333] xhci_hcd 0000:04:00.0: @ed1ed1d0 (virt) @2d1ed1d0 (dma) 0x000000 - tx_info
  331. [ 335.708336] xhci_hcd 0000:04:00.0: @ed1ed1d4 (virt) @2d1ed1d4 (dma) 0x000000 - rsvd[0]
  332. [ 335.708339] xhci_hcd 0000:04:00.0: @ed1ed1d8 (virt) @2d1ed1d8 (dma) 0x000000 - rsvd[1]
  333. [ 335.708341] xhci_hcd 0000:04:00.0: @ed1ed1dc (virt) @2d1ed1dc (dma) 0x000000 - rsvd[2]
  334. [ 335.708344] xhci_hcd 0000:04:00.0: @ed1ed1e0 (virt) @2d1ed1e0 (dma) 0x000000 - rsvd64[0]
  335. [ 335.708347] xhci_hcd 0000:04:00.0: @ed1ed1e8 (virt) @2d1ed1e8 (dma) 0x000000 - rsvd64[1]
  336. [ 335.708350] xhci_hcd 0000:04:00.0: @ed1ed1f0 (virt) @2d1ed1f0 (dma) 0x000000 - rsvd64[2]
  337. [ 335.708353] xhci_hcd 0000:04:00.0: @ed1ed1f8 (virt) @2d1ed1f8 (dma) 0x000000 - rsvd64[3]
  338. [ 335.708355] xhci_hcd 0000:04:00.0: Endpoint 06 Context:
  339. [ 335.708358] xhci_hcd 0000:04:00.0: @ed1ed200 (virt) @2d1ed200 (dma) 0x070000 - ep_info
  340. [ 335.708360] xhci_hcd 0000:04:00.0: @ed1ed204 (virt) @2d1ed204 (dma) 0x10003e - ep_info2
  341. [ 335.708363] xhci_hcd 0000:04:00.0: @ed1ed208 (virt) @2d1ed208 (dma) 0x30640401 - deq
  342. [ 335.708366] xhci_hcd 0000:04:00.0: @ed1ed210 (virt) @2d1ed210 (dma) 0x100010 - tx_info
  343. [ 335.708368] xhci_hcd 0000:04:00.0: @ed1ed214 (virt) @2d1ed214 (dma) 0x000000 - rsvd[0]
  344. [ 335.708371] xhci_hcd 0000:04:00.0: @ed1ed218 (virt) @2d1ed218 (dma) 0x000000 - rsvd[1]
  345. [ 335.708374] xhci_hcd 0000:04:00.0: @ed1ed21c (virt) @2d1ed21c (dma) 0x000000 - rsvd[2]
  346. [ 335.708377] xhci_hcd 0000:04:00.0: @ed1ed220 (virt) @2d1ed220 (dma) 0x000000 - rsvd64[0]
  347. [ 335.708379] xhci_hcd 0000:04:00.0: @ed1ed228 (virt) @2d1ed228 (dma) 0x000000 - rsvd64[1]
  348. [ 335.708382] xhci_hcd 0000:04:00.0: @ed1ed230 (virt) @2d1ed230 (dma) 0x000000 - rsvd64[2]
  349. [ 335.708385] xhci_hcd 0000:04:00.0: @ed1ed238 (virt) @2d1ed238 (dma) 0x000000 - rsvd64[3]
  350. [ 335.708388] xhci_hcd 0000:04:00.0: // Ding dong!
  351. [ 335.722383] xhci_hcd 0000:04:00.0: Completed config ep cmd
  352. [ 335.722405] usb 3-4: Successful Endpoint Configure command
  353. [ 335.722408] xhci_hcd 0000:04:00.0: Output context after successful config ep cmd:
  354. [ 335.722411] xhci_hcd 0000:04:00.0: Slot Context:
  355. [ 335.722414] xhci_hcd 0000:04:00.0: @ed0d4000 (virt) @2d0d4000 (dma) 0x38300000 - dev_info
  356. [ 335.722417] xhci_hcd 0000:04:00.0: @ed0d4004 (virt) @2d0d4004 (dma) 0x040000 - dev_info2
  357. [ 335.722420] xhci_hcd 0000:04:00.0: @ed0d4008 (virt) @2d0d4008 (dma) 0x000000 - tt_info
  358. [ 335.722423] xhci_hcd 0000:04:00.0: @ed0d400c (virt) @2d0d400c (dma) 0x18000001 - dev_state
  359. [ 335.722426] xhci_hcd 0000:04:00.0: @ed0d4010 (virt) @2d0d4010 (dma) 0x000000 - rsvd[0]
  360. [ 335.722429] xhci_hcd 0000:04:00.0: @ed0d4014 (virt) @2d0d4014 (dma) 0x0003e8 - rsvd[1]
  361. [ 335.722432] xhci_hcd 0000:04:00.0: @ed0d4018 (virt) @2d0d4018 (dma) 0x000000 - rsvd[2]
  362. [ 335.722434] xhci_hcd 0000:04:00.0: @ed0d401c (virt) @2d0d401c (dma) 0x000000 - rsvd[3]
  363. [ 335.722437] xhci_hcd 0000:04:00.0: @ed0d4020 (virt) @2d0d4020 (dma) 0x000000 - rsvd64[0]
  364. [ 335.722440] xhci_hcd 0000:04:00.0: @ed0d4028 (virt) @2d0d4028 (dma) 0x000000 - rsvd64[1]
  365. [ 335.722443] xhci_hcd 0000:04:00.0: @ed0d4030 (virt) @2d0d4030 (dma) 0x000000 - rsvd64[2]
  366. [ 335.722446] xhci_hcd 0000:04:00.0: @ed0d4038 (virt) @2d0d4038 (dma) 0x000000 - rsvd64[3]
  367. [ 335.722448] xhci_hcd 0000:04:00.0: Endpoint 00 Context:
  368. [ 335.722451] xhci_hcd 0000:04:00.0: @ed0d4040 (virt) @2d0d4040 (dma) 0x000001 - ep_info
  369. [ 335.722454] xhci_hcd 0000:04:00.0: @ed0d4044 (virt) @2d0d4044 (dma) 0x400026 - ep_info2
  370. [ 335.722456] xhci_hcd 0000:04:00.0: @ed0d4048 (virt) @2d0d4048 (dma) 0x30536a41 - deq
  371. [ 335.722459] xhci_hcd 0000:04:00.0: @ed0d4050 (virt) @2d0d4050 (dma) 0x000000 - tx_info
  372. [ 335.722462] xhci_hcd 0000:04:00.0: @ed0d4054 (virt) @2d0d4054 (dma) 0x8000000 - rsvd[0]
  373. [ 335.722465] xhci_hcd 0000:04:00.0: @ed0d4058 (virt) @2d0d4058 (dma) 0x000000 - rsvd[1]
  374. [ 335.722468] xhci_hcd 0000:04:00.0: @ed0d405c (virt) @2d0d405c (dma) 0x00ae8c - rsvd[2]
  375. [ 335.722470] xhci_hcd 0000:04:00.0: @ed0d4060 (virt) @2d0d4060 (dma) 0x000000 - rsvd64[0]
  376. [ 335.722473] xhci_hcd 0000:04:00.0: @ed0d4068 (virt) @2d0d4068 (dma) 0x000000 - rsvd64[1]
  377. [ 335.722476] xhci_hcd 0000:04:00.0: @ed0d4070 (virt) @2d0d4070 (dma) 0x000000 - rsvd64[2]
  378. [ 335.722479] xhci_hcd 0000:04:00.0: @ed0d4078 (virt) @2d0d4078 (dma) 0x000000 - rsvd64[3]
  379. [ 335.722481] xhci_hcd 0000:04:00.0: Endpoint 01 Context:
  380. [ 335.722484] xhci_hcd 0000:04:00.0: @ed0d4080 (virt) @2d0d4080 (dma) 0x000000 - ep_info
  381. [ 335.722486] xhci_hcd 0000:04:00.0: @ed0d4084 (virt) @2d0d4084 (dma) 0x000000 - ep_info2
  382. [ 335.722489] xhci_hcd 0000:04:00.0: @ed0d4088 (virt) @2d0d4088 (dma) 0x000000 - deq
  383. [ 335.722491] xhci_hcd 0000:04:00.0: @ed0d4090 (virt) @2d0d4090 (dma) 0x000000 - tx_info
  384. [ 335.722494] xhci_hcd 0000:04:00.0: @ed0d4094 (virt) @2d0d4094 (dma) 0x000000 - rsvd[0]
  385. [ 335.722497] xhci_hcd 0000:04:00.0: @ed0d4098 (virt) @2d0d4098 (dma) 0x000000 - rsvd[1]
  386. [ 335.722500] xhci_hcd 0000:04:00.0: @ed0d409c (virt) @2d0d409c (dma) 0x000000 - rsvd[2]
  387. [ 335.722502] xhci_hcd 0000:04:00.0: @ed0d40a0 (virt) @2d0d40a0 (dma) 0x000000 - rsvd64[0]
  388. [ 335.722505] xhci_hcd 0000:04:00.0: @ed0d40a8 (virt) @2d0d40a8 (dma) 0x000000 - rsvd64[1]
  389. [ 335.722508] xhci_hcd 0000:04:00.0: @ed0d40b0 (virt) @2d0d40b0 (dma) 0x000000 - rsvd64[2]
  390. [ 335.722511] xhci_hcd 0000:04:00.0: @ed0d40b8 (virt) @2d0d40b8 (dma) 0x000000 - rsvd64[3]
  391. [ 335.722513] xhci_hcd 0000:04:00.0: Endpoint 02 Context:
  392. [ 335.722516] xhci_hcd 0000:04:00.0: @ed0d40c0 (virt) @2d0d40c0 (dma) 0x000000 - ep_info
  393. [ 335.722518] xhci_hcd 0000:04:00.0: @ed0d40c4 (virt) @2d0d40c4 (dma) 0x000000 - ep_info2
  394. [ 335.722521] xhci_hcd 0000:04:00.0: @ed0d40c8 (virt) @2d0d40c8 (dma) 0x000000 - deq
  395. [ 335.722524] xhci_hcd 0000:04:00.0: @ed0d40d0 (virt) @2d0d40d0 (dma) 0x000000 - tx_info
  396. [ 335.722526] xhci_hcd 0000:04:00.0: @ed0d40d4 (virt) @2d0d40d4 (dma) 0x000000 - rsvd[0]
  397. [ 335.722529] xhci_hcd 0000:04:00.0: @ed0d40d8 (virt) @2d0d40d8 (dma) 0x000000 - rsvd[1]
  398. [ 335.722532] xhci_hcd 0000:04:00.0: @ed0d40dc (virt) @2d0d40dc (dma) 0x000000 - rsvd[2]
  399. [ 335.722535] xhci_hcd 0000:04:00.0: @ed0d40e0 (virt) @2d0d40e0 (dma) 0x000000 - rsvd64[0]
  400. [ 335.722537] xhci_hcd 0000:04:00.0: @ed0d40e8 (virt) @2d0d40e8 (dma) 0x000000 - rsvd64[1]
  401. [ 335.722540] xhci_hcd 0000:04:00.0: @ed0d40f0 (virt) @2d0d40f0 (dma) 0x000000 - rsvd64[2]
  402. [ 335.722543] xhci_hcd 0000:04:00.0: @ed0d40f8 (virt) @2d0d40f8 (dma) 0x000000 - rsvd64[3]
  403. [ 335.722545] xhci_hcd 0000:04:00.0: Endpoint 03 Context:
  404. [ 335.722548] xhci_hcd 0000:04:00.0: @ed0d4100 (virt) @2d0d4100 (dma) 0x000000 - ep_info
  405. [ 335.722550] xhci_hcd 0000:04:00.0: @ed0d4104 (virt) @2d0d4104 (dma) 0x000000 - ep_info2
  406. [ 335.722553] xhci_hcd 0000:04:00.0: @ed0d4108 (virt) @2d0d4108 (dma) 0x000000 - deq
  407. [ 335.722556] xhci_hcd 0000:04:00.0: @ed0d4110 (virt) @2d0d4110 (dma) 0x000000 - tx_info
  408. [ 335.722558] xhci_hcd 0000:04:00.0: @ed0d4114 (virt) @2d0d4114 (dma) 0x000000 - rsvd[0]
  409. [ 335.722561] xhci_hcd 0000:04:00.0: @ed0d4118 (virt) @2d0d4118 (dma) 0x000000 - rsvd[1]
  410. [ 335.722564] xhci_hcd 0000:04:00.0: @ed0d411c (virt) @2d0d411c (dma) 0x000000 - rsvd[2]
  411. [ 335.722567] xhci_hcd 0000:04:00.0: @ed0d4120 (virt) @2d0d4120 (dma) 0x000000 - rsvd64[0]
  412. [ 335.722569] xhci_hcd 0000:04:00.0: @ed0d4128 (virt) @2d0d4128 (dma) 0x000000 - rsvd64[1]
  413. [ 335.722572] xhci_hcd 0000:04:00.0: @ed0d4130 (virt) @2d0d4130 (dma) 0x000000 - rsvd64[2]
  414. [ 335.722575] xhci_hcd 0000:04:00.0: @ed0d4138 (virt) @2d0d4138 (dma) 0x000000 - rsvd64[3]
  415. [ 335.722577] xhci_hcd 0000:04:00.0: Endpoint 04 Context:
  416. [ 335.722580] xhci_hcd 0000:04:00.0: @ed0d4140 (virt) @2d0d4140 (dma) 0x000000 - ep_info
  417. [ 335.722583] xhci_hcd 0000:04:00.0: @ed0d4144 (virt) @2d0d4144 (dma) 0x000000 - ep_info2
  418. [ 335.722585] xhci_hcd 0000:04:00.0: @ed0d4148 (virt) @2d0d4148 (dma) 0x000000 - deq
  419. [ 335.722588] xhci_hcd 0000:04:00.0: @ed0d4150 (virt) @2d0d4150 (dma) 0x000000 - tx_info
  420. [ 335.722590] xhci_hcd 0000:04:00.0: @ed0d4154 (virt) @2d0d4154 (dma) 0x000000 - rsvd[0]
  421. [ 335.722593] xhci_hcd 0000:04:00.0: @ed0d4158 (virt) @2d0d4158 (dma) 0x000000 - rsvd[1]
  422. [ 335.722596] xhci_hcd 0000:04:00.0: @ed0d415c (virt) @2d0d415c (dma) 0x000000 - rsvd[2]
  423. [ 335.722599] xhci_hcd 0000:04:00.0: @ed0d4160 (virt) @2d0d4160 (dma) 0x000000 - rsvd64[0]
  424. [ 335.722602] xhci_hcd 0000:04:00.0: @ed0d4168 (virt) @2d0d4168 (dma) 0x000000 - rsvd64[1]
  425. [ 335.722604] xhci_hcd 0000:04:00.0: @ed0d4170 (virt) @2d0d4170 (dma) 0x000000 - rsvd64[2]
  426. [ 335.722607] xhci_hcd 0000:04:00.0: @ed0d4178 (virt) @2d0d4178 (dma) 0x000000 - rsvd64[3]
  427. [ 335.722609] xhci_hcd 0000:04:00.0: Endpoint 05 Context:
  428. [ 335.722612] xhci_hcd 0000:04:00.0: @ed0d4180 (virt) @2d0d4180 (dma) 0x000000 - ep_info
  429. [ 335.722615] xhci_hcd 0000:04:00.0: @ed0d4184 (virt) @2d0d4184 (dma) 0x000000 - ep_info2
  430. [ 335.722617] xhci_hcd 0000:04:00.0: @ed0d4188 (virt) @2d0d4188 (dma) 0x000000 - deq
  431. [ 335.722620] xhci_hcd 0000:04:00.0: @ed0d4190 (virt) @2d0d4190 (dma) 0x000000 - tx_info
  432. [ 335.722623] xhci_hcd 0000:04:00.0: @ed0d4194 (virt) @2d0d4194 (dma) 0x000000 - rsvd[0]
  433. [ 335.722625] xhci_hcd 0000:04:00.0: @ed0d4198 (virt) @2d0d4198 (dma) 0x000000 - rsvd[1]
  434. [ 335.722628] xhci_hcd 0000:04:00.0: @ed0d419c (virt) @2d0d419c (dma) 0x000000 - rsvd[2]
  435. [ 335.722631] xhci_hcd 0000:04:00.0: @ed0d41a0 (virt) @2d0d41a0 (dma) 0x000000 - rsvd64[0]
  436. [ 335.722634] xhci_hcd 0000:04:00.0: @ed0d41a8 (virt) @2d0d41a8 (dma) 0x000000 - rsvd64[1]
  437. [ 335.722636] xhci_hcd 0000:04:00.0: @ed0d41b0 (virt) @2d0d41b0 (dma) 0x000000 - rsvd64[2]
  438. [ 335.722639] xhci_hcd 0000:04:00.0: @ed0d41b8 (virt) @2d0d41b8 (dma) 0x000000 - rsvd64[3]
  439. [ 335.722641] xhci_hcd 0000:04:00.0: Endpoint 06 Context:
  440. [ 335.722644] xhci_hcd 0000:04:00.0: @ed0d41c0 (virt) @2d0d41c0 (dma) 0x070001 - ep_info
  441. [ 335.722647] xhci_hcd 0000:04:00.0: @ed0d41c4 (virt) @2d0d41c4 (dma) 0x10003e - ep_info2
  442. [ 335.722650] xhci_hcd 0000:04:00.0: @ed0d41c8 (virt) @2d0d41c8 (dma) 0x30640401 - deq
  443. [ 335.722652] xhci_hcd 0000:04:00.0: @ed0d41d0 (virt) @2d0d41d0 (dma) 0x100010 - tx_info
  444. [ 335.722655] xhci_hcd 0000:04:00.0: @ed0d41d4 (virt) @2d0d41d4 (dma) 0x000000 - rsvd[0]
  445. [ 335.722658] xhci_hcd 0000:04:00.0: @ed0d41d8 (virt) @2d0d41d8 (dma) 0x000000 - rsvd[1]
  446. [ 335.722661] xhci_hcd 0000:04:00.0: @ed0d41dc (virt) @2d0d41dc (dma) 0x1000000 - rsvd[2]
  447. [ 335.722663] xhci_hcd 0000:04:00.0: @ed0d41e0 (virt) @2d0d41e0 (dma) 0x000000 - rsvd64[0]
  448. [ 335.722666] xhci_hcd 0000:04:00.0: @ed0d41e8 (virt) @2d0d41e8 (dma) 0x000000 - rsvd64[1]
  449. [ 335.722669] xhci_hcd 0000:04:00.0: @ed0d41f0 (virt) @2d0d41f0 (dma) 0x000000 - rsvd64[2]
  450. [ 335.722672] xhci_hcd 0000:04:00.0: @ed0d41f8 (virt) @2d0d41f8 (dma) 0x000000 - rsvd64[3]
  451. [ 335.722676] xhci_hcd 0000:04:00.0: Endpoint 0x83 not halted, refusing to reset.
  452. [ 335.722996] usb 3-4: adding 3-4:2.0 (config #2, interface 0)
  453. [ 335.723382] xhci_hcd 0000:04:00.0: Waiting for status stage event
  454. [ 335.723488] usb 3-4: adding 3-4:2.1 (config #2, interface 1)
  455. [ 335.727961] xhci_hcd 0000:04:00.0: Stalled endpoint
  456. [ 335.727968] xhci_hcd 0000:04:00.0: Cleaning up stalled endpoint ring
  457. [ 335.727970] xhci_hcd 0000:04:00.0: Finding segment containing stopped TRB.
  458. [ 335.727973] xhci_hcd 0000:04:00.0: Finding endpoint context
  459. [ 335.727975] xhci_hcd 0000:04:00.0: Finding segment containing last TRB in TD.
  460. [ 335.727977] xhci_hcd 0000:04:00.0: Cycle state = 0x1
  461. [ 335.727980] xhci_hcd 0000:04:00.0: New dequeue segment = ee4891e0 (virtual)
  462. [ 335.727982] xhci_hcd 0000:04:00.0: New dequeue pointer = 0x30536ac0 (DMA)
  463. [ 335.727985] xhci_hcd 0000:04:00.0: Queueing new dequeue state
  464. [ 335.727988] xhci_hcd 0000:04:00.0: Set TR Deq Ptr cmd, new deq seg = ee4891e0 (0x30536800 dma), new deq ptr = f0536ac0 (0x30536ac0 dma), new cycle = 1
  465. [ 335.727990] xhci_hcd 0000:04:00.0: // Ding dong!
  466. [ 335.727996] xhci_hcd 0000:04:00.0: Giveback URB ed76f180, len = 0, expected = 1024, status = -32
  467. [ 335.728012] xhci_hcd 0000:04:00.0: Ignoring reset ep completion code of 1
  468. [ 335.728053] xhci_hcd 0000:04:00.0: Successful Set TR Deq Ptr cmd, deq = @30536ac1
  469. [ 335.863739] xhci_hcd 0000:04:00.0: xhci_hub_status_data: stopping port polling.
  470. [ 335.915569] cdc_ether 3-4:2.0: usb_probe_interface
  471. [ 335.915574] cdc_ether 3-4:2.0: usb_probe_interface - got id
  472. [ 335.915603] xhci_hcd 0000:04:00.0: add ep 0x81, slot id 1, new drop flags = 0x0, new add flags = 0x8, new slot info = 0x18300000
  473. [ 335.915608] xhci_hcd 0000:04:00.0: add ep 0x2, slot id 1, new drop flags = 0x0, new add flags = 0x18, new slot info = 0x20300000
  474. [ 335.915611] xhci_hcd 0000:04:00.0: xhci_check_bandwidth called for udev ed56c400
  475. [ 335.915614] xhci_hcd 0000:04:00.0: New Input Control Context:
  476. [ 335.915617] xhci_hcd 0000:04:00.0: @ed1ed000 (virt) @2d1ed000 (dma) 0x000000 - drop flags
  477. [ 335.915620] xhci_hcd 0000:04:00.0: @ed1ed004 (virt) @2d1ed004 (dma) 0x000019 - add flags
  478. [ 335.915623] xhci_hcd 0000:04:00.0: @ed1ed008 (virt) @2d1ed008 (dma) 0x000000 - rsvd2[0]
  479. [ 335.915626] xhci_hcd 0000:04:00.0: @ed1ed00c (virt) @2d1ed00c (dma) 0x000000 - rsvd2[1]
  480. [ 335.915629] xhci_hcd 0000:04:00.0: @ed1ed010 (virt) @2d1ed010 (dma) 0x000000 - rsvd2[2]
  481. [ 335.915631] xhci_hcd 0000:04:00.0: @ed1ed014 (virt) @2d1ed014 (dma) 0x000000 - rsvd2[3]
  482. [ 335.915634] xhci_hcd 0000:04:00.0: @ed1ed018 (virt) @2d1ed018 (dma) 0x000000 - rsvd2[4]
  483. [ 335.915637] xhci_hcd 0000:04:00.0: @ed1ed01c (virt) @2d1ed01c (dma) 0x000000 - rsvd2[5]
  484. [ 335.915640] xhci_hcd 0000:04:00.0: @ed1ed020 (virt) @2d1ed020 (dma) 0x000000 - rsvd64[0]
  485. [ 335.915643] xhci_hcd 0000:04:00.0: @ed1ed028 (virt) @2d1ed028 (dma) 0x000000 - rsvd64[1]
  486. [ 335.915646] xhci_hcd 0000:04:00.0: @ed1ed030 (virt) @2d1ed030 (dma) 0x000000 - rsvd64[2]
  487. [ 335.915648] xhci_hcd 0000:04:00.0: @ed1ed038 (virt) @2d1ed038 (dma) 0x000000 - rsvd64[3]
  488. [ 335.915651] xhci_hcd 0000:04:00.0: Slot Context:
  489. [ 335.915653] xhci_hcd 0000:04:00.0: @ed1ed040 (virt) @2d1ed040 (dma) 0x20300000 - dev_info
  490. [ 335.915656] xhci_hcd 0000:04:00.0: @ed1ed044 (virt) @2d1ed044 (dma) 0x040000 - dev_info2
  491. [ 335.915659] xhci_hcd 0000:04:00.0: @ed1ed048 (virt) @2d1ed048 (dma) 0x000000 - tt_info
  492. [ 335.915662] xhci_hcd 0000:04:00.0: @ed1ed04c (virt) @2d1ed04c (dma) 0x000000 - dev_state
  493. [ 335.915664] xhci_hcd 0000:04:00.0: @ed1ed050 (virt) @2d1ed050 (dma) 0x000000 - rsvd[0]
  494. [ 335.915667] xhci_hcd 0000:04:00.0: @ed1ed054 (virt) @2d1ed054 (dma) 0x000000 - rsvd[1]
  495. [ 335.915670] xhci_hcd 0000:04:00.0: @ed1ed058 (virt) @2d1ed058 (dma) 0x000000 - rsvd[2]
  496. [ 335.915673] xhci_hcd 0000:04:00.0: @ed1ed05c (virt) @2d1ed05c (dma) 0x000000 - rsvd[3]
  497. [ 335.915675] xhci_hcd 0000:04:00.0: @ed1ed060 (virt) @2d1ed060 (dma) 0x000000 - rsvd64[0]
  498. [ 335.915678] xhci_hcd 0000:04:00.0: @ed1ed068 (virt) @2d1ed068 (dma) 0x000000 - rsvd64[1]
  499. [ 335.915681] xhci_hcd 0000:04:00.0: @ed1ed070 (virt) @2d1ed070 (dma) 0x000000 - rsvd64[2]
  500. [ 335.915684] xhci_hcd 0000:04:00.0: @ed1ed078 (virt) @2d1ed078 (dma) 0x000000 - rsvd64[3]
  501. [ 335.915686] xhci_hcd 0000:04:00.0: Endpoint 00 Context:
  502. [ 335.915689] xhci_hcd 0000:04:00.0: @ed1ed080 (virt) @2d1ed080 (dma) 0x000000 - ep_info
  503. [ 335.915692] xhci_hcd 0000:04:00.0: @ed1ed084 (virt) @2d1ed084 (dma) 0x400026 - ep_info2
  504. [ 335.915695] xhci_hcd 0000:04:00.0: @ed1ed088 (virt) @2d1ed088 (dma) 0x30536801 - deq
  505. [ 335.915697] xhci_hcd 0000:04:00.0: @ed1ed090 (virt) @2d1ed090 (dma) 0x000000 - tx_info
  506. [ 335.915700] xhci_hcd 0000:04:00.0: @ed1ed094 (virt) @2d1ed094 (dma) 0x000000 - rsvd[0]
  507. [ 335.915703] xhci_hcd 0000:04:00.0: @ed1ed098 (virt) @2d1ed098 (dma) 0x000000 - rsvd[1]
  508. [ 335.915706] xhci_hcd 0000:04:00.0: @ed1ed09c (virt) @2d1ed09c (dma) 0x000000 - rsvd[2]
  509. [ 335.915725] xhci_hcd 0000:04:00.0: @ed1ed0a0 (virt) @2d1ed0a0 (dma) 0x000000 - rsvd64[0]
  510. [ 335.915728] xhci_hcd 0000:04:00.0: @ed1ed0a8 (virt) @2d1ed0a8 (dma) 0x000000 - rsvd64[1]
  511. [ 335.915731] xhci_hcd 0000:04:00.0: @ed1ed0b0 (virt) @2d1ed0b0 (dma) 0x000000 - rsvd64[2]
  512. [ 335.915733] xhci_hcd 0000:04:00.0: @ed1ed0b8 (virt) @2d1ed0b8 (dma) 0x000000 - rsvd64[3]
  513. [ 335.915736] xhci_hcd 0000:04:00.0: Endpoint 01 Context:
  514. [ 335.915738] xhci_hcd 0000:04:00.0: @ed1ed0c0 (virt) @2d1ed0c0 (dma) 0x000000 - ep_info
  515. [ 335.915741] xhci_hcd 0000:04:00.0: @ed1ed0c4 (virt) @2d1ed0c4 (dma) 0x000000 - ep_info2
  516. [ 335.915744] xhci_hcd 0000:04:00.0: @ed1ed0c8 (virt) @2d1ed0c8 (dma) 0x000000 - deq
  517. [ 335.915746] xhci_hcd 0000:04:00.0: @ed1ed0d0 (virt) @2d1ed0d0 (dma) 0x000000 - tx_info
  518. [ 335.915749] xhci_hcd 0000:04:00.0: @ed1ed0d4 (virt) @2d1ed0d4 (dma) 0x000000 - rsvd[0]
  519. [ 335.915752] xhci_hcd 0000:04:00.0: @ed1ed0d8 (virt) @2d1ed0d8 (dma) 0x000000 - rsvd[1]
  520. [ 335.915760] xhci_hcd 0000:04:00.0: @ed1ed0dc (virt) @2d1ed0dc (dma) 0x000000 - rsvd[2]
  521. [ 335.915768] xhci_hcd 0000:04:00.0: @ed1ed0e0 (virt) @2d1ed0e0 (dma) 0x000000 - rsvd64[0]
  522. [ 335.915776] xhci_hcd 0000:04:00.0: @ed1ed0e8 (virt) @2d1ed0e8 (dma) 0x000000 - rsvd64[1]
  523. [ 335.915784] xhci_hcd 0000:04:00.0: @ed1ed0f0 (virt) @2d1ed0f0 (dma) 0x000000 - rsvd64[2]
  524. [ 335.915792] xhci_hcd 0000:04:00.0: @ed1ed0f8 (virt) @2d1ed0f8 (dma) 0x000000 - rsvd64[3]
  525. [ 335.915799] xhci_hcd 0000:04:00.0: Endpoint 02 Context:
  526. [ 335.915807] xhci_hcd 0000:04:00.0: @ed1ed100 (virt) @2d1ed100 (dma) 0x000000 - ep_info
  527. [ 335.915815] xhci_hcd 0000:04:00.0: @ed1ed104 (virt) @2d1ed104 (dma) 0x2000036 - ep_info2
  528. [ 335.915822] xhci_hcd 0000:04:00.0: @ed1ed108 (virt) @2d1ed108 (dma) 0x2d1cd001 - deq
  529. [ 335.915827] xhci_hcd 0000:04:00.0: @ed1ed110 (virt) @2d1ed110 (dma) 0x000000 - tx_info
  530. [ 335.915830] xhci_hcd 0000:04:00.0: @ed1ed114 (virt) @2d1ed114 (dma) 0x000000 - rsvd[0]
  531. [ 335.915833] xhci_hcd 0000:04:00.0: @ed1ed118 (virt) @2d1ed118 (dma) 0x000000 - rsvd[1]
  532. [ 335.915835] xhci_hcd 0000:04:00.0: @ed1ed11c (virt) @2d1ed11c (dma) 0x000000 - rsvd[2]
  533. [ 335.915838] xhci_hcd 0000:04:00.0: @ed1ed120 (virt) @2d1ed120 (dma) 0x000000 - rsvd64[0]
  534. [ 335.915841] xhci_hcd 0000:04:00.0: @ed1ed128 (virt) @2d1ed128 (dma) 0x000000 - rsvd64[1]
  535. [ 335.915844] xhci_hcd 0000:04:00.0: @ed1ed130 (virt) @2d1ed130 (dma) 0x000000 - rsvd64[2]
  536. [ 335.915847] xhci_hcd 0000:04:00.0: @ed1ed138 (virt) @2d1ed138 (dma) 0x000000 - rsvd64[3]
  537. [ 335.915849] xhci_hcd 0000:04:00.0: Endpoint 03 Context:
  538. [ 335.915852] xhci_hcd 0000:04:00.0: @ed1ed140 (virt) @2d1ed140 (dma) 0x000000 - ep_info
  539. [ 335.915854] xhci_hcd 0000:04:00.0: @ed1ed144 (virt) @2d1ed144 (dma) 0x2000016 - ep_info2
  540. [ 335.915857] xhci_hcd 0000:04:00.0: @ed1ed148 (virt) @2d1ed148 (dma) 0x2d1cd801 - deq
  541. [ 335.915860] xhci_hcd 0000:04:00.0: @ed1ed150 (virt) @2d1ed150 (dma) 0x000000 - tx_info
  542. [ 335.915862] xhci_hcd 0000:04:00.0: @ed1ed154 (virt) @2d1ed154 (dma) 0x000000 - rsvd[0]
  543. [ 335.915865] xhci_hcd 0000:04:00.0: @ed1ed158 (virt) @2d1ed158 (dma) 0x000000 - rsvd[1]
  544. [ 335.915868] xhci_hcd 0000:04:00.0: @ed1ed15c (virt) @2d1ed15c (dma) 0x000000 - rsvd[2]
  545. [ 335.915871] xhci_hcd 0000:04:00.0: @ed1ed160 (virt) @2d1ed160 (dma) 0x000000 - rsvd64[0]
  546. [ 335.915873] xhci_hcd 0000:04:00.0: @ed1ed168 (virt) @2d1ed168 (dma) 0x000000 - rsvd64[1]
  547. [ 335.915876] xhci_hcd 0000:04:00.0: @ed1ed170 (virt) @2d1ed170 (dma) 0x000000 - rsvd64[2]
  548. [ 335.915879] xhci_hcd 0000:04:00.0: @ed1ed178 (virt) @2d1ed178 (dma) 0x000000 - rsvd64[3]
  549. [ 335.915882] xhci_hcd 0000:04:00.0: // Ding dong!
  550. [ 335.915918] xhci_hcd 0000:04:00.0: Completed config ep cmd
  551. [ 335.915931] usb 3-4: Successful Endpoint Configure command
  552. [ 335.915934] xhci_hcd 0000:04:00.0: Output context after successful config ep cmd:
  553. [ 335.915936] xhci_hcd 0000:04:00.0: Slot Context:
  554. [ 335.915939] xhci_hcd 0000:04:00.0: @ed0d4000 (virt) @2d0d4000 (dma) 0x20300000 - dev_info
  555. [ 335.915941] xhci_hcd 0000:04:00.0: @ed0d4004 (virt) @2d0d4004 (dma) 0x040000 - dev_info2
  556. [ 335.915944] xhci_hcd 0000:04:00.0: @ed0d4008 (virt) @2d0d4008 (dma) 0x000000 - tt_info
  557. [ 335.915947] xhci_hcd 0000:04:00.0: @ed0d400c (virt) @2d0d400c (dma) 0x18000001 - dev_state
  558. [ 335.915950] xhci_hcd 0000:04:00.0: @ed0d4010 (virt) @2d0d4010 (dma) 0x000000 - rsvd[0]
  559. [ 335.915952] xhci_hcd 0000:04:00.0: @ed0d4014 (virt) @2d0d4014 (dma) 0x0003e8 - rsvd[1]
  560. [ 335.915955] xhci_hcd 0000:04:00.0: @ed0d4018 (virt) @2d0d4018 (dma) 0x000000 - rsvd[2]
  561. [ 335.915958] xhci_hcd 0000:04:00.0: @ed0d401c (virt) @2d0d401c (dma) 0x000000 - rsvd[3]
  562. [ 335.915961] xhci_hcd 0000:04:00.0: @ed0d4020 (virt) @2d0d4020 (dma) 0x000000 - rsvd64[0]
  563. [ 335.915963] xhci_hcd 0000:04:00.0: @ed0d4028 (virt) @2d0d4028 (dma) 0x000000 - rsvd64[1]
  564. [ 335.915966] xhci_hcd 0000:04:00.0: @ed0d4030 (virt) @2d0d4030 (dma) 0x000000 - rsvd64[2]
  565. [ 335.915969] xhci_hcd 0000:04:00.0: @ed0d4038 (virt) @2d0d4038 (dma) 0x000000 - rsvd64[3]
  566. [ 335.915971] xhci_hcd 0000:04:00.0: Endpoint 00 Context:
  567. [ 335.915974] xhci_hcd 0000:04:00.0: @ed0d4040 (virt) @2d0d4040 (dma) 0x000003 - ep_info
  568. [ 335.915977] xhci_hcd 0000:04:00.0: @ed0d4044 (virt) @2d0d4044 (dma) 0x400026 - ep_info2
  569. [ 335.915979] xhci_hcd 0000:04:00.0: @ed0d4048 (virt) @2d0d4048 (dma) 0x30536ac1 - deq
  570. [ 335.915982] xhci_hcd 0000:04:00.0: @ed0d4050 (virt) @2d0d4050 (dma) 0x000000 - tx_info
  571. [ 335.915985] xhci_hcd 0000:04:00.0: @ed0d4054 (virt) @2d0d4054 (dma) 0x000000 - rsvd[0]
  572. [ 335.915988] xhci_hcd 0000:04:00.0: @ed0d4058 (virt) @2d0d4058 (dma) 0x000000 - rsvd[1]
  573. [ 335.915990] xhci_hcd 0000:04:00.0: @ed0d405c (virt) @2d0d405c (dma) 0x000000 - rsvd[2]
  574. [ 335.915993] xhci_hcd 0000:04:00.0: @ed0d4060 (virt) @2d0d4060 (dma) 0x000000 - rsvd64[0]
  575. [ 335.915996] xhci_hcd 0000:04:00.0: @ed0d4068 (virt) @2d0d4068 (dma) 0x000000 - rsvd64[1]
  576. [ 335.915999] xhci_hcd 0000:04:00.0: @ed0d4070 (virt) @2d0d4070 (dma) 0x000000 - rsvd64[2]
  577. [ 335.916001] xhci_hcd 0000:04:00.0: @ed0d4078 (virt) @2d0d4078 (dma) 0x000000 - rsvd64[3]
  578. [ 335.916004] xhci_hcd 0000:04:00.0: Endpoint 01 Context:
  579. [ 335.916010] xhci_hcd 0000:04:00.0: @ed0d4080 (virt) @2d0d4080 (dma) 0x000000 - ep_info
  580. [ 335.916018] xhci_hcd 0000:04:00.0: @ed0d4084 (virt) @2d0d4084 (dma) 0x000000 - ep_info2
  581. [ 335.916025] xhci_hcd 0000:04:00.0: @ed0d4088 (virt) @2d0d4088 (dma) 0x000000 - deq
  582. [ 335.916033] xhci_hcd 0000:04:00.0: @ed0d4090 (virt) @2d0d4090 (dma) 0x000000 - tx_info
  583. [ 335.916040] xhci_hcd 0000:04:00.0: @ed0d4094 (virt) @2d0d4094 (dma) 0x000000 - rsvd[0]
  584. [ 335.916048] xhci_hcd 0000:04:00.0: @ed0d4098 (virt) @2d0d4098 (dma) 0x000000 - rsvd[1]
  585. [ 335.916056] xhci_hcd 0000:04:00.0: @ed0d409c (virt) @2d0d409c (dma) 0x000000 - rsvd[2]
  586. [ 335.916064] xhci_hcd 0000:04:00.0: @ed0d40a0 (virt) @2d0d40a0 (dma) 0x000000 - rsvd64[0]
  587. [ 335.916071] xhci_hcd 0000:04:00.0: @ed0d40a8 (virt) @2d0d40a8 (dma) 0x000000 - rsvd64[1]
  588. [ 335.916078] xhci_hcd 0000:04:00.0: @ed0d40b0 (virt) @2d0d40b0 (dma) 0x000000 - rsvd64[2]
  589. [ 335.916080] xhci_hcd 0000:04:00.0: @ed0d40b8 (virt) @2d0d40b8 (dma) 0x000000 - rsvd64[3]
  590. [ 335.916083] xhci_hcd 0000:04:00.0: Endpoint 02 Context:
  591. [ 335.916086] xhci_hcd 0000:04:00.0: @ed0d40c0 (virt) @2d0d40c0 (dma) 0x000001 - ep_info
  592. [ 335.916088] xhci_hcd 0000:04:00.0: @ed0d40c4 (virt) @2d0d40c4 (dma) 0x2000036 - ep_info2
  593. [ 335.916091] xhci_hcd 0000:04:00.0: @ed0d40c8 (virt) @2d0d40c8 (dma) 0x2d1cd001 - deq
  594. [ 335.916094] xhci_hcd 0000:04:00.0: @ed0d40d0 (virt) @2d0d40d0 (dma) 0x000000 - tx_info
  595. [ 335.916096] xhci_hcd 0000:04:00.0: @ed0d40d4 (virt) @2d0d40d4 (dma) 0x000000 - rsvd[0]
  596. [ 335.916099] xhci_hcd 0000:04:00.0: @ed0d40d8 (virt) @2d0d40d8 (dma) 0x000000 - rsvd[1]
  597. [ 335.916102] xhci_hcd 0000:04:00.0: @ed0d40dc (virt) @2d0d40dc (dma) 0x1000000 - rsvd[2]
  598. [ 335.916105] xhci_hcd 0000:04:00.0: @ed0d40e0 (virt) @2d0d40e0 (dma) 0x000000 - rsvd64[0]
  599. [ 335.916107] xhci_hcd 0000:04:00.0: @ed0d40e8 (virt) @2d0d40e8 (dma) 0x000000 - rsvd64[1]
  600. [ 335.916110] xhci_hcd 0000:04:00.0: @ed0d40f0 (virt) @2d0d40f0 (dma) 0x000000 - rsvd64[2]
  601. [ 335.916113] xhci_hcd 0000:04:00.0: @ed0d40f8 (virt) @2d0d40f8 (dma) 0x000000 - rsvd64[3]
  602. [ 335.916115] xhci_hcd 0000:04:00.0: Endpoint 03 Context:
  603. [ 335.916118] xhci_hcd 0000:04:00.0: @ed0d4100 (virt) @2d0d4100 (dma) 0x000001 - ep_info
  604. [ 335.916121] xhci_hcd 0000:04:00.0: @ed0d4104 (virt) @2d0d4104 (dma) 0x2000016 - ep_info2
  605. [ 335.916123] xhci_hcd 0000:04:00.0: @ed0d4108 (virt) @2d0d4108 (dma) 0x2d1cd801 - deq
  606. [ 335.916126] xhci_hcd 0000:04:00.0: @ed0d4110 (virt) @2d0d4110 (dma) 0x000000 - tx_info
  607. [ 335.916129] xhci_hcd 0000:04:00.0: @ed0d4114 (virt) @2d0d4114 (dma) 0x000000 - rsvd[0]
  608. [ 335.916131] xhci_hcd 0000:04:00.0: @ed0d4118 (virt) @2d0d4118 (dma) 0x000000 - rsvd[1]
  609. [ 335.916134] xhci_hcd 0000:04:00.0: @ed0d411c (virt) @2d0d411c (dma) 0x1000000 - rsvd[2]
  610. [ 335.916137] xhci_hcd 0000:04:00.0: @ed0d4120 (virt) @2d0d4120 (dma) 0x000000 - rsvd64[0]
  611. [ 335.916140] xhci_hcd 0000:04:00.0: @ed0d4128 (virt) @2d0d4128 (dma) 0x000000 - rsvd64[1]
  612. [ 335.916143] xhci_hcd 0000:04:00.0: @ed0d4130 (virt) @2d0d4130 (dma) 0x000000 - rsvd64[2]
  613. [ 335.916145] xhci_hcd 0000:04:00.0: @ed0d4138 (virt) @2d0d4138 (dma) 0x000000 - rsvd64[3]
  614. [ 335.916411] xhci_hcd 0000:04:00.0: Endpoint 0x81 not halted, refusing to reset.
  615. [ 335.916414] xhci_hcd 0000:04:00.0: Endpoint 0x2 not halted, refusing to reset.
  616. [ 335.916774] xhci_hcd 0000:04:00.0: Waiting for status stage event
  617. [ 335.917274] xhci_hcd 0000:04:00.0: Waiting for status stage event
  618. [ 335.917613] cdc_ether 3-4:2.0 eth1: register 'cdc_ether' at usb-0000:04:00.0-4, CDC Ethernet Device, 00:e0:4c:36:10:00
  619. [ 335.917715] usbcore: registered new interface driver cdc_ether
  620. [ 335.994089] xhci_hcd 0000:04:00.0: ep 0x83 - asked for 16 bytes, 8 bytes untransferred
  621. [ 336.058083] xhci_hcd 0000:04:00.0: ep 0x83 - asked for 16 bytes, 8 bytes untransferred
  622. [ 336.122030] xhci_hcd 0000:04:00.0: ep 0x83 - asked for 16 bytes, 8 bytes untransferred
  623. [ 336.185981] xhci_hcd 0000:04:00.0: ep 0x83 - asked for 16 bytes, 8 bytes untransferred
  624. [ 336.249929] xhci_hcd 0000:04:00.0: ep 0x83 - asked for 16 bytes, 8 bytes untransferred
Advertisement
Add Comment
Please, Sign In to add comment
Advertisement