library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use ieee.numeric_std.ALL;
use ieee.std_logic_arith.all;

entity memorie8x4 is
    port(

    clk:        in std_logic;
    cs:     in std_logic; -- cs = 1 => chip selected
    rw:     in std_logic; -- rw = 1 => read; 0 => write
    address: in std_logic_vector(2 downto 0);
    output:     inout std_logic_vector(3 downto 0) -- tip inout ca sa putem si citi si scrie

    );
end memorie8x4;

architecture Behavioral of memorie8x4 is

    type MEM_array is array(0 to 7) -- 3 biti de adresa
        of std_logic_vector(3 downto 0);
    signal mem8x4: MEM_array := (others => "0000"); -- valorile noastre prestabilite

    signal out_sig: std_logic_vector(3 downto 0) := "ZZZZ";
begin
    -- este output doar cand suntem in read mode. Cand suntem in write mode e input
    -- ( starea Z e impedanta mare ca sa putem citi valori de la portul output )
    output <= out_sig when (cs = '1' and rw = '1') else (others => 'Z');

    process(clk, cs, rw, address)
    begin
    if rising_edge(clk) then
        if cs = '0' then
            out_sig <= "ZZZZ";
        else -- chip-ul este selectat
            if rw = '1' then --modul read a fost selectat
                case address is
                    when "000" => out_sig <= mem8x4(0);
                    when "001" => out_sig <= mem8x4(1);
                    when "010" => out_sig <= mem8x4(2);
                    when "011" => out_sig <= mem8x4(3);
                    when "100" => out_sig <= mem8x4(4);
                    when "101" => out_sig <= mem8x4(5);
                    when "110" => out_sig <= mem8x4(6);
                    when "111" => out_sig <= mem8x4(7);
                    when others => out_sig <= "0000";
                end case;
            else -- modul write a fost selectat
                case address is
                    when "000" => mem8x4(0) <= output;
                    when "001" => mem8x4(1) <= output;
                    when "010" => mem8x4(2) <= output;
                    when "011" => mem8x4(3) <= output;
                    when "100" => mem8x4(4) <= output;
                    when "101" => mem8x4(5) <= output;
                    when "110" => mem8x4(6) <= output;
                    when "111" => mem8x4(7) <= output;
                    when others => mem8x4 <= (others => "0000");
                end case;
            end if;
        end if;
    end if;
    end process;

end Behavioral;