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- void clock_setup(void)
- {
- // This is not permissible on CERB40, b/c there's no crystal
- /* Enable high-speed clock at 120MHz */
- //rcc_clock_setup_hse_3v3(&hse_8mhz_3v3[CLOCK_3V3_120MHZ]);
- /* Reset the RCC clock configuration to the default reset state ------------*/
- /* Set HSION bit */
- //RCC->CR |= (uint32_t)0x00000001;
- RCC_CR |= (uint32_t)0x00000001;
- /* Reset CFGR register */
- //RCC->CFGR = 0x00000000;
- RCC_CFGR = 0x00000000;
- /* Reset HSEON, CSSON and PLLON bits */
- //RCC->CR &= (uint32_t)0xFEF6FFFF;
- RCC_CR &= (uint32_t)0xFEF6FFFF;
- /* Reset PLLCFGR register */
- //RCC->PLLCFGR = 0x24003010;
- RCC_PLLCFGR = 0x24003010;
- /* Reset HSEBYP bit */
- //RCC->CR &= (uint32_t)0xFFFBFFFF;
- RCC_CR &= (uint32_t)0xFFFBFFFF;
- /* Disable all interrupts */
- //RCC->CIR = 0x00000000;
- RCC_CIR = 0x00000000;
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