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  1. /*
  2.  * Code for AM335X EVM.
  3.  *
  4.  * Copyright (C) 2011 Texas Instruments, Inc. - http://www.ti.com/
  5.  *
  6.  * This program is free software; you can redistribute it and/or
  7.  * modify it under the terms of the GNU General Public License as
  8.  * published by the Free Software Foundation version 2.
  9.  *
  10.  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11.  * kind, whether express or implied; without even the implied warranty
  12.  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13.  * GNU General Public License for more details.
  14.  */
  15. #include <linux/kernel.h>
  16. #include <linux/init.h>
  17. #include <linux/i2c.h>
  18. #include <linux/module.h>
  19. #include <linux/i2c/at24.h>
  20. #include <linux/phy.h>
  21. #include <linux/gpio.h>
  22. #include <linux/leds.h>
  23. #include <linux/spi/spi.h>
  24. #include <linux/spi/flash.h>
  25. #include <linux/gpio_keys.h>
  26. #include <linux/input.h>
  27. #include <linux/input/matrix_keypad.h>
  28. #include <linux/mtd/mtd.h>
  29. #include <linux/mtd/nand.h>
  30. #include <linux/mtd/partitions.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/clk.h>
  33. #include <linux/err.h>
  34. #include <linux/wl12xx.h>
  35. #include <linux/ethtool.h>
  36. #include <linux/mfd/tps65910.h>
  37. #include <linux/mfd/tps65217.h>
  38. #include <linux/pwm_backlight.h>
  39. #include <linux/reboot.h>
  40. #include <linux/pwm/pwm.h>
  41. #include <linux/opp.h>
  42. #include <linux/w1-gpio.h>
  43. #include <linux/can/platform/mcp251x.h>
  44. #include <linux/input/ti_tscadc.h>
  45.  
  46. #include <sound/tlv320aic3x.h>
  47.  
  48. /* LCD controller is similar to DA850 */
  49. #include <video/da8xx-fb.h>
  50.  
  51. #include <mach/hardware.h>
  52. #include <mach/board-am335xevm.h>
  53.  
  54. #include <asm/mach-types.h>
  55. #include <asm/mach/arch.h>
  56. #include <asm/mach/map.h>
  57. #include <asm/hardware/asp.h>
  58.  
  59. #include <plat/omap_device.h>
  60. #include <plat/irqs.h>
  61. #include <plat/board.h>
  62. #include <plat/common.h>
  63. #include <plat/lcdc.h>
  64. #include <plat/usb.h>
  65. #include <plat/mmc.h>
  66. #include <plat/emif.h>
  67. #include <plat/nand.h>
  68. #include <plat/dma-33xx.h>
  69.  
  70. #include <media/soc_camera.h>
  71. #include <media/mt9t112.h>
  72.  
  73. #include "board-flash.h"
  74. #include "cpuidle33xx.h"
  75. #include "mux.h"
  76. #include "devices.h"
  77. #include "hsmmc.h"
  78.  
  79. /* Convert GPIO signal to GPIO pin number */
  80. #define GPIO_TO_PIN(bank, gpio) (32 * (bank) + (gpio))
  81.  
  82. /* TLK PHY IDs */
  83. #define TLK110_PHY_ID       0x2000A201
  84. #define TLK110_PHY_MASK     0xfffffff0
  85.  
  86. /* BBB PHY IDs */
  87. #define BBB_PHY_ID      0x7c0f1
  88. #define BBB_PHY_MASK        0xfffffffe
  89.  
  90. /* TLK110 PHY register offsets */
  91. #define TLK110_COARSEGAIN_REG   0x00A3
  92. #define TLK110_LPFHPF_REG   0x00AC
  93. #define TLK110_SPAREANALOG_REG  0x00B9
  94. #define TLK110_VRCR_REG     0x00D0
  95. #define TLK110_SETFFE_REG   0x0107
  96. #define TLK110_FTSP_REG     0x0154
  97. #define TLK110_ALFATPIDL_REG    0x002A
  98. #define TLK110_PSCOEF21_REG 0x0096
  99. #define TLK110_PSCOEF3_REG  0x0097
  100. #define TLK110_ALFAFACTOR1_REG  0x002C
  101. #define TLK110_ALFAFACTOR2_REG  0x0023
  102. #define TLK110_CFGPS_REG    0x0095
  103. #define TLK110_FTSPTXGAIN_REG   0x0150
  104. #define TLK110_SWSCR3_REG   0x000B
  105. #define TLK110_SCFALLBACK_REG   0x0040
  106. #define TLK110_PHYRCR_REG   0x001F
  107.  
  108. /* TLK110 register writes values */
  109. #define TLK110_COARSEGAIN_VAL   0x0000
  110. #define TLK110_LPFHPF_VAL   0x8000
  111. #define TLK110_SPANALOG_VAL 0x0000
  112. #define TLK110_VRCR_VAL     0x0008
  113. #define TLK110_SETFFE_VAL   0x0605
  114. #define TLK110_FTSP_VAL     0x0255
  115. #define TLK110_ALFATPIDL_VAL    0x7998
  116. #define TLK110_PSCOEF21_VAL 0x3A20
  117. #define TLK110_PSCOEF3_VAL  0x003F
  118. #define TLK110_ALFACTOR1_VAL    0xFF80
  119. #define TLK110_ALFACTOR2_VAL    0x021C
  120. #define TLK110_CFGPS_VAL    0x0000
  121. #define TLK110_FTSPTXGAIN_VAL   0x6A88
  122. #define TLK110_SWSCR3_VAL   0x0000
  123. #define TLK110_SCFALLBACK_VAL   0xC11D
  124. #define TLK110_PHYRCR_VAL   0x4000
  125.  
  126. #if defined(CONFIG_TLK110_WORKAROUND) || \
  127.         defined(CONFIG_TLK110_WORKAROUND_MODULE)
  128. #define am335x_tlk110_phy_init()\
  129.     do {    \
  130.         phy_register_fixup_for_uid(TLK110_PHY_ID,\
  131.                     TLK110_PHY_MASK,\
  132.                     am335x_tlk110_phy_fixup);\
  133.     } while (0);
  134. #else
  135. #define am335x_tlk110_phy_init() do { } while (0);
  136. #endif
  137.  
  138. static const struct display_panel disp_panel = {
  139.     WVGA,
  140.     32,
  141.     32,
  142.     COLOR_ACTIVE,
  143. };
  144.  
  145.  
  146. #if defined(CONFIG_CHARGER_GPIO)
  147.  
  148. #include <linux/power_supply.h>
  149. #include <linux/power/gpio-charger.h>
  150.  
  151. /* charger */
  152. static char *beaglebone_batteries[] = {
  153.     "battery",
  154. };
  155.  
  156. static struct gpio_charger_platform_data beaglebone_charger_pdata = {
  157.     .name = "battery-cape",
  158.     .type = POWER_SUPPLY_TYPE_BATTERY,
  159.     .gpio = GPIO_TO_PIN(1,16),
  160.     .gpio_active_low = 0,
  161.     .supplied_to = beaglebone_batteries,
  162.     .num_supplicants = ARRAY_SIZE(beaglebone_batteries),
  163. };
  164.  
  165. static struct platform_device beaglebone_charger_device = {
  166.     .name = "gpio-charger",
  167.     .dev = {
  168.         .platform_data = &beaglebone_charger_pdata,
  169.     },
  170. };
  171.  
  172. #endif /* gpio-charger */
  173.  
  174.  
  175. /* LCD backlight platform Data */
  176. #define AM335X_BACKLIGHT_MAX_BRIGHTNESS        100
  177. #define AM335X_BACKLIGHT_DEFAULT_BRIGHTNESS    50
  178. #define AM335X_PWM_PERIOD_NANO_SECONDS        (1000000 * 5)
  179.  
  180. #define PWM_DEVICE_ID   "ecap.0"
  181.  
  182. static struct platform_pwm_backlight_data am335x_backlight_data = {
  183.     .pwm_id         = PWM_DEVICE_ID,
  184.     .ch             = -1,
  185.     .lth_brightness = 21,
  186.     .max_brightness = AM335X_BACKLIGHT_MAX_BRIGHTNESS,
  187.     .dft_brightness = AM335X_BACKLIGHT_DEFAULT_BRIGHTNESS,
  188.     .pwm_period_ns  = AM335X_PWM_PERIOD_NANO_SECONDS,
  189. };
  190.  
  191. static struct lcd_ctrl_config lcd_cfg = {
  192.     &disp_panel,
  193.     .ac_bias        = 255,
  194.     .ac_bias_intrpt     = 0,
  195.     .dma_burst_sz       = 16,
  196.     .bpp            = 32,
  197.     .fdd            = 0x80,
  198.     .tft_alt_mode       = 0,
  199.     .stn_565_mode       = 0,
  200.     .mono_8bit_mode     = 0,
  201.     .invert_line_clock  = 1,
  202.     .invert_frm_clock   = 1,
  203.     .sync_edge      = 0,
  204.     .sync_ctrl      = 1,
  205.     .raster_order       = 0,
  206. };
  207.  
  208. struct da8xx_lcdc_platform_data TFC_S9700RTWV35TR_01B_pdata = {
  209.     .manu_name      = "ThreeFive",
  210.     .controller_data    = &lcd_cfg,
  211.     .type           = "TFC_S9700RTWV35TR_01B",
  212. };
  213.  
  214. #include "common.h"
  215.  
  216. static const struct display_panel bbtoys7_panel = {
  217.     WVGA,
  218.     16,
  219.     16,
  220.     COLOR_ACTIVE,
  221. };
  222.  
  223. #define BBTOYS7LCD_PWM_DEVICE_ID   "ehrpwm.1:0"
  224.  
  225. static struct platform_pwm_backlight_data bbtoys7lcd_backlight_data = {
  226.     .pwm_id         = BBTOYS7LCD_PWM_DEVICE_ID,
  227.     .ch             = -1,
  228.     .max_brightness = AM335X_BACKLIGHT_MAX_BRIGHTNESS,
  229.     .dft_brightness = AM335X_BACKLIGHT_DEFAULT_BRIGHTNESS,
  230.     .pwm_period_ns  = AM335X_PWM_PERIOD_NANO_SECONDS,
  231. };
  232.  
  233. static struct lcd_ctrl_config bbtoys7_cfg = {
  234.     &bbtoys7_panel,
  235.     .ac_bias        = 255,
  236.     .ac_bias_intrpt     = 0,
  237.     .dma_burst_sz       = 16,
  238.     .bpp            = 16,
  239.     .fdd            = 0x80,
  240.     .tft_alt_mode       = 0,
  241.     .stn_565_mode       = 0,
  242.     .mono_8bit_mode     = 0,
  243.     .invert_line_clock  = 1,
  244.     .invert_frm_clock   = 1,
  245.     .sync_edge      = 0,
  246.     .sync_ctrl      = 1,
  247.     .raster_order       = 0,
  248. };
  249.  
  250. struct da8xx_lcdc_platform_data bbtoys7_pdata = {
  251.     .manu_name      = "ThreeFive",
  252.     .controller_data    = &bbtoys7_cfg,
  253.     .type           = "TFC_S9700RTWV35TR_01B",
  254. };
  255.  
  256. static struct lcd_ctrl_config bbtoys35_cfg = {
  257.     &bbtoys7_panel,
  258.     .ac_bias        = 255,
  259.     .ac_bias_intrpt     = 0,
  260.     .dma_burst_sz       = 16,
  261.     .bpp            = 16,
  262.     .fdd            = 0x80,
  263.     .tft_alt_mode       = 0,
  264.     .stn_565_mode       = 0,
  265.     .mono_8bit_mode     = 0,
  266.     .invert_line_clock  = 1,
  267.     .invert_frm_clock   = 1,
  268.     .sync_edge      = 0,
  269.     .sync_ctrl      = 1,
  270.     .raster_order       = 0,
  271. };
  272.  
  273. struct da8xx_lcdc_platform_data bbtoys35_pdata = {
  274.     .manu_name      = "BBToys",
  275.     .controller_data    = &bbtoys35_cfg,
  276.     .type           = "CDTech_S035Q01",
  277. };
  278.  
  279. struct da8xx_lcdc_platform_data bbtoys43_pdata = {
  280.     .manu_name      = "BBToys",
  281.     .controller_data    = &lcd_cfg,
  282.     .type           = "NHD-4.3-ATXI#-T-1",
  283. };
  284.  
  285. static const struct display_panel dvi_panel = {
  286.     WVGA,
  287.     16,
  288.     16,
  289.     COLOR_ACTIVE,
  290. };
  291.  
  292. static struct lcd_ctrl_config dvi_cfg = {
  293.     &dvi_panel,
  294.     .ac_bias        = 255,
  295.     .ac_bias_intrpt     = 0,
  296.     .dma_burst_sz       = 16,
  297.     .bpp            = 16,
  298.     .fdd            = 0x80,
  299.     .tft_alt_mode       = 0,
  300.     .stn_565_mode       = 0,
  301.     .mono_8bit_mode     = 0,
  302.     .invert_line_clock  = 1,
  303.     .invert_frm_clock   = 1,
  304.     .sync_edge      = 0,
  305.     .sync_ctrl      = 1,
  306.     .raster_order       = 0,
  307. };
  308.  
  309. struct da8xx_lcdc_platform_data dvi_pdata = {
  310.     .manu_name      = "BBToys",
  311.     .controller_data    = &dvi_cfg,
  312.     .type           = "1024x768@60",
  313. };
  314.  
  315. /* TSc controller */
  316. #include <linux/lis3lv02d.h>
  317.  
  318. /* TSc controller */
  319. static struct tsc_data am335x_touchscreen_data  = {
  320.     .wires  = 4,
  321.     .x_plate_resistance = 200,
  322.     .mode = TI_TSCADC_TSCMODE,
  323. };
  324.  
  325. static struct tsc_data bone_touchscreen_data  = {
  326.     .mode = TI_TSCADC_GENMODE,
  327. };
  328.  
  329. static u8 am335x_iis_serializer_direction1[] = {
  330.     INACTIVE_MODE,  INACTIVE_MODE,  RX_MODE,    TX_MODE,
  331.     INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
  332.     INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
  333.     INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,  INACTIVE_MODE,
  334. };
  335.  
  336. static struct snd_platform_data am335x_evm_snd_data1 = {
  337.     .tx_dma_offset  = 0x46400000,   /* McASP1 */
  338.     .rx_dma_offset  = 0x46400000,
  339.     .op_mode    = DAVINCI_MCASP_IIS_MODE,
  340.     .num_serializer = ARRAY_SIZE(am335x_iis_serializer_direction1),
  341.     .tdm_slots  = 2,
  342.     .serial_dir = am335x_iis_serializer_direction1,
  343.     .asp_chan_q = EVENTQ_2,
  344.     .version    = MCASP_VERSION_3,
  345.     .txnumevt   = 1,
  346.     .rxnumevt   = 1,
  347. };
  348.  
  349. static struct snd_platform_data bone_snd_data1 = {
  350.     .tx_dma_offset  = 0x46000000,   /* McASP0*/
  351.     .rx_dma_offset  = 0x46000000,
  352.     .op_mode    = DAVINCI_MCASP_IIS_MODE,
  353.     .num_serializer = ARRAY_SIZE(am335x_iis_serializer_direction1),
  354.     .tdm_slots  = 2,
  355.     .serial_dir = am335x_iis_serializer_direction1,
  356.     .asp_chan_q = EVENTQ_2,
  357.     .version    = MCASP_VERSION_3,
  358.     .txnumevt   = 1,
  359.     .rxnumevt   = 1,
  360. };
  361.  
  362. static struct omap2_hsmmc_info am335x_mmc[] __initdata = {
  363.     {
  364.         .mmc            = 1,
  365.         .caps           = MMC_CAP_4_BIT_DATA,
  366.         .gpio_cd        = GPIO_TO_PIN(0, 6),
  367.         .gpio_wp        = GPIO_TO_PIN(3, 18),
  368.         .ocr_mask       = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3V3 */
  369.     },
  370.     {
  371.         .mmc            = 0,    /* will be set at runtime */
  372.     },
  373.     {
  374.         .mmc            = 0,    /* will be set at runtime */
  375.     },
  376.     {}      /* Terminator */
  377. };
  378.  
  379.  
  380. #ifdef CONFIG_OMAP_MUX
  381. static struct omap_board_mux board_mux[] __initdata = {
  382.     AM33XX_MUX(I2C0_SDA, OMAP_MUX_MODE0 | AM33XX_SLEWCTRL_SLOW |
  383.             AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT),
  384.     AM33XX_MUX(I2C0_SCL, OMAP_MUX_MODE0 | AM33XX_SLEWCTRL_SLOW |
  385.             AM33XX_INPUT_EN | AM33XX_PIN_OUTPUT),
  386.     { .reg_offset = OMAP_MUX_TERMINATOR },
  387. };
  388. #else
  389. #define board_mux   NULL
  390. #endif
  391.  
  392. /* module pin mux structure */
  393. struct pinmux_config {
  394.     const char *string_name; /* signal name format */
  395.     int val; /* Options for the mux register value */
  396. };
  397.  
  398. struct evm_dev_cfg {
  399.     void (*device_init)(int evm_id, int profile);
  400.  
  401. /*
  402. * If the device is required on both baseboard & daughter board (ex i2c),
  403. * specify DEV_ON_BASEBOARD
  404. */
  405. #define DEV_ON_BASEBOARD    0
  406. #define DEV_ON_DGHTR_BRD    1
  407.     u32 device_on;
  408.  
  409.     u32 profile;    /* Profiles (0-7) in which the module is present */
  410. };
  411.  
  412. /* AM335X - CPLD Register Offsets */
  413. #define CPLD_DEVICE_HDR 0x00 /* CPLD Header */
  414. #define CPLD_DEVICE_ID  0x04 /* CPLD identification */
  415. #define CPLD_DEVICE_REV 0x0C /* Revision of the CPLD code */
  416. #define CPLD_CFG_REG    0x10 /* Configuration Register */
  417.  
  418. static struct i2c_client *cpld_client;
  419. static u32 am335x_evm_id;
  420. static struct omap_board_config_kernel am335x_evm_config[] __initdata = {
  421. };
  422.  
  423. /*
  424. * EVM Config held in On-Board eeprom device.
  425. *
  426. * Header Format
  427. *
  428. *  Name         Size    Contents
  429. *           (Bytes)
  430. *-------------------------------------------------------------
  431. *  Header       4   0xAA, 0x55, 0x33, 0xEE
  432. *
  433. *  Board Name       8   Name for board in ASCII.
  434. *               example "A33515BB" = "AM335X
  435.                 Low Cost EVM board"
  436. *
  437. *  Version      4   Hardware version code for board in
  438. *               in ASCII. "1.0A" = rev.01.0A
  439. *
  440. *  Serial Number    12  Serial number of the board. This is a 12
  441. *               character string which is WWYY4P16nnnn, where
  442. *               WW = 2 digit week of the year of production
  443. *               YY = 2 digit year of production
  444. *               nnnn = incrementing board number
  445. *
  446. *  Configuration option 32  Codes(TBD) to show the configuration
  447. *               setup on this board.
  448. *
  449. *  Available        32720   Available space for other non-volatile
  450. *               data.
  451. */
  452. struct am335x_evm_eeprom_config {
  453.     u32 header;
  454.     u8  name[8];
  455.     char    version[4];
  456.     u8  serial[12];
  457.     u8  opt[32];
  458. };
  459.  
  460. /*
  461. * EVM Config held in daughter board eeprom device.
  462. *
  463. * Header Format
  464. *
  465. *  Name         Size        Contents
  466. *           (Bytes)
  467. *-------------------------------------------------------------
  468. *  Header       4   0xAA, 0x55, 0x33, 0xEE
  469. *
  470. *  Board Name       8   Name for board in ASCII.
  471. *               example "A335GPBD" = "AM335x
  472. *               General Purpose Daughterboard"
  473. *
  474. *  Version      4   Hardware version code for board in
  475. *               in ASCII. "1.0A" = rev.01.0A
  476. *  Serial Number    12  Serial number of the board. This is a 12
  477. *               character string which is: WWYY4P13nnnn, where
  478. *               WW = 2 digit week of the year of production
  479. *               YY = 2 digit year of production
  480. *               nnnn = incrementing board number
  481. *  Configuration Option 32  Codes to show the configuration
  482. *               setup on this board.
  483. *  CPLD Version 8       CPLD code version for board in ASCII
  484. *               "CPLD1.0A" = rev. 01.0A of the CPLD
  485. *  Available    32700       Available space for other non-volatile
  486. *               codes/data
  487. */
  488.  
  489. struct am335x_eeprom_config1 {
  490.     u32 header;
  491.     u8  name[8];
  492.     char    version[4];
  493.     u8  serial[12];
  494.     u8  opt[32];
  495.     u8  cpld_ver[8];
  496. };
  497.  
  498. static struct am335x_evm_eeprom_config config;
  499. static struct am335x_eeprom_config1 config1;
  500. static bool daughter_brd_detected;
  501.  
  502. struct beaglebone_cape_eeprom_config {
  503.     u32 header;
  504.     char  format_revision[2];
  505.     char    name[32];
  506.     char    version[4];
  507.     char    manufacturer[16];
  508.     char    partnumber[16];
  509.     u16  numpins;
  510.     char    serial[12];
  511.     u16 muxdata[74];
  512.     u16  current_3v3;
  513.     u16  current_vdd5v;
  514.     u16  current_sys5v;
  515.     u16  dc;
  516. };
  517.  
  518. static struct beaglebone_cape_eeprom_config cape_config;
  519. static bool beaglebone_cape_detected;
  520.  
  521. /* keep track of ADC pin usage */
  522. static int capecount = 0;
  523. static bool beaglebone_tsadcpins_free = 1;
  524. static bool beaglebone_leds_free = 1;
  525. static bool beaglebone_spi1_free = 1;
  526. static bool beaglebone_w1gpio_free = 1;
  527. static bool beaglebone_skip_mmc0_init = 0;
  528.  
  529. #define GP_EVM_REV_IS_1_0       0x1
  530. #define GP_EVM_REV_IS_1_0A      0x1
  531. #define GP_EVM_REV_IS_1_1A      0x2
  532. #define GP_EVM_REV_IS_UNKNOWN       0xFF
  533. #define GP_EVM_ACTUALLY_BEAGLEBONE  0xBB
  534. static unsigned int gp_evm_revision = GP_EVM_REV_IS_UNKNOWN;
  535.  
  536. unsigned int gigabit_enable = 1;
  537.  
  538. #define EEPROM_MAC_ADDRESS_OFFSET   60 /* 4+8+4+12+32 */
  539. #define EEPROM_NO_OF_MAC_ADDR       3
  540. static char am335x_mac_addr[EEPROM_NO_OF_MAC_ADDR][ETH_ALEN];
  541.  
  542. #define AM335X_EEPROM_HEADER        0xEE3355AA
  543.  
  544. /* current profile if exists else PROFILE_0 on error */
  545. static u32 am335x_get_profile_selection(void)
  546. {
  547.     int val = 0;
  548.  
  549.     if (!cpld_client)
  550.         /* error checking is not done in func's calling this routine.
  551.         so return profile 0 on error */
  552.         return 0;
  553.  
  554.     val = i2c_smbus_read_word_data(cpld_client, CPLD_CFG_REG);
  555.     if (val < 0)
  556.         return 0;   /* default to Profile 0 on Error */
  557.     else
  558.         return val & 0x7;
  559. }
  560.  
  561. static struct pinmux_config haptics_pin_mux[] = {
  562.     {"gpmc_ad9.ehrpwm2B",       OMAP_MUX_MODE4 |
  563.         AM33XX_PIN_OUTPUT},
  564.     {NULL, 0},
  565. };
  566.  
  567. /* Module pin mux for battery cape */
  568. static struct pinmux_config batterycape_pin_mux[] = {
  569.     {"gpmc_a0.gpio1_16",  OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
  570.     {NULL, 0},
  571. };
  572.  
  573.    
  574. /* Module pin mux for LCDC */
  575. static struct pinmux_config lcdc_pin_mux[] = {
  576.     {"gpmc_ad8.lcd_data23",     OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
  577.     {"gpmc_ad9.lcd_data22",     OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
  578.     {"gpmc_ad10.lcd_data21",    OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
  579.     {"gpmc_ad11.lcd_data20",    OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
  580.     {"gpmc_ad12.lcd_data19",    OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
  581.     {"gpmc_ad13.lcd_data18",    OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
  582.     {"gpmc_ad14.lcd_data17",    OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
  583.     {"gpmc_ad15.lcd_data16",    OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
  584.     {NULL, 0},
  585. };
  586.  
  587.  
  588. static struct pinmux_config lcdc16_pin_mux[] = {
  589.     {"lcd_data0.lcd_data0",     OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
  590.         | AM33XX_PULL_DISA},
  591.     {"lcd_data1.lcd_data1",     OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
  592.         | AM33XX_PULL_DISA},
  593.     {"lcd_data2.lcd_data2",     OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
  594.         | AM33XX_PULL_DISA},
  595.     {"lcd_data3.lcd_data3",     OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
  596.         | AM33XX_PULL_DISA},
  597.     {"lcd_data4.lcd_data4",     OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
  598.         | AM33XX_PULL_DISA},
  599.     {"lcd_data5.lcd_data5",     OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
  600.         | AM33XX_PULL_DISA},
  601.     {"lcd_data6.lcd_data6",     OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
  602.         | AM33XX_PULL_DISA},
  603.     {"lcd_data7.lcd_data7",     OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
  604.         | AM33XX_PULL_DISA},
  605.     {"lcd_data8.lcd_data8",     OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
  606.         | AM33XX_PULL_DISA},
  607.     {"lcd_data9.lcd_data9",     OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
  608.         | AM33XX_PULL_DISA},
  609.     {"lcd_data10.lcd_data10",   OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
  610.         | AM33XX_PULL_DISA},
  611.     {"lcd_data11.lcd_data11",   OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
  612.         | AM33XX_PULL_DISA},
  613.     {"lcd_data12.lcd_data12",   OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
  614.         | AM33XX_PULL_DISA},
  615.     {"lcd_data13.lcd_data13",   OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
  616.         | AM33XX_PULL_DISA},
  617.     {"lcd_data14.lcd_data14",   OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
  618.         | AM33XX_PULL_DISA},
  619.     {"lcd_data15.lcd_data15",   OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
  620.         | AM33XX_PULL_DISA},
  621.     {"lcd_vsync.lcd_vsync",     OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
  622.     {"lcd_hsync.lcd_hsync",     OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
  623.     {"lcd_pclk.lcd_pclk",       OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
  624.     {"lcd_ac_bias_en.lcd_ac_bias_en", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
  625.     {NULL, 0},
  626. };
  627.  
  628.  
  629. /* Module pin mux for Beagleboardtoys DVI cape */
  630. static struct pinmux_config dvia1_pin_mux[] = {
  631.     {"gpmc_a2.gpio1_18", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT}, // USR0 LED
  632.     {"gpmc_a3.gpio1_19", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT}, // USR1 LED
  633.     {"gpmc_ad7.gpmc_ad7", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT}, // DVI PDn
  634.     {NULL, 0},
  635. };
  636.  
  637. static struct pinmux_config dvia2_pin_mux[] = {
  638.     {"gpmc_a2.gpio1_18", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT}, // USR0 LED
  639.     {"gpmc_a3.gpio1_19", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT}, // USR1 LED
  640.     {"gpmc_csn2.gpio1_31", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT}, // DVI PDn
  641.     {NULL, 0},
  642. };
  643.  
  644. /* Module pin mux for Beagleboardtoys 3.5" LCD cape */
  645. static struct pinmux_config bbtoys35_pin_mux[] = {
  646.     {"gpmc_a2.gpio1_18", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT}, // USR0 LED
  647.     {NULL, 0},
  648. };
  649.  
  650. /* Module pin mux for EHRPWM 1A */
  651. static struct pinmux_config ehrpwm1a_pin_mux[] = {
  652.     {"gpmc_a2.ehrpwm1A", OMAP_MUX_MODE6 | AM33XX_PIN_OUTPUT}, // Backlight
  653.     {NULL, 0},
  654. };
  655.  
  656. /* Module pin mux for Beagleboardtoys 7" LCD cape */
  657. static struct pinmux_config bbtoys7_pin_mux[] = {
  658.     {"ecap0_in_pwm0_out.gpio0_7", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT}, // AVDD_EN
  659.     {"gpmc_a2.ehrpwm1A", OMAP_MUX_MODE6 | AM33XX_PIN_OUTPUT}, // Backlight
  660.     {NULL, 0},
  661. };
  662.  
  663. /* Module pin mux for Beagleboardtoys 7" LCD cape */
  664. static struct pinmux_config bbtoys7a2_pin_mux[] = {
  665.     {"gpmc_csn2.gpio1_31", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT}, // AVDD_EN
  666.     {"gpmc_a2.ehrpwm1A", OMAP_MUX_MODE6 | AM33XX_PIN_OUTPUT}, // Backlight
  667.     {NULL, 0},
  668. };
  669.  
  670. /* Module pin mux for Beagleboardtoys 7" LCD cape */
  671. static struct pinmux_config bbtoys7a3_pin_mux[] = {
  672.     {"spi0_sclk.gpio0_2", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT}, // AVDD_EN
  673.     {"gpmc_a2.ehrpwm1A", OMAP_MUX_MODE6 | AM33XX_PIN_OUTPUT}, // Backlight
  674.     {NULL, 0},
  675. };
  676.  
  677. /* Module pin mux for Beagleboardtoys 3" LCD cape */
  678. static struct pinmux_config bbtoys3_pin_mux[] = {
  679.     {"gpmc_a2.ehrpwm1A", OMAP_MUX_MODE6 | AM33XX_PIN_OUTPUT}, // Backlight
  680.     {NULL, 0},
  681. };
  682.  
  683. static struct pinmux_config w1_gpio_pin_mux[] = {
  684.     {"gpmc_ad3.gpio1_3",    OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
  685.     {NULL, 0},
  686. };
  687.  
  688. static struct pinmux_config tsc_pin_mux[] = {
  689.     {"ain0.ain0",           OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
  690.     {"ain1.ain1",           OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
  691.     {"ain2.ain2",           OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
  692.     {"ain3.ain3",           OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
  693.     {"ain4.ain4",           OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
  694.     {"ain5.ain5",           OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
  695.     {"ain6.ain6",           OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
  696.     {"ain7.ain7",           OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
  697.     {"vrefp.vrefp",         OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
  698.     {"vrefn.vrefn",         OMAP_MUX_MODE0 | AM33XX_INPUT_EN},
  699.     {NULL, 0},
  700. };
  701.  
  702. /* Pin mux for nand flash module */
  703. static struct pinmux_config nand_pin_mux[] = {
  704.     {"gpmc_ad0.gpmc_ad0",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  705.     {"gpmc_ad1.gpmc_ad1",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  706.     {"gpmc_ad2.gpmc_ad2",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  707.     {"gpmc_ad3.gpmc_ad3",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  708.     {"gpmc_ad4.gpmc_ad4",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  709.     {"gpmc_ad5.gpmc_ad5",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  710.     {"gpmc_ad6.gpmc_ad6",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  711.     {"gpmc_ad7.gpmc_ad7",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  712.     {"gpmc_wait0.gpmc_wait0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  713.     {"gpmc_wpn.gpmc_wpn",     OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
  714.     {"gpmc_csn0.gpmc_csn0",   OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
  715.     {"gpmc_advn_ale.gpmc_advn_ale",  OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
  716.     {"gpmc_oen_ren.gpmc_oen_ren",    OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
  717.     {"gpmc_wen.gpmc_wen",     OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
  718.     {"gpmc_ben0_cle.gpmc_ben0_cle",  OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
  719.     {NULL, 0},
  720. };
  721.  
  722. /* Module pin mux for SPI fash */
  723. static struct pinmux_config spi0_pin_mux[] = {
  724.     {"spi0_sclk.spi0_sclk", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL
  725.                             | AM33XX_INPUT_EN},
  726.     {"spi0_d0.spi0_d0", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL | AM33XX_PULL_UP
  727.                             | AM33XX_INPUT_EN},
  728.     {"spi0_d1.spi0_d1", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL
  729.                             | AM33XX_INPUT_EN},
  730.     {"spi0_cs0.spi0_cs0", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL | AM33XX_PULL_UP
  731.                             | AM33XX_INPUT_EN},
  732.     {NULL, 0},
  733. };
  734.  
  735. /* Module pin mux for SPI flash */
  736. static struct pinmux_config spi1_pin_mux[] = {
  737.     {"mcasp0_aclkx.spi1_sclk", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
  738.         | AM33XX_INPUT_EN},
  739.     {"mcasp0_fsx.spi1_d0", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
  740.         | AM33XX_PULL_UP | AM33XX_INPUT_EN},
  741.     {"mcasp0_axr0.spi1_d1", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
  742.         | AM33XX_INPUT_EN},
  743.     {"mcasp0_ahclkr.spi1_cs0", OMAP_MUX_MODE3 | AM33XX_PULL_ENBL
  744.         | AM33XX_PULL_UP | AM33XX_INPUT_EN},
  745.     {NULL, 0},
  746. };
  747.  
  748. /* Module pin mux for rgmii1 */
  749. static struct pinmux_config rgmii1_pin_mux[] = {
  750.     {"mii1_txen.rgmii1_tctl", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
  751.     {"mii1_rxdv.rgmii1_rctl", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
  752.     {"mii1_txd3.rgmii1_td3", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
  753.     {"mii1_txd2.rgmii1_td2", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
  754.     {"mii1_txd1.rgmii1_td1", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
  755.     {"mii1_txd0.rgmii1_td0", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
  756.     {"mii1_txclk.rgmii1_tclk", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
  757.     {"mii1_rxclk.rgmii1_rclk", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
  758.     {"mii1_rxd3.rgmii1_rd3", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
  759.     {"mii1_rxd2.rgmii1_rd2", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
  760.     {"mii1_rxd1.rgmii1_rd1", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
  761.     {"mii1_rxd0.rgmii1_rd0", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
  762.     {"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  763.     {"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},
  764.     {NULL, 0},
  765. };
  766.  
  767. /* Module pin mux for rgmii2 */
  768. static struct pinmux_config rgmii2_pin_mux[] = {
  769.     {"gpmc_a0.rgmii2_tctl", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
  770.     {"gpmc_a1.rgmii2_rctl", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
  771.     {"gpmc_a2.rgmii2_td3", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
  772.     {"gpmc_a3.rgmii2_td2", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
  773.     {"gpmc_a4.rgmii2_td1", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
  774.     {"gpmc_a5.rgmii2_td0", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
  775.     {"gpmc_a6.rgmii2_tclk", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT},
  776.     {"gpmc_a7.rgmii2_rclk", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
  777.     {"gpmc_a8.rgmii2_rd3", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
  778.     {"gpmc_a9.rgmii2_rd2", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
  779.     {"gpmc_a10.rgmii2_rd1", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
  780.     {"gpmc_a11.rgmii2_rd0", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
  781.     {"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  782.     {"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},
  783.     {NULL, 0},
  784. };
  785.  
  786. /* Module pin mux for mii1 */
  787. static struct pinmux_config mii1_pin_mux[] = {
  788.     {"mii1_rxerr.mii1_rxerr", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
  789.     {"mii1_txen.mii1_txen", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
  790.     {"mii1_rxdv.mii1_rxdv", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
  791.     {"mii1_txd3.mii1_txd3", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
  792.     {"mii1_txd2.mii1_txd2", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
  793.     {"mii1_txd1.mii1_txd1", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
  794.     {"mii1_txd0.mii1_txd0", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
  795.     {"mii1_txclk.mii1_txclk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
  796.     {"mii1_rxclk.mii1_rxclk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
  797.     {"mii1_rxd3.mii1_rxd3", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
  798.     {"mii1_rxd2.mii1_rxd2", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
  799.     {"mii1_rxd1.mii1_rxd1", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
  800.     {"mii1_rxd0.mii1_rxd0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
  801.     {"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  802.     {"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},
  803.     {NULL, 0},
  804. };
  805.  
  806. /* Module pin mux for rmii1 */
  807. static struct pinmux_config rmii1_pin_mux[] = {
  808.     {"mii1_crs.rmii1_crs_dv", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},
  809.     {"mii1_rxerr.mii1_rxerr", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},
  810.     {"mii1_txen.mii1_txen", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
  811.     {"mii1_txd1.mii1_txd1", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
  812.     {"mii1_txd0.mii1_txd0", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
  813.     {"mii1_rxd1.mii1_rxd1", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},
  814.     {"mii1_rxd0.mii1_rxd0", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},
  815.     {"rmii1_refclk.rmii1_refclk", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
  816.     {"mdio_data.mdio_data", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  817.     {"mdio_clk.mdio_clk", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT_PULLUP},
  818.     {NULL, 0},
  819. };
  820.  
  821. static struct pinmux_config i2c1_pin_mux[] = {
  822.     {"spi0_d1.i2c1_sda",    OMAP_MUX_MODE2 | AM33XX_SLEWCTRL_SLOW |
  823.                     AM33XX_PULL_ENBL | AM33XX_INPUT_EN},
  824.     {"spi0_cs0.i2c1_scl",   OMAP_MUX_MODE2 | AM33XX_SLEWCTRL_SLOW |
  825.                     AM33XX_PULL_ENBL | AM33XX_INPUT_EN},
  826.     {NULL, 0},
  827. };
  828.  
  829. /* Pin mux for GPMC bus */
  830. static struct pinmux_config gpmc_pin_mux[] = {
  831.     {"gpmc_ad0.gpmc_ad0",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  832.     {"gpmc_ad1.gpmc_ad1",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  833.     {"gpmc_ad2.gpmc_ad2",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  834.     {"gpmc_ad3.gpmc_ad3",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  835.     {"gpmc_ad4.gpmc_ad4",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  836.     {"gpmc_ad5.gpmc_ad5",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  837.     {"gpmc_ad6.gpmc_ad6",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  838.     {"gpmc_ad7.gpmc_ad7",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  839.     {"gpmc_ad8.gpmc_ad8",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  840.     {"gpmc_ad9.gpmc_ad9",     OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  841.     {"gpmc_ad10.gpmc_ad10",   OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  842.     {"gpmc_ad11.gpmc_ad11",   OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  843.     {"gpmc_ad12.gpmc_ad12",   OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  844.     {"gpmc_ad13.gpmc_ad13",   OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  845.     {"gpmc_ad14.gpmc_ad14",   OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  846.     {"gpmc_ad15.gpmc_ad15",   OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  847.     {"gpmc_wait0.gpmc_wait0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  848.     {"gpmc_wpn.gpmc_wpn",     OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
  849.     {"gpmc_csn1.gpmc_csn1",   OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
  850.     {"gpmc_advn_ale.gpmc_advn_ale",  OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
  851.     {"gpmc_oen_ren.gpmc_oen_ren",    OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
  852.     {"gpmc_wen.gpmc_wen",     OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
  853.     {"gpmc_ben0_cle.gpmc_ben0_cle",  OMAP_MUX_MODE0 | AM33XX_PULL_DISA},
  854.     {"gpmc_clk.gpmc_clk",    OMAP_MUX_MODE0 | AM33XX_PIN_INPUT},
  855.     {"ecap0_in_pwm0_out.xdma_event_intr2", OMAP_MUX_MODE6 | AM33XX_PIN_INPUT}, // DMAREQ
  856.     {NULL, 0},
  857. };
  858.  
  859. static struct pinmux_config camera_cape_pin_mux[] = {
  860.     {"spi0_d1.gpio0_4",    OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT },        // QL CSSP and Camera Sensor Reset
  861.     {"spi0_cs0.gpio0_5",   OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT_PULLUP }, // 1V8 and 2V8 Power Enable
  862.     {"gpmc_csn1.gpio0_30",   OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},        // Sensor orientation detect: low -> frontfacing, high -> backfacing
  863.     {NULL, 0},
  864. };
  865.  
  866. static struct pinmux_config i2c2_pin_mux[] = {
  867.     {"uart1_ctsn.i2c2_sda",    OMAP_MUX_MODE3 | AM33XX_SLEWCTRL_SLOW |
  868.                     AM33XX_PIN_INPUT_PULLUP},
  869.     {"uart1_rtsn.i2c2_scl",   OMAP_MUX_MODE3 | AM33XX_SLEWCTRL_SLOW |
  870.                     AM33XX_PIN_INPUT_PULLUP},
  871.     {NULL, 0},
  872. };
  873.  
  874. /* Module pin mux for mcasp1 */
  875. static struct pinmux_config mcasp1_pin_mux[] = {
  876.     {"mii1_crs.mcasp1_aclkx", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},
  877.     {"mii1_rxerr.mcasp1_fsx", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},
  878.     {"mii1_col.mcasp1_axr2", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},
  879.     {"rmii1_refclk.mcasp1_axr3", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},
  880.     {NULL, 0},
  881. };
  882.  
  883. /* Module pin mux for mcasp0 */
  884. static struct pinmux_config mcasp0_pin_mux[] = {
  885.     {"mcasp0_aclkx.mcasp0_aclkx", OMAP_MUX_MODE0 |AM33XX_PIN_INPUT_PULLDOWN},
  886.     {"mcasp0_fsx.mcasp0_fsx", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLDOWN},
  887.     {"mcasp0_ahclkr.mcasp0_axr2", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
  888.     {"mcasp0_ahclkx.mcasp0_axr3", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLDOWN},
  889.     {NULL, 0},
  890. };
  891.  
  892. /* Module pin mux for mmc0 */
  893. static struct pinmux_config mmc0_pin_mux[] = {
  894.     {"mmc0_dat3.mmc0_dat3", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  895.     {"mmc0_dat2.mmc0_dat2", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  896.     {"mmc0_dat1.mmc0_dat1", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  897.     {"mmc0_dat0.mmc0_dat0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  898.     {"mmc0_clk.mmc0_clk",   OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  899.     {"mmc0_cmd.mmc0_cmd",   OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  900.     {"mcasp0_aclkr.mmc0_sdwp", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
  901.     {"spi0_cs1.mmc0_sdcd",  OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
  902.     {NULL, 0},
  903. };
  904.  
  905. static struct pinmux_config mmc0_no_cd_pin_mux[] = {
  906.     {"mmc0_dat3.mmc0_dat3", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  907.     {"mmc0_dat2.mmc0_dat2", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  908.     {"mmc0_dat1.mmc0_dat1", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  909.     {"mmc0_dat0.mmc0_dat0", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  910.     {"mmc0_clk.mmc0_clk",   OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  911.     {"mmc0_cmd.mmc0_cmd",   OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  912.     {"mcasp0_aclkr.mmc0_sdwp", OMAP_MUX_MODE4 | AM33XX_PIN_INPUT_PULLDOWN},
  913.     {NULL, 0},
  914. };
  915.  
  916. /* Module pin mux for mmc1 */
  917. static struct pinmux_config mmc1_pin_mux[] = {
  918.     {"gpmc_ad7.mmc1_dat7",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
  919.     {"gpmc_ad6.mmc1_dat6",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
  920.     {"gpmc_ad5.mmc1_dat5",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
  921.     {"gpmc_ad4.mmc1_dat4",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
  922.     {"gpmc_ad3.mmc1_dat3",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
  923.     {"gpmc_ad2.mmc1_dat2",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
  924.     {"gpmc_ad1.mmc1_dat1",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
  925.     {"gpmc_ad0.mmc1_dat0",  OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
  926.     {"gpmc_csn1.mmc1_clk",  OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},
  927.     {"gpmc_csn2.mmc1_cmd",  OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},
  928.     {"gpmc_csn0.gpio1_29",  OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
  929.     {"gpmc_advn_ale.mmc1_sdcd", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
  930.     {"uart1_rxd.mmc1_sdwp", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLDOWN},
  931.     {NULL, 0},
  932. };
  933.  
  934. /* Module pin mux for uart3 */
  935. static struct pinmux_config uart3_pin_mux[] = {
  936.     {"spi0_cs1.uart3_rxd", AM33XX_PIN_INPUT_PULLUP},
  937.     {"ecap0_in_pwm0_out.uart3_txd", AM33XX_PULL_ENBL},
  938.     {NULL, 0},
  939. };
  940.  
  941. static struct pinmux_config d_can_gp_pin_mux[] = {
  942.     {"uart0_ctsn.d_can1_tx", OMAP_MUX_MODE2 | AM33XX_PULL_ENBL},
  943.     {"uart0_rtsn.d_can1_rx", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},
  944.     {NULL, 0},
  945. };
  946.  
  947. static struct pinmux_config d_can_ia_pin_mux[] = {
  948.     {"uart0_rxd.d_can0_tx", OMAP_MUX_MODE2 | AM33XX_PULL_ENBL},
  949.     {"uart0_txd.d_can0_rx", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP},
  950.     {NULL, 0},
  951. };
  952.  
  953. static struct pinmux_config tt3201_pin_mux[] = {
  954.     {"uart1_rxd.d_can1_tx", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT },
  955.     {"uart1_txd.d_can1_rx", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP },
  956.     {"mcasp0_fsr.gpio3_19", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP },
  957.     {"mcasp0_ahclkx.gpio3_21", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP },
  958.     {"ecap0_in_pwm0_out.spi1_cs1", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT_PULLUP },
  959.     {NULL, 0},
  960. };
  961.  
  962. static struct pinmux_config uart1dcan1_pin_mux[] = {
  963.     {"uart1_rxd.d_can1_tx", OMAP_MUX_MODE2 | AM33XX_PIN_OUTPUT },
  964.     {"uart1_txd.d_can1_rx", OMAP_MUX_MODE2 | AM33XX_PIN_INPUT_PULLUP },
  965.     {NULL, 0},
  966. };
  967.  
  968. static struct pinmux_config uart1_pin_mux[] = {
  969.     {"uart1_txd.uart1_txd", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL},
  970.     {"uart1_rxd.uart1_rxd", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  971.     {NULL, 0},
  972. };
  973.  
  974. /* Module pin mux for uart2 */
  975. static struct pinmux_config uart2_pin_mux[] = {
  976.     {"spi0_d0.uart2_txd", OMAP_MUX_MODE1 | AM33XX_PIN_OUTPUT},
  977.     {"spi0_sclk.uart2_rxd", OMAP_MUX_MODE1 | AM33XX_PIN_INPUT_PULLUP},
  978.     {NULL, 0},
  979. };
  980.  
  981.  
  982. /*
  983. * @pin_mux - single module pin-mux structure which defines pin-mux
  984. *           details for all its pins.
  985. */
  986. static void setup_pin_mux(struct pinmux_config *pin_mux)
  987. {
  988.     int i;
  989.  
  990.     for (i = 0; pin_mux->string_name != NULL; pin_mux++)
  991.         omap_mux_init_signal(pin_mux->string_name, pin_mux->val);
  992.  
  993. }
  994.  
  995. /* Matrix GPIO Keypad Support for profile-0 only: TODO */
  996.  
  997. /* pinmux for keypad device */
  998. static struct pinmux_config matrix_keypad_pin_mux[] = {
  999.     {"gpmc_a5.gpio1_21",  OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
  1000.     {"gpmc_a6.gpio1_22",  OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
  1001.     {"gpmc_a9.gpio1_25",  OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
  1002.     {"gpmc_a10.gpio1_26", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
  1003.     {"gpmc_a11.gpio1_27", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
  1004.     {NULL, 0},
  1005. };
  1006.  
  1007. /* Keys mapping */
  1008. static const uint32_t am335x_evm_matrix_keys[] = {
  1009.     KEY(0, 0, KEY_MENU),
  1010.     KEY(1, 0, KEY_BACK),
  1011.     KEY(2, 0, KEY_LEFT),
  1012.  
  1013.     KEY(0, 1, KEY_RIGHT),
  1014.     KEY(1, 1, KEY_ENTER),
  1015.     KEY(2, 1, KEY_DOWN),
  1016. };
  1017.  
  1018. const struct matrix_keymap_data am335x_evm_keymap_data = {
  1019.     .keymap      = am335x_evm_matrix_keys,
  1020.     .keymap_size = ARRAY_SIZE(am335x_evm_matrix_keys),
  1021. };
  1022.  
  1023. static const unsigned int am335x_evm_keypad_row_gpios[] = {
  1024.     GPIO_TO_PIN(1, 25), GPIO_TO_PIN(1, 26), GPIO_TO_PIN(1, 27)
  1025. };
  1026.  
  1027. static const unsigned int am335x_evm_keypad_col_gpios[] = {
  1028.     GPIO_TO_PIN(1, 21), GPIO_TO_PIN(1, 22)
  1029. };
  1030.  
  1031. static struct matrix_keypad_platform_data am335x_evm_keypad_platform_data = {
  1032.     .keymap_data       = &am335x_evm_keymap_data,
  1033.     .row_gpios         = am335x_evm_keypad_row_gpios,
  1034.     .num_row_gpios     = ARRAY_SIZE(am335x_evm_keypad_row_gpios),
  1035.     .col_gpios         = am335x_evm_keypad_col_gpios,
  1036.     .num_col_gpios     = ARRAY_SIZE(am335x_evm_keypad_col_gpios),
  1037.     .active_low        = false,
  1038.     .debounce_ms       = 5,
  1039.     .col_scan_delay_us = 2,
  1040. };
  1041.  
  1042. static struct platform_device am335x_evm_keyboard = {
  1043.     .name  = "matrix-keypad",
  1044.     .id    = -1,
  1045.     .dev   = {
  1046.         .platform_data = &am335x_evm_keypad_platform_data,
  1047.     },
  1048. };
  1049.  
  1050. static void matrix_keypad_init(int evm_id, int profile)
  1051. {
  1052.     int err;
  1053.  
  1054.     setup_pin_mux(matrix_keypad_pin_mux);
  1055.     err = platform_device_register(&am335x_evm_keyboard);
  1056.     if (err) {
  1057.         pr_err("failed to register matrix keypad (2x3) device\n");
  1058.     }
  1059. }
  1060.  
  1061.  
  1062. /* pinmux for keypad device */
  1063. static struct pinmux_config volume_keys_pin_mux[] = {
  1064.     {"spi0_sclk.gpio0_2",  OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
  1065.     {"spi0_d0.gpio0_3",    OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
  1066.     {NULL, 0},
  1067. };
  1068.  
  1069. /* Configure GPIOs for Volume Keys */
  1070. static struct gpio_keys_button am335x_evm_volume_gpio_buttons[] = {
  1071.     {
  1072.         .code                   = KEY_VOLUMEUP,
  1073.         .gpio                   = GPIO_TO_PIN(0, 2),
  1074.         .active_low             = true,
  1075.         .desc                   = "volume-up",
  1076.         .type                   = EV_KEY,
  1077.         .wakeup                 = 1,
  1078.     },
  1079.     {
  1080.         .code                   = KEY_VOLUMEDOWN,
  1081.         .gpio                   = GPIO_TO_PIN(0, 3),
  1082.         .active_low             = true,
  1083.         .desc                   = "volume-down",
  1084.         .type                   = EV_KEY,
  1085.         .wakeup                 = 1,
  1086.     },
  1087. };
  1088.  
  1089. static struct gpio_keys_platform_data am335x_evm_volume_gpio_key_info = {
  1090.     .buttons        = am335x_evm_volume_gpio_buttons,
  1091.     .nbuttons       = ARRAY_SIZE(am335x_evm_volume_gpio_buttons),
  1092. };
  1093.  
  1094. static struct platform_device am335x_evm_volume_keys = {
  1095.     .name   = "gpio-keys",
  1096.     .id     = -1,
  1097.     .dev    = {
  1098.         .platform_data  = &am335x_evm_volume_gpio_key_info,
  1099.     },
  1100. };
  1101.  
  1102. static void volume_keys_init(int evm_id, int profile)
  1103. {
  1104.     int err;
  1105.  
  1106.     setup_pin_mux(volume_keys_pin_mux);
  1107.     err = platform_device_register(&am335x_evm_volume_keys);
  1108.     if (err)
  1109.         pr_err("failed to register matrix keypad (2x3) device\n");
  1110. }
  1111.  
  1112. /* pinmux for lcd7 keys */
  1113. static struct pinmux_config lcd7_keys_pin_mux[] = {
  1114.     {"gpmc_a0.gpio1_16",  OMAP_MUX_MODE7 | AM33XX_PIN_INPUT}, //left
  1115.     {"gpmc_a1.gpio1_17",    OMAP_MUX_MODE7 | AM33XX_PIN_INPUT}, //right
  1116.     {"gpmc_a3.gpio1_19",  OMAP_MUX_MODE7 | AM33XX_PIN_INPUT}, //up
  1117.     {"mcasp0_axr0.gpio3_16",    OMAP_MUX_MODE7 | AM33XX_PIN_INPUT}, //down
  1118.     {"mcasp0_fsr.gpio3_19",    OMAP_MUX_MODE7 | AM33XX_PIN_INPUT}, //enter
  1119.     {NULL, 0},
  1120. };
  1121.  
  1122. /* Configure GPIOs for lcd7 keys */
  1123. static struct gpio_keys_button beaglebone_lcd7_gpio_keys[] = {
  1124.     {
  1125.         .code                   = KEY_LEFT,
  1126.         .gpio                   = GPIO_TO_PIN(1, 16),
  1127.         .active_low             = true,
  1128.         .desc                   = "left",
  1129.         .type                   = EV_KEY,
  1130.         .wakeup                 = 1,
  1131.     },
  1132.     {
  1133.         .code                   = KEY_RIGHT,
  1134.         .gpio                   = GPIO_TO_PIN(1, 17),
  1135.         .active_low             = true,
  1136.         .desc                   = "right",
  1137.         .type                   = EV_KEY,
  1138.         .wakeup                 = 1,
  1139.     },
  1140.     {
  1141.         .code                   = KEY_UP,
  1142.         .gpio                   = GPIO_TO_PIN(1, 19),
  1143.         .active_low             = true,
  1144.         .desc                   = "up",
  1145.         .type                   = EV_KEY,
  1146.         .wakeup                 = 1,
  1147.     },
  1148.     {
  1149.         .code                   = KEY_DOWN,
  1150.         .gpio                   = GPIO_TO_PIN(3, 16),
  1151.         .active_low             = true,
  1152.         .desc                   = "down",
  1153.         .type                   = EV_KEY,
  1154.         .wakeup                 = 1,
  1155.     },
  1156.     {
  1157.         .code                   = KEY_ENTER,
  1158.         .gpio                   = GPIO_TO_PIN(3, 19),
  1159.         .active_low             = true,
  1160.         .desc                   = "enter",
  1161.         .type                   = EV_KEY,
  1162.         .wakeup                 = 1,
  1163.     },
  1164. };
  1165.  
  1166. static struct gpio_keys_platform_data beaglebone_lcd7_gpio_key_info = {
  1167.     .buttons        = beaglebone_lcd7_gpio_keys,
  1168.     .nbuttons       = ARRAY_SIZE(beaglebone_lcd7_gpio_keys),
  1169. };
  1170.  
  1171. static struct platform_device beaglebone_lcd7_keys = {
  1172.     .name   = "gpio-keys",
  1173.     .id     = -1,
  1174.     .dev    = {
  1175.         .platform_data  = &beaglebone_lcd7_gpio_key_info,
  1176.     },
  1177. };
  1178.  
  1179. static void beaglebone_lcd7_keys_init(int evm_id, int profile)
  1180. {
  1181.     int err;
  1182.     setup_pin_mux(lcd7_keys_pin_mux);
  1183.     err = platform_device_register(&beaglebone_lcd7_keys);
  1184.     if (err)
  1185.         pr_err("failed to register gpio keys for LCD7 cape\n");
  1186. }
  1187.  
  1188. /* pinmux for lcd7 keys */
  1189. static struct pinmux_config lcd7a3_keys_pin_mux[] = {
  1190.     {"gpmc_a0.gpio1_16",  OMAP_MUX_MODE7 | AM33XX_PIN_INPUT}, //left
  1191.     {"gpmc_a1.gpio1_17",    OMAP_MUX_MODE7 | AM33XX_PIN_INPUT}, //right
  1192.     {"gpmc_a3.gpio1_19",  OMAP_MUX_MODE7 | AM33XX_PIN_INPUT}, //up
  1193.     {"mcasp0_axr0.gpio3_16",    OMAP_MUX_MODE7 | AM33XX_PIN_INPUT}, //down
  1194.     {"sdpi0_d0.gpio0_3",    OMAP_MUX_MODE7 | AM33XX_PIN_INPUT}, //enter
  1195.     {NULL, 0},
  1196. };
  1197.  
  1198. /* Configure GPIOs for lcd7 keys */
  1199. static struct gpio_keys_button beaglebone_lcd7a3_gpio_keys[] = {
  1200.     {
  1201.         .code                   = KEY_LEFT,
  1202.         .gpio                   = GPIO_TO_PIN(1, 16),
  1203.         .active_low             = true,
  1204.         .desc                   = "left",
  1205.         .type                   = EV_KEY,
  1206.         .wakeup                 = 1,
  1207.     },
  1208.     {
  1209.         .code                   = KEY_RIGHT,
  1210.         .gpio                   = GPIO_TO_PIN(1, 17),
  1211.         .active_low             = true,
  1212.         .desc                   = "right",
  1213.         .type                   = EV_KEY,
  1214.         .wakeup                 = 1,
  1215.     },
  1216.     {
  1217.         .code                   = KEY_UP,
  1218.         .gpio                   = GPIO_TO_PIN(1, 19),
  1219.         .active_low             = true,
  1220.         .desc                   = "up",
  1221.         .type                   = EV_KEY,
  1222.         .wakeup                 = 1,
  1223.     },
  1224.     {
  1225.         .code                   = KEY_DOWN,
  1226.         .gpio                   = GPIO_TO_PIN(3, 16),
  1227.         .active_low             = true,
  1228.         .desc                   = "down",
  1229.         .type                   = EV_KEY,
  1230.         .wakeup                 = 1,
  1231.     },
  1232.     {
  1233.         .code                   = KEY_ENTER,
  1234.         .gpio                   = GPIO_TO_PIN(0, 3),
  1235.         .active_low             = true,
  1236.         .desc                   = "enter",
  1237.         .type                   = EV_KEY,
  1238.         .wakeup                 = 1,
  1239.     },
  1240. };
  1241.  
  1242. static struct gpio_keys_platform_data beaglebone_lcd7a3_gpio_key_info = {
  1243.     .buttons        = beaglebone_lcd7a3_gpio_keys,
  1244.     .nbuttons       = ARRAY_SIZE(beaglebone_lcd7a3_gpio_keys),
  1245. };
  1246.  
  1247. static struct platform_device beaglebone_lcd7a3_keys = {
  1248.     .name   = "gpio-keys",
  1249.     .id     = -1,
  1250.     .dev    = {
  1251.         .platform_data  = &beaglebone_lcd7a3_gpio_key_info,
  1252.     },
  1253. };
  1254.  
  1255. static void beaglebone_lcd7a3_keys_init(int evm_id, int profile)
  1256. {
  1257.     int err;
  1258.     setup_pin_mux(lcd7a3_keys_pin_mux);
  1259.     err = platform_device_register(&beaglebone_lcd7a3_keys);
  1260.     if (err)
  1261.         pr_err("failed to register gpio keys for LCD7 cape\n");
  1262. }
  1263.  
  1264. /* pinmux for lcd3 keys */
  1265. static struct pinmux_config lcd3_keys_pin_mux[] = {
  1266.     {"gpmc_a0.gpio1_16",  OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
  1267.     {"gpmc_a1.gpio1_17",    OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
  1268.     {"mcasp0_fsr.gpio3_19",  OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
  1269.     {"gpmc_ben1.gpio1_28",    OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
  1270.     {"ecap0_in_pwm0_out.gpio0_7",    OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
  1271.     {NULL, 0},
  1272. };
  1273.  
  1274. /* Configure GPIOs for lcd3 rev A or earlier keys */
  1275. static struct gpio_keys_button beaglebone_lcd3_gpio_keys[] = {
  1276.     {
  1277.         .code                   = KEY_LEFT,
  1278.         .gpio                   = GPIO_TO_PIN(1, 16),
  1279.         .active_low             = true,
  1280.         .desc                   = "left",
  1281.         .type                   = EV_KEY,
  1282.         .wakeup                 = 1,
  1283.     },
  1284.     {
  1285.         .code                   = KEY_RIGHT,
  1286.         .gpio                   = GPIO_TO_PIN(1, 17),
  1287.         .active_low             = true,
  1288.         .desc                   = "right",
  1289.         .type                   = EV_KEY,
  1290.         .wakeup                 = 1,
  1291.     },
  1292.     {
  1293.         .code                   = KEY_UP,
  1294.         .gpio                   = GPIO_TO_PIN(3, 19),
  1295.         .active_low             = true,
  1296.         .desc                   = "up",
  1297.         .type                   = EV_KEY,
  1298.         .wakeup                 = 1,
  1299.     },
  1300.     {
  1301.         .code                   = KEY_DOWN,
  1302.         .gpio                   = GPIO_TO_PIN(1, 28),
  1303.         .active_low             = true,
  1304.         .desc                   = "down",
  1305.         .type                   = EV_KEY,
  1306.         .wakeup                 = 1,
  1307.     },
  1308.     {
  1309.         .code                   = KEY_ENTER,
  1310.         .gpio                   = GPIO_TO_PIN(0, 7),
  1311.         .active_low             = true,
  1312.         .desc                   = "down",
  1313.         .type                   = EV_KEY,
  1314.         .wakeup                 = 1,
  1315.     },
  1316. };
  1317.  
  1318. static struct gpio_keys_platform_data beaglebone_lcd3_gpio_key_info = {
  1319.     .buttons        = beaglebone_lcd3_gpio_keys,
  1320.     .nbuttons       = ARRAY_SIZE(beaglebone_lcd3_gpio_keys),
  1321. };
  1322.  
  1323. static struct platform_device beaglebone_lcd3_keys = {
  1324.     .name   = "gpio-keys",
  1325.     .id     = -1,
  1326.     .dev    = {
  1327.         .platform_data  = &beaglebone_lcd3_gpio_key_info,
  1328.     },
  1329. };
  1330.  
  1331. /* pinmux for lcd3 A1 or newer keys */
  1332. static struct pinmux_config lcd3a1_keys_pin_mux[] = {
  1333.     {"gpmc_a0.gpio1_16",  OMAP_MUX_MODE7 | AM33XX_PIN_INPUT}, // Left
  1334.     {"gpmc_a1.gpio1_17",    OMAP_MUX_MODE7 | AM33XX_PIN_INPUT}, //Right
  1335.     {"gpmc_a3.gpio1_19", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT}, // Up
  1336.     {"mcasp0_axr0.gpio3_16",    OMAP_MUX_MODE7 | AM33XX_PIN_INPUT}, //Down
  1337.     {"mcasp0_fsr.gpio3_19",  OMAP_MUX_MODE7 | AM33XX_PIN_INPUT}, // Enter
  1338.     {NULL, 0},
  1339. };
  1340.  
  1341. /* Configure GPIOs for lcd3 rev A1 or newer keys */
  1342. static struct gpio_keys_button lcd3a1_gpio_keys[] = {
  1343.     {
  1344.         .code                   = KEY_LEFT,
  1345.         .gpio                   = GPIO_TO_PIN(1, 16),
  1346.         .active_low             = true,
  1347.         .desc                   = "left",
  1348.         .type                   = EV_KEY,
  1349.         .wakeup                 = 1,
  1350.     },
  1351.     {
  1352.         .code                   = KEY_RIGHT,
  1353.         .gpio                   = GPIO_TO_PIN(1, 17),
  1354.         .active_low             = true,
  1355.         .desc                   = "right",
  1356.         .type                   = EV_KEY,
  1357.         .wakeup                 = 1,
  1358.     },
  1359.     {
  1360.         .code                   = KEY_UP,
  1361.         .gpio                   = GPIO_TO_PIN(1, 19),
  1362.         .active_low             = true,
  1363.         .desc                   = "up",
  1364.         .type                   = EV_KEY,
  1365.         .wakeup                 = 1,
  1366.     },
  1367.     {
  1368.         .code                   = KEY_DOWN,
  1369.         .gpio                   = GPIO_TO_PIN(3, 16),
  1370.         .active_low             = true,
  1371.         .desc                   = "down",
  1372.         .type                   = EV_KEY,
  1373.         .wakeup                 = 1,
  1374.     },
  1375.     {
  1376.         .code                   = KEY_ENTER,
  1377.         .gpio                   = GPIO_TO_PIN(3, 19),
  1378.         .active_low             = true,
  1379.         .desc                   = "enter",
  1380.         .type                   = EV_KEY,
  1381.         .wakeup                 = 1,
  1382.     },
  1383. };
  1384.  
  1385. static struct gpio_keys_platform_data lcd3a1_gpio_key_info = {
  1386.     .buttons        = lcd3a1_gpio_keys,
  1387.     .nbuttons       = ARRAY_SIZE(lcd3a1_gpio_keys),
  1388. };
  1389.  
  1390. static struct platform_device lcd3a1_keys = {
  1391.     .name   = "gpio-keys",
  1392.     .id     = -1,
  1393.     .dev    = {
  1394.         .platform_data  = &lcd3a1_gpio_key_info,
  1395.     },
  1396. };
  1397.  
  1398. /* pinmux for lcd3 A2 or newer keys */
  1399. static struct pinmux_config lcd3a2_keys_pin_mux[] = {
  1400.     {"gpmc_a0.gpio1_16",  OMAP_MUX_MODE7 | AM33XX_PIN_INPUT}, // Left
  1401.     {"gpmc_a1.gpio1_17",    OMAP_MUX_MODE7 | AM33XX_PIN_INPUT}, //Right
  1402.     {"gpmc_a3.gpio1_19", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT}, // Up
  1403.     {"mcasp0_axr0.gpio3_16",    OMAP_MUX_MODE7 | AM33XX_PIN_INPUT}, //Down
  1404.     {"spi0_d0.gpio0_3",    OMAP_MUX_MODE7 | AM33XX_PIN_INPUT}, // Enter
  1405.     {NULL, 0},
  1406. };
  1407.  
  1408. /* Configure GPIOs for lcd3 rev A2 or newer keys */
  1409. static struct gpio_keys_button lcd3a2_gpio_keys[] = {
  1410.     {
  1411.         .code                   = KEY_LEFT,
  1412.         .gpio                   = GPIO_TO_PIN(1, 16),
  1413.         .active_low             = true,
  1414.         .desc                   = "left",
  1415.         .type                   = EV_KEY,
  1416.         .wakeup                 = 1,
  1417.     },
  1418.     {
  1419.         .code                   = KEY_RIGHT,
  1420.         .gpio                   = GPIO_TO_PIN(1, 17),
  1421.         .active_low             = true,
  1422.         .desc                   = "right",
  1423.         .type                   = EV_KEY,
  1424.         .wakeup                 = 1,
  1425.     },
  1426.     {
  1427.         .code                   = KEY_UP,
  1428.         .gpio                   = GPIO_TO_PIN(1, 19),
  1429.         .active_low             = true,
  1430.         .desc                   = "up",
  1431.         .type                   = EV_KEY,
  1432.         .wakeup                 = 1,
  1433.     },
  1434.     {
  1435.         .code                   = KEY_DOWN,
  1436.         .gpio                   = GPIO_TO_PIN(3, 16),
  1437.         .active_low             = true,
  1438.         .desc                   = "down",
  1439.         .type                   = EV_KEY,
  1440.         .wakeup                 = 1,
  1441.     },
  1442.     {
  1443.         .code                   = KEY_ENTER,
  1444.         .gpio                   = GPIO_TO_PIN(0, 3),
  1445.         .active_low             = true,
  1446.         .desc                   = "enter",
  1447.         .type                   = EV_KEY,
  1448.         .wakeup                 = 1,
  1449.     },
  1450. };
  1451.  
  1452. static struct gpio_keys_platform_data lcd3a2_gpio_key_info = {
  1453.     .buttons        = lcd3a2_gpio_keys,
  1454.     .nbuttons       = ARRAY_SIZE(lcd3a2_gpio_keys),
  1455. };
  1456.  
  1457. static struct platform_device lcd3a2_keys = {
  1458.     .name   = "gpio-keys",
  1459.     .id     = -1,
  1460.     .dev    = {
  1461.         .platform_data  = &lcd3a2_gpio_key_info,
  1462.     },
  1463. };
  1464.  
  1465. /*
  1466. * @evm_id - evm id which needs to be configured
  1467. * @dev_cfg - single evm structure which includes
  1468. *               all module inits, pin-mux defines
  1469. * @profile - if present, else PROFILE_NONE
  1470. * @dghtr_brd_flg - Whether Daughter board is present or not
  1471. */
  1472. static void _configure_device(int evm_id, struct evm_dev_cfg *dev_cfg,
  1473.     int profile)
  1474. {
  1475.     int i;
  1476.  
  1477.     /*
  1478.     * Only General Purpose & Industrial Auto Motro Control
  1479.     * EVM has profiles. So check if this evm has profile.
  1480.     * If not, ignore the profile comparison
  1481.     */
  1482.  
  1483.     /*
  1484.     * If the device is on baseboard, directly configure it. Else (device on
  1485.     * Daughter board), check if the daughter card is detected.
  1486.     */
  1487.     if (profile == PROFILE_NONE) {
  1488.         for (i = 0; dev_cfg->device_init != NULL; dev_cfg++) {
  1489.             if (dev_cfg->device_on == DEV_ON_BASEBOARD)
  1490.                 dev_cfg->device_init(evm_id, profile);
  1491.             else if (daughter_brd_detected == true)
  1492.                 dev_cfg->device_init(evm_id, profile);
  1493.         }
  1494.     } else {
  1495.         for (i = 0; dev_cfg->device_init != NULL; dev_cfg++) {
  1496.             if (dev_cfg->profile & profile) {
  1497.                 if (dev_cfg->device_on == DEV_ON_BASEBOARD)
  1498.                     dev_cfg->device_init(evm_id, profile);
  1499.                 else if (daughter_brd_detected == true)
  1500.                     dev_cfg->device_init(evm_id, profile);
  1501.             }
  1502.         }
  1503.     }
  1504. }
  1505.  
  1506.  
  1507. /* pinmux for usb0 drvvbus */
  1508. static struct pinmux_config usb0_pin_mux[] = {
  1509.     {"usb0_drvvbus.usb0_drvvbus",    OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
  1510.     {NULL, 0},
  1511. };
  1512.  
  1513. /* pinmux for usb1 drvvbus */
  1514. static struct pinmux_config usb1_pin_mux[] = {
  1515.     {"usb1_drvvbus.usb1_drvvbus",    OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
  1516.     {NULL, 0},
  1517. };
  1518.  
  1519. /* pinmux for profibus */
  1520. static struct pinmux_config profibus_pin_mux[] = {
  1521.     {"uart1_rxd.pr1_uart0_rxd_mux1", OMAP_MUX_MODE5 | AM33XX_PIN_INPUT},
  1522.     {"uart1_txd.pr1_uart0_txd_mux1", OMAP_MUX_MODE5 | AM33XX_PIN_OUTPUT},
  1523.     {"mcasp0_fsr.pr1_pru0_pru_r30_5", OMAP_MUX_MODE5 | AM33XX_PIN_OUTPUT},
  1524.     {NULL, 0},
  1525. };
  1526.  
  1527. #define BEAGLEBONE_W1_GPIO GPIO_TO_PIN(1, 3)
  1528.  
  1529. static struct w1_gpio_platform_data bone_w1_gpio_pdata = {
  1530.     .pin        = BEAGLEBONE_W1_GPIO,
  1531.     .is_open_drain  = 0,
  1532. };
  1533.  
  1534. static struct platform_device bone_w1_device = {
  1535.     .name           = "w1-gpio",
  1536.     .id         = -1,
  1537.     .dev.platform_data  = &bone_w1_gpio_pdata,
  1538. };
  1539.  
  1540. /* LEDS - gpio1_21 -> gpio1_24 */
  1541.  
  1542. #define BEAGLEBONE_USR1_LED  GPIO_TO_PIN(1, 21)
  1543. #define BEAGLEBONE_USR2_LED  GPIO_TO_PIN(1, 22)
  1544. #define BEAGLEBONE_USR3_LED  GPIO_TO_PIN(1, 23)
  1545. #define BEAGLEBONE_USR4_LED  GPIO_TO_PIN(1, 24)
  1546.  
  1547. static struct gpio_led bone_gpio_leds[] = {
  1548.     {
  1549.         .name           = "beaglebone::usr0",
  1550.         .default_trigger    = "heartbeat",
  1551.         .gpio           = BEAGLEBONE_USR1_LED,
  1552.     },
  1553.     {
  1554.         .name           = "beaglebone::usr1",
  1555.         .default_trigger    = "mmc0",
  1556.         .gpio           = BEAGLEBONE_USR2_LED,
  1557.     },
  1558.     {
  1559.         .name           = "beaglebone::usr2",
  1560.         .gpio           = BEAGLEBONE_USR3_LED,
  1561.     },
  1562.     {
  1563.         .name           = "beaglebone::usr3",
  1564.         .gpio           = BEAGLEBONE_USR4_LED,
  1565.     },
  1566. };
  1567.  
  1568. static struct gpio_led_platform_data bone_gpio_led_info = {
  1569.     .leds       = bone_gpio_leds,
  1570.     .num_leds   = ARRAY_SIZE(bone_gpio_leds),
  1571. };
  1572.  
  1573. static struct platform_device bone_leds_gpio = {
  1574.     .name   = "leds-gpio",
  1575.     .id = -1,
  1576.     .dev    = {
  1577.         .platform_data  = &bone_gpio_led_info,
  1578.     },
  1579. };
  1580.  
  1581.  
  1582. #define BEAGLEBONEDVI_USR0_LED  GPIO_TO_PIN(1, 18)
  1583. #define BEAGLEBONEDVI_USR1_LED  GPIO_TO_PIN(1, 19)
  1584.  
  1585. static struct gpio_led dvi_gpio_leds[] = {
  1586.     {
  1587.         .name           = "beaglebone::usr0",
  1588.         .default_trigger    = "heartbeat",
  1589.         .gpio           = BEAGLEBONE_USR1_LED,
  1590.     },
  1591.     {
  1592.         .name           = "beaglebone::usr1",
  1593.         .default_trigger    = "mmc0",
  1594.         .gpio           = BEAGLEBONE_USR2_LED,
  1595.     },
  1596.     {
  1597.         .name           = "beaglebone::usr2",
  1598.         .gpio           = BEAGLEBONE_USR3_LED,
  1599.     },
  1600.     {
  1601.         .name           = "beaglebone::usr3",
  1602.         .gpio           = BEAGLEBONE_USR4_LED,
  1603.     },
  1604.     {
  1605.         .name           = "dvi::usr0",
  1606.         .default_trigger    = "heartbeat",
  1607.         .gpio           = BEAGLEBONEDVI_USR0_LED,
  1608.     },
  1609.     {
  1610.         .name           = "dvi::usr1",
  1611.         .default_trigger    = "mmc0",
  1612.         .gpio           = BEAGLEBONEDVI_USR1_LED,
  1613.     },
  1614. };
  1615.  
  1616. static struct gpio_led_platform_data dvi_gpio_led_info = {
  1617.     .leds       = dvi_gpio_leds,
  1618.     .num_leds   = ARRAY_SIZE(dvi_gpio_leds),
  1619. };
  1620.  
  1621. static struct platform_device dvi_leds_gpio = {
  1622.     .name   = "leds-gpio",
  1623.     .id = -1,
  1624.     .dev    = {
  1625.         .platform_data  = &dvi_gpio_led_info,
  1626.     },
  1627. };
  1628.  
  1629. #define BEAGLEBONELCD3_USR0_LED  GPIO_TO_PIN(1, 18)
  1630.  
  1631. static struct gpio_led lcd3_gpio_leds[] = {
  1632.     {
  1633.         .name           = "beaglebone::usr0",
  1634.         .default_trigger    = "heartbeat",
  1635.         .gpio           = BEAGLEBONE_USR1_LED,
  1636.     },
  1637.     {
  1638.         .name           = "beaglebone::usr1",
  1639.         .default_trigger    = "mmc0",
  1640.         .gpio           = BEAGLEBONE_USR2_LED,
  1641.     },
  1642.     {
  1643.         .name           = "beaglebone::usr2",
  1644.         .gpio           = BEAGLEBONE_USR3_LED,
  1645.     },
  1646.     {
  1647.         .name           = "beaglebone::usr3",
  1648.         .gpio           = BEAGLEBONE_USR4_LED,
  1649.     },
  1650.     {
  1651.         .name           = "lcd3::usr0",
  1652.         .default_trigger    = "heartbeat",
  1653.         .gpio           = BEAGLEBONELCD3_USR0_LED,
  1654.     },
  1655. };
  1656.  
  1657. static struct gpio_led_platform_data lcd3_gpio_led_info = {
  1658.     .leds       = lcd3_gpio_leds,
  1659.     .num_leds   = ARRAY_SIZE(lcd3_gpio_leds),
  1660. };
  1661.  
  1662. static struct platform_device lcd3_leds_gpio = {
  1663.     .name   = "leds-gpio",
  1664.     .id = -1,
  1665.     .dev    = {
  1666.         .platform_data  = &lcd3_gpio_led_info,
  1667.     },
  1668. };
  1669.  
  1670. #define BEAGLEBONELCD3A2_USR0_LED  GPIO_TO_PIN(3, 19)
  1671.  
  1672. static struct gpio_led lcd3a2_gpio_leds[] = {
  1673.     {
  1674.         .name           = "beaglebone::usr0",
  1675.         .default_trigger    = "heartbeat",
  1676.         .gpio           = BEAGLEBONE_USR1_LED,
  1677.     },
  1678.     {
  1679.         .name           = "beaglebone::usr1",
  1680.         .default_trigger    = "mmc0",
  1681.         .gpio           = BEAGLEBONE_USR2_LED,
  1682.     },
  1683.     {
  1684.         .name           = "beaglebone::usr2",
  1685.         .gpio           = BEAGLEBONE_USR3_LED,
  1686.     },
  1687.     {
  1688.         .name           = "beaglebone::usr3",
  1689.         .gpio           = BEAGLEBONE_USR4_LED,
  1690.     },
  1691.     {
  1692.         .name           = "lcd3::usr0",
  1693.         .default_trigger    = "heartbeat",
  1694.         .gpio           = BEAGLEBONELCD3A2_USR0_LED,
  1695.     },
  1696. };
  1697.  
  1698. static struct gpio_led_platform_data lcd3a2_gpio_led_info = {
  1699.     .leds       = lcd3a2_gpio_leds,
  1700.     .num_leds   = ARRAY_SIZE(lcd3a2_gpio_leds),
  1701. };
  1702.  
  1703. static struct platform_device lcd3a2_leds_gpio = {
  1704.     .name   = "leds-gpio",
  1705.     .id = -1,
  1706.     .dev    = {
  1707.         .platform_data  = &lcd3a2_gpio_led_info,
  1708.     },
  1709. };
  1710. #define BEAGLEBONELCD7_USR_LED  GPIO_TO_PIN(1, 28)
  1711.  
  1712. static struct gpio_led lcd7_gpio_leds[] = {
  1713.     {
  1714.         .name           = "beaglebone::usr0",
  1715.         .default_trigger    = "heartbeat",
  1716.         .gpio           = BEAGLEBONE_USR1_LED,
  1717.     },
  1718.     {
  1719.         .name           = "beaglebone::usr1",
  1720.         .default_trigger        = "mmc0",
  1721.         .gpio           = BEAGLEBONE_USR2_LED,
  1722.     },
  1723.     {
  1724.         .name           = "beaglebone::usr2",
  1725.         .gpio           = BEAGLEBONE_USR3_LED,
  1726.     },
  1727.     {
  1728.         .name           = "beaglebone::usr3",
  1729.         .gpio           = BEAGLEBONE_USR4_LED,
  1730.     },
  1731.     {
  1732.         .name           = "lcd7::usr",
  1733.         .default_trigger    = "heartbeat",
  1734.         .gpio           = BEAGLEBONELCD7_USR_LED,
  1735.     },
  1736. };
  1737.  
  1738. static struct gpio_led_platform_data lcd7_gpio_led_info = {
  1739.     .leds       = lcd7_gpio_leds,
  1740.     .num_leds   = ARRAY_SIZE(lcd7_gpio_leds),
  1741. };
  1742.  
  1743. static struct platform_device lcd7_leds_gpio = {
  1744.     .name   = "leds-gpio",
  1745.     .id = -1,
  1746.     .dev    = {
  1747.         .platform_data  = &lcd7_gpio_led_info,
  1748.     },
  1749. };
  1750.  
  1751. static struct pinmux_config bone_pin_mux[] = {
  1752.     /* User LED gpios (gpio1_21 to gpio1_24) */
  1753.     {"gpmc_a5.rgmii2_td0", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT}, // USR0
  1754.     {"gpmc_a6.rgmii2_tclk", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT}, // USR1
  1755.     {"gpmc_a7.rgmii2_rclk", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT}, // USR2
  1756.     {"gpmc_a8.rgmii2_rd3", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT}, // USR3
  1757.     /* Grounding gpio1_6 (pin 3 Conn A) signals bone tester to start diag tests */
  1758.     {"gpmc_ad6.gpio1_6", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT_PULLUP},
  1759.     {NULL, 0},
  1760. };
  1761.  
  1762. /* Module pin mux for eCAP0 */
  1763. static struct pinmux_config ecap0_pin_mux[] = {
  1764.     {"ecap0_in_pwm0_out.ecap0_in_pwm0_out",
  1765.         OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
  1766.     {NULL, 0},
  1767. };
  1768.  
  1769. static int ehrpwm_backlight_enable;
  1770. static int backlight_enable;
  1771.  
  1772. #define AM335XEVM_WLAN_PMENA_GPIO   GPIO_TO_PIN(1, 30)
  1773. #define AM335XEVM_WLAN_IRQ_GPIO     GPIO_TO_PIN(3, 17)
  1774.  
  1775. struct wl12xx_platform_data am335xevm_wlan_data = {
  1776.     .irq = OMAP_GPIO_IRQ(AM335XEVM_WLAN_IRQ_GPIO),
  1777.     .board_ref_clock = WL12XX_REFCLOCK_38_XTAL, /* 38.4Mhz */
  1778. };
  1779.  
  1780. /* Module pin mux for wlan and bluetooth */
  1781. static struct pinmux_config mmc2_wl12xx_pin_mux[] = {
  1782.     {"gpmc_a1.mmc2_dat0", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
  1783.     {"gpmc_a2.mmc2_dat1", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
  1784.     {"gpmc_a3.mmc2_dat2", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
  1785.     {"gpmc_ben1.mmc2_dat3", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
  1786.     {"gpmc_csn3.mmc2_cmd", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
  1787.     {"gpmc_clk.mmc2_clk", OMAP_MUX_MODE3 | AM33XX_PIN_INPUT_PULLUP},
  1788.     {NULL, 0},
  1789. };
  1790.  
  1791. static struct pinmux_config uart1_wl12xx_pin_mux[] = {
  1792.     {"uart1_ctsn.uart1_ctsn", OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT},
  1793.     {"uart1_rtsn.uart1_rtsn", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT},
  1794.     {"uart1_rxd.uart1_rxd", OMAP_MUX_MODE0 | AM33XX_PIN_INPUT_PULLUP},
  1795.     {"uart1_txd.uart1_txd", OMAP_MUX_MODE0 | AM33XX_PULL_ENBL},
  1796.     {NULL, 0},
  1797. };
  1798.  
  1799. static struct pinmux_config wl12xx_pin_mux_evm_rev1_1a[] = {
  1800.     {"gpmc_a0.gpio1_16", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
  1801.     {"mcasp0_ahclkr.gpio3_17", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
  1802.     {"mcasp0_ahclkx.gpio3_21", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
  1803.     {NULL, 0},
  1804.  };
  1805.  
  1806. static struct pinmux_config wl12xx_pin_mux_evm_rev1_0[] = {
  1807.     {"gpmc_csn1.gpio1_30", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
  1808.     {"mcasp0_ahclkr.gpio3_17", OMAP_MUX_MODE7 | AM33XX_PIN_INPUT},
  1809.     {"gpmc_csn2.gpio1_31", OMAP_MUX_MODE7 | AM33XX_PIN_OUTPUT},
  1810.     {NULL, 0},
  1811.  };
  1812.  
  1813. static void enable_ecap0(int evm_id, int profile)
  1814. {
  1815.     backlight_enable = true;
  1816.     setup_pin_mux(ecap0_pin_mux);
  1817. }
  1818.  
  1819. /* Setup pwm-backlight */
  1820. static struct platform_device am335x_backlight = {
  1821.     .name           = "pwm-backlight",
  1822.     .id             = -1,
  1823.     .dev            = {
  1824.         .platform_data  = &am335x_backlight_data,
  1825.     }
  1826. };
  1827.  
  1828. static struct pwmss_platform_data  pwm_pdata[3] = {
  1829.     {
  1830.         .version = PWM_VERSION_1,
  1831.     },
  1832.     {
  1833.         .version = PWM_VERSION_1,
  1834.     },
  1835.     {
  1836.         .version = PWM_VERSION_1,
  1837.     },
  1838. };
  1839.  
  1840. static void register_all_pwms(void)
  1841. {
  1842.     am33xx_register_ehrpwm(0, &pwm_pdata[0]);
  1843.     am33xx_register_ehrpwm(1, &pwm_pdata[1]);
  1844.     am33xx_register_ehrpwm(2, &pwm_pdata[2]);
  1845.     am33xx_register_ecap(0, &pwm_pdata[0]);
  1846.     am33xx_register_ecap(1, &pwm_pdata[1]);
  1847.     am33xx_register_ecap(2, &pwm_pdata[2]);
  1848. }
  1849.  
  1850. static int __init ecap0_init(void)
  1851. {
  1852.     int status = 0;
  1853.  
  1854.     if (backlight_enable) {
  1855.         am33xx_register_ecap(0, &pwm_pdata[0]);
  1856.         platform_device_register(&am335x_backlight);
  1857.     }
  1858.     return status;
  1859. }
  1860. late_initcall(ecap0_init);
  1861.  
  1862. static void enable_ehrpwm1(int evm_id, int profile)
  1863. {
  1864.     ehrpwm_backlight_enable = true;
  1865.     /*am33xx_register_ehrpwm(1, &pwm_pdata[1]);
  1866.      *TODO:no longer required as we are registering
  1867.      *all pwms for the beaglebone
  1868.      */
  1869. }
  1870.  
  1871. /* Setup pwm-backlight for bbtoys7lcd */
  1872. static struct platform_device bbtoys7lcd_backlight = {
  1873.     .name           = "pwm-backlight",
  1874.     .id             = -1,
  1875.     .dev            = {
  1876.         .platform_data  = &bbtoys7lcd_backlight_data,
  1877.     }
  1878. };
  1879.  
  1880. static int __init ehrpwm1_init(void)
  1881. {
  1882.     int status = 0;
  1883.     if (ehrpwm_backlight_enable) {
  1884.         platform_device_register(&bbtoys7lcd_backlight);
  1885.     }
  1886.     return status;
  1887. }
  1888. late_initcall(ehrpwm1_init);
  1889.  
  1890. static int __init conf_disp_pll(int rate)
  1891. {
  1892.     struct clk *disp_pll;
  1893.     int ret = -EINVAL;
  1894.  
  1895.     disp_pll = clk_get(NULL, "dpll_disp_ck");
  1896.     if (IS_ERR(disp_pll)) {
  1897.         pr_err("Cannot clk_get disp_pll\n");
  1898.         goto out;
  1899.     }
  1900.  
  1901.     ret = clk_set_rate(disp_pll, rate);
  1902.     clk_put(disp_pll);
  1903. out:
  1904.     return ret;
  1905. }
  1906.  
  1907. static void lcdc_init(int evm_id, int profile)
  1908. {
  1909.  
  1910.     setup_pin_mux(lcdc16_pin_mux);
  1911.     setup_pin_mux(lcdc_pin_mux);
  1912.  
  1913.     if (conf_disp_pll(300000000)) {
  1914.         pr_info("Failed configure display PLL, not attempting to"
  1915.                 "register LCDC\n");
  1916.         return;
  1917.     }
  1918.  
  1919.     if (am33xx_register_lcdc(&TFC_S9700RTWV35TR_01B_pdata))
  1920.         pr_info("Failed to register LCDC device\n");
  1921.     return;
  1922. }
  1923.  
  1924. #define BEAGLEBONE_LCD_AVDD_EN GPIO_TO_PIN(0, 7)
  1925. #define BEAGLEBONE_LCD7A2_AVDD_EN GPIO_TO_PIN(1, 31)
  1926. #define BEAGLEBONE_LCD7A3_AVDD_EN GPIO_TO_PIN(0, 2)
  1927.  
  1928. static void bbtoys7lcd_init(int evm_id, int profile)
  1929. {
  1930.     setup_pin_mux(lcdc16_pin_mux);
  1931.  
  1932.     // we are being stupid and setting pixclock from here instead of da8xx-fb.c
  1933.     if (conf_disp_pll(300000000)) {
  1934.         pr_info("Failed to set pixclock to 300000000, not attempting to"
  1935.                 "register LCD cape\n");
  1936.         return;
  1937.     }
  1938.    
  1939.     if (am33xx_register_lcdc(&bbtoys7_pdata))
  1940.         pr_info("Failed to register Beagleboardtoys 7\" LCD cape device\n");
  1941.        
  1942.     return;
  1943. }
  1944.  
  1945. static void bbtoys35lcd_init(int evm_id, int profile)
  1946. {
  1947.     setup_pin_mux(lcdc16_pin_mux);
  1948.     setup_pin_mux(bbtoys35_pin_mux);
  1949.    
  1950.     // we are being stupid and setting pixclock from here instead of da8xx-fb.c
  1951.     if (conf_disp_pll(16000000)) {
  1952.         pr_info("Failed to set pixclock to 16000000, not attempting to"
  1953.                 "register LCD cape\n");
  1954.         return;
  1955.     }
  1956.    
  1957.     if (am33xx_register_lcdc(&bbtoys35_pdata))
  1958.         pr_info("Failed to register Beagleboardtoys 3.5\" LCD cape device\n");
  1959.    
  1960.     return;
  1961. }
  1962.  
  1963. static void bbtoys43lcd_init(int evm_id, int profile)
  1964. {
  1965.     setup_pin_mux(lcdc16_pin_mux);
  1966.     setup_pin_mux(lcdc_pin_mux);
  1967.    
  1968.     // we are being stupid and setting pixclock from here instead of da8xx-fb.c
  1969.     if (conf_disp_pll(18000000)) {
  1970.         pr_info("Failed to set pixclock to 18000000, not attempting to"
  1971.                 "register LCD cape\n");
  1972.         return;
  1973.     }
  1974.    
  1975.     if (am33xx_register_lcdc(&bbtoys43_pdata))
  1976.         pr_info("Failed to register Beagleboardtoys 4.3\" LCD cape device\n");
  1977.    
  1978.     return;
  1979. }
  1980.  
  1981. #define BEAGLEBONEDVI_PDn_A1  GPIO_TO_PIN(1, 7)
  1982. #define BEAGLEBONEDVI_PDn_A2  GPIO_TO_PIN(1, 31)
  1983.  
  1984. static void dvi_init(int evm_id, int profile)
  1985. {
  1986.     setup_pin_mux(lcdc16_pin_mux);
  1987.  
  1988.     // we are being stupid and setting pixclock from here instead of da8xx-fb.c
  1989.     if (conf_disp_pll(560000000)) {
  1990.         pr_info("Failed to set pixclock to 56000000, not attempting to"
  1991.                 "register DVI adapter\n");
  1992.         return;
  1993.     }
  1994.    
  1995.     if (am33xx_register_lcdc(&dvi_pdata))
  1996.         pr_info("Failed to register BeagleBoardToys DVI cape\n");
  1997.     return;
  1998. }
  1999.  
  2000. static void tsc_init(int evm_id, int profile)
  2001. {
  2002.     int err;
  2003.  
  2004.     if (gp_evm_revision == GP_EVM_REV_IS_1_1A) {
  2005.         am335x_touchscreen_data.analog_input = 1;
  2006.         pr_info("TSC connected to beta GP EVM\n");
  2007.     }
  2008.     if (gp_evm_revision == GP_EVM_REV_IS_1_1A) {
  2009.         am335x_touchscreen_data.analog_input = 0;
  2010.         pr_info("TSC connected to alpha GP EVM\n");
  2011.     }
  2012.     if( gp_evm_revision == GP_EVM_ACTUALLY_BEAGLEBONE) {
  2013.         am335x_touchscreen_data.analog_input = 1;
  2014.         pr_info("TSC connected to BeagleBone\n");; 
  2015.     }
  2016.     setup_pin_mux(tsc_pin_mux);
  2017.  
  2018.     err = am33xx_register_tsc(&am335x_touchscreen_data);
  2019.     if (err)
  2020.         pr_err("failed to register touchscreen device\n");
  2021. }
  2022.  
  2023. static void bone_tsc_init(int evm_id, int profile)
  2024. {
  2025.     int err;
  2026.     setup_pin_mux(tsc_pin_mux);
  2027.     err = am33xx_register_tsc(&bone_touchscreen_data);
  2028.     if (err)
  2029.         pr_err("failed to register touchscreen device\n");
  2030. }
  2031.  
  2032.  
  2033. static void boneleds_init(int evm_id, int profile )
  2034. {
  2035.     int err;
  2036.     setup_pin_mux(bone_pin_mux);
  2037.     err = platform_device_register(&bone_leds_gpio);
  2038.     if (err)
  2039.         pr_err("failed to register BeagleBone LEDS\n");
  2040. }
  2041.  
  2042. static void dvileds_init(int evm_id, int profile )
  2043. {
  2044.     int err;
  2045.     err = platform_device_register(&dvi_leds_gpio);
  2046.     if (err)
  2047.         pr_err("failed to register BeagleBone DVI cape LEDS\n");
  2048. }
  2049.  
  2050. static struct resource cssp_camera_resources[] = {
  2051.     {
  2052.         .name = "gpmc_phys_mem_slot",
  2053.         .flags = IORESOURCE_MEM,
  2054.     },
  2055. };
  2056.  
  2057. static struct mt9t112_camera_info mt9t111_cam_info = {
  2058.     /* divider calculated for 32Mhz CAM_MCLK */
  2059.     .divider = {
  2060.         .m = 24, .n = 1,
  2061.         .p1 = 0, .p2 = 7, .p3 = 0, .p4 = 10, .p5 = 14, .p6 = 7, .p7 = 0,
  2062.     },
  2063. };
  2064.  
  2065. static struct soc_camera_link mt9t111_camera_link =  {
  2066.     .priv = &mt9t111_cam_info,
  2067.     .i2c_adapter_id = 3,
  2068. };
  2069.  
  2070. static struct i2c_board_info i2c_camera = {
  2071.     I2C_BOARD_INFO("mt9t112", 0x3c),
  2072.     .platform_data = &mt9t111_camera_link,
  2073. };
  2074.  
  2075. struct cssp_cam_platform_data {
  2076.     struct i2c_board_info *cam_i2c_board_info;
  2077.     const char *cam_clk_name;
  2078.     int dma_ch;
  2079.     int cssp_reset_pin;
  2080. };
  2081.  
  2082. static struct cssp_cam_platform_data cssp_cam_platform_data = {
  2083.     .cam_i2c_board_info = &i2c_camera,
  2084.     .cam_clk_name = "clkout2_ck",
  2085.     .dma_ch = AM33XX_DMA_XDMA_EVENT_INTR2,
  2086.     .cssp_reset_pin = GPIO_TO_PIN(0, 4),
  2087. };
  2088.  
  2089. static struct platform_device cssp_camera = {
  2090.     .name  = "cssp-camera",
  2091.     .id    = -1,
  2092.     .dev   = {
  2093.         .platform_data = &cssp_cam_platform_data,
  2094.     },
  2095.     .num_resources = sizeof(cssp_camera_resources) / sizeof(cssp_camera_resources[0]),
  2096.     .resource = cssp_camera_resources,
  2097. };
  2098.  
  2099. static struct gpmc_timings cssp_timings = {
  2100.     /* Minimum clock period for synchronous mode (in picoseconds) */
  2101.     .sync_clk = 20000,
  2102.  
  2103.     /* CS signal timings corresponding to GPMC_CONFIG2 */
  2104.     .cs_on = 1,
  2105.     .cs_rd_off = 16 * 10,       /* Read deassertion time */
  2106.     .cs_wr_off = 31 * 10,       /* Write deassertion time */
  2107.  
  2108.     /* ADV signal timings corresponding to GPMC_CONFIG3 */
  2109.     .adv_on = 0,            /* Assertion time */
  2110.     .adv_rd_off = 4 * 10,       /* Read deassertion time */
  2111.     .adv_wr_off = 4 * 10,       /* Write deassertion time */
  2112.  
  2113.     /* WE signals timings corresponding to GPMC_CONFIG4 */
  2114.     .we_on = 6 * 10,        /* WE assertion time */
  2115.     .we_off = 31 * 10,      /* WE deassertion time */
  2116.  
  2117.     /* OE signals timings corresponding to GPMC_CONFIG4 */
  2118.     .oe_on = 6 * 10,        /* OE assertion time */
  2119.     .oe_off = 16 * 10,      /* OE deassertion time */
  2120.  
  2121.     /* Access time and cycle time timings corresponding to GPMC_CONFIG5 */
  2122.     .page_burst_access = 2 * 10,    /* Multiple access word delay */
  2123.     .access = 14 * 10,      /* Start-cycle to first data valid delay */
  2124.     .rd_cycle = 16 * 10,        /* Total read cycle time */
  2125.     .wr_cycle = 31 * 10,        /* Total write cycle time */
  2126.  
  2127.     /* The following are only on OMAP3430 */
  2128.     .wr_access = 10 * 10,       /* WRACCESSTIME */
  2129.     .wr_data_mux_bus = 6 * 10,  /* WRDATAONADMUXBUS */
  2130. };
  2131.  
  2132. static int gpmc_cssp_init(void)
  2133. {
  2134.     int cs = 1; /* Chip Select on GPMC bus */
  2135.     int val;
  2136.     long unsigned int cssp_gpmc_mem_base_phys;
  2137.  
  2138.     if (gpmc_cs_request(cs, SZ_16M, &cssp_gpmc_mem_base_phys) < 0) {
  2139.             printk(KERN_ERR "[cssp_cam platform init]: gpmc_cs_request failed\n");
  2140.             return -1;
  2141.     }
  2142.  
  2143.     cssp_camera_resources[0].start = cssp_gpmc_mem_base_phys;
  2144.     cssp_camera_resources[0].end = cssp_gpmc_mem_base_phys + 0x1ffff;
  2145.  
  2146.     if (gpmc_cs_configure(cs, GPMC_CONFIG_DEV_TYPE, GPMC_DEVICETYPE_NOR) < 0) {
  2147.             printk(KERN_ERR "[cssp_cam platform init]: gpmc_cs_configure failed\n");
  2148.             return -1;
  2149.     }
  2150.  
  2151.     val = GPMC_CONFIG1_READMULTIPLE_SUPP;
  2152.     val |= GPMC_CONFIG1_READTYPE_SYNC;
  2153.     val |= GPMC_CONFIG1_WRITETYPE_SYNC;
  2154.     val |= GPMC_CONFIG1_CLKACTIVATIONTIME(2);
  2155.     val |= GPMC_CONFIG1_PAGE_LEN(2);
  2156.     val |= GPMC_CONFIG1_DEVICESIZE_16;
  2157.     val |= GPMC_CONFIG1_DEVICETYPE_NOR;
  2158.     val |= GPMC_CONFIG1_MUXADDDATA;
  2159.     gpmc_cs_write_reg(cs, GPMC_CS_CONFIG1, val);
  2160.  
  2161.     if (gpmc_cs_set_timings(cs, &cssp_timings) < 0) {
  2162.         printk(KERN_ERR "Failed gpmc_cs_set_timings for QuickLogic CAMIF device\n");
  2163.         goto free;
  2164.     }
  2165.  
  2166.     val = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG6);
  2167.     val &= 0xe0f0f030;
  2168.     val |= 0x0a060484;
  2169.     gpmc_cs_write_reg(cs, GPMC_CS_CONFIG6, val);
  2170.  
  2171.     printk(KERN_INFO "gpmc_cssp_init for QuickLogic CAMIF device succeeded\n");
  2172.  
  2173.     return 0;
  2174.  
  2175. free:
  2176.     gpmc_cs_free(cs);
  2177.  
  2178.     printk(KERN_ERR "Could not initialize QuickLogic CAMIF device\n");
  2179.  
  2180.     return -1;
  2181. }
  2182.  
  2183. static void cssp_gpmc_init(void)
  2184. {
  2185.     struct gpmc_devices_info gpmc_device[2] = {
  2186.             { NULL, GPMC_DEVICE_NOR },
  2187.         };
  2188.  
  2189.     setup_pin_mux(gpmc_pin_mux);
  2190.     setup_pin_mux(camera_cape_pin_mux);
  2191.  
  2192.     omap_init_gpmc(gpmc_device, sizeof(gpmc_device));
  2193.     gpmc_cssp_init();
  2194.  
  2195.     platform_device_register(&cssp_camera);
  2196.  
  2197.     printk(KERN_INFO "[cssp_cam platform init]: cssp_gpmc_init: DONE\n");
  2198. }
  2199.  
  2200.  
  2201. static void lcd3leds_init(int evm_id, int profile )
  2202. {
  2203.     int err;
  2204.     err = platform_device_register(&lcd3_leds_gpio);
  2205.     if (err)
  2206.         pr_err("failed to register BeagleBone LCD cape LEDs\n");
  2207. }
  2208.  
  2209. static void lcd7leds_init(int evm_id, int profile )
  2210. {
  2211.     int err;
  2212.     err = platform_device_register(&lcd7_leds_gpio);
  2213.     if (err)
  2214.         pr_err("failed to register BeagleBone LCD cape LED\n");
  2215. }
  2216.  
  2217. static void bonew1_gpio_init(int evm_id, int profile )
  2218. {
  2219.     beaglebone_w1gpio_free = 0;
  2220.     int err;
  2221.     setup_pin_mux(w1_gpio_pin_mux);
  2222.     err = platform_device_register(&bone_w1_device);
  2223.     if (err)
  2224.         pr_err("failed to register w1-gpio\n");
  2225.     else
  2226.         pr_info("w1-gpio connected to P8_6\n");
  2227. }
  2228.  
  2229. static void rgmii1_init(int evm_id, int profile)
  2230. {
  2231.     setup_pin_mux(rgmii1_pin_mux);
  2232.     return;
  2233. }
  2234.  
  2235. static void rgmii2_init(int evm_id, int profile)
  2236. {
  2237.     setup_pin_mux(rgmii2_pin_mux);
  2238.     return;
  2239. }
  2240.  
  2241. static void mii1_init(int evm_id, int profile)
  2242. {
  2243.     setup_pin_mux(mii1_pin_mux);
  2244.     return;
  2245. }
  2246.  
  2247. static void rmii1_init(int evm_id, int profile)
  2248. {
  2249.     setup_pin_mux(rmii1_pin_mux);
  2250.     return;
  2251. }
  2252.  
  2253. static void usb0_init(int evm_id, int profile)
  2254. {
  2255.     setup_pin_mux(usb0_pin_mux);
  2256.     return;
  2257. }
  2258.  
  2259. static void usb1_init(int evm_id, int profile)
  2260. {
  2261.     setup_pin_mux(usb1_pin_mux);
  2262.     return;
  2263. }
  2264.  
  2265. /* setup uart3 */
  2266. static void uart3_init(int evm_id, int profile)
  2267. {
  2268.     setup_pin_mux(uart3_pin_mux);
  2269.     return;
  2270. }
  2271.  
  2272. /* setup uart2 */
  2273. static void uart2_init(int evm_id, int profile)
  2274. {
  2275.     setup_pin_mux(uart2_pin_mux);
  2276.     return;
  2277. }
  2278.  
  2279. /* setup haptics */
  2280. #define HAPTICS_MAX_FREQ 250
  2281. static void haptics_init(int evm_id, int profile)
  2282. {
  2283.     setup_pin_mux(haptics_pin_mux);
  2284.     pwm_pdata[2].chan_attrib[1].max_freq = HAPTICS_MAX_FREQ;
  2285.     am33xx_register_ehrpwm(2, &pwm_pdata[2]);
  2286. }
  2287.  
  2288. /* NAND partition information */
  2289. static struct mtd_partition am335x_nand_partitions[] = {
  2290. /* All the partition sizes are listed in terms of NAND block size */
  2291.     {
  2292.         .name           = "SPL",
  2293.         .offset         = 0,            /* Offset = 0x0 */
  2294.         .size           = SZ_128K,
  2295.     },
  2296.     {
  2297.         .name           = "SPL.backup1",
  2298.         .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x20000 */
  2299.         .size           = SZ_128K,
  2300.     },
  2301.     {
  2302.         .name           = "SPL.backup2",
  2303.         .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x40000 */
  2304.         .size           = SZ_128K,
  2305.     },
  2306.     {
  2307.         .name           = "SPL.backup3",
  2308.         .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x60000 */
  2309.         .size           = SZ_128K,
  2310.     },
  2311.     {
  2312.         .name           = "U-Boot",
  2313.         .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x80000 */
  2314.         .size           = 15 * SZ_128K,
  2315.     },
  2316.     {
  2317.         .name           = "U-Boot Env",
  2318.         .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x260000 */
  2319.         .size           = 1 * SZ_128K,
  2320.     },
  2321.     {
  2322.         .name           = "Kernel",
  2323.         .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x280000 */
  2324.         .size           = 40 * SZ_128K,
  2325.     },
  2326.     {
  2327.         .name           = "File System",
  2328.         .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x780000 */
  2329.         .size           = MTDPART_SIZ_FULL,
  2330.     },
  2331. };
  2332.  
  2333. /* SPI 0/1 Platform Data */
  2334. /* SPI flash information */
  2335. static struct mtd_partition am335x_spi_partitions[] = {
  2336.     /* All the partition sizes are listed in terms of erase size */
  2337.     {
  2338.         .name       = "SPL",
  2339.         .offset     = 0,            /* Offset = 0x0 */
  2340.         .size       = SZ_128K,
  2341.     },
  2342.     {
  2343.         .name       = "U-Boot",
  2344.         .offset     = MTDPART_OFS_APPEND,   /* Offset = 0x20000 */
  2345.         .size       = 2 * SZ_128K,
  2346.     },
  2347.     {
  2348.         .name       = "U-Boot Env",
  2349.         .offset     = MTDPART_OFS_APPEND,   /* Offset = 0x60000 */
  2350.         .size       = 2 * SZ_4K,
  2351.     },
  2352.     {
  2353.         .name       = "Kernel",
  2354.         .offset     = MTDPART_OFS_APPEND,   /* Offset = 0x62000 */
  2355.         .size       = 28 * SZ_128K,
  2356.     },
  2357.     {
  2358.         .name       = "File System",
  2359.         .offset     = MTDPART_OFS_APPEND,   /* Offset = 0x3E2000 */
  2360.         .size       = MTDPART_SIZ_FULL,     /* size ~= 4.1 MiB */
  2361.     }
  2362. };
  2363.  
  2364. static const struct flash_platform_data am335x_spi_flash = {
  2365.     .type      = "w25q64",
  2366.     .name      = "spi_flash",
  2367.     .parts     = am335x_spi_partitions,
  2368.     .nr_parts  = ARRAY_SIZE(am335x_spi_partitions),
  2369. };
  2370.  
  2371. /*
  2372.  * SPI Flash works at 80Mhz however SPI Controller works at 48MHz.
  2373.  * So setup Max speed to be less than that of Controller speed
  2374.  */
  2375. static struct spi_board_info am335x_spi0_slave_info[] = {
  2376.     {
  2377.         .modalias      = "m25p80",
  2378.         .platform_data = &am335x_spi_flash,
  2379.         .irq           = -1,
  2380.         .max_speed_hz  = 24000000,
  2381.         .bus_num       = 1,
  2382.         .chip_select   = 0,
  2383.     },
  2384. };
  2385.  
  2386. static struct spi_board_info am335x_spi1_slave_info[] = {
  2387.     {
  2388.         .modalias      = "m25p80",
  2389.         .platform_data = &am335x_spi_flash,
  2390.         .irq           = -1,
  2391.         .max_speed_hz  = 12000000,
  2392.         .bus_num       = 2,
  2393.         .chip_select   = 0,
  2394.     },
  2395. };
  2396.  
  2397. static struct spi_board_info bone_spidev2_info[] = {
  2398.     {
  2399.         .modalias      = "spidev",
  2400.         .irq           = -1,
  2401.         .max_speed_hz  = 12000000,
  2402.         .bus_num       = 2,
  2403.         .chip_select   = 0,
  2404.     },
  2405. };
  2406.  
  2407. static struct gpmc_timings am335x_nand_timings = {
  2408.     .sync_clk = 0,
  2409.  
  2410.     .cs_on = 0,
  2411.     .cs_rd_off = 44,
  2412.     .cs_wr_off = 44,
  2413.  
  2414.     .adv_on = 6,
  2415.     .adv_rd_off = 34,
  2416.     .adv_wr_off = 44,
  2417.     .we_off = 40,
  2418.     .oe_off = 54,
  2419.  
  2420.     .access = 64,
  2421.     .rd_cycle = 82,
  2422.     .wr_cycle = 82,
  2423.  
  2424.     .wr_access = 40,
  2425.     .wr_data_mux_bus = 0,
  2426. };
  2427.  
  2428. static void evm_nand_init(int evm_id, int profile)
  2429. {
  2430.     struct omap_nand_platform_data *pdata;
  2431.     struct gpmc_devices_info gpmc_device[2] = {
  2432.         { NULL, 0 },
  2433.         { NULL, 0 },
  2434.     };
  2435.  
  2436.     setup_pin_mux(nand_pin_mux);
  2437.     pdata = omap_nand_init(am335x_nand_partitions,
  2438.         ARRAY_SIZE(am335x_nand_partitions), 0, 0,
  2439.         &am335x_nand_timings);
  2440.     if (!pdata)
  2441.         return;
  2442.     pdata->ecc_opt =OMAP_ECC_BCH8_CODE_HW;
  2443.     pdata->elm_used = true;
  2444.     gpmc_device[0].pdata = pdata;
  2445.     gpmc_device[0].flag = GPMC_DEVICE_NAND;
  2446.  
  2447.     omap_init_gpmc(gpmc_device, sizeof(gpmc_device));
  2448.     omap_init_elm();
  2449. }
  2450.  
  2451. static struct regulator_consumer_supply bone_audio_supplies[] = {
  2452.         /* tlv320aic3x analog supplies */
  2453.         REGULATOR_SUPPLY("AVDD", "3-001b"),
  2454.         REGULATOR_SUPPLY("DRVDD", "3-001b"),
  2455.         /* tlv320aic3x digital supplies */
  2456.         REGULATOR_SUPPLY("IOVDD", "3-001b"),
  2457.         REGULATOR_SUPPLY("DVDD", "3-001b"),
  2458. };
  2459.  
  2460. /* TPS65217 voltage regulator support */
  2461.  
  2462. /* 1.8V */
  2463. static struct regulator_consumer_supply tps65217_dcdc1_consumers[] = {
  2464.     {
  2465.         .supply = "vdds_osc",
  2466.     },
  2467.     {
  2468.         .supply = "vdds_pll_ddr",
  2469.     },
  2470.     {
  2471.         .supply = "vdds_pll_mpu",
  2472.     },
  2473.     {
  2474.         .supply = "vdds_pll_core_lcd",
  2475.     },
  2476.     {
  2477.         .supply = "vdds_sram_mpu_bb",
  2478.     },
  2479.     {
  2480.         .supply = "vdds_sram_core_bg",
  2481.     },
  2482.     {
  2483.         .supply = "vdda_usb0_1p8v",
  2484.     },
  2485.     {
  2486.         .supply = "vdds_ddr",
  2487.     },
  2488.     {
  2489.         .supply = "vdds",
  2490.     },
  2491.     {
  2492.         .supply = "vdds_hvx_1p8v",
  2493.     },
  2494.     {
  2495.         .supply = "vdda_adc",
  2496.     },
  2497.     {
  2498.         .supply = "ddr2",
  2499.     },
  2500. };
  2501.  
  2502. /* 1.1V */
  2503. static struct regulator_consumer_supply tps65217_dcdc2_consumers[] = {
  2504.     {
  2505.         .supply = "vdd_mpu",
  2506.     },
  2507. };
  2508.  
  2509. /* 1.1V */
  2510. static struct regulator_consumer_supply tps65217_dcdc3_consumers[] = {
  2511.     {
  2512.         .supply = "vdd_core",
  2513.     },
  2514. };
  2515.  
  2516. /* 1.8V LDO */
  2517. static struct regulator_consumer_supply tps65217_ldo1_consumers[] = {
  2518.     {
  2519.         .supply = "vdds_rtc",
  2520.     },
  2521. };
  2522.  
  2523. /* 3.3V LDO */
  2524. static struct regulator_consumer_supply tps65217_ldo2_consumers[] = {
  2525.     {
  2526.         .supply = "vdds_any_pn",
  2527.     },
  2528. };
  2529.  
  2530. /* 3.3V LDO */
  2531. static struct regulator_consumer_supply tps65217_ldo3_consumers[] = {
  2532.     {
  2533.         .supply = "vdds_hvx_ldo3_3p3v",
  2534.     },
  2535.     {
  2536.         .supply = "vdda_usb0_3p3v",
  2537.     },
  2538. };
  2539.  
  2540. /* 3.3V LDO */
  2541. static struct regulator_consumer_supply tps65217_ldo4_consumers[] = {
  2542.     {
  2543.         .supply = "vdds_hvx_ldo4_3p3v",
  2544.     },
  2545. };
  2546.  
  2547. static struct regulator_init_data tps65217_regulator_data[] = {
  2548.     /* dcdc1 */
  2549.     {
  2550.         .constraints = {
  2551.             .min_uV = 900000,
  2552.             .max_uV = 1800000,
  2553.             .boot_on = 1,
  2554.             .always_on = 1,
  2555.         },
  2556.         .num_consumer_supplies = ARRAY_SIZE(tps65217_dcdc1_consumers),
  2557.         .consumer_supplies = tps65217_dcdc1_consumers,
  2558.     },
  2559.  
  2560.     /* dcdc2 */
  2561.     {
  2562.         .constraints = {
  2563.             .min_uV = 900000,
  2564.             .max_uV = 3300000,
  2565.             .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  2566.                 REGULATOR_CHANGE_STATUS),
  2567.             .boot_on = 1,
  2568.             .always_on = 1,
  2569.         },
  2570.         .num_consumer_supplies = ARRAY_SIZE(tps65217_dcdc2_consumers),
  2571.         .consumer_supplies = tps65217_dcdc2_consumers,
  2572.     },
  2573.  
  2574.     /* dcdc3 */
  2575.     {
  2576.         .constraints = {
  2577.             .min_uV = 900000,
  2578.             .max_uV = 1500000,
  2579.             .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  2580.                 REGULATOR_CHANGE_STATUS),
  2581.             .boot_on = 1,
  2582.             .always_on = 1,
  2583.         },
  2584.         .num_consumer_supplies = ARRAY_SIZE(tps65217_dcdc3_consumers),
  2585.         .consumer_supplies = tps65217_dcdc3_consumers,
  2586.     },
  2587.  
  2588.     /* ldo1 */
  2589.     {
  2590.         .constraints = {
  2591.             .min_uV = 1000000,
  2592.             .max_uV = 3300000,
  2593.             .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  2594.             .boot_on = 1,
  2595.             .always_on = 1,
  2596.         },
  2597.         .num_consumer_supplies = ARRAY_SIZE(tps65217_ldo1_consumers),
  2598.         .consumer_supplies = tps65217_ldo1_consumers,
  2599.     },
  2600.  
  2601.     /* ldo2 */
  2602.     {
  2603.         .constraints = {
  2604.             .min_uV = 900000,
  2605.             .max_uV = 3300000,
  2606.             .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  2607.                 REGULATOR_CHANGE_STATUS),
  2608.             .boot_on = 1,
  2609.             .always_on = 1,
  2610.         },
  2611.         .num_consumer_supplies = ARRAY_SIZE(tps65217_ldo2_consumers),
  2612.         .consumer_supplies = tps65217_ldo2_consumers,
  2613.     },
  2614.  
  2615.     /* ldo3 */
  2616.     {
  2617.         .constraints = {
  2618.             .min_uV = 1800000,
  2619.             .max_uV = 3300000,
  2620.             .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  2621.                 REGULATOR_CHANGE_STATUS),
  2622.             .boot_on = 1,
  2623.             .always_on = 1,
  2624.         },
  2625.         .num_consumer_supplies = ARRAY_SIZE(tps65217_ldo3_consumers),
  2626.         .consumer_supplies = tps65217_ldo3_consumers,
  2627.     },
  2628.  
  2629.     /* ldo4 */
  2630.     {
  2631.         .constraints = {
  2632.             .min_uV = 1800000,
  2633.             .max_uV = 3300000,
  2634.             .valid_ops_mask = (REGULATOR_CHANGE_VOLTAGE |
  2635.                 REGULATOR_CHANGE_STATUS),
  2636.             .boot_on = 1,
  2637.             .always_on = 1,
  2638.         },
  2639.         .num_consumer_supplies = ARRAY_SIZE(tps65217_ldo4_consumers),
  2640.         .consumer_supplies = tps65217_ldo4_consumers,
  2641.     },
  2642. };
  2643.  
  2644. static struct tps65217_board beaglebone_tps65217_info = {
  2645.     .tps65217_init_data = &tps65217_regulator_data[0],
  2646. };
  2647.  
  2648. static struct lis3lv02d_platform_data lis331dlh_pdata = {
  2649.     .click_flags = LIS3_CLICK_SINGLE_X |
  2650.             LIS3_CLICK_SINGLE_Y |
  2651.             LIS3_CLICK_SINGLE_Z,
  2652.     .wakeup_flags = LIS3_WAKEUP_X_LO | LIS3_WAKEUP_X_HI |
  2653.             LIS3_WAKEUP_Y_LO | LIS3_WAKEUP_Y_HI |
  2654.             LIS3_WAKEUP_Z_LO | LIS3_WAKEUP_Z_HI,
  2655.     .irq_cfg = LIS3_IRQ1_CLICK | LIS3_IRQ2_CLICK,
  2656.     .wakeup_thresh  = 10,
  2657.     .click_thresh_x = 10,
  2658.     .click_thresh_y = 10,
  2659.     .click_thresh_z = 10,
  2660.     .g_range    = 2,
  2661.     .st_min_limits[0] = 120,
  2662.     .st_min_limits[1] = 120,
  2663.     .st_min_limits[2] = 140,
  2664.     .st_max_limits[0] = 550,
  2665.     .st_max_limits[1] = 550,
  2666.     .st_max_limits[2] = 750,
  2667. };
  2668.  
  2669. static struct i2c_board_info am335x_i2c_boardinfo1[] = {
  2670.     {
  2671.         I2C_BOARD_INFO("tlv320aic3x", 0x1b),
  2672.     },
  2673.     {
  2674.         I2C_BOARD_INFO("lis331dlh", 0x18),
  2675.         .platform_data = &lis331dlh_pdata,
  2676.     },
  2677.     {
  2678.         I2C_BOARD_INFO("tsl2550", 0x39),
  2679.     },
  2680.     {
  2681.         I2C_BOARD_INFO("tmp275", 0x48),
  2682.     },
  2683. };
  2684.  
  2685. static void i2c1_init(int evm_id, int profile)
  2686. {
  2687.     setup_pin_mux(i2c1_pin_mux);
  2688.     omap_register_i2c_bus(2, 100, am335x_i2c_boardinfo1,
  2689.             ARRAY_SIZE(am335x_i2c_boardinfo1));
  2690.     return;
  2691. }
  2692.  
  2693. static struct mcp251x_platform_data mcp251x_info = {
  2694.     .oscillator_frequency = 16000000,
  2695. };
  2696.  
  2697. static struct spi_board_info tt3201_spi_info[] = {
  2698.     {
  2699.         .modalias   = "mcp2515",
  2700.         .max_speed_hz   = 10000000,
  2701.         .bus_num    = 2,
  2702.         .chip_select    = 0,
  2703.         .mode       = SPI_MODE_0,
  2704.         .platform_data  = &mcp251x_info,
  2705.     },
  2706.     {
  2707.         .modalias   = "mcp2515",
  2708.         .max_speed_hz   = 10000000,
  2709.         .bus_num    = 2,
  2710.         .chip_select    = 1,
  2711.         .mode       = SPI_MODE_0,
  2712.         .platform_data  = &mcp251x_info,
  2713.     },
  2714. };
  2715.  
  2716. static void tt3201_init(int evm_id, int profile)
  2717. {
  2718.     pr_info("TowerTech TT3201 CAN cape\n");
  2719.    
  2720.     beaglebone_spi1_free = 0;
  2721.     setup_pin_mux(spi1_pin_mux);
  2722.     setup_pin_mux(tt3201_pin_mux);
  2723.  
  2724.     tt3201_spi_info[0].irq = gpio_to_irq(GPIO_TO_PIN(3, 19));
  2725.     tt3201_spi_info[1].irq = gpio_to_irq(GPIO_TO_PIN(3, 21));
  2726.  
  2727.     spi_register_board_info(tt3201_spi_info,
  2728.         ARRAY_SIZE(tt3201_spi_info));
  2729.  
  2730.     am33xx_d_can_init(1);
  2731. }
  2732.  
  2733. /* Setup McASP 1 */
  2734. static void mcasp1_init(int evm_id, int profile)
  2735. {
  2736.     /* Configure McASP */
  2737.     setup_pin_mux(mcasp1_pin_mux);
  2738.     am335x_register_mcasp(&am335x_evm_snd_data1, 1);
  2739.     return;
  2740. }
  2741.  
  2742. /* Setup McASP 0 */
  2743. static void mcasp0_init(int evm_id, int profile)
  2744. {
  2745.     printk("Beaglebone cape: mcasp0 init\n");
  2746.     /* Configure McASP */
  2747.     setup_pin_mux(mcasp0_pin_mux);
  2748.     am335x_register_mcasp(&bone_snd_data1, 0);
  2749.     return;
  2750. }
  2751.  
  2752. static void mmc0_init(int evm_id, int profile)
  2753. {
  2754.     setup_pin_mux(mmc0_pin_mux);
  2755.  
  2756.     omap2_hsmmc_init(am335x_mmc);
  2757.     return;
  2758. }
  2759.  
  2760. static void emmc_bone_init(int evm_id, int profile)
  2761. {
  2762.     printk("cape: emmc_bone_init\n");
  2763.     setup_pin_mux(mmc1_pin_mux);
  2764.     am335x_mmc[1].mmc = 2;
  2765.     am335x_mmc[1].caps = MMC_CAP_4_BIT_DATA;
  2766.     am335x_mmc[1].nonremovable = true;
  2767.     am335x_mmc[1].gpio_cd = -EINVAL;
  2768.     am335x_mmc[1].gpio_wp = -EINVAL;
  2769.     am335x_mmc[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */
  2770.     /* mmc will be initialized when mmc0_init is called */
  2771.     return;
  2772. }
  2773.  
  2774. static const char* cape_pins[] = {
  2775. /*
  2776.   From SRM RevA5.0.1:
  2777. */
  2778.   /* offset  88 - P9-22 */ "uart2_rxd",
  2779.   /* offset  90 - P9-21 */ "uart2_txd",
  2780.   /* offset  92 - P9-18 */ "spi0_d1",
  2781.   /* offset  94 - P9-17 */ "spi0_cs0",
  2782.   /* offset  96 - P9-42 */ "ecap0_in_pwm0_out",
  2783.   /* offset  98 - P8-35 */ "lcd_data12",
  2784.   /* offset 100 - P8-33 */ "lcd_data13",
  2785.   /* offset 102 - P8-31 */ "lcd_data14",
  2786.   /* offset 104 - P8-32 */ "lcd_data15",
  2787.   /* offset 106 - P9-19 */ "uart1_rtsn",
  2788.   /* offset 108 - P9-20 */ "uart1_ctsn",
  2789.   /* offset 110 - P9-26 */ "uart1_rxd",
  2790.   /* offset 112 - P9-24 */ "uart1_txd",
  2791.   /* offset 114 - P9-41 */ "xdma_event_intr1",
  2792.   /* offset 116 - P8-19 */ "gpmc_ad8",
  2793.   /* offset 118 - P8-13 */ "gpmc_ad9",
  2794.   /* offset 120 - P8-14 */ "gpmc_ad10",
  2795.   /* offset 122 - P8-17 */ "gpmc_ad12",
  2796.   /* offset 124 - P9-11 */ "gpmc_wait0",
  2797.   /* offset 126 - P9-13 */ "gpmc_wpn",
  2798.   /* offset 128 - P8-25 */ "gpmc_ad0",
  2799.   /* offset 130 - P8-24 */ "gpmc_ad1",
  2800.   /* offset 132 - P8- 5 */ "gpmc_ad2",
  2801.   /* offset 134 - P8- 6 */ "gpmc_ad3",
  2802.   /* offset 136 - P8-23 */ "gpmc_ad4",
  2803.   /* offset 138 - P8-22 */ "gpmc_ad5",
  2804.   /* offset 140 - P8- 3 */ "gpmc_ad6",
  2805.   /* offset 142 - P8- 4 */ "gpmc_ad7",
  2806.   /* offset 144 - P8-12 */ "gpmc_ad12",
  2807.   /* offset 146 - P8-11 */ "gpmc_ad13",
  2808.   /* offset 148 - P8-16 */ "gpmc_ad14",
  2809.   /* offset 150 - P8-15 */ "gpmc_ad15",
  2810.   /* offset 152 - P9-15 */ "gpmc_a0",
  2811.   /* offset 154 - P9-23 */ "gpmc_a1",
  2812.   /* offset 156 - P9-14 */ "gpmc_a2",
  2813.   /* offset 158 - P9-16 */ "gpmc_a3",
  2814.   /* offset 160 - P9-12 */ "gpmc_be1n",
  2815.   /* offset 162 - P8-26 */ "gpmc_csn0",
  2816.   /* offset 164 - P8-21 */ "gpmc_csn1",
  2817.   /* offset 166 - P8-20 */ "gpmc_csn2",
  2818.   /* offset 168 - P8-18 */ "gpmc_clk",
  2819.   /* offset 170 - P8-7  */ "gpmc_advn_ale",
  2820.   /* offset 172 - P8-9  */ "gpmc_ben0_cle",
  2821.   /* offset 174 - P8-10 */ "gpmc_wen",
  2822.   /* offset 176 - P8-8  */ "gpmc_csn3",
  2823.   /* offset 178 - P8-45 */ "lcd_data0",
  2824.   /* offset 180 - P8-46 */ "lcd_data1",
  2825.   /* offset 182 - P8-43 */ "lcd_data2",
  2826.   /* offset 184 - P8-44 */ "lcd_data3",
  2827.   /* offset 186 - P8-41 */ "lcd_data4",
  2828.   /* offset 188 - P8-42 */ "lcd_data5",
  2829.   /* offset 190 - P8-39 */ "lcd_data6",
  2830.   /* offset 192 - P8-40 */ "lcd_data7",
  2831.   /* offset 194 - P8-37 */ "lcd_data8",
  2832.   /* offset 196 - P8-38 */ "lcd_data9",
  2833.   /* offset 198 - P8-36 */ "lcd_data10",
  2834.   /* offset 200 - P8-34 */ "lcd_data11",
  2835.   /* offset 202 - P8-27 */ "lcd_vsync",
  2836.   /* offset 204 - P8-29 */ "lcd_hsync",
  2837.   /* offset 206 - P8-28 */ "lcd_pclk",
  2838.   /* offset 208 - P8-30 */ "lcd_ac_bias_en",
  2839.   /* offset 210 - P9-29 */ "mcasp0_fsx",
  2840.   /* offset 212 - P9-30 */ "mcasp0_axr0",
  2841.   /* offset 214 - P9-28 */ "mcasp0_ahclkr",
  2842.   /* offset 216 - P9-27 */ "mcasp0_fsr",
  2843.   /* offset 218 - P9-31 */ "mcasp0_aclkx",
  2844.   /* offset 220 - P9-25 */ "mcasp0_ahclkx",
  2845.   /* offset 222 - P9-39 */ "ain0",
  2846.   /* offset 224 - P9-40 */ "ain1",
  2847.   /* offset 226 - P9-37 */ "ain2",
  2848.   /* offset 228 - P9-38 */ "ain3",
  2849.   /* offset 230 - P9-33 */ "ain4",
  2850.   /* offset 232 - P9-36 */ "ain5",
  2851.   /* offset 234 - P9-35 */ "ain6",
  2852. };
  2853.  
  2854. #define BIG_ENDIAN_16( i) ( ((i & 255) << 8) | ((i >> 8) & 255) )
  2855. #define NR_ITEMS( x) (sizeof( (x)) / sizeof( *(x)))
  2856.  
  2857. extern int am33xx_mux_get_entry( int index, struct omap_mux** mux);
  2858.  
  2859. typedef union {
  2860. /*
  2861.   From SRM RevA5.0.1:
  2862.   Bit 15     Pin is used or not: 0=Unused by Cape 1=Used by Cape
  2863.   Bit 14-13  Pin Direction: 10=Output 01=Input 11=BDIR
  2864.   Bit 12-7   Reserved
  2865.   Bit 6      Slew Rate: 0=Fast 1=Slow
  2866.   Bit 5      Rx Enable: 0=Disabled 1=Enabled
  2867.   Bit 4      Pull Up/Dn Select: 0=Pulldown 1=PullUp
  2868.   Bit 3      Pull Up/DN enabled: 0=Enabled 1=Disabled
  2869.   Bit 2-0    Mux Mode Selection: Mode 0-7
  2870. */
  2871.     struct {
  2872.         uint16_t    mux         : 3;
  2873.         uint16_t    pull_enable     : 1;
  2874.         uint16_t    pull_up     : 1;
  2875.         uint16_t    rx_enable       : 1;
  2876.         uint16_t    slew_rate       : 1;
  2877.         uint16_t    reserved        : 6;
  2878.         uint16_t    direction       : 2;
  2879.         uint16_t    used        : 1;
  2880.     };
  2881.     uint16_t      value;
  2882. } pin_def;
  2883.  
  2884. #define DEBUG_EEPROM_CONFIG 0
  2885.  
  2886. static int bone_io_get_mux_setting( pin_def setting)
  2887. {
  2888.     int pin_setting;
  2889.  
  2890.     switch (setting.direction) {
  2891.     case 1:
  2892.     /* input */
  2893.         if (setting.pull_enable) {
  2894.             if (setting.pull_up) {
  2895.                 pin_setting = AM33XX_PIN_INPUT_PULLUP;
  2896.             } else {
  2897.                 pin_setting = AM33XX_PIN_INPUT_PULLDOWN;
  2898.             }
  2899.         } else {
  2900.             pin_setting = AM33XX_PIN_INPUT;
  2901.         }
  2902.         if (!setting.rx_enable) {
  2903.             pr_debug( "  pin is set as input but the receiver is not enabled!\n");
  2904.         }
  2905.         break;
  2906.     case 2:
  2907.     /* output */
  2908.         pin_setting = AM33XX_PIN_OUTPUT;
  2909.         break;
  2910.     case 3:
  2911.     /* bi-dir */
  2912.     default:
  2913.     /* reserved */
  2914.         pr_debug( "  pin ignored because it uses an unsupported mode: 0x%04x\n",
  2915.             setting.direction);
  2916.         return -1;
  2917.     }
  2918.     pr_debug("  pin is configured as %s\n",
  2919.         (pin_setting & AM33XX_PIN_INPUT) ? "input" : "output");
  2920.     switch (setting.mux) {
  2921.     case 0: pin_setting |= OMAP_MUX_MODE0; break;
  2922.     case 1: pin_setting |= OMAP_MUX_MODE1; break;
  2923.     case 2: pin_setting |= OMAP_MUX_MODE2; break;
  2924.     case 3: pin_setting |= OMAP_MUX_MODE3; break;
  2925.     case 4: pin_setting |= OMAP_MUX_MODE4; break;
  2926.     case 5: pin_setting |= OMAP_MUX_MODE5; break;
  2927.     case 6: pin_setting |= OMAP_MUX_MODE6; break;
  2928.     case 7: pin_setting |= OMAP_MUX_MODE7; break;
  2929.     }
  2930.     return pin_setting;
  2931. }
  2932.  
  2933. static struct omap_mux* bone_io_pin_lookup( const char* pin_name)
  2934. {
  2935.     int index = 0;
  2936.     struct omap_mux* mux;
  2937.  
  2938.     for (;;) {
  2939.         if (am33xx_mux_get_entry( index, &mux) < 0) {
  2940.             /* no more entries */
  2941.             pr_debug( "   configuration error, pin '%s' not found in mux database\n",
  2942.                 pin_name);
  2943.             return NULL;
  2944.         }
  2945.         if (mux != NULL &&
  2946.             mux->muxnames[ 0] != NULL &&
  2947.             strcmp( mux->muxnames[ 0], pin_name) == 0)
  2948.         {
  2949.             /* entry found */
  2950.             pr_debug( "   found pin '%s' at index %d in mux database'\n",
  2951.                 pin_name, index);
  2952.             return mux;
  2953.         }
  2954.         ++index;
  2955.     }
  2956. }
  2957.  
  2958. static int bone_io_config_pin( const char* pin_name, pin_def eeprom_setting)
  2959. {
  2960.     struct omap_mux* mux;
  2961.     char* signal_name;
  2962.     int pin_setting = bone_io_get_mux_setting( eeprom_setting);
  2963.     int l1, l2;
  2964.     char full_name[ 50];
  2965.  
  2966.     if (pin_setting < 0) {
  2967.         return -1;
  2968.     }
  2969.  
  2970.     mux = bone_io_pin_lookup( pin_name);
  2971.  
  2972.     if (mux == NULL) {
  2973.         return -1;
  2974.     }
  2975.  
  2976.     signal_name = mux->muxnames[ eeprom_setting.mux];
  2977.  
  2978.     if (signal_name == NULL) {
  2979.         pr_debug( "    Configuration error, no signal found for pin '%s' in mode %d\n",
  2980.             pin_name, eeprom_setting.mux);
  2981.         return -1;
  2982.     }
  2983.     pr_debug( "    setting pin '%s' to signal '%s'\n",
  2984.          pin_name, signal_name);
  2985.     l1 = strlen( pin_name);
  2986.     l2 = strlen( signal_name);
  2987.  
  2988.     if (l1 + 1 + l2 + 1 > sizeof( full_name)) {
  2989.         pr_debug( "    Internal error, combined signal name too long\n");
  2990.         return -1;
  2991.     } else {
  2992.         memcpy( full_name, pin_name, l1);
  2993.         full_name[ l1] = '.';
  2994.         memcpy( full_name + l1 + 1, signal_name, l2);
  2995.         full_name[ l1 + 1 + l2] = '\0';
  2996.         if (omap_mux_init_signal( full_name, pin_setting) < 0) {
  2997.             return -1;
  2998.         }
  2999.         pr_debug( " mux '%s' was set to mode 0x%04x\n",
  3000.              full_name, pin_setting);
  3001.     }
  3002.     // return 0 for input, 1 for output
  3003.     return (pin_setting & AM33XX_PIN_INPUT) ? 0 : 1;
  3004. }
  3005.  
  3006. #define RULER( x) \
  3007.     do { \
  3008.         char* p = status; \
  3009.         int i = 0; \
  3010.         int cnt = x; \
  3011.         status[ cnt] = '\0'; \
  3012.         while (cnt--) { \
  3013.             if (++i == 10) { \
  3014.                 *p++ = '+'; \
  3015.                 i = 0; \
  3016.             } else { \
  3017.                 *p++ = '-'; \
  3018.             } \
  3019.         } \
  3020.         pr_info( "+%s+\n", status); \
  3021.     } while (0)
  3022.  
  3023. static int bone_io_config_from_cape_eeprom( void)
  3024. {
  3025.     int i;
  3026.     int cnt = BIG_ENDIAN_16( cape_config.numpins);
  3027.     u16* pmuxdata;
  3028.     char status[ NR_ITEMS( cape_config.muxdata) + 1];
  3029.     char revision[ NR_ITEMS( cape_config.format_revision) + 1];
  3030.  
  3031.     strncpy( revision, cape_config.format_revision, NR_ITEMS( revision) - 1);
  3032.     revision[ NR_ITEMS( revision) - 1] = '\0';
  3033.     if (strcmp( revision, "A0") != 0) {
  3034.         pr_warn( "BeagleBone cape: configuration revision '%s' is not supported\n",
  3035.             revision);
  3036.         return -1;
  3037.     }
  3038.  
  3039.     // Workaround for capes that have encoded this as ASCII
  3040.     if (cnt > 256) {
  3041.         pr_info( "BeagleBone cape: workaround for bad 'numpins' setting\n");
  3042.         cnt = (cape_config.numpins & 255) - '0';
  3043.         cnt = 10 * cnt + ((cape_config.numpins >> 8) & 255) - '0';
  3044.     }
  3045.     pr_info( "BeagleBone cape: revision %s format, configuring %2d out of %2d signals:\n",
  3046.         revision, cnt, NR_ITEMS( cape_config.muxdata));
  3047.     RULER( NR_ITEMS( cape_config.muxdata));
  3048.     for (i = 0, pmuxdata = cape_config.muxdata ; i < NR_ITEMS( cape_config.muxdata) ; ++i, ++pmuxdata) {
  3049.         const char* pin_name = cape_pins[ i];
  3050.         pin_def pin_setting = { .value = BIG_ENDIAN_16( *pmuxdata) };
  3051.  
  3052.         // Detect broken I2C configuration to prevent bus hangup!
  3053.         if (i >= 9 && i <= 10) {
  3054.             status[ i] = '-';
  3055.         } else if (pin_setting.used) {
  3056.             switch (bone_io_config_pin( pin_name, pin_setting)) {
  3057.             case 0:  status[ i] = 'i'; break;
  3058.             case 1:  status[ i] = 'o'; break;
  3059.             default: status[ i] = '#'; break;
  3060.             }
  3061.         } else {
  3062.             status[ i] = ' ';
  3063.         }
  3064.     }
  3065.     status[ NR_ITEMS( cape_config.muxdata)] = '\0';
  3066.     pr_info( "|%s|\n", status);
  3067.     RULER( NR_ITEMS( cape_config.muxdata));
  3068.     return 0;
  3069. }
  3070. static void beaglebone_cape_setup(struct memory_accessor *mem_acc, void *context)
  3071. {
  3072.     int ret;
  3073.     char tmp[32];
  3074.     char name[32];
  3075.     char version[4];
  3076.     char manufacturer[32];
  3077.  
  3078.     capecount++;
  3079.     /* get cape specific data */
  3080.     ret = mem_acc->read(mem_acc, (char *)&cape_config, 0, sizeof(cape_config));
  3081.     if (ret != sizeof(cape_config)) {
  3082.         pr_warning("BeagleBone cape EEPROM: could not read eeprom at address 0x%x\n", capecount + 0x53);
  3083.         goto out2;
  3084.     }
  3085.  
  3086.     if (cape_config.header != AM335X_EEPROM_HEADER) {
  3087.         pr_warning("BeagleBone cape EEPROM: wrong header 0x%x, expected 0x%x\n",
  3088.             cape_config.header, AM335X_EEPROM_HEADER);
  3089.         goto out;
  3090.     }
  3091.  
  3092.     pr_info("BeagleBone cape EEPROM: found eeprom at address 0x%x\n", capecount + 0x53);
  3093.     snprintf(name, sizeof(cape_config.name) + 1, "%s", cape_config.name);
  3094.     snprintf(version, sizeof(cape_config.version) + 1, "%s", cape_config.version);
  3095.     snprintf(manufacturer, sizeof(cape_config.manufacturer) + 1, "%s", cape_config.manufacturer);
  3096.     pr_info("BeagleBone cape: %s %s, revision %s\n", manufacturer, name, version);
  3097.     snprintf(tmp, sizeof(cape_config.partnumber) + 1, "%s", cape_config.partnumber);
  3098.     pr_info("BeagleBone cape partnumber: %s\n", tmp);  
  3099.  
  3100.     if (!strncmp( "BEBOPR", cape_config.name, 6)) {
  3101.         pr_info( "BeagleBone cape: initializing BEBOPR cape\n");
  3102.         bone_io_config_from_cape_eeprom();
  3103.         return; // if configured from eeprom, skip all other initialization
  3104.     }
  3105.  
  3106.     if (!strncmp("BB-BONE-DVID-01", cape_config.partnumber, 15)) {
  3107.         pr_info("BeagleBone cape: initializing DVI cape\n");
  3108.        
  3109.         beaglebone_leds_free = 0;
  3110.         dvileds_init(0,0);
  3111.  
  3112.         // Uncomment these for custom DVI capes with audio populated
  3113.         //beaglebone_spi1_free = 0;
  3114.         //mcasp0_init(0,0);
  3115.    
  3116.         if (!strncmp("00A1", cape_config.version, 4) || !strncmp("000A", cape_config.version, 4)) {
  3117.             pr_info("BeagleBone cape: DVI init for revision A1 or older\n");
  3118.             setup_pin_mux(dvia1_pin_mux);
  3119.             gpio_request(BEAGLEBONEDVI_PDn_A1, "DVI_PDn");
  3120.             gpio_direction_output(BEAGLEBONEDVI_PDn_A1, 1);
  3121.             dvi_init(0,0);
  3122.         } else {
  3123.             pr_info("BeagleBone cape: DVI init for revision A2 or newer\n");
  3124.             setup_pin_mux(dvia2_pin_mux);
  3125.             gpio_request(BEAGLEBONEDVI_PDn_A2, "DVI_PDn");
  3126.             gpio_direction_output(BEAGLEBONEDVI_PDn_A2, 1);
  3127.             dvi_init(0,0);
  3128.         }
  3129.     }
  3130.  
  3131.     if (!strncmp("BB-BONE-DVID-02", cape_config.partnumber, 15)) {
  3132.         pr_info("BeagleBone cape: initializing DVI+audio cape\n");
  3133.  
  3134.         beaglebone_leds_free = 0;
  3135.         dvileds_init(0,0);
  3136.  
  3137.         beaglebone_spi1_free = 0;
  3138.         mcasp0_init(0,0);
  3139.    
  3140.         setup_pin_mux(dvia2_pin_mux);
  3141.         gpio_request(BEAGLEBONEDVI_PDn_A2, "DVI_PDn");
  3142.         gpio_direction_output(BEAGLEBONEDVI_PDn_A2, 1);
  3143.         dvi_init(0,0);
  3144.     }
  3145.  
  3146.     if (!strncmp("BB-BONE-AUDI-01", cape_config.partnumber, 15)) {
  3147.         pr_info("BeagleBone cape: initializing audio cape\n");
  3148.  
  3149.         beaglebone_leds_free = 0;
  3150.         dvileds_init(0,0);
  3151.  
  3152.         beaglebone_spi1_free = 0;
  3153.         mcasp0_init(0,0);
  3154.     }
  3155.  
  3156.     if (!strncmp("BB-BONE-LCD7-01", cape_config.partnumber, 15)) {
  3157.         pr_info("BeagleBone cape: initializing LCD cape\n");
  3158.  
  3159.         if (!strncmp("00A2", cape_config.version, 4)) {
  3160.             setup_pin_mux(bbtoys7a2_pin_mux);
  3161.             gpio_request(BEAGLEBONE_LCD7A2_AVDD_EN, "BONE_LCD_AVDD_EN");
  3162.             gpio_direction_output(BEAGLEBONE_LCD7A2_AVDD_EN, 1);
  3163.         } else if(!strncmp("00A3", cape_config.version, 4)) {
  3164.             setup_pin_mux(bbtoys7a3_pin_mux);
  3165.             gpio_request(BEAGLEBONE_LCD7A3_AVDD_EN, "BONE_LCD_AVDD_EN");
  3166.             gpio_direction_output(BEAGLEBONE_LCD7A3_AVDD_EN, 1);           
  3167.         } else if(!strncmp("00A4", cape_config.version, 4)) {
  3168.             setup_pin_mux(bbtoys7a3_pin_mux);
  3169.             gpio_request(BEAGLEBONE_LCD7A3_AVDD_EN, "BONE_LCD_AVDD_EN");
  3170.             gpio_direction_output(BEAGLEBONE_LCD7A3_AVDD_EN, 1);           
  3171.         } else {
  3172.             setup_pin_mux(bbtoys7_pin_mux);
  3173.             gpio_request(BEAGLEBONE_LCD_AVDD_EN, "BONE_LCD_AVDD_EN");
  3174.             gpio_direction_output(BEAGLEBONE_LCD_AVDD_EN, 1);
  3175.             bbtoys7lcd_init(0,0);
  3176.         }
  3177.  
  3178.         bbtoys7lcd_init(0,0);
  3179.         pr_info("BeagleBone cape: initializing LCD cape touchscreen\n");
  3180.         tsc_init(0,0);
  3181.         pr_info("BeagleBone cape: Registering PWM backlight for LCD cape\n");
  3182.         enable_ehrpwm1(0,0);
  3183.         beaglebone_tsadcpins_free = 0;
  3184.         pr_info("BeagleBone cape: Registering gpio-keys for LCD cape\n");
  3185.         if (!strncmp("00A3", cape_config.version, 4)) {
  3186.             beaglebone_lcd7a3_keys_init(0,0);
  3187.         } else {
  3188.             beaglebone_lcd7_keys_init(0,0);
  3189.         }
  3190.        
  3191.         beaglebone_spi1_free = 0;
  3192.         // A1 or newer
  3193.         beaglebone_leds_free = 0;
  3194.         lcd7leds_init(0,0);
  3195.     }
  3196.    
  3197.     if (!strncmp("BB-BONE-LCD3-01", cape_config.partnumber, 15)) {
  3198.         pr_info("BeagleBone cape: initializing LCD cape\n");
  3199.         bbtoys35lcd_init(0,0);
  3200.         pr_info("BeagleBone cape: initializing LCD cape touchscreen\n");
  3201.         tsc_init(0,0);
  3202.         beaglebone_tsadcpins_free = 0;
  3203.        
  3204.         if (!strncmp("00A0", cape_config.version, 4)) {
  3205.             pr_info("BeagleBone cape: Registering gpio-keys for LCD3 rev A or earlier cape\n");
  3206.             int err;
  3207.             setup_pin_mux(lcd3_keys_pin_mux);
  3208.             err = platform_device_register(&beaglebone_lcd3_keys);
  3209.             if (err)
  3210.                 pr_err("failed to register gpio keys for LCD3 rev A or earlier cape\n");
  3211.             lcd3leds_init(0,0);
  3212.         } else if (!strncmp("00A1", cape_config.version, 4)) {
  3213.             pr_info("BeagleBone cape: Registering gpio-keys for LCD rev A1 or later cape\n");
  3214.             int err;
  3215.             setup_pin_mux(lcd3a1_keys_pin_mux);
  3216.             err = platform_device_register(&lcd3a1_keys);
  3217.             if (err)
  3218.                 pr_err("failed to register gpio keys for LCD3 rev A1 or later cape\n");
  3219.             lcd3leds_init(0,0);
  3220.         } else {
  3221.             pr_info("BeagleBone cape: Registering gpio-keys for LCD rev A2 or later cape\n");
  3222.             int err;
  3223.             setup_pin_mux(lcd3a2_keys_pin_mux);
  3224.             err = platform_device_register(&lcd3a2_keys);
  3225.             if (err)
  3226.                 pr_err("failed to register gpio keys for LCD3 rev A2 or later cape\n");
  3227.             platform_device_register(&lcd3a2_leds_gpio);
  3228.             // uses PWM backlight instead of PMIC
  3229.             setup_pin_mux(bbtoys3_pin_mux);
  3230.             enable_ehrpwm1(0,0);
  3231.         }
  3232.         beaglebone_spi1_free = 0;
  3233.         beaglebone_leds_free = 0;
  3234.     }
  3235.  
  3236.     if (!strncmp("BB-BONE-LCD4-01", cape_config.partnumber, 15)) {
  3237.         pr_info("BeagleBone cape: initializing LCD cape\n");
  3238.         bbtoys43lcd_init(0,0);
  3239.         pr_info("BeagleBone cape: initializing LCD cape touchscreen\n");
  3240.         tsc_init(0,0);
  3241.         beaglebone_tsadcpins_free = 0;
  3242.        
  3243.         if (!strncmp("00A1", cape_config.version, 4)) {
  3244.             enable_ehrpwm1(0,0);
  3245.             setup_pin_mux(ehrpwm1a_pin_mux);
  3246.         }
  3247.     }
  3248.    
  3249.     if (!strncmp("BB-BONE-VGA-01", cape_config.partnumber, 14)) {
  3250.         pr_info("BeagleBone cape: initializing VGA cape\n");
  3251.         dvi_init(0,0);
  3252.     }
  3253.    
  3254.     if (!strncmp("BB-BONE-BATT-01", cape_config.partnumber, 15)) {
  3255.         pr_info("BeagleBone cape: initializing battery cape\n");
  3256.         // gpio1_6, P9_15 lowbat output
  3257.         // AIN4, P9_33 vbat
  3258.         /* LBO doesn't work, so disable it for now
  3259.         setup_pin_mux(batterycape_pin_mux);
  3260.         #if defined(CONFIG_CHARGER_GPIO)
  3261.             int err;
  3262.             err = platform_device_register(&beaglebone_charger_device);
  3263.             if (err)
  3264.                 pr_err("failed to register BeagleBone battery cape gpio\n");
  3265.        
  3266.         #endif
  3267.         */
  3268.     }
  3269.  
  3270.     if (!strncmp("BB-BONE-eMMC1-01", cape_config.partnumber, 15)) {
  3271.         pr_info("BeagleBone cape: initializing eMMC cape\n");
  3272.         beaglebone_w1gpio_free = 0;
  3273.         emmc_bone_init(0,0);
  3274.     }
  3275.    
  3276.     if (!strncmp("BB-BONE-SERL-01", cape_config.partnumber, 15)) {
  3277.         pr_info("BeagleBone cape: initializing CAN cape\n");
  3278.         setup_pin_mux(uart1dcan1_pin_mux);
  3279.         am33xx_d_can_init(1);
  3280.     }
  3281.         if (!strncmp("BB-BONE-SERL-02", cape_config.partnumber, 15)) {
  3282.         pr_info("BeagleBone cape: not initializing Profibus cape\n");
  3283.         // gpio1_0
  3284.         // gpio1_4
  3285.         //foo_init(0,0);
  3286.     }
  3287.         if (!strncmp("BB-BONE-SERL-03", cape_config.partnumber, 15)) {
  3288.         pr_info("BeagleBone cape: initializing RS232 cape\n");
  3289.         pr_info("BeagleBone RS232 cape: only uart2/ttyO2 is supported.\n");
  3290.         pr_info("BeagleBone RS232 cape: Jumper J27 and J23.\n");
  3291.         setup_pin_mux(uart2_pin_mux);
  3292.     }
  3293.         if (!strncmp("BB-BONE-SERL-04", cape_config.partnumber, 15)) {
  3294.         pr_info("BeagleBone cape: not initializing RS485 cape\n");
  3295.         //foo_init(0,0);
  3296.     }
  3297.    
  3298.     if (!strncmp("TT3201-001", cape_config.partnumber, 10)) {
  3299.         beaglebone_skip_mmc0_init = 1;
  3300.  
  3301.         pr_info("BeagleBone cape: initializing mmc");
  3302.         mmc0_init(0,0);
  3303.  
  3304.         pr_info("BeagleBone cape: initializing CAN cape\n");
  3305.         tt3201_init(0,0);
  3306.     }
  3307.  
  3308.     if (!strncmp("BB-BONE-CAM-01", cape_config.partnumber, 14) || !strncmp("BB-BONE-CAM3-01", cape_config.partnumber, 15)) {
  3309.         pr_info("BeagleBone cape: recognized Camera cape\n");
  3310.         beaglebone_w1gpio_free = 0;
  3311.         cssp_gpmc_init();
  3312.     }
  3313.  
  3314.     if (!strncmp("BB-BONE-MOTOR-01", cape_config.partnumber, 16)) {
  3315.         pr_info("BeagleBone cape: initializing Motor cape\n");
  3316.         beaglebone_w1gpio_free = 0;
  3317.         beaglebone_spi1_free = 0;
  3318.         }
  3319.  
  3320.     goto out2;
  3321. out:
  3322.     /*
  3323.      * If the EEPROM hasn't been programed or an incorrect header
  3324.      * or board name are read, assume this is an old beaglebone board
  3325.      * (< Rev A3)
  3326.      */
  3327.     pr_err("Could not detect BeagleBone cape properly\n");
  3328.     beaglebone_cape_detected = false;
  3329. out2:
  3330.     if (capecount > 3) {
  3331.         if (beaglebone_skip_mmc0_init == 0 ) {
  3332.             pr_info("BeagleBone cape: initializing mmc");
  3333.             mmc0_init(0,0);
  3334.         }
  3335.         if (beaglebone_tsadcpins_free == 1) {
  3336.             pr_info("BeagleBone cape: exporting ADC pins to sysfs\n");
  3337.             bone_tsc_init(0,0);
  3338.             beaglebone_tsadcpins_free = 0;
  3339.         }
  3340.         if (beaglebone_leds_free == 1) {
  3341.             pr_info("Beaglebone: initializing onboard LEDs");
  3342.             boneleds_init(0,0);
  3343.         }
  3344.         if(beaglebone_spi1_free == 1) {
  3345.             beaglebone_spi1_free = 0;
  3346.             pr_info("BeagleBone cape: exporting SPI pins as spidev\n");
  3347.             setup_pin_mux(spi1_pin_mux);
  3348.             spi_register_board_info(bone_spidev2_info, ARRAY_SIZE(bone_spidev2_info));
  3349.         }
  3350.         if(beaglebone_w1gpio_free == 1) {
  3351.             pr_info("BeagleBone cape: initializing w1-gpio\n");
  3352.             bonew1_gpio_init(0,0);
  3353.         }
  3354.     }
  3355. }
  3356.  
  3357. static struct at24_platform_data cape_eeprom_info = {
  3358.         .byte_len       = (256*1024) / 8,
  3359.         .page_size      = 64,
  3360.         .flags          = AT24_FLAG_ADDR16,
  3361.         .context        = (void *)NULL,
  3362.         .setup        = beaglebone_cape_setup,
  3363. };
  3364.  
  3365. static struct i2c_board_info __initdata cape_i2c_boardinfo[] = {
  3366.     {
  3367.         I2C_BOARD_INFO("tlv320aic3x", 0x1b),
  3368.     },
  3369.         {
  3370.                 I2C_BOARD_INFO("24c256", 0x54),
  3371.                 .platform_data  = &cape_eeprom_info,
  3372.         },
  3373.         {
  3374.                 I2C_BOARD_INFO("24c256", 0x55),
  3375.                 .platform_data  = &cape_eeprom_info,
  3376.         },
  3377.         {
  3378.                 I2C_BOARD_INFO("24c256", 0x56),
  3379.                 .platform_data  = &cape_eeprom_info,
  3380.         },
  3381.         {
  3382.                 I2C_BOARD_INFO("24c256", 0x57),
  3383.                 .platform_data  = &cape_eeprom_info,
  3384.         },
  3385. };
  3386.  
  3387. static void i2c2_init(int evm_id, int profile)
  3388. {
  3389.         setup_pin_mux(i2c2_pin_mux);
  3390.         omap_register_i2c_bus(3, 100, cape_i2c_boardinfo,
  3391.                         ARRAY_SIZE(cape_i2c_boardinfo));
  3392.         return;
  3393. }
  3394.  
  3395. static void mmc1_init(int evm_id, int profile)
  3396. {
  3397.     setup_pin_mux(mmc1_pin_mux);
  3398.  
  3399.     am335x_mmc[1].mmc = 2;
  3400.     am335x_mmc[1].caps = MMC_CAP_4_BIT_DATA;
  3401.     am335x_mmc[1].gpio_cd = GPIO_TO_PIN(2, 2);
  3402.     am335x_mmc[1].gpio_wp = GPIO_TO_PIN(1, 29);
  3403.     am335x_mmc[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */
  3404.  
  3405.     /* mmc will be initialized when mmc0_init is called */
  3406.     return;
  3407. }
  3408.  
  3409. static void mmc2_wl12xx_init(int evm_id, int profile)
  3410. {
  3411.     setup_pin_mux(mmc2_wl12xx_pin_mux);
  3412.  
  3413.     am335x_mmc[1].mmc = 3;
  3414.     am335x_mmc[1].name = "wl1271";
  3415.     am335x_mmc[1].caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD
  3416.                 | MMC_PM_KEEP_POWER;
  3417.     am335x_mmc[1].nonremovable = true;
  3418.     am335x_mmc[1].gpio_cd = -EINVAL;
  3419.     am335x_mmc[1].gpio_wp = -EINVAL;
  3420.     am335x_mmc[1].ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34; /* 3V3 */
  3421.  
  3422.     /* mmc will be initialized when mmc0_init is called */
  3423.     return;
  3424. }
  3425.  
  3426. static void uart1_wl12xx_init(int evm_id, int profile)
  3427. {
  3428.     setup_pin_mux(uart1_wl12xx_pin_mux);
  3429. }
  3430.  
  3431. static void wl12xx_bluetooth_enable(void)
  3432. {
  3433.     int status = gpio_request(am335xevm_wlan_data.bt_enable_gpio,
  3434.         "bt_en\n");
  3435.     if (status < 0)
  3436.         pr_err("Failed to request gpio for bt_enable");
  3437.  
  3438.     pr_info("Configure Bluetooth Enable pin...\n");
  3439.     gpio_direction_output(am335xevm_wlan_data.bt_enable_gpio, 0);
  3440. }
  3441.  
  3442. static int wl12xx_set_power(struct device *dev, int slot, int on, int vdd)
  3443. {
  3444.     if (on) {
  3445.         gpio_set_value(am335xevm_wlan_data.wlan_enable_gpio, 1);
  3446.         mdelay(70);
  3447.     }
  3448.     else
  3449.         gpio_set_value(am335xevm_wlan_data.wlan_enable_gpio, 0);
  3450.  
  3451.     return 0;
  3452. }
  3453.  
  3454. static void wl12xx_init(int evm_id, int profile)
  3455. {
  3456.     struct device *dev;
  3457.     struct omap_mmc_platform_data *pdata;
  3458.     int ret;
  3459.  
  3460.     /* Register WLAN and BT enable pins based on the evm board revision */
  3461.     if (gp_evm_revision == GP_EVM_REV_IS_1_1A) {
  3462.         am335xevm_wlan_data.wlan_enable_gpio = GPIO_TO_PIN(1, 16);
  3463.         am335xevm_wlan_data.bt_enable_gpio = GPIO_TO_PIN(3, 21);
  3464.     }
  3465.     else {
  3466.         am335xevm_wlan_data.wlan_enable_gpio = GPIO_TO_PIN(1, 30);
  3467.         am335xevm_wlan_data.bt_enable_gpio = GPIO_TO_PIN(1, 31);
  3468.     }
  3469.  
  3470.     wl12xx_bluetooth_enable();
  3471.  
  3472.     if (wl12xx_set_platform_data(&am335xevm_wlan_data))
  3473.         pr_err("error setting wl12xx data\n");
  3474.  
  3475.     dev = am335x_mmc[1].dev;
  3476.     if (!dev) {
  3477.         pr_err("wl12xx mmc device initialization failed\n");
  3478.         goto out;
  3479.     }
  3480.  
  3481.     pdata = dev->platform_data;
  3482.     if (!pdata) {
  3483.         pr_err("Platfrom data of wl12xx device not set\n");
  3484.         goto out;
  3485.     }
  3486.  
  3487.     ret = gpio_request_one(am335xevm_wlan_data.wlan_enable_gpio,
  3488.         GPIOF_OUT_INIT_LOW, "wlan_en");
  3489.     if (ret) {
  3490.         pr_err("Error requesting wlan enable gpio: %d\n", ret);
  3491.         goto out;
  3492.     }
  3493.  
  3494.     if (gp_evm_revision == GP_EVM_REV_IS_1_1A)
  3495.         setup_pin_mux(wl12xx_pin_mux_evm_rev1_1a);
  3496.     else
  3497.         setup_pin_mux(wl12xx_pin_mux_evm_rev1_0);
  3498.  
  3499.     pdata->slots[0].set_power = wl12xx_set_power;
  3500. out:
  3501.     return;
  3502. }
  3503.  
  3504. static void d_can_init(int evm_id, int profile)
  3505. {
  3506.     switch (evm_id) {
  3507.     case IND_AUT_MTR_EVM:
  3508.         if ((profile == PROFILE_0) || (profile == PROFILE_1)) {
  3509.             setup_pin_mux(d_can_ia_pin_mux);
  3510.             /* Instance Zero */
  3511.             am33xx_d_can_init(0);
  3512.         }
  3513.         break;
  3514.     case GEN_PURP_EVM:
  3515.         if (profile == PROFILE_1) {
  3516.             setup_pin_mux(d_can_gp_pin_mux);
  3517.             /* Instance One */
  3518.             am33xx_d_can_init(1);
  3519.         }
  3520.         break;
  3521.     default:
  3522.         break;
  3523.     }
  3524. }
  3525.  
  3526. static struct i2c_board_info tps65217_i2c_boardinfo[] = {
  3527.     {
  3528.         I2C_BOARD_INFO("tps65217", TPS65217_I2C_ID),
  3529.         .platform_data  = &beaglebone_tps65217_info,
  3530.     },
  3531. };
  3532.  
  3533. static void tps65217_init(int evm_id, int profile)
  3534. {
  3535.     struct i2c_adapter *adapter;
  3536.     struct i2c_client *client;
  3537.     struct device *mpu_dev;
  3538.     struct tps65217 *tps;
  3539.     unsigned int val;
  3540.     int ret;
  3541.  
  3542.     mpu_dev = omap_device_get_by_hwmod_name("mpu");
  3543.     if (!mpu_dev)
  3544.         pr_warning("%s: unable to get the mpu device\n", __func__);
  3545.  
  3546.     /* I2C1 adapter request */
  3547.     adapter = i2c_get_adapter(1);
  3548.     if (!adapter) {
  3549.         pr_err("failed to get adapter i2c1\n");
  3550.         return;
  3551.     }
  3552.  
  3553.     client = i2c_new_device(adapter, tps65217_i2c_boardinfo);
  3554.     if (!client)
  3555.         pr_err("failed to register tps65217 to i2c1\n");
  3556.  
  3557.     i2c_put_adapter(adapter);
  3558.  
  3559.     tps = (struct tps65217 *)i2c_get_clientdata(client);
  3560.  
  3561.     ret = tps65217_reg_read(tps, TPS65217_REG_STATUS, &val);
  3562.     if (ret) {
  3563.         pr_err("failed to read tps65217 status reg\n");
  3564.         return;
  3565.     }
  3566.  
  3567.     if (!(val & TPS65217_STATUS_ACPWR)) {
  3568.         /* If powered by USB then disable OPP120 and OPPTURBO */
  3569.         pr_info("Maximum current provided by the USB port is 500mA"
  3570.             " which is not sufficient when operating @OPP120 and"
  3571.             " OPPTURBO. The current requirement for some use-cases"
  3572.             " using OPP100 might also exceed the maximum current"
  3573.             " that the USB port can provide. Unless you are fully"
  3574.             " confident that the current requirements for OPP100"
  3575.             " use-case don't exceed the USB limits, switching to"
  3576.             " AC power is recommended.\n");
  3577.         opp_disable(mpu_dev, 600000000);
  3578.         opp_disable(mpu_dev, 720000000);
  3579.     }
  3580. }
  3581.  
  3582. static void mmc0_no_cd_init(int evm_id, int profile)
  3583. {
  3584.     setup_pin_mux(mmc0_no_cd_pin_mux);
  3585.  
  3586.     omap2_hsmmc_init(am335x_mmc);
  3587.     return;
  3588. }
  3589.  
  3590.  
  3591. /* setup spi0 */
  3592. static void spi0_init(int evm_id, int profile)
  3593. {
  3594.     setup_pin_mux(spi0_pin_mux);
  3595.     spi_register_board_info(am335x_spi0_slave_info,
  3596.             ARRAY_SIZE(am335x_spi0_slave_info));
  3597.     return;
  3598. }
  3599.  
  3600. /* setup spi1 */
  3601. static void spi1_init(int evm_id, int profile)
  3602. {
  3603.     setup_pin_mux(spi1_pin_mux);
  3604.     spi_register_board_info(am335x_spi1_slave_info,
  3605.             ARRAY_SIZE(am335x_spi1_slave_info));
  3606.     return;
  3607. }
  3608.  
  3609. static int beaglebone_phy_fixup(struct phy_device *phydev)
  3610. {
  3611.     phydev->supported &= ~(SUPPORTED_100baseT_Half |
  3612.                 SUPPORTED_100baseT_Full);
  3613.  
  3614.     return 0;
  3615. }
  3616.  
  3617. #if defined(CONFIG_TLK110_WORKAROUND) || \
  3618.             defined(CONFIG_TLK110_WORKAROUND_MODULE)
  3619. static int am335x_tlk110_phy_fixup(struct phy_device *phydev)
  3620. {
  3621.     unsigned int val;
  3622.  
  3623.     /* This is done as a workaround to support TLK110 rev1.0 phy */
  3624.     val = phy_read(phydev, TLK110_COARSEGAIN_REG);
  3625.     phy_write(phydev, TLK110_COARSEGAIN_REG, (val | TLK110_COARSEGAIN_VAL));
  3626.  
  3627.     val = phy_read(phydev, TLK110_LPFHPF_REG);
  3628.     phy_write(phydev, TLK110_LPFHPF_REG, (val | TLK110_LPFHPF_VAL));
  3629.  
  3630.     val = phy_read(phydev, TLK110_SPAREANALOG_REG);
  3631.     phy_write(phydev, TLK110_SPAREANALOG_REG, (val | TLK110_SPANALOG_VAL));
  3632.  
  3633.     val = phy_read(phydev, TLK110_VRCR_REG);
  3634.     phy_write(phydev, TLK110_VRCR_REG, (val | TLK110_VRCR_VAL));
  3635.  
  3636.     val = phy_read(phydev, TLK110_SETFFE_REG);
  3637.     phy_write(phydev, TLK110_SETFFE_REG, (val | TLK110_SETFFE_VAL));
  3638.  
  3639.     val = phy_read(phydev, TLK110_FTSP_REG);
  3640.     phy_write(phydev, TLK110_FTSP_REG, (val | TLK110_FTSP_VAL));
  3641.  
  3642.     val = phy_read(phydev, TLK110_ALFATPIDL_REG);
  3643.     phy_write(phydev, TLK110_ALFATPIDL_REG, (val | TLK110_ALFATPIDL_VAL));
  3644.  
  3645.     val = phy_read(phydev, TLK110_PSCOEF21_REG);
  3646.     phy_write(phydev, TLK110_PSCOEF21_REG, (val | TLK110_PSCOEF21_VAL));
  3647.  
  3648.     val = phy_read(phydev, TLK110_PSCOEF3_REG);
  3649.     phy_write(phydev, TLK110_PSCOEF3_REG, (val | TLK110_PSCOEF3_VAL));
  3650.  
  3651.     val = phy_read(phydev, TLK110_ALFAFACTOR1_REG);
  3652.     phy_write(phydev, TLK110_ALFAFACTOR1_REG, (val | TLK110_ALFACTOR1_VAL));
  3653.  
  3654.     val = phy_read(phydev, TLK110_ALFAFACTOR2_REG);
  3655.     phy_write(phydev, TLK110_ALFAFACTOR2_REG, (val | TLK110_ALFACTOR2_VAL));
  3656.  
  3657.     val = phy_read(phydev, TLK110_CFGPS_REG);
  3658.     phy_write(phydev, TLK110_CFGPS_REG, (val | TLK110_CFGPS_VAL));
  3659.  
  3660.     val = phy_read(phydev, TLK110_FTSPTXGAIN_REG);
  3661.     phy_write(phydev, TLK110_FTSPTXGAIN_REG, (val | TLK110_FTSPTXGAIN_VAL));
  3662.  
  3663.     val = phy_read(phydev, TLK110_SWSCR3_REG);
  3664.     phy_write(phydev, TLK110_SWSCR3_REG, (val | TLK110_SWSCR3_VAL));
  3665.  
  3666.     val = phy_read(phydev, TLK110_SCFALLBACK_REG);
  3667.     phy_write(phydev, TLK110_SCFALLBACK_REG, (val | TLK110_SCFALLBACK_VAL));
  3668.  
  3669.     val = phy_read(phydev, TLK110_PHYRCR_REG);
  3670.     phy_write(phydev, TLK110_PHYRCR_REG, (val | TLK110_PHYRCR_VAL));
  3671.  
  3672.     return 0;
  3673. }
  3674. #endif
  3675.  
  3676. static void profibus_init(int evm_id, int profile)
  3677. {
  3678.     setup_pin_mux(profibus_pin_mux);
  3679.     return;
  3680. }
  3681.  
  3682. /* Low-Cost EVM */
  3683. static struct evm_dev_cfg low_cost_evm_dev_cfg[] = {
  3684.     {rgmii1_init,   DEV_ON_BASEBOARD, PROFILE_NONE},
  3685.     {usb0_init, DEV_ON_BASEBOARD, PROFILE_NONE},
  3686.     {usb1_init, DEV_ON_BASEBOARD, PROFILE_NONE},
  3687.     {evm_nand_init, DEV_ON_BASEBOARD, PROFILE_NONE},
  3688.     {NULL, 0, 0},
  3689. };
  3690.  
  3691. /* General Purpose EVM */
  3692. static struct evm_dev_cfg gen_purp_evm_dev_cfg[] = {
  3693.     {enable_ecap0,  DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |
  3694.                         PROFILE_2 | PROFILE_7) },
  3695.     {lcdc_init, DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |
  3696.                         PROFILE_2 | PROFILE_7) },
  3697.     {tsc_init,  DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_1 |
  3698.                         PROFILE_2 | PROFILE_7) },
  3699.     {rgmii1_init,   DEV_ON_BASEBOARD, PROFILE_ALL},
  3700.     {rgmii2_init,   DEV_ON_DGHTR_BRD, (PROFILE_1 | PROFILE_2 |
  3701.                         PROFILE_4 | PROFILE_6) },
  3702.     {usb0_init, DEV_ON_BASEBOARD, PROFILE_ALL},
  3703.     {usb1_init, DEV_ON_BASEBOARD, PROFILE_ALL},
  3704.     {evm_nand_init, DEV_ON_DGHTR_BRD,
  3705.         (PROFILE_ALL & ~PROFILE_2 & ~PROFILE_3)},
  3706.     {i2c1_init,     DEV_ON_DGHTR_BRD, (PROFILE_ALL & ~PROFILE_2)},
  3707.     {mcasp1_init,   DEV_ON_DGHTR_BRD, (PROFILE_0 | PROFILE_3 | PROFILE_7)},
  3708.     {mmc1_init, DEV_ON_DGHTR_BRD, PROFILE_2},
  3709.     {mmc2_wl12xx_init,  DEV_ON_BASEBOARD, (PROFILE_0 | PROFILE_3 |
  3710.                                 PROFILE_5)},
  3711.     {mmc0_init, DEV_ON_BASEBOARD, (PROFILE_ALL & ~PROFILE_5)},
  3712.     {mmc0_no_cd_init,   DEV_ON_BASEBOARD, PROFILE_5},
  3713.     {spi0_init, DEV_ON_DGHTR_BRD, PROFILE_2},
  3714.     {uart1_wl12xx_init, DEV_ON_BASEBOARD, (PROFILE_0 | PROFILE_3 |
  3715.                                 PROFILE_5)},
  3716.     {wl12xx_init,   DEV_ON_BASEBOARD, (PROFILE_0 | PROFILE_3 | PROFILE_5)},
  3717.     {d_can_init,    DEV_ON_DGHTR_BRD, PROFILE_1},
  3718.     {matrix_keypad_init, DEV_ON_DGHTR_BRD, PROFILE_0},
  3719.     {volume_keys_init,  DEV_ON_DGHTR_BRD, PROFILE_0},
  3720.     {uart2_init,    DEV_ON_DGHTR_BRD, PROFILE_3},
  3721.     {haptics_init,  DEV_ON_DGHTR_BRD, (PROFILE_4)},
  3722.     {NULL, 0, 0},
  3723. };
  3724.  
  3725. /* Industrial Auto Motor Control EVM */
  3726. static struct evm_dev_cfg ind_auto_mtrl_evm_dev_cfg[] = {
  3727.     {mii1_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},
  3728.     {usb0_init, DEV_ON_BASEBOARD, PROFILE_ALL},
  3729.     {usb1_init, DEV_ON_BASEBOARD, PROFILE_ALL},
  3730.     {profibus_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},
  3731.     {evm_nand_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},
  3732.     {spi1_init, DEV_ON_DGHTR_BRD, PROFILE_ALL},
  3733.     {uart3_init,    DEV_ON_DGHTR_BRD, PROFILE_ALL},
  3734.     {i2c1_init, DEV_ON_BASEBOARD, PROFILE_ALL},
  3735.     {mmc0_no_cd_init,   DEV_ON_BASEBOARD, PROFILE_ALL},
  3736.     {NULL, 0, 0},
  3737. };
  3738.  
  3739. /* IP-Phone EVM */
  3740. static struct evm_dev_cfg ip_phn_evm_dev_cfg[] = {
  3741.     {enable_ecap0,  DEV_ON_DGHTR_BRD, PROFILE_NONE},
  3742.     {lcdc_init, DEV_ON_DGHTR_BRD, PROFILE_NONE},
  3743.     {tsc_init,  DEV_ON_DGHTR_BRD, PROFILE_NONE},
  3744.     {rgmii1_init,   DEV_ON_BASEBOARD, PROFILE_NONE},
  3745.     {rgmii2_init,   DEV_ON_DGHTR_BRD, PROFILE_NONE},
  3746.     {usb0_init, DEV_ON_BASEBOARD, PROFILE_NONE},
  3747.     {usb1_init, DEV_ON_BASEBOARD, PROFILE_NONE},
  3748.     {evm_nand_init, DEV_ON_DGHTR_BRD, PROFILE_NONE},
  3749.     {i2c1_init, DEV_ON_BASEBOARD, PROFILE_NONE},
  3750.     {mcasp1_init,   DEV_ON_DGHTR_BRD, PROFILE_NONE},
  3751.     {mmc0_init, DEV_ON_BASEBOARD, PROFILE_NONE},
  3752.     {NULL, 0, 0},
  3753. };
  3754.  
  3755. /* Beaglebone < Rev A3 */
  3756. static struct evm_dev_cfg beaglebone_old_dev_cfg[] = {
  3757.     {rmii1_init,    DEV_ON_BASEBOARD, PROFILE_NONE},
  3758.     {usb0_init, DEV_ON_BASEBOARD, PROFILE_NONE},
  3759.     {usb1_init, DEV_ON_BASEBOARD, PROFILE_NONE},
  3760.     {i2c2_init, DEV_ON_BASEBOARD, PROFILE_NONE},
  3761.     {mmc0_init, DEV_ON_BASEBOARD, PROFILE_NONE},
  3762.     {boneleds_init, DEV_ON_BASEBOARD, PROFILE_ALL},
  3763.     {NULL, 0, 0},
  3764. };
  3765.  
  3766. /* Beaglebone Rev A3 and after */
  3767. static struct evm_dev_cfg beaglebone_dev_cfg[] = {
  3768.     {tps65217_init, DEV_ON_BASEBOARD, PROFILE_NONE},
  3769.     {i2c2_init, DEV_ON_BASEBOARD, PROFILE_NONE},
  3770.     {mii1_init, DEV_ON_BASEBOARD, PROFILE_NONE},
  3771.     {usb0_init, DEV_ON_BASEBOARD, PROFILE_NONE},
  3772.     {usb1_init, DEV_ON_BASEBOARD, PROFILE_NONE},
  3773.     {NULL, 0, 0},
  3774. };
  3775.  
  3776. static void setup_low_cost_evm(void)
  3777. {
  3778.     pr_info("The board is a AM335x Low Cost EVM.\n");
  3779.  
  3780.     _configure_device(LOW_COST_EVM, low_cost_evm_dev_cfg, PROFILE_NONE);
  3781. }
  3782.  
  3783. static void setup_general_purpose_evm(void)
  3784. {
  3785.     u32 prof_sel = am335x_get_profile_selection();
  3786.     pr_info("The board is general purpose EVM in profile %d\n", prof_sel);
  3787.  
  3788.     if (!strncmp("1.1A", config.version, 4)) {
  3789.         pr_info("EVM version is %s\n", config.version);
  3790.         gp_evm_revision = GP_EVM_REV_IS_1_1A;
  3791.     } else if (!strncmp("1.0", config.version, 3)) {
  3792.         gp_evm_revision = GP_EVM_REV_IS_1_0;
  3793.     } else {
  3794.         pr_err("Found invalid GP EVM revision, falling back to Rev1.1A");
  3795.         gp_evm_revision = GP_EVM_REV_IS_1_1A;
  3796.     }
  3797.  
  3798.     if (gp_evm_revision == GP_EVM_REV_IS_1_0)
  3799.         gigabit_enable = 0;
  3800.     else if (gp_evm_revision == GP_EVM_REV_IS_1_1A)
  3801.         gigabit_enable = 1;
  3802.  
  3803.     _configure_device(GEN_PURP_EVM, gen_purp_evm_dev_cfg, (1L << prof_sel));
  3804. }
  3805.  
  3806. static void setup_ind_auto_motor_ctrl_evm(void)
  3807. {
  3808.     u32 prof_sel = am335x_get_profile_selection();
  3809.  
  3810.     pr_info("The board is an industrial automation EVM in profile %d\n",
  3811.         prof_sel);
  3812.  
  3813.     /* Only Profile 0 is supported */
  3814.     if ((1L << prof_sel) != PROFILE_0) {
  3815.         pr_err("AM335X: Only Profile 0 is supported\n");
  3816.         pr_err("Assuming profile 0 & continuing\n");
  3817.         prof_sel = PROFILE_0;
  3818.     }
  3819.  
  3820.     _configure_device(IND_AUT_MTR_EVM, ind_auto_mtrl_evm_dev_cfg,
  3821.         PROFILE_0);
  3822.  
  3823.     /* Fillup global evmid */
  3824.     am33xx_evmid_fillup(IND_AUT_MTR_EVM);
  3825.  
  3826.     /* Initialize TLK110 PHY registers for phy version 1.0 */
  3827.     am335x_tlk110_phy_init();
  3828.  
  3829.  
  3830. }
  3831.  
  3832. static void setup_ip_phone_evm(void)
  3833. {
  3834.     pr_info("The board is an IP phone EVM\n");
  3835.  
  3836.     _configure_device(IP_PHN_EVM, ip_phn_evm_dev_cfg, PROFILE_NONE);
  3837. }
  3838.  
  3839. /* BeagleBone < Rev A3 */
  3840. static void setup_beaglebone_old(void)
  3841. {
  3842.     pr_info("The board is a AM335x Beaglebone < Rev A3.\n");
  3843.  
  3844.     /* Beagle Bone has Micro-SD slot which doesn't have Write Protect pin */
  3845.     am335x_mmc[0].gpio_wp = -EINVAL;
  3846.  
  3847.     _configure_device(LOW_COST_EVM, beaglebone_old_dev_cfg, PROFILE_NONE);
  3848.  
  3849.     phy_register_fixup_for_uid(BBB_PHY_ID, BBB_PHY_MASK,
  3850.                     beaglebone_phy_fixup);
  3851.  
  3852.     /* Fill up global evmid */
  3853.     am33xx_evmid_fillup(BEAGLE_BONE_OLD);
  3854. }
  3855.  
  3856. /* BeagleBone after Rev A3 */
  3857. static void setup_beaglebone(void)
  3858. {
  3859.     pr_info("The board is a AM335x Beaglebone.\n");
  3860.     gp_evm_revision = GP_EVM_ACTUALLY_BEAGLEBONE;
  3861.  
  3862.     /* Beagle Bone has Micro-SD slot which doesn't have Write Protect pin */
  3863.     am335x_mmc[0].gpio_wp = -EINVAL;
  3864.  
  3865.     _configure_device(LOW_COST_EVM, beaglebone_dev_cfg, PROFILE_NONE);
  3866.  
  3867.     /* TPS65217 regulator has full constraints */
  3868.     regulator_has_full_constraints();
  3869.  
  3870.     /* Fill up global evmid */
  3871.     am33xx_evmid_fillup(BEAGLE_BONE_A3);
  3872.  
  3873.     /*TODO:We are registering all pwms for the beaglebone here
  3874.      *this may effect power management in the future
  3875.      */
  3876.     register_all_pwms();
  3877. }
  3878.  
  3879.  
  3880. static void am335x_setup_daughter_board(struct memory_accessor *m, void *c)
  3881. {
  3882.     int ret;
  3883.  
  3884.     /*
  3885.      * Read from the EEPROM to see the presence of daughter board.
  3886.      * If present, print the cpld version.
  3887.      */
  3888.  
  3889.     ret = m->read(m, (char *)&config1, 0, sizeof(config1));
  3890.     if (ret == sizeof(config1)) {
  3891.         pr_info("Detected a daughter card on AM335x EVM..");
  3892.         daughter_brd_detected = true;
  3893.     }
  3894.      else {
  3895.         pr_info("No daughter card found\n");
  3896.         daughter_brd_detected = false;
  3897.         return;
  3898.     }
  3899.  
  3900.     if (!strncmp("CPLD", config1.cpld_ver, 4))
  3901.         pr_info("CPLD version: %s\n", config1.cpld_ver);
  3902.     else
  3903.         pr_err("Unknown CPLD version found\n");
  3904. }
  3905.  
  3906. static void am335x_evm_setup(struct memory_accessor *mem_acc, void *context)
  3907. {
  3908.     int ret;
  3909.     char tmp[10];
  3910.  
  3911.     /* 1st get the MAC address from EEPROM */
  3912.     ret = mem_acc->read(mem_acc, (char *)&am335x_mac_addr,
  3913.         EEPROM_MAC_ADDRESS_OFFSET, sizeof(am335x_mac_addr));
  3914.  
  3915.     if (ret != sizeof(am335x_mac_addr)) {
  3916.         pr_warning("AM335X: EVM Config read fail: %d\n", ret);
  3917.         return;
  3918.     }
  3919.  
  3920.     /* Fillup global mac id */
  3921.     am33xx_cpsw_macidfillup(&am335x_mac_addr[0][0],
  3922.                 &am335x_mac_addr[1][0]);
  3923.  
  3924.     /* get board specific data */
  3925.     ret = mem_acc->read(mem_acc, (char *)&config, 0, sizeof(config));
  3926.     if (ret != sizeof(config)) {
  3927.         pr_err("AM335X EVM config read fail, read %d bytes\n", ret);
  3928.         pr_err("This likely means that there either is no/or a failed EEPROM\n");
  3929.         goto out;
  3930.     }
  3931.  
  3932.     if (config.header != AM335X_EEPROM_HEADER) {
  3933.         pr_err("AM335X: wrong header 0x%x, expected 0x%x\n",
  3934.             config.header, AM335X_EEPROM_HEADER);
  3935.         goto out;
  3936.     }
  3937.  
  3938.     if (strncmp("A335", config.name, 4)) {
  3939.         pr_err("Board %s\ndoesn't look like an AM335x board\n",
  3940.             config.name);
  3941.         goto out;
  3942.     }
  3943.  
  3944.     snprintf(tmp, sizeof(config.name) + 1, "%s", config.name);
  3945.     pr_info("Board name: %s\n", tmp);
  3946.     snprintf(tmp, sizeof(config.version) + 1, "%s", config.version);
  3947.     pr_info("Board version: %s\n", tmp);
  3948.  
  3949.     if (!strncmp("A335BONE", config.name, 8)) {
  3950.         daughter_brd_detected = false;
  3951.         if(!strncmp("00A1", config.version, 4) ||
  3952.            !strncmp("00A2", config.version, 4))
  3953.             setup_beaglebone_old();
  3954.         else
  3955.             setup_beaglebone();
  3956.     } else {
  3957.         /* only 6 characters of options string used for now */
  3958.         snprintf(tmp, 7, "%s", config.opt);
  3959.         pr_info("SKU: %s\n", tmp);
  3960.  
  3961.         if (!strncmp("SKU#00", config.opt, 6))
  3962.             setup_low_cost_evm();
  3963.         else if (!strncmp("SKU#01", config.opt, 6))
  3964.             setup_general_purpose_evm();
  3965.         else if (!strncmp("SKU#02", config.opt, 6))
  3966.             setup_ind_auto_motor_ctrl_evm();
  3967.         else if (!strncmp("SKU#03", config.opt, 6))
  3968.             setup_ip_phone_evm();
  3969.         else
  3970.             goto out;
  3971.     }
  3972.     /* Initialize cpsw after board detection is completed as board
  3973.      * information is required for configuring phy address and hence
  3974.      * should be call only after board detection
  3975.      */
  3976.     am33xx_cpsw_init(gigabit_enable);
  3977.  
  3978.     return;
  3979.  
  3980. out:
  3981.     /*
  3982.      * If the EEPROM hasn't been programed or an incorrect header
  3983.      * or board name are read then the hardware details are unknown.
  3984.      * Notify the user and call machine_halt to stop the boot process.
  3985.      */
  3986.     pr_err("The error message above indicates that there is an issue with\n"
  3987.            "the EEPROM or the EEPROM contents.  After verifying the EEPROM\n"
  3988.            "contents, if any, refer to the %s function in the\n"
  3989.            "%s file to modify the board\n"
  3990.            "initialization code to match the hardware configuration\n",
  3991.            __func__ , __FILE__);
  3992.     machine_halt();
  3993. }
  3994.  
  3995. static struct at24_platform_data am335x_daughter_board_eeprom_info = {
  3996.     .byte_len       = (256*1024) / 8,
  3997.     .page_size      = 64,
  3998.     .flags          = AT24_FLAG_ADDR16,
  3999.     .setup          = am335x_setup_daughter_board,
  4000.     .context        = (void *)NULL,
  4001. };
  4002.  
  4003. static struct at24_platform_data am335x_baseboard_eeprom_info = {
  4004.     .byte_len       = (256*1024) / 8,
  4005.     .page_size      = 64,
  4006.     .flags          = AT24_FLAG_ADDR16,
  4007.     .setup          = am335x_evm_setup,
  4008.     .context        = (void *)NULL,
  4009. };
  4010.  
  4011. static struct regulator_init_data am335x_dummy = {
  4012.     .constraints.always_on  = true,
  4013. };
  4014.  
  4015. static struct regulator_consumer_supply am335x_vdd1_supply[] = {
  4016.     REGULATOR_SUPPLY("vdd_mpu", NULL),
  4017. };
  4018.  
  4019. static struct regulator_init_data am335x_vdd1 = {
  4020.     .constraints = {
  4021.         .min_uV         = 600000,
  4022.         .max_uV         = 1500000,
  4023.         .valid_modes_mask   = REGULATOR_MODE_NORMAL,
  4024.         .valid_ops_mask     = REGULATOR_CHANGE_VOLTAGE,
  4025.         .always_on      = 1,
  4026.     },
  4027.     .num_consumer_supplies  = ARRAY_SIZE(am335x_vdd1_supply),
  4028.     .consumer_supplies  = am335x_vdd1_supply,
  4029. };
  4030.  
  4031. static struct regulator_consumer_supply am335x_vdd2_supply[] = {
  4032.     REGULATOR_SUPPLY("vdd_core", NULL),
  4033. };
  4034.  
  4035. static struct regulator_init_data am335x_vdd2 = {
  4036.     .constraints = {
  4037.         .min_uV         = 600000,
  4038.         .max_uV         = 1500000,
  4039.         .valid_modes_mask   = REGULATOR_MODE_NORMAL,
  4040.         .valid_ops_mask     = REGULATOR_CHANGE_VOLTAGE,
  4041.         .always_on      = 1,
  4042.     },
  4043.     .num_consumer_supplies  = ARRAY_SIZE(am335x_vdd2_supply),
  4044.     .consumer_supplies  = am335x_vdd2_supply,
  4045. };
  4046.  
  4047. static struct tps65910_board am335x_tps65910_info = {
  4048.     .tps65910_pmic_init_data[TPS65910_REG_VRTC] = &am335x_dummy,
  4049.     .tps65910_pmic_init_data[TPS65910_REG_VIO]  = &am335x_dummy,
  4050.     .tps65910_pmic_init_data[TPS65910_REG_VDD1] = &am335x_vdd1,
  4051.     .tps65910_pmic_init_data[TPS65910_REG_VDD2] = &am335x_vdd2,
  4052.     .tps65910_pmic_init_data[TPS65910_REG_VDD3] = &am335x_dummy,
  4053.     .tps65910_pmic_init_data[TPS65910_REG_VDIG1]    = &am335x_dummy,
  4054.     .tps65910_pmic_init_data[TPS65910_REG_VDIG2]    = &am335x_dummy,
  4055.     .tps65910_pmic_init_data[TPS65910_REG_VPLL] = &am335x_dummy,
  4056.     .tps65910_pmic_init_data[TPS65910_REG_VDAC] = &am335x_dummy,
  4057.     .tps65910_pmic_init_data[TPS65910_REG_VAUX1]    = &am335x_dummy,
  4058.     .tps65910_pmic_init_data[TPS65910_REG_VAUX2]    = &am335x_dummy,
  4059.     .tps65910_pmic_init_data[TPS65910_REG_VAUX33]   = &am335x_dummy,
  4060.     .tps65910_pmic_init_data[TPS65910_REG_VMMC] = &am335x_dummy,
  4061. };
  4062.  
  4063. /*
  4064. * Daughter board Detection.
  4065. * Every board has a ID memory (EEPROM) on board. We probe these devices at
  4066. * machine init, starting from daughter board and ending with baseboard.
  4067. * Assumptions :
  4068. *   1. probe for i2c devices are called in the order they are included in
  4069. *      the below struct. Daughter boards eeprom are probed 1st. Baseboard
  4070. *      eeprom probe is called last.
  4071. */
  4072. static struct i2c_board_info __initdata am335x_i2c_boardinfo[] = {
  4073.     {
  4074.         /* Daughter Board EEPROM */
  4075.         I2C_BOARD_INFO("24c256", DAUG_BOARD_I2C_ADDR),
  4076.         .platform_data  = &am335x_daughter_board_eeprom_info,
  4077.     },
  4078.     {
  4079.         /* Baseboard board EEPROM */
  4080.         I2C_BOARD_INFO("24c256", BASEBOARD_I2C_ADDR),
  4081.         .platform_data  = &am335x_baseboard_eeprom_info,
  4082.     },
  4083.     {
  4084.         I2C_BOARD_INFO("cpld_reg", 0x35),
  4085.     },
  4086.     {
  4087.         I2C_BOARD_INFO("tlc59108", 0x40),
  4088.     },
  4089.     {
  4090.         I2C_BOARD_INFO("tps65910", TPS65910_I2C_ID1),
  4091.         .platform_data  = &am335x_tps65910_info,
  4092.     },
  4093. };
  4094.  
  4095. static struct omap_musb_board_data musb_board_data = {
  4096.     .interface_type = MUSB_INTERFACE_ULPI,
  4097.     /*
  4098.      * mode[0:3] = USB0PORT's mode
  4099.      * mode[4:7] = USB1PORT's mode
  4100.      * AM335X beta EVM has USB0 in OTG mode and USB1 in host mode.
  4101.      */
  4102.     .mode           = (MUSB_HOST << 4) | MUSB_OTG,
  4103.     .power      = 500,
  4104.     .instances  = 1,
  4105. };
  4106.  
  4107. static int cpld_reg_probe(struct i2c_client *client,
  4108.         const struct i2c_device_id *id)
  4109. {
  4110.     cpld_client = client;
  4111.     return 0;
  4112. }
  4113.  
  4114. static int __devexit cpld_reg_remove(struct i2c_client *client)
  4115. {
  4116.     cpld_client = NULL;
  4117.     return 0;
  4118. }
  4119.  
  4120. static const struct i2c_device_id cpld_reg_id[] = {
  4121.     { "cpld_reg", 0 },
  4122.     { }
  4123. };
  4124.  
  4125. static struct i2c_driver cpld_reg_driver = {
  4126.     .driver = {
  4127.         .name   = "cpld_reg",
  4128.     },
  4129.     .probe      = cpld_reg_probe,
  4130.     .remove     = cpld_reg_remove,
  4131.     .id_table   = cpld_reg_id,
  4132. };
  4133.  
  4134. static void evm_init_cpld(void)
  4135. {
  4136.     i2c_add_driver(&cpld_reg_driver);
  4137. }
  4138.  
  4139. static void __init am335x_evm_i2c_init(void)
  4140. {
  4141.     /* Initially assume Low Cost EVM Config */
  4142.     am335x_evm_id = LOW_COST_EVM;
  4143.  
  4144.     evm_init_cpld();
  4145.  
  4146.     omap_register_i2c_bus(1, 100, am335x_i2c_boardinfo,
  4147.                 ARRAY_SIZE(am335x_i2c_boardinfo));
  4148. }
  4149.  
  4150. static struct resource am335x_rtc_resources[] = {
  4151.     {
  4152.         .start      = AM33XX_RTC_BASE,
  4153.         .end        = AM33XX_RTC_BASE + SZ_4K - 1,
  4154.         .flags      = IORESOURCE_MEM,
  4155.     },
  4156.     { /* timer irq */
  4157.         .start      = AM33XX_IRQ_RTC_TIMER,
  4158.         .end        = AM33XX_IRQ_RTC_TIMER,
  4159.         .flags      = IORESOURCE_IRQ,
  4160.     },
  4161.     { /* alarm irq */
  4162.         .start      = AM33XX_IRQ_RTC_ALARM,
  4163.         .end        = AM33XX_IRQ_RTC_ALARM,
  4164.         .flags      = IORESOURCE_IRQ,
  4165.     },
  4166. };
  4167.  
  4168. static struct platform_device am335x_rtc_device = {
  4169.     .name           = "omap_rtc",
  4170.     .id             = -1,
  4171.     .num_resources  = ARRAY_SIZE(am335x_rtc_resources),
  4172.     .resource   = am335x_rtc_resources,
  4173. };
  4174.  
  4175. static int am335x_rtc_init(void)
  4176. {
  4177.     void __iomem *base;
  4178.     struct clk *clk;
  4179.  
  4180.     clk = clk_get(NULL, "rtc_fck");
  4181.     if (IS_ERR(clk)) {
  4182.         pr_err("rtc : Failed to get RTC clock\n");
  4183.         return -1;
  4184.     }
  4185.  
  4186.     if (clk_enable(clk)) {
  4187.         pr_err("rtc: Clock Enable Failed\n");
  4188.         return -1;
  4189.     }
  4190.  
  4191.     base = ioremap(AM33XX_RTC_BASE, SZ_4K);
  4192.  
  4193.     if (WARN_ON(!base))
  4194.         return -ENOMEM;
  4195.  
  4196.     /* Unlock the rtc's registers */
  4197.     writel(0x83e70b13, base + 0x6c);
  4198.     writel(0x95a4f1e0, base + 0x70);
  4199.  
  4200.     /*
  4201.      * Enable the 32K OSc
  4202.      * TODO: Need a better way to handle this
  4203.      * Since we want the clock to be running before mmc init
  4204.      * we need to do it before the rtc probe happens
  4205.      */
  4206.     writel(0x48, base + 0x54);
  4207.  
  4208.     iounmap(base);
  4209.  
  4210.     return  platform_device_register(&am335x_rtc_device);
  4211. }
  4212.  
  4213. /* Enable clkout2 */
  4214. static struct pinmux_config clkout2_pin_mux[] = {
  4215.     {"xdma_event_intr1.clkout2", OMAP_MUX_MODE3 | AM33XX_PIN_OUTPUT},
  4216.     {NULL, 0},
  4217. };
  4218.  
  4219. static void __init clkout2_enable(void)
  4220. {
  4221.     void __iomem *base;
  4222.     unsigned int val;
  4223.  
  4224.     base = ioremap(0x44E00700, SZ_4K);
  4225.     val = (5 << 3) | (3 << 0); //32 MHz
  4226.     writel(val, base);
  4227.     iounmap(base);
  4228.  
  4229.     setup_pin_mux(clkout2_pin_mux);
  4230. }
  4231.  
  4232. void __iomem *am33xx_emif_base;
  4233.  
  4234. void __iomem * __init am33xx_get_mem_ctlr(void)
  4235. {
  4236.  
  4237.     am33xx_emif_base = ioremap(AM33XX_EMIF0_BASE, SZ_32K);
  4238.  
  4239.     if (!am33xx_emif_base)
  4240.         pr_warning("%s: Unable to map DDR2 controller", __func__);
  4241.  
  4242.     return am33xx_emif_base;
  4243. }
  4244.  
  4245. void __iomem *am33xx_get_ram_base(void)
  4246. {
  4247.     return am33xx_emif_base;
  4248. }
  4249.  
  4250. static struct resource am33xx_cpuidle_resources[] = {
  4251.     {
  4252.         .start      = AM33XX_EMIF0_BASE,
  4253.         .end        = AM33XX_EMIF0_BASE + SZ_32K - 1,
  4254.         .flags      = IORESOURCE_MEM,
  4255.     },
  4256. };
  4257.  
  4258. /* AM33XX devices support DDR2 power down */
  4259. static struct am33xx_cpuidle_config am33xx_cpuidle_pdata = {
  4260.     .ddr2_pdown = 1,
  4261. };
  4262.  
  4263. static struct platform_device am33xx_cpuidle_device = {
  4264.     .name           = "cpuidle-am33xx",
  4265.     .num_resources      = ARRAY_SIZE(am33xx_cpuidle_resources),
  4266.     .resource       = am33xx_cpuidle_resources,
  4267.     .dev = {
  4268.         .platform_data  = &am33xx_cpuidle_pdata,
  4269.     },
  4270. };
  4271.  
  4272. static void __init am33xx_cpuidle_init(void)
  4273. {
  4274.     int ret;
  4275.  
  4276.     am33xx_cpuidle_pdata.emif_base = am33xx_get_mem_ctlr();
  4277.  
  4278.     ret = platform_device_register(&am33xx_cpuidle_device);
  4279.  
  4280.     if (ret)
  4281.         pr_warning("AM33XX cpuidle registration failed\n");
  4282.  
  4283. }
  4284.  
  4285. static void __init am335x_evm_init(void)
  4286. {
  4287.     am33xx_cpuidle_init();
  4288.     am33xx_mux_init(board_mux);
  4289.     omap_serial_init();
  4290.     am335x_rtc_init();
  4291.     clkout2_enable();
  4292.     am335x_evm_i2c_init();
  4293.     omap_sdrc_init(NULL, NULL);
  4294.     usb_musb_init(&musb_board_data);
  4295.     omap_board_config = am335x_evm_config;
  4296.     omap_board_config_size = ARRAY_SIZE(am335x_evm_config);
  4297.     /* Create an alias for icss clock */
  4298.     if (clk_add_alias("pruss", NULL, "pruss_uart_gclk", NULL))
  4299.         pr_warn("failed to create an alias: icss_uart_gclk --> pruss\n");
  4300.     /* Create an alias for gfx/sgx clock */
  4301.     if (clk_add_alias("sgx_ck", NULL, "gfx_fclk", NULL))
  4302.         pr_warn("failed to create an alias: gfx_fclk --> sgx_ck\n");
  4303. }
  4304.  
  4305. static void __init am335x_evm_map_io(void)
  4306. {
  4307.     omap2_set_globals_am33xx();
  4308.     omapam33xx_map_common_io();
  4309. }
  4310.  
  4311. MACHINE_START(AM335XEVM, "am335xevm")
  4312.     /* Maintainer: Texas Instruments */
  4313.     .atag_offset    = 0x100,
  4314.     .map_io     = am335x_evm_map_io,
  4315.     .init_early = am33xx_init_early,
  4316.     .init_irq   = ti81xx_init_irq,
  4317.     .handle_irq     = omap3_intc_handle_irq,
  4318.     .timer      = &omap3_am33xx_timer,
  4319.     .init_machine   = am335x_evm_init,
  4320. MACHINE_END
  4321.  
  4322. MACHINE_START(AM335XIAEVM, "am335xiaevm")
  4323.     /* Maintainer: Texas Instruments */
  4324.     .atag_offset    = 0x100,
  4325.     .map_io     = am335x_evm_map_io,
  4326.     .init_irq   = ti81xx_init_irq,
  4327.     .init_early = am33xx_init_early,
  4328.     .timer      = &omap3_am33xx_timer,
  4329.     .init_machine   = am335x_evm_init,
  4330. MACHINE_END
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