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- /*
- * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
- / {
- ocp {
- P8_08_pinmux {
- /* gpio2[3] */
- status = "disabled";
- };
- P8_10_pinmux {
- /* gpio2[4] */
- status = "disabled";
- };
- P8_12_pinmux {
- /* gpio1[12] */
- status = "disabled";
- };
- P8_14_pinmux {
- /* gpio0[26] */
- status = "disabled";
- };
- P8_16_pinmux {
- /* gpio1[14] */
- status = "disabled";
- };
- P8_18_pinmux {
- /* gpio2[1] */
- status = "disabled";
- };
- P8_26_pinmux {
- /* gpio1[29] */
- status = "disabled";
- };
- P9_12_pinmux {
- /* gpio1[28] */
- status = "disabled";
- };
- P9_14_pinmux {
- /* gpio1[18] */
- status = "disabled";
- };
- P9_15_pinmux {
- /* gpio1[16] */
- status = "disabled";
- };
- P9_23_pinmux {
- /* gpio1[17] */
- status = "disabled";
- };
- P9_25_pinmux {
- /* gpio3[21] */
- status = "disabled";
- };
- P9_41_pinmux {
- /* gpio0[20] */
- status = "disabled";
- };
- P9_42_pinmux {
- /* gpio0[7] */
- status = "disabled";
- };
- };
- };
- / {
- outputs {
- compatible = "outputs";
- status = "okay";
- pinctrl-names = "default";
- pinctrl-0 = <&outputs_pins>; /* Refer to previous label */
- gpios = <&gpio2 3 0>,
- <&gpio2 4 0>,
- <&gpio1 12 0>,
- <&gpio0 26 0>,
- <&gpio1 14 0>,
- <&gpio2 1 0>,
- <&gpio1 29 0>,
- <&gpio1 28 0>,
- <&gpio1 18 0>,
- <&gpio1 16 0>,
- <&gpio1 17 0>,
- <&gpio3 21 0>, /* General Output #1 */
- <&gpio0 20 0>, /* General Output #2 */
- <&gpio0 7 0>; /* General Output #3 */
- default-on;
- debug = <1>;
- /* shutdown = <1>; */
- };
- };
- &am33xx_pinmux {
- outputs_pins: pinmux_outputs_pins { /* Set up pinmux */
- pinctrl-single,pins = <
- 0x094 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_wait0.gpio0_30 */
- 0x098 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* spi0_cs0.gpio0_5 */
- 0x030 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* spi0_d1.gpio0_4 */
- 0x028 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_advn_ale.gpio_2 */
- 0x038 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */
- 0x08c (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */
- 0x07c (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_gpmc_wen.gpio2_4 */
- 0x078 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* xdma_event_intr1.gpio0_20 */
- 0x048 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* ecap0_in_pwm0_out.gpio0_7 */
- 0x040 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* ecap0_in_pwm0_out.gpio0_7 */
- 0x044 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* ecap0_in_pwm0_out.gpio0_7 */
- 0x1ac (PIN_OUTPUT_PULLUP | MUX_MODE7) /* ecap0_in_pwm0_out.gpio0_7 */
- 0x1b4 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* ecap0_in_pwm0_out.gpio0_7 */
- 0x164 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* ecap0_in_pwm0_out.gpio0_7 */
- >;
- };
- };
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