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  1. From 141eeb5046d0d145234e35c66619e6c48e6e3f8a Mon Sep 17 00:00:00 2001
  2. From: Peter C. Wallace <[email protected]>
  3. Date: Tue, 16 Aug 2011 20:04:44 +0100
  4. Subject: [PATCH] Add support for Mesa 5i25 FPGA card.
  5.  
  6. Signed-off-by: Peter C. Wallace <[email protected]>
  7. ---
  8. src/hal/drivers/mesa-hostmot2/hm2_pci.c | 128 +++++++++++++++++++++++++-----
  9. src/hal/drivers/mesa-hostmot2/hm2_pci.h | 19 +++--
  10. src/hal/drivers/mesa-hostmot2/hostmot2.c | 11 +---
  11. src/hal/drivers/mesa-hostmot2/hostmot2.h | 22 +++++
  12. src/hal/drivers/mesa-hostmot2/pins.c | 32 ++++++--
  13. 5 files changed, 169 insertions(+), 43 deletions(-)
  14.  
  15. diff --git a/src/hal/drivers/mesa-hostmot2/hm2_pci.c b/src/hal/drivers/mesa-hostmot2/hm2_pci.c
  16. index 1a4f046..1b2888a 100644
  17. --- a/src/hal/drivers/mesa-hostmot2/hm2_pci.c
  18. +++ b/src/hal/drivers/mesa-hostmot2/hm2_pci.c
  19. @@ -50,10 +50,13 @@ static int comp_id;
  20. static hm2_pci_t hm2_pci_board[HM2_PCI_MAX_BOARDS];
  21. static int num_boards = 0;
  22. static int num_5i20 = 0;
  23. +static int num_5i21 = 0;
  24. static int num_5i22 = 0;
  25. static int num_5i23 = 0;
  26. +static int num_5i25 = 0;
  27. static int num_4i65 = 0;
  28. static int num_4i68 = 0;
  29. +static int num_4i69 = 0;
  30. static int num_3x20 = 0;
  31. static int failed_errno=0; // errno of last failed registration
  32.  
  33. @@ -62,81 +65,113 @@ static struct pci_device_id hm2_pci_tbl[] = {
  34.  
  35. // 5i20
  36. {
  37. - .vendor = 0x10b5,
  38. + .vendor = HM2_PCI_VENDORID_PLX,
  39. .device = HM2_PCI_DEV_PLX9030,
  40. - .subvendor = 0x10b5,
  41. + .subvendor = HM2_PCI_VENDORID_PLX,
  42. .subdevice = HM2_PCI_SSDEV_5I20,
  43. },
  44. +
  45. + // 5i21
  46. + {
  47. + .vendor = HM2_PCI_VENDORID_PLX,
  48. + .device = HM2_PCI_DEV_PLX9054,
  49. + .subvendor = HM2_PCI_VENDORID_PLX,
  50. + .subdevice = HM2_PCI_SSDEV_5I21,
  51. + },
  52.  
  53. // 4i65
  54. {
  55. - .vendor = 0x10b5,
  56. + .vendor = HM2_PCI_VENDORID_PLX,
  57. .device = HM2_PCI_DEV_PLX9030,
  58. - .subvendor = 0x10b5,
  59. + .subvendor = HM2_PCI_VENDORID_PLX,
  60. .subdevice = HM2_PCI_SSDEV_4I65,
  61. },
  62.  
  63. // 5i22-1.0M
  64. {
  65. - .vendor = 0x10b5,
  66. + .vendor = HM2_PCI_VENDORID_PLX,
  67. .device = HM2_PCI_DEV_PLX9054,
  68. - .subvendor = 0x10b5,
  69. + .subvendor = HM2_PCI_VENDORID_PLX,
  70. .subdevice = HM2_PCI_SSDEV_5I22_10,
  71. },
  72.  
  73. // 5i22-1.5M
  74. {
  75. - .vendor = 0x10b5,
  76. + .vendor = HM2_PCI_VENDORID_PLX,
  77. .device = HM2_PCI_DEV_PLX9054,
  78. - .subvendor = 0x10b5,
  79. + .subvendor = HM2_PCI_VENDORID_PLX,
  80. .subdevice = HM2_PCI_SSDEV_5I22_15,
  81. },
  82.  
  83. // 5i23
  84. {
  85. - .vendor = 0x10b5,
  86. + .vendor = HM2_PCI_VENDORID_PLX,
  87. .device = HM2_PCI_DEV_PLX9054,
  88. - .subvendor = 0x10b5,
  89. + .subvendor = HM2_PCI_VENDORID_PLX,
  90. .subdevice = HM2_PCI_SSDEV_5I23,
  91. },
  92.  
  93. + // 5i25
  94. + {
  95. + .vendor = HM2_PCI_VENDORID_MESA,
  96. + .device = HM2_PCI_DEV_MESA5I25,
  97. + .subvendor = HM2_PCI_VENDORID_MESA,
  98. + .subdevice = HM2_PCI_SSDEV_5I25,
  99. + },
  100. +
  101. // 4i68 (old SSID)
  102. {
  103. - .vendor = 0x10b5,
  104. + .vendor = HM2_PCI_VENDORID_PLX,
  105. .device = HM2_PCI_DEV_PLX9054,
  106. - .subvendor = 0x10b5,
  107. + .subvendor = HM2_PCI_VENDORID_PLX,
  108. .subdevice = HM2_PCI_SSDEV_4I68_OLD,
  109. },
  110.  
  111. // 4i68 (new SSID)
  112. {
  113. - .vendor = 0x10b5,
  114. + .vendor = HM2_PCI_VENDORID_PLX,
  115. .device = HM2_PCI_DEV_PLX9054,
  116. - .subvendor = 0x10b5,
  117. + .subvendor = HM2_PCI_VENDORID_PLX,
  118. .subdevice = HM2_PCI_SSDEV_4I68,
  119. },
  120.  
  121. + // 4i69-16
  122. + {
  123. + .vendor = HM2_PCI_VENDORID_PLX,
  124. + .device = HM2_PCI_DEV_PLX9054,
  125. + .subvendor = HM2_PCI_VENDORID_PLX,
  126. + .subdevice = HM2_PCI_SSDEV_4I69_16,
  127. + },
  128. +
  129. + // 4i69-25
  130. + {
  131. + .vendor = HM2_PCI_VENDORID_PLX,
  132. + .device = HM2_PCI_DEV_PLX9054,
  133. + .subvendor = HM2_PCI_VENDORID_PLX,
  134. + .subdevice = HM2_PCI_SSDEV_4I69_25,
  135. + },
  136. +
  137. // 3X20-1.0M
  138. {
  139. - .vendor = 0x10b5,
  140. + .vendor = HM2_PCI_VENDORID_PLX,
  141. .device = HM2_PCI_DEV_PLX9056,
  142. - .subvendor = 0x10b5,
  143. + .subvendor = HM2_PCI_VENDORID_PLX,
  144. .subdevice = HM2_PCI_SSDEV_3X20_10,
  145. },
  146.  
  147. // 3X20-1.5M
  148. {
  149. - .vendor = 0x10b5,
  150. + .vendor = HM2_PCI_VENDORID_PLX,
  151. .device = HM2_PCI_DEV_PLX9056,
  152. - .subvendor = 0x10b5,
  153. + .subvendor = HM2_PCI_VENDORID_PLX,
  154. .subdevice = HM2_PCI_SSDEV_3X20_15,
  155. },
  156.  
  157. // 3X20-2.0M
  158. {
  159. - .vendor = 0x10b5,
  160. + .vendor = HM2_PCI_VENDORID_PLX,
  161. .device = HM2_PCI_DEV_PLX9056,
  162. - .subvendor = 0x10b5,
  163. + .subvendor = HM2_PCI_VENDORID_PLX,
  164. .subdevice = HM2_PCI_SSDEV_3X20_20,
  165. },
  166.  
  167. @@ -387,6 +422,17 @@ static int hm2_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) {
  168. break;
  169. }
  170.  
  171. + case HM2_PCI_SSDEV_5I21: {
  172. + LL_PRINT("discovered 5i21 at %s\n", pci_name(dev));
  173. + rtapi_snprintf(board->llio.name, sizeof(board->llio.name), "hm2_5i21.%d", num_5i21);
  174. + num_5i21 ++;
  175. + board->llio.num_ioport_connectors = 2;
  176. + board->llio.ioport_connector_name[0] = "P1";
  177. + board->llio.ioport_connector_name[1] = "P1";
  178. + board->llio.fpga_part_number = "3s400pq208";
  179. + break;
  180. + }
  181. +
  182. case HM2_PCI_SSDEV_4I65: {
  183. LL_PRINT("discovered 4i65 at %s\n", pci_name(dev));
  184. rtapi_snprintf(board->llio.name, sizeof(board->llio.name), "hm2_4i65.%d", num_4i65);
  185. @@ -430,6 +476,17 @@ static int hm2_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) {
  186. break;
  187. }
  188.  
  189. + case HM2_PCI_SSDEV_5I25: {
  190. + LL_PRINT("discovered 5i25 at %s\n", pci_name(dev));
  191. + rtapi_snprintf(board->llio.name, sizeof(board->llio.name), "hm2_5i25.%d", num_5i25);
  192. + num_5i25 ++;
  193. + board->llio.num_ioport_connectors = 2;
  194. + board->llio.ioport_connector_name[0] = "P3";
  195. + board->llio.ioport_connector_name[1] = "P2";
  196. + board->llio.fpga_part_number = "6slx9pq144";
  197. + break;
  198. + }
  199. +
  200. case HM2_PCI_SSDEV_4I68:
  201. case HM2_PCI_SSDEV_4I68_OLD: {
  202. if (dev->subsystem_device == HM2_PCI_SSDEV_4I68_OLD) {
  203. @@ -447,6 +504,25 @@ static int hm2_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) {
  204. break;
  205. }
  206.  
  207. + case HM2_PCI_SSDEV_4I69_16:
  208. + case HM2_PCI_SSDEV_4I69_25: {
  209. + if (dev->subsystem_device == HM2_PCI_SSDEV_4I69_16) {
  210. + LL_PRINT("discovered 4I69-16 at %s\n", pci_name(dev));
  211. + board->llio.fpga_part_number = "6slx16fg256";
  212. +
  213. + } else {
  214. + LL_PRINT("discovered 4I69-25 at %s\n", pci_name(dev));
  215. + board->llio.fpga_part_number = "6slx25fg256";
  216. + }
  217. + rtapi_snprintf(board->llio.name, sizeof(board->llio.name), "hm2_4i69.%d", num_4i69);
  218. + num_4i69 ++;
  219. + board->llio.num_ioport_connectors = 3;
  220. + board->llio.ioport_connector_name[0] = "P1";
  221. + board->llio.ioport_connector_name[1] = "P3";
  222. + board->llio.ioport_connector_name[2] = "P4";
  223. + break;
  224. + }
  225. +
  226. case HM2_PCI_SSDEV_3X20_10:
  227. case HM2_PCI_SSDEV_3X20_15:
  228. case HM2_PCI_SSDEV_3X20_20: {
  229. @@ -523,6 +599,18 @@ static int hm2_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) {
  230.  
  231. break;
  232. }
  233. + case HM2_PCI_DEV_MESA5I25: {
  234. +
  235. + // BAR 0 is 64K mem (32 bit)
  236. + board->len = pci_resource_len(dev, 0);
  237. + board->base = ioremap_nocache(pci_resource_start(dev,0), board->len);
  238. + if (board->base == NULL) {
  239. + THIS_ERR("could not map in FPGA address space\n");
  240. + r = -ENODEV;
  241. + goto fail0;
  242. + }
  243. + break;
  244. + }
  245.  
  246. default: {
  247. THIS_ERR("unknown PCI Device ID 0x%04x\n", dev->device);
  248. diff --git a/src/hal/drivers/mesa-hostmot2/hm2_pci.h b/src/hal/drivers/mesa-hostmot2/hm2_pci.h
  249. index d25b5d3..ceb403d 100644
  250. --- a/src/hal/drivers/mesa-hostmot2/hm2_pci.h
  251. +++ b/src/hal/drivers/mesa-hostmot2/hm2_pci.h
  252. @@ -18,12 +18,12 @@
  253. //
  254.  
  255.  
  256. -#define HM2_PCI_VERSION "0.6"
  257. +#define HM2_PCI_VERSION "0.7"
  258.  
  259. #define HM2_LLIO_NAME "hm2_pci"
  260.  
  261.  
  262. -#define HM2_PCI_MAX_BOARDS 8
  263. +#define HM2_PCI_MAX_BOARDS 8
  264.  
  265.  
  266.  
  267. @@ -32,30 +32,37 @@
  268. // PCI Device IDs and SubSystem Device IDs
  269. //
  270.  
  271. +#define HM2_PCI_VENDORID_PLX (0x10B5)
  272. +#define HM2_PCI_VENDORID_MESA (0x2718)
  273. #define HM2_PCI_DEV_PLX9030 (0x9030)
  274. #define HM2_PCI_DEV_PLX9054 (0x9054)
  275. #define HM2_PCI_DEV_PLX9056 (0x9056)
  276. -
  277. +#define HM2_PCI_DEV_MESA5I25 (0x5125)
  278.  
  279. #define HM2_PCI_SSDEV_5I20 (0x3131)
  280. -
  281. #define HM2_PCI_SSDEV_4I65 (0x3132)
  282.  
  283. +#define HM2_PCI_SSDEV_5I21 (0x3312)
  284. +
  285. #define HM2_PCI_SSDEV_5I22_10 (0x3314)
  286. #define HM2_PCI_SSDEV_5I22_15 (0x3313)
  287.  
  288. #define HM2_PCI_SSDEV_5I23 (0x3315)
  289.  
  290. +#define HM2_PCI_SSDEV_5I25 (0x5125)
  291. +
  292. #define HM2_PCI_SSDEV_4I68 (0x3311)
  293. #define HM2_PCI_SSDEV_4I68_OLD (0x3133)
  294.  
  295. +#define HM2_PCI_SSDEV_4I69_16 (0x3472)
  296. +#define HM2_PCI_SSDEV_4I69_25 (0x3473)
  297. +
  298. #define HM2_PCI_SSDEV_3X20_10 (0x3427)
  299. #define HM2_PCI_SSDEV_3X20_15 (0x3428)
  300. #define HM2_PCI_SSDEV_3X20_20 (0x3429)
  301.  
  302.  
  303.  
  304. -
  305. //
  306. // the LAS?BRD registers are in the PLX 9030
  307. //
  308. @@ -94,7 +101,7 @@
  309.  
  310.  
  311. //
  312. -// PLX 9054 (5i22, 5i23, 4i68)
  313. +// PLX 9054 (5i22, 5i23, 4i68, 4i69)
  314. //
  315. // Note: also used for the PLX 9056 (3x20)
  316. //
  317. diff --git a/src/hal/drivers/mesa-hostmot2/hostmot2.c b/src/hal/drivers/mesa-hostmot2/hostmot2.c
  318. index 70f9b3e..0ce35ae 100644
  319. --- a/src/hal/drivers/mesa-hostmot2/hostmot2.c
  320. +++ b/src/hal/drivers/mesa-hostmot2/hostmot2.c
  321. @@ -323,11 +323,7 @@ static void hm2_print_idrom(hostmot2_t *hm2) {
  322.  
  323. HM2_PRINT(" IO Ports: %u\n", hm2->idrom.io_ports);
  324. HM2_PRINT(" IO Width: %u\n", hm2->idrom.io_width);
  325. - if (hm2->idrom.port_width == 24) {
  326. - HM2_PRINT(" Port Width: %u\n", hm2->idrom.port_width);
  327. - } else {
  328. - HM2_PRINT(" Port Width: %u ***** Expected 24! Continuing anyway! *****\n", hm2->idrom.port_width);
  329. - }
  330. + HM2_PRINT(" Port Width: %u\n", hm2->idrom.port_width);
  331.  
  332. HM2_PRINT(
  333. " Clock Low: %d Hz (%d KHz, %d MHz)\n",
  334. @@ -398,11 +394,6 @@ static int hm2_read_idrom(hostmot2_t *hm2) {
  335. // verify the idrom we read
  336. //
  337.  
  338. - if (hm2->idrom.port_width != 24) {
  339. - HM2_ERR("invalid IDROM PortWidth %d, expected 24, aborting load\n", hm2->idrom.port_width);
  340. - hm2_print_idrom(hm2);
  341. - return -EINVAL;
  342. - }
  343.  
  344. if (hm2->idrom.io_width != (hm2->idrom.io_ports * hm2->idrom.port_width)) {
  345. HM2_ERR(
  346. diff --git a/src/hal/drivers/mesa-hostmot2/hostmot2.h b/src/hal/drivers/mesa-hostmot2/hostmot2.h
  347. index cd86353..88f0840 100644
  348. --- a/src/hal/drivers/mesa-hostmot2/hostmot2.h
  349. +++ b/src/hal/drivers/mesa-hostmot2/hostmot2.h
  350. @@ -513,6 +513,19 @@ typedef struct {
  351. }hal_7i64_t;
  352.  
  353. typedef struct {
  354. + struct{
  355. + hal_u32_t *hm2_reg_0_read;
  356. + hal_u32_t *hm2_reg_1_read;
  357. + hal_u32_t *hm2_reg_2_read;
  358. + hal_u32_t *hm2_reg_0_write;
  359. + hal_u32_t *hm2_reg_1_write;
  360. + hal_u32_t *hm2_reg_2_write;
  361. + }pin;
  362. + int card_type;
  363. + hal_u32_t hm2_serialnumber;
  364. +}hal_other_t;
  365. +
  366. +typedef struct {
  367. u32 *reg_cs_read;
  368. u32 *reg_cs_write;
  369. u32 *reg_0_read;
  370. @@ -540,6 +553,10 @@ typedef struct {
  371. unsigned char tag_7i64;
  372. hal_7i64_t *hal_7i64;
  373. hm2_sserial_tram_t *tram_7i64;
  374. + int num_other;
  375. + unsigned char tag_other;
  376. + hal_other_t *hal_other;
  377. + hm2_sserial_tram_t *tram_other;
  378. int num_all;
  379. unsigned char tag_all;
  380.  
  381. @@ -1019,6 +1036,11 @@ int hm2_sserial_config_create(hostmot2_t *hm2);
  382. void hm2_7i64_prepare_tram_write(hostmot2_t *hm2);
  383. void hm2_7i64_process_tram_read(hostmot2_t *hm2);
  384.  
  385. + // Smart-Serial functions in hm2_other_sserial.c
  386. + int hm2_other_create(hostmot2_t *hm2, hm2_module_descriptor_t *md);
  387. + void hm2_other_prepare_tram_write(hostmot2_t *hm2);
  388. + void hm2_other_process_tram_read(hostmot2_t *hm2);
  389. +
  390. //
  391. // stepgen functions
  392. //
  393. diff --git a/src/hal/drivers/mesa-hostmot2/pins.c b/src/hal/drivers/mesa-hostmot2/pins.c
  394. index 4e512f7..2dfe899 100644
  395. --- a/src/hal/drivers/mesa-hostmot2/pins.c
  396. +++ b/src/hal/drivers/mesa-hostmot2/pins.c
  397. @@ -242,8 +242,8 @@ void hm2_set_pin_source(hostmot2_t *hm2, int pin_number, int source) {
  398. int ioport_number;
  399. int bit_number;
  400.  
  401. - ioport_number = pin_number / 24;
  402. - bit_number = pin_number % 24;
  403. + ioport_number = pin_number / hm2->idrom.port_width;
  404. + bit_number = pin_number % hm2->idrom.port_width;
  405.  
  406. if ((pin_number < 0) || (ioport_number >= hm2->ioport.num_instances)) {
  407. HM2_ERR("hm2_set_pin_source: invalid pin number %d\n", pin_number);
  408. @@ -269,8 +269,8 @@ void hm2_set_pin_direction(hostmot2_t *hm2, int pin_number, int direction) {
  409. int ioport_number;
  410. int bit_number;
  411.  
  412. - ioport_number = pin_number / 24;
  413. - bit_number = pin_number % 24;
  414. + ioport_number = pin_number / hm2->idrom.port_width;
  415. + bit_number = pin_number % hm2->idrom.port_width;
  416.  
  417. if ((pin_number < 0) || (ioport_number >= hm2->ioport.num_instances)) {
  418. HM2_ERR("hm2_set_pin_direction: invalid pin number %d\n", pin_number);
  419. @@ -290,12 +290,30 @@ void hm2_set_pin_direction(hostmot2_t *hm2, int pin_number, int direction) {
  420.  
  421. void hm2_print_pin_usage(hostmot2_t *hm2) {
  422. int i;
  423. -
  424. + int port_pin;
  425. + int port;
  426. HM2_PRINT("%d I/O Pins used:\n", hm2->num_pins);
  427.  
  428. for (i = 0; i < hm2->num_pins; i ++) {
  429. - int port = i / hm2->idrom.port_width;
  430. - int port_pin = ((i % 24) * 2) + 1;
  431. + port_pin = i+1;
  432. + port = i / hm2->idrom.port_width;
  433. + if (hm2->idrom.port_width == 24) /* standard 50 pin 24 I/O cards, just the odd pins */
  434. + port_pin = ((i % hm2->idrom.port_width) * 2) + 1;
  435. + else if (hm2->idrom.port_width == 17) { /* 25 pin 17 I/O parallel port type cards funny DB25 order */
  436. + int mio = i % hm2->idrom.port_width;
  437. + if (mio > 7)
  438. + port_pin = mio-3;
  439. + else {
  440. + if (mio & 1)
  441. + port_pin = (mio/2)+14;
  442. + else
  443. + port_pin = (mio/2)+1;
  444. + }
  445. + }
  446. + else if (hm2->idrom.port_width == 32) /* 5I21 punt on this for now */
  447. + port_pin = i+1;
  448. + else
  449. + HM2_ERR("hm2_print_pin_usage: invalid port width %d\n", hm2->idrom.port_width);
  450.  
  451. if (hm2->pin[i].gtag == hm2->pin[i].sec_tag) {
  452. if(hm2->pin[i].sec_unit & 0x80)
  453. --
  454. 1.7.0.4
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