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- From 141eeb5046d0d145234e35c66619e6c48e6e3f8a Mon Sep 17 00:00:00 2001
- From: Peter C. Wallace <pcw@mesanet.com>
- Date: Tue, 16 Aug 2011 20:04:44 +0100
- Subject: [PATCH] Add support for Mesa 5i25 FPGA card.
- Signed-off-by: Peter C. Wallace <pcw@mesanet.com>
- ---
- src/hal/drivers/mesa-hostmot2/hm2_pci.c | 128 +++++++++++++++++++++++++-----
- src/hal/drivers/mesa-hostmot2/hm2_pci.h | 19 +++--
- src/hal/drivers/mesa-hostmot2/hostmot2.c | 11 +---
- src/hal/drivers/mesa-hostmot2/hostmot2.h | 22 +++++
- src/hal/drivers/mesa-hostmot2/pins.c | 32 ++++++--
- 5 files changed, 169 insertions(+), 43 deletions(-)
- diff --git a/src/hal/drivers/mesa-hostmot2/hm2_pci.c b/src/hal/drivers/mesa-hostmot2/hm2_pci.c
- index 1a4f046..1b2888a 100644
- --- a/src/hal/drivers/mesa-hostmot2/hm2_pci.c
- +++ b/src/hal/drivers/mesa-hostmot2/hm2_pci.c
- @@ -50,10 +50,13 @@ static int comp_id;
- static hm2_pci_t hm2_pci_board[HM2_PCI_MAX_BOARDS];
- static int num_boards = 0;
- static int num_5i20 = 0;
- +static int num_5i21 = 0;
- static int num_5i22 = 0;
- static int num_5i23 = 0;
- +static int num_5i25 = 0;
- static int num_4i65 = 0;
- static int num_4i68 = 0;
- +static int num_4i69 = 0;
- static int num_3x20 = 0;
- static int failed_errno=0; // errno of last failed registration
- @@ -62,81 +65,113 @@ static struct pci_device_id hm2_pci_tbl[] = {
- // 5i20
- {
- - .vendor = 0x10b5,
- + .vendor = HM2_PCI_VENDORID_PLX,
- .device = HM2_PCI_DEV_PLX9030,
- - .subvendor = 0x10b5,
- + .subvendor = HM2_PCI_VENDORID_PLX,
- .subdevice = HM2_PCI_SSDEV_5I20,
- },
- +
- + // 5i21
- + {
- + .vendor = HM2_PCI_VENDORID_PLX,
- + .device = HM2_PCI_DEV_PLX9054,
- + .subvendor = HM2_PCI_VENDORID_PLX,
- + .subdevice = HM2_PCI_SSDEV_5I21,
- + },
- // 4i65
- {
- - .vendor = 0x10b5,
- + .vendor = HM2_PCI_VENDORID_PLX,
- .device = HM2_PCI_DEV_PLX9030,
- - .subvendor = 0x10b5,
- + .subvendor = HM2_PCI_VENDORID_PLX,
- .subdevice = HM2_PCI_SSDEV_4I65,
- },
- // 5i22-1.0M
- {
- - .vendor = 0x10b5,
- + .vendor = HM2_PCI_VENDORID_PLX,
- .device = HM2_PCI_DEV_PLX9054,
- - .subvendor = 0x10b5,
- + .subvendor = HM2_PCI_VENDORID_PLX,
- .subdevice = HM2_PCI_SSDEV_5I22_10,
- },
- // 5i22-1.5M
- {
- - .vendor = 0x10b5,
- + .vendor = HM2_PCI_VENDORID_PLX,
- .device = HM2_PCI_DEV_PLX9054,
- - .subvendor = 0x10b5,
- + .subvendor = HM2_PCI_VENDORID_PLX,
- .subdevice = HM2_PCI_SSDEV_5I22_15,
- },
- // 5i23
- {
- - .vendor = 0x10b5,
- + .vendor = HM2_PCI_VENDORID_PLX,
- .device = HM2_PCI_DEV_PLX9054,
- - .subvendor = 0x10b5,
- + .subvendor = HM2_PCI_VENDORID_PLX,
- .subdevice = HM2_PCI_SSDEV_5I23,
- },
- + // 5i25
- + {
- + .vendor = HM2_PCI_VENDORID_MESA,
- + .device = HM2_PCI_DEV_MESA5I25,
- + .subvendor = HM2_PCI_VENDORID_MESA,
- + .subdevice = HM2_PCI_SSDEV_5I25,
- + },
- +
- // 4i68 (old SSID)
- {
- - .vendor = 0x10b5,
- + .vendor = HM2_PCI_VENDORID_PLX,
- .device = HM2_PCI_DEV_PLX9054,
- - .subvendor = 0x10b5,
- + .subvendor = HM2_PCI_VENDORID_PLX,
- .subdevice = HM2_PCI_SSDEV_4I68_OLD,
- },
- // 4i68 (new SSID)
- {
- - .vendor = 0x10b5,
- + .vendor = HM2_PCI_VENDORID_PLX,
- .device = HM2_PCI_DEV_PLX9054,
- - .subvendor = 0x10b5,
- + .subvendor = HM2_PCI_VENDORID_PLX,
- .subdevice = HM2_PCI_SSDEV_4I68,
- },
- + // 4i69-16
- + {
- + .vendor = HM2_PCI_VENDORID_PLX,
- + .device = HM2_PCI_DEV_PLX9054,
- + .subvendor = HM2_PCI_VENDORID_PLX,
- + .subdevice = HM2_PCI_SSDEV_4I69_16,
- + },
- +
- + // 4i69-25
- + {
- + .vendor = HM2_PCI_VENDORID_PLX,
- + .device = HM2_PCI_DEV_PLX9054,
- + .subvendor = HM2_PCI_VENDORID_PLX,
- + .subdevice = HM2_PCI_SSDEV_4I69_25,
- + },
- +
- // 3X20-1.0M
- {
- - .vendor = 0x10b5,
- + .vendor = HM2_PCI_VENDORID_PLX,
- .device = HM2_PCI_DEV_PLX9056,
- - .subvendor = 0x10b5,
- + .subvendor = HM2_PCI_VENDORID_PLX,
- .subdevice = HM2_PCI_SSDEV_3X20_10,
- },
- // 3X20-1.5M
- {
- - .vendor = 0x10b5,
- + .vendor = HM2_PCI_VENDORID_PLX,
- .device = HM2_PCI_DEV_PLX9056,
- - .subvendor = 0x10b5,
- + .subvendor = HM2_PCI_VENDORID_PLX,
- .subdevice = HM2_PCI_SSDEV_3X20_15,
- },
- // 3X20-2.0M
- {
- - .vendor = 0x10b5,
- + .vendor = HM2_PCI_VENDORID_PLX,
- .device = HM2_PCI_DEV_PLX9056,
- - .subvendor = 0x10b5,
- + .subvendor = HM2_PCI_VENDORID_PLX,
- .subdevice = HM2_PCI_SSDEV_3X20_20,
- },
- @@ -387,6 +422,17 @@ static int hm2_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) {
- break;
- }
- + case HM2_PCI_SSDEV_5I21: {
- + LL_PRINT("discovered 5i21 at %s\n", pci_name(dev));
- + rtapi_snprintf(board->llio.name, sizeof(board->llio.name), "hm2_5i21.%d", num_5i21);
- + num_5i21 ++;
- + board->llio.num_ioport_connectors = 2;
- + board->llio.ioport_connector_name[0] = "P1";
- + board->llio.ioport_connector_name[1] = "P1";
- + board->llio.fpga_part_number = "3s400pq208";
- + break;
- + }
- +
- case HM2_PCI_SSDEV_4I65: {
- LL_PRINT("discovered 4i65 at %s\n", pci_name(dev));
- rtapi_snprintf(board->llio.name, sizeof(board->llio.name), "hm2_4i65.%d", num_4i65);
- @@ -430,6 +476,17 @@ static int hm2_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) {
- break;
- }
- + case HM2_PCI_SSDEV_5I25: {
- + LL_PRINT("discovered 5i25 at %s\n", pci_name(dev));
- + rtapi_snprintf(board->llio.name, sizeof(board->llio.name), "hm2_5i25.%d", num_5i25);
- + num_5i25 ++;
- + board->llio.num_ioport_connectors = 2;
- + board->llio.ioport_connector_name[0] = "P3";
- + board->llio.ioport_connector_name[1] = "P2";
- + board->llio.fpga_part_number = "6slx9pq144";
- + break;
- + }
- +
- case HM2_PCI_SSDEV_4I68:
- case HM2_PCI_SSDEV_4I68_OLD: {
- if (dev->subsystem_device == HM2_PCI_SSDEV_4I68_OLD) {
- @@ -447,6 +504,25 @@ static int hm2_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) {
- break;
- }
- + case HM2_PCI_SSDEV_4I69_16:
- + case HM2_PCI_SSDEV_4I69_25: {
- + if (dev->subsystem_device == HM2_PCI_SSDEV_4I69_16) {
- + LL_PRINT("discovered 4I69-16 at %s\n", pci_name(dev));
- + board->llio.fpga_part_number = "6slx16fg256";
- +
- + } else {
- + LL_PRINT("discovered 4I69-25 at %s\n", pci_name(dev));
- + board->llio.fpga_part_number = "6slx25fg256";
- + }
- + rtapi_snprintf(board->llio.name, sizeof(board->llio.name), "hm2_4i69.%d", num_4i69);
- + num_4i69 ++;
- + board->llio.num_ioport_connectors = 3;
- + board->llio.ioport_connector_name[0] = "P1";
- + board->llio.ioport_connector_name[1] = "P3";
- + board->llio.ioport_connector_name[2] = "P4";
- + break;
- + }
- +
- case HM2_PCI_SSDEV_3X20_10:
- case HM2_PCI_SSDEV_3X20_15:
- case HM2_PCI_SSDEV_3X20_20: {
- @@ -523,6 +599,18 @@ static int hm2_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) {
- break;
- }
- + case HM2_PCI_DEV_MESA5I25: {
- +
- + // BAR 0 is 64K mem (32 bit)
- + board->len = pci_resource_len(dev, 0);
- + board->base = ioremap_nocache(pci_resource_start(dev,0), board->len);
- + if (board->base == NULL) {
- + THIS_ERR("could not map in FPGA address space\n");
- + r = -ENODEV;
- + goto fail0;
- + }
- + break;
- + }
- default: {
- THIS_ERR("unknown PCI Device ID 0x%04x\n", dev->device);
- diff --git a/src/hal/drivers/mesa-hostmot2/hm2_pci.h b/src/hal/drivers/mesa-hostmot2/hm2_pci.h
- index d25b5d3..ceb403d 100644
- --- a/src/hal/drivers/mesa-hostmot2/hm2_pci.h
- +++ b/src/hal/drivers/mesa-hostmot2/hm2_pci.h
- @@ -18,12 +18,12 @@
- //
- -#define HM2_PCI_VERSION "0.6"
- +#define HM2_PCI_VERSION "0.7"
- #define HM2_LLIO_NAME "hm2_pci"
- -#define HM2_PCI_MAX_BOARDS 8
- +#define HM2_PCI_MAX_BOARDS 8
- @@ -32,30 +32,37 @@
- // PCI Device IDs and SubSystem Device IDs
- //
- +#define HM2_PCI_VENDORID_PLX (0x10B5)
- +#define HM2_PCI_VENDORID_MESA (0x2718)
- #define HM2_PCI_DEV_PLX9030 (0x9030)
- #define HM2_PCI_DEV_PLX9054 (0x9054)
- #define HM2_PCI_DEV_PLX9056 (0x9056)
- -
- +#define HM2_PCI_DEV_MESA5I25 (0x5125)
- #define HM2_PCI_SSDEV_5I20 (0x3131)
- -
- #define HM2_PCI_SSDEV_4I65 (0x3132)
- +#define HM2_PCI_SSDEV_5I21 (0x3312)
- +
- #define HM2_PCI_SSDEV_5I22_10 (0x3314)
- #define HM2_PCI_SSDEV_5I22_15 (0x3313)
- #define HM2_PCI_SSDEV_5I23 (0x3315)
- +#define HM2_PCI_SSDEV_5I25 (0x5125)
- +
- #define HM2_PCI_SSDEV_4I68 (0x3311)
- #define HM2_PCI_SSDEV_4I68_OLD (0x3133)
- +#define HM2_PCI_SSDEV_4I69_16 (0x3472)
- +#define HM2_PCI_SSDEV_4I69_25 (0x3473)
- +
- #define HM2_PCI_SSDEV_3X20_10 (0x3427)
- #define HM2_PCI_SSDEV_3X20_15 (0x3428)
- #define HM2_PCI_SSDEV_3X20_20 (0x3429)
- -
- //
- // the LAS?BRD registers are in the PLX 9030
- //
- @@ -94,7 +101,7 @@
- //
- -// PLX 9054 (5i22, 5i23, 4i68)
- +// PLX 9054 (5i22, 5i23, 4i68, 4i69)
- //
- // Note: also used for the PLX 9056 (3x20)
- //
- diff --git a/src/hal/drivers/mesa-hostmot2/hostmot2.c b/src/hal/drivers/mesa-hostmot2/hostmot2.c
- index 70f9b3e..0ce35ae 100644
- --- a/src/hal/drivers/mesa-hostmot2/hostmot2.c
- +++ b/src/hal/drivers/mesa-hostmot2/hostmot2.c
- @@ -323,11 +323,7 @@ static void hm2_print_idrom(hostmot2_t *hm2) {
- HM2_PRINT(" IO Ports: %u\n", hm2->idrom.io_ports);
- HM2_PRINT(" IO Width: %u\n", hm2->idrom.io_width);
- - if (hm2->idrom.port_width == 24) {
- - HM2_PRINT(" Port Width: %u\n", hm2->idrom.port_width);
- - } else {
- - HM2_PRINT(" Port Width: %u ***** Expected 24! Continuing anyway! *****\n", hm2->idrom.port_width);
- - }
- + HM2_PRINT(" Port Width: %u\n", hm2->idrom.port_width);
- HM2_PRINT(
- " Clock Low: %d Hz (%d KHz, %d MHz)\n",
- @@ -398,11 +394,6 @@ static int hm2_read_idrom(hostmot2_t *hm2) {
- // verify the idrom we read
- //
- - if (hm2->idrom.port_width != 24) {
- - HM2_ERR("invalid IDROM PortWidth %d, expected 24, aborting load\n", hm2->idrom.port_width);
- - hm2_print_idrom(hm2);
- - return -EINVAL;
- - }
- if (hm2->idrom.io_width != (hm2->idrom.io_ports * hm2->idrom.port_width)) {
- HM2_ERR(
- diff --git a/src/hal/drivers/mesa-hostmot2/hostmot2.h b/src/hal/drivers/mesa-hostmot2/hostmot2.h
- index cd86353..88f0840 100644
- --- a/src/hal/drivers/mesa-hostmot2/hostmot2.h
- +++ b/src/hal/drivers/mesa-hostmot2/hostmot2.h
- @@ -513,6 +513,19 @@ typedef struct {
- }hal_7i64_t;
- typedef struct {
- + struct{
- + hal_u32_t *hm2_reg_0_read;
- + hal_u32_t *hm2_reg_1_read;
- + hal_u32_t *hm2_reg_2_read;
- + hal_u32_t *hm2_reg_0_write;
- + hal_u32_t *hm2_reg_1_write;
- + hal_u32_t *hm2_reg_2_write;
- + }pin;
- + int card_type;
- + hal_u32_t hm2_serialnumber;
- +}hal_other_t;
- +
- +typedef struct {
- u32 *reg_cs_read;
- u32 *reg_cs_write;
- u32 *reg_0_read;
- @@ -540,6 +553,10 @@ typedef struct {
- unsigned char tag_7i64;
- hal_7i64_t *hal_7i64;
- hm2_sserial_tram_t *tram_7i64;
- + int num_other;
- + unsigned char tag_other;
- + hal_other_t *hal_other;
- + hm2_sserial_tram_t *tram_other;
- int num_all;
- unsigned char tag_all;
- @@ -1019,6 +1036,11 @@ int hm2_sserial_config_create(hostmot2_t *hm2);
- void hm2_7i64_prepare_tram_write(hostmot2_t *hm2);
- void hm2_7i64_process_tram_read(hostmot2_t *hm2);
- + // Smart-Serial functions in hm2_other_sserial.c
- + int hm2_other_create(hostmot2_t *hm2, hm2_module_descriptor_t *md);
- + void hm2_other_prepare_tram_write(hostmot2_t *hm2);
- + void hm2_other_process_tram_read(hostmot2_t *hm2);
- +
- //
- // stepgen functions
- //
- diff --git a/src/hal/drivers/mesa-hostmot2/pins.c b/src/hal/drivers/mesa-hostmot2/pins.c
- index 4e512f7..2dfe899 100644
- --- a/src/hal/drivers/mesa-hostmot2/pins.c
- +++ b/src/hal/drivers/mesa-hostmot2/pins.c
- @@ -242,8 +242,8 @@ void hm2_set_pin_source(hostmot2_t *hm2, int pin_number, int source) {
- int ioport_number;
- int bit_number;
- - ioport_number = pin_number / 24;
- - bit_number = pin_number % 24;
- + ioport_number = pin_number / hm2->idrom.port_width;
- + bit_number = pin_number % hm2->idrom.port_width;
- if ((pin_number < 0) || (ioport_number >= hm2->ioport.num_instances)) {
- HM2_ERR("hm2_set_pin_source: invalid pin number %d\n", pin_number);
- @@ -269,8 +269,8 @@ void hm2_set_pin_direction(hostmot2_t *hm2, int pin_number, int direction) {
- int ioport_number;
- int bit_number;
- - ioport_number = pin_number / 24;
- - bit_number = pin_number % 24;
- + ioport_number = pin_number / hm2->idrom.port_width;
- + bit_number = pin_number % hm2->idrom.port_width;
- if ((pin_number < 0) || (ioport_number >= hm2->ioport.num_instances)) {
- HM2_ERR("hm2_set_pin_direction: invalid pin number %d\n", pin_number);
- @@ -290,12 +290,30 @@ void hm2_set_pin_direction(hostmot2_t *hm2, int pin_number, int direction) {
- void hm2_print_pin_usage(hostmot2_t *hm2) {
- int i;
- -
- + int port_pin;
- + int port;
- HM2_PRINT("%d I/O Pins used:\n", hm2->num_pins);
- for (i = 0; i < hm2->num_pins; i ++) {
- - int port = i / hm2->idrom.port_width;
- - int port_pin = ((i % 24) * 2) + 1;
- + port_pin = i+1;
- + port = i / hm2->idrom.port_width;
- + if (hm2->idrom.port_width == 24) /* standard 50 pin 24 I/O cards, just the odd pins */
- + port_pin = ((i % hm2->idrom.port_width) * 2) + 1;
- + else if (hm2->idrom.port_width == 17) { /* 25 pin 17 I/O parallel port type cards funny DB25 order */
- + int mio = i % hm2->idrom.port_width;
- + if (mio > 7)
- + port_pin = mio-3;
- + else {
- + if (mio & 1)
- + port_pin = (mio/2)+14;
- + else
- + port_pin = (mio/2)+1;
- + }
- + }
- + else if (hm2->idrom.port_width == 32) /* 5I21 punt on this for now */
- + port_pin = i+1;
- + else
- + HM2_ERR("hm2_print_pin_usage: invalid port width %d\n", hm2->idrom.port_width);
- if (hm2->pin[i].gtag == hm2->pin[i].sec_tag) {
- if(hm2->pin[i].sec_unit & 0x80)
- --
- 1.7.0.4
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