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  1. /*
  2.  * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
  3.  *
  4.  * This program is free software; you can redistribute it and/or modify
  5.  * it under the terms of the GNU General Public License version 2 and
  6.  * only version 2 as published by the Free Software Foundation.
  7.  *
  8.  * This program is distributed in the hope that it will be useful,
  9.  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10.  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11.  * GNU General Public License for more details.
  12.  */
  13.  
  14. #include <linux/module.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/of.h>
  17. #include <mach/rpm-regulator-smd.h>
  18. #include <mach/msm_bus_board.h>
  19. #include <mach/msm_bus.h>
  20. #include <mach/socinfo.h>
  21. #include <mach/board_lge.h>
  22.  
  23. #include "acpuclock.h"
  24. #include "acpuclock-krait.h"
  25.  
  26. /* Corner type vreg VDD values */
  27. #define LVL_NONE    RPM_REGULATOR_CORNER_NONE
  28. #define LVL_LOW     RPM_REGULATOR_CORNER_SVS_SOC
  29. #define LVL_NOM     RPM_REGULATOR_CORNER_NORMAL
  30. #define LVL_HIGH    RPM_REGULATOR_CORNER_SUPER_TURBO
  31.  
  32. static struct hfpll_data hfpll_data __initdata = {
  33.     .mode_offset = 0x00,
  34.     .l_offset = 0x04,
  35.     .m_offset = 0x08,
  36.     .n_offset = 0x0C,
  37.     .has_user_reg = true,
  38.     .user_offset = 0x10,
  39.     .config_offset = 0x14,
  40.     .user_val = 0x8,
  41.     .user_vco_mask = BIT(20),
  42.     .config_val = 0x04D0405D,
  43.     .has_lock_status = true,
  44.     .status_offset = 0x1C,
  45.     .low_vco_l_max = 65,
  46.     .low_vdd_l_max = 52,
  47.     .nom_vdd_l_max = 104,
  48.     .vdd[HFPLL_VDD_NONE] = LVL_NONE,
  49.     .vdd[HFPLL_VDD_LOW]  = LVL_LOW,
  50.     .vdd[HFPLL_VDD_NOM]  = LVL_NOM,
  51.     .vdd[HFPLL_VDD_HIGH] = LVL_HIGH,
  52. };
  53.  
  54. static struct scalable scalable[] __initdata = {
  55.     [CPU0] = {
  56.         .hfpll_phys_base = 0xF908A000,
  57.         .l2cpmr_iaddr = 0x4501,
  58.         .sec_clk_sel = 2,
  59.         .vreg[VREG_CORE] = { "krait0",     1100000 },
  60.         .vreg[VREG_MEM]  = { "krait0_mem", 1050000 },
  61.         .vreg[VREG_DIG]  = { "krait0_dig", LVL_HIGH },
  62.         .vreg[VREG_HFPLL_A] = { "krait0_hfpll", 1800000 },
  63.     },
  64.     [CPU1] = {
  65.         .hfpll_phys_base = 0xF909A000,
  66.         .l2cpmr_iaddr = 0x5501,
  67.         .sec_clk_sel = 2,
  68.         .vreg[VREG_CORE] = { "krait1",     1100000 },
  69.         .vreg[VREG_MEM]  = { "krait1_mem", 1050000 },
  70.         .vreg[VREG_DIG]  = { "krait1_dig", LVL_HIGH },
  71.         .vreg[VREG_HFPLL_A] = { "krait1_hfpll", 1800000 },
  72.     },
  73.     [CPU2] = {
  74.         .hfpll_phys_base = 0xF90AA000,
  75.         .l2cpmr_iaddr = 0x6501,
  76.         .sec_clk_sel = 2,
  77.         .vreg[VREG_CORE] = { "krait2",     1100000 },
  78.         .vreg[VREG_MEM]  = { "krait2_mem", 1050000 },
  79.         .vreg[VREG_DIG]  = { "krait2_dig", LVL_HIGH },
  80.         .vreg[VREG_HFPLL_A] = { "krait2_hfpll", 1800000 },
  81.     },
  82.     [CPU3] = {
  83.         .hfpll_phys_base = 0xF90BA000,
  84.         .l2cpmr_iaddr = 0x7501,
  85.         .sec_clk_sel = 2,
  86.         .vreg[VREG_CORE] = { "krait3",     1100000 },
  87.         .vreg[VREG_MEM]  = { "krait3_mem", 1050000 },
  88.         .vreg[VREG_DIG]  = { "krait3_dig", LVL_HIGH },
  89.         .vreg[VREG_HFPLL_A] = { "krait3_hfpll", 1800000 },
  90.     },
  91.     [L2] = {
  92.         .hfpll_phys_base = 0xF9016000,
  93.         .l2cpmr_iaddr = 0x0500,
  94.         .sec_clk_sel = 2,
  95.         .vreg[VREG_HFPLL_A] = { "l2_hfpll", 1800000 },
  96.     },
  97. };
  98.  
  99. static struct msm_bus_paths bw_level_tbl_v1[] __initdata = {
  100.     [0] =  BW_MBPS(600), /* At least  75 MHz on bus. */
  101.     [1] =  BW_MBPS(800), /* At least 100 MHz on bus. */
  102.     [2] = BW_MBPS(1200), /* At least 150 MHz on bus. */
  103.     [3] = BW_MBPS(1600), /* At least 200 MHz on bus. */
  104.     [4] = BW_MBPS(2224), /* At least 278 MHz on bus. */
  105.     [5] = BW_MBPS(3200), /* At least 400 MHz on bus. */
  106.     [6] = BW_MBPS(4448), /* At least 556 MHz on bus. */
  107.     [7] = BW_MBPS(6400), /* At least 800 MHz on bus. */
  108. };
  109.  
  110. static struct l2_level l2_freq_tbl_v1[] __initdata = {
  111.     [0]  = { {  300000, PLL_0, 0,   0 }, LVL_LOW,   950000, 0 },
  112.     [1]  = { {  345600, HFPLL, 2,  36 }, LVL_NOM,   950000, 1 },
  113.     [2]  = { {  422400, HFPLL, 2,  44 }, LVL_NOM,   950000, 1 },
  114.     [3]  = { {  499200, HFPLL, 2,  52 }, LVL_NOM,   950000, 2 },
  115.     [4]  = { {  576000, HFPLL, 1,  30 }, LVL_NOM,   950000, 3 },
  116.     [5]  = { {  652800, HFPLL, 1,  34 }, LVL_NOM,   950000, 3 },
  117.     [6]  = { {  729600, HFPLL, 1,  38 }, LVL_NOM,   950000, 3 },
  118.     [7]  = { {  806400, HFPLL, 1,  42 }, LVL_HIGH, 1050000, 4 },
  119.     [8]  = { {  883200, HFPLL, 1,  46 }, LVL_HIGH, 1050000, 4 },
  120.     [9]  = { {  960000, HFPLL, 1,  50 }, LVL_HIGH, 1050000, 4 },
  121.     [10] = { { 1036800, HFPLL, 1,  54 }, LVL_HIGH, 1050000, 5 },
  122.     [11] = { { 1113600, HFPLL, 1,  58 }, LVL_HIGH, 1050000, 5 },
  123.     [12] = { { 1190400, HFPLL, 1,  62 }, LVL_HIGH, 1050000, 6 },
  124.     [13] = { { 1267200, HFPLL, 1,  66 }, LVL_HIGH, 1050000, 6 },
  125.     [14] = { { 1344000, HFPLL, 1,  70 }, LVL_HIGH, 1050000, 7 },
  126.     [15] = { { 1420800, HFPLL, 1,  74 }, LVL_HIGH, 1050000, 7 },
  127.     [16] = { { 1497600, HFPLL, 1,  78 }, LVL_HIGH, 1050000, 7 },
  128.     { }
  129. };
  130.  
  131. /* LGE_CHANGE_S support factory process without battery */
  132. #ifdef CONFIG_MACH_MSM8974_VU3_KR
  133. #include "lge/acpuclock-vu3-factory.h"
  134. #else
  135. static struct acpu_level acpu_freq_tbl_v1_pvs0_lge_factory[] __initdata = {
  136.     { 1, {  300000, PLL_0, 0,   0 }, L2(0),   825000,  73 },
  137.     { 0, {  345600, HFPLL, 2,  36 }, L2(3),   825000,  85 },
  138.     { 1, {  422400, HFPLL, 2,  44 }, L2(3),   825000, 104 },
  139.     { 0, {  499200, HFPLL, 2,  52 }, L2(6),   825000, 124 },
  140.     { 1, {  576000, HFPLL, 1,  30 }, L2(6),   825000, 144 },
  141.     { 1, {  652800, HFPLL, 1,  34 }, L2(7),   825000, 165 },
  142.     { 1, {  729600, HFPLL, 1,  38 }, L2(7),   825000, 186 },
  143.     { 0, {  806400, HFPLL, 1,  42 }, L2(10),  835000, 208 },
  144.     { 1, {  883200, HFPLL, 1,  46 }, L2(10),  845000, 229 },
  145.     { 0, {  960000, HFPLL, 1,  50 }, L2(10),  860000, 252 },
  146.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  880000, 275 },
  147.     { 0, { 1113600, HFPLL, 1,  58 }, L2(12),  905000, 298 },
  148.     { 1, { 1190400, HFPLL, 1,  62 }, L2(12),  920000, 321 },
  149.     { 0, { 1267200, HFPLL, 1,  66 }, L2(12),  940000, 346 },
  150.     { 0, { 1344000, HFPLL, 1,  70 }, L2(12),  960000, 371 },
  151.     { 0, { 1420800, HFPLL, 1,  74 }, L2(16),  980000, 397 },
  152.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  995000, 423 },
  153.     { 0, { 1574400, HFPLL, 1,  82 }, L2(16), 1015000, 450 },
  154.     { 0, { 1651200, HFPLL, 1,  86 }, L2(16), 1030000, 477 },
  155.     { 0, { 1728000, HFPLL, 1,  90 }, L2(16), 1050000, 506 },
  156.     { 0, { 0 } }
  157. };
  158.  
  159. static struct acpu_level acpu_freq_tbl_v1_pvs1_lge_factory[] __initdata = {
  160.     { 1, {  300000, PLL_0, 0,   0 }, L2(0),   825000,  73 },
  161.     { 0, {  345600, HFPLL, 2,  36 }, L2(3),   825000,  85 },
  162.     { 1, {  422400, HFPLL, 2,  44 }, L2(3),   825000, 104 },
  163.     { 0, {  499200, HFPLL, 2,  52 }, L2(6),   825000, 124 },
  164.     { 1, {  576000, HFPLL, 1,  30 }, L2(6),   825000, 144 },
  165.     { 1, {  652800, HFPLL, 1,  34 }, L2(7),   825000, 165 },
  166.     { 1, {  729600, HFPLL, 1,  38 }, L2(7),   825000, 186 },
  167.     { 0, {  806400, HFPLL, 1,  42 }, L2(10),  835000, 208 },
  168.     { 1, {  883200, HFPLL, 1,  46 }, L2(10),  845000, 229 },
  169.     { 0, {  960000, HFPLL, 1,  50 }, L2(10),  860000, 252 },
  170.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  880000, 275 },
  171.     { 0, { 1113600, HFPLL, 1,  58 }, L2(12),  905000, 298 },
  172.     { 1, { 1190400, HFPLL, 1,  62 }, L2(12),  920000, 321 },
  173.     { 0, { 1267200, HFPLL, 1,  66 }, L2(12),  940000, 346 },
  174.     { 0, { 1344000, HFPLL, 1,  70 }, L2(12),  960000, 371 },
  175.     { 0, { 1420800, HFPLL, 1,  74 }, L2(16),  980000, 397 },
  176.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  995000, 423 },
  177.     { 0, { 1574400, HFPLL, 1,  82 }, L2(16), 1015000, 450 },
  178.     { 0, { 1651200, HFPLL, 1,  86 }, L2(16), 1030000, 477 },
  179.     { 0, { 1728000, HFPLL, 1,  90 }, L2(16), 1050000, 506 },
  180.     { 0, { 0 } }
  181. };
  182.  
  183. static struct acpu_level acpu_freq_tbl_v1_pvs2_lge_factory[] __initdata = {
  184.     { 1, {  300000, PLL_0, 0,   0 }, L2(0),   825000,  73 },
  185.     { 0, {  345600, HFPLL, 2,  36 }, L2(3),   825000,  85 },
  186.     { 1, {  422400, HFPLL, 2,  44 }, L2(3),   825000, 104 },
  187.     { 0, {  499200, HFPLL, 2,  52 }, L2(6),   825000, 124 },
  188.     { 1, {  576000, HFPLL, 1,  30 }, L2(6),   825000, 144 },
  189.     { 1, {  652800, HFPLL, 1,  34 }, L2(7),   825000, 165 },
  190.     { 1, {  729600, HFPLL, 1,  38 }, L2(7),   825000, 186 },
  191.     { 0, {  806400, HFPLL, 1,  42 }, L2(10),  825000, 208 },
  192.     { 1, {  883200, HFPLL, 1,  46 }, L2(10),  825000, 229 },
  193.     { 0, {  960000, HFPLL, 1,  50 }, L2(10),  835000, 252 },
  194.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  855000, 275 },
  195.     { 0, { 1113600, HFPLL, 1,  58 }, L2(12),  875000, 298 },
  196.     { 1, { 1190400, HFPLL, 1,  62 }, L2(12),  895000, 321 },
  197.     { 0, { 1267200, HFPLL, 1,  66 }, L2(12),  915000, 346 },
  198.     { 0, { 1344000, HFPLL, 1,  70 }, L2(12),  930000, 371 },
  199.     { 0, { 1420800, HFPLL, 1,  74 }, L2(16),  945000, 397 },
  200.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  960000, 423 },
  201.     { 0, { 1574400, HFPLL, 1,  82 }, L2(16),  975000, 450 },
  202.     { 0, { 1651200, HFPLL, 1,  86 }, L2(16),  990000, 477 },
  203.     { 0, { 1728000, HFPLL, 1,  90 }, L2(16), 1000000, 506 },
  204.     { 0, { 0 } }
  205. };
  206.  
  207. static struct acpu_level acpu_freq_tbl_v1_pvs3_lge_factory[] __initdata = {
  208.     { 1, {  300000, PLL_0, 0,   0 }, L2(0),   825000,  73 },
  209.     { 0, {  345600, HFPLL, 2,  36 }, L2(3),   825000,  85 },
  210.     { 1, {  422400, HFPLL, 2,  44 }, L2(3),   825000, 104 },
  211.     { 0, {  499200, HFPLL, 2,  52 }, L2(6),   825000, 124 },
  212.     { 1, {  576000, HFPLL, 1,  30 }, L2(6),   825000, 144 },
  213.     { 1, {  652800, HFPLL, 1,  34 }, L2(7),   825000, 165 },
  214.     { 1, {  729600, HFPLL, 1,  38 }, L2(7),   825000, 186 },
  215.     { 0, {  806400, HFPLL, 1,  42 }, L2(10),  825000, 208 },
  216.     { 1, {  883200, HFPLL, 1,  46 }, L2(10),  825000, 229 },
  217.     { 0, {  960000, HFPLL, 1,  50 }, L2(10),  835000, 252 },
  218.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  855000, 275 },
  219.     { 0, { 1113600, HFPLL, 1,  58 }, L2(12),  875000, 298 },
  220.     { 1, { 1190400, HFPLL, 1,  62 }, L2(12),  895000, 321 },
  221.     { 0, { 1267200, HFPLL, 1,  66 }, L2(12),  915000, 346 },
  222.     { 0, { 1344000, HFPLL, 1,  70 }, L2(12),  930000, 371 },
  223.     { 0, { 1420800, HFPLL, 1,  74 }, L2(16),  945000, 397 },
  224.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  960000, 423 },
  225.     { 0, { 1574400, HFPLL, 1,  82 }, L2(16),  975000, 450 },
  226.     { 0, { 1651200, HFPLL, 1,  86 }, L2(16),  990000, 477 },
  227.     { 0, { 1728000, HFPLL, 1,  90 }, L2(16), 1000000, 506 },
  228.     { 0, { 0 } }
  229. };
  230.  
  231. static struct acpu_level acpu_freq_tbl_v1_pvs4_lge_factory[] __initdata = {
  232.     { 1, {  300000, PLL_0, 0,   0 }, L2(0),  825000,  73 },
  233.     { 0, {  345600, HFPLL, 2,  36 }, L2(3),  825000,  85 },
  234.     { 1, {  422400, HFPLL, 2,  44 }, L2(3),  825000, 104 },
  235.     { 0, {  499200, HFPLL, 2,  52 }, L2(6),  825000, 124 },
  236.     { 1, {  576000, HFPLL, 1,  30 }, L2(6),  825000, 144 },
  237.     { 1, {  652800, HFPLL, 1,  34 }, L2(7),  825000, 165 },
  238.     { 1, {  729600, HFPLL, 1,  38 }, L2(7),  825000, 186 },
  239.     { 0, {  806400, HFPLL, 1,  42 }, L2(10), 825000, 208 },
  240.     { 1, {  883200, HFPLL, 1,  46 }, L2(10), 825000, 229 },
  241.     { 0, {  960000, HFPLL, 1,  50 }, L2(10), 825000, 252 },
  242.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10), 825000, 275 },
  243.     { 0, { 1113600, HFPLL, 1,  58 }, L2(12), 835000, 298 },
  244.     { 1, { 1190400, HFPLL, 1,  62 }, L2(12), 855000, 321 },
  245.     { 0, { 1267200, HFPLL, 1,  66 }, L2(12), 870000, 346 },
  246.     { 0, { 1344000, HFPLL, 1,  70 }, L2(12), 885000, 371 },
  247.     { 0, { 1420800, HFPLL, 1,  74 }, L2(16), 900000, 397 },
  248.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16), 910000, 423 },
  249.     { 0, { 1574400, HFPLL, 1,  82 }, L2(16), 925000, 450 },
  250.     { 0, { 1651200, HFPLL, 1,  86 }, L2(16), 940000, 477 },
  251.     { 0, { 1728000, HFPLL, 1,  90 }, L2(16), 950000, 506 },
  252.     { 0, { 0 } }
  253. };
  254.  
  255. static struct acpu_level acpu_freq_tbl_2g_pvs0_lge_factory[] __initdata = {
  256.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  815000,  73 },
  257.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  825000,  85 },
  258.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  835000, 104 },
  259.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  845000, 124 },
  260.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  855000, 144 },
  261.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  865000, 165 },
  262.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  875000, 186 },
  263.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  890000, 208 },
  264.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  900000, 229 },
  265.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  915000, 252 },
  266.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  925000, 275 },
  267.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  940000, 298 },
  268.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  950000, 321 },
  269.     { 0, { 1267200, HFPLL, 1,  66 }, L2(13),  965000, 346 },
  270.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  980000, 371 },
  271.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  995000, 397 },
  272.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16), 1010000, 423 },
  273.     { 0, { 1574400, HFPLL, 1,  82 }, L2(17), 1025000, 450 },
  274.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17), 1040000, 477 },
  275.     { 0, { 1728000, HFPLL, 1,  90 }, L2(18), 1055000, 506 },
  276.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18), 1070000, 536 },
  277.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18), 1085000, 567 },
  278.     { 0, { 1958400, HFPLL, 1, 102 }, L2(19), 1100000, 598 },
  279.     { 0, { 0 } }
  280. };
  281.  
  282. static struct acpu_level acpu_freq_tbl_2g_pvs1_lge_factory[] __initdata = {
  283.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  800000,  73 },
  284.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  810000,  85 },
  285.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  820000, 104 },
  286.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  830000, 124 },
  287.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  840000, 144 },
  288.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  850000, 165 },
  289.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  860000, 186 },
  290.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  875000, 208 },
  291.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  885000, 229 },
  292.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  895000, 252 },
  293.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  910000, 275 },
  294.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  920000, 298 },
  295.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  930000, 321 },
  296.     { 0, { 1267200, HFPLL, 1,  66 }, L2(13),  945000, 346 },
  297.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  960000, 371 },
  298.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  975000, 397 },
  299.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  990000, 423 },
  300.     { 0, { 1574400, HFPLL, 1,  82 }, L2(17), 1005000, 450 },
  301.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17), 1020000, 477 },
  302.     { 0, { 1728000, HFPLL, 1,  90 }, L2(18), 1030000, 506 },
  303.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18), 1045000, 536 },
  304.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18), 1060000, 567 },
  305.     { 0, { 1958400, HFPLL, 1, 102 }, L2(19), 1075000, 598 },
  306.     { 0, { 0 } }
  307. };
  308.  
  309. static struct acpu_level acpu_freq_tbl_2g_pvs2_lge_factory[] __initdata = {
  310.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  785000,  73 },
  311.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  795000,  85 },
  312.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  805000, 104 },
  313.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  815000, 124 },
  314.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  825000, 144 },
  315.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  835000, 165 },
  316.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  845000, 186 },
  317.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  855000, 208 },
  318.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  865000, 229 },
  319.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  875000, 252 },
  320.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  890000, 275 },
  321.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  900000, 298 },
  322.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  910000, 321 },
  323.     { 0, { 1267200, HFPLL, 1,  66 }, L2(13),  925000, 346 },
  324.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  940000, 371 },
  325.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  955000, 397 },
  326.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  970000, 423 },
  327.     { 0, { 1574400, HFPLL, 1,  82 }, L2(17),  980000, 450 },
  328.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  995000, 477 },
  329.     { 0, { 1728000, HFPLL, 1,  90 }, L2(18), 1005000, 506 },
  330.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18), 1020000, 536 },
  331.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18), 1035000, 567 },
  332.     { 0, { 1958400, HFPLL, 1, 102 }, L2(19), 1050000, 598 },
  333.     { 0, { 0 } }
  334. };
  335.  
  336. static struct acpu_level acpu_freq_tbl_2g_pvs3_lge_factory[] __initdata = {
  337.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  775000,  73 },
  338.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  780000,  85 },
  339.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  790000, 104 },
  340.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  800000, 124 },
  341.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  810000, 144 },
  342.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  820000, 165 },
  343.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  830000, 186 },
  344.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  840000, 208 },
  345.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  850000, 229 },
  346.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  860000, 252 },
  347.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  875000, 275 },
  348.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  885000, 298 },
  349.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  895000, 321 },
  350.     { 0, { 1267200, HFPLL, 1,  66 }, L2(13),  910000, 346 },
  351.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  925000, 371 },
  352.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  935000, 397 },
  353.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  950000, 423 },
  354.     { 0, { 1574400, HFPLL, 1,  82 }, L2(17),  960000, 450 },
  355.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  970000, 477 },
  356.     { 0, { 1728000, HFPLL, 1,  90 }, L2(18),  985000, 506 },
  357.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  995000, 536 },
  358.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18), 1010000, 567 },
  359.     { 0, { 1958400, HFPLL, 1, 102 }, L2(19), 1025000, 598 },
  360.     { 0, { 0 } }
  361. };
  362.  
  363. static struct acpu_level acpu_freq_tbl_2g_pvs4_lge_factory[] __initdata = {
  364.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  775000,  73 },
  365.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  775000,  85 },
  366.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  780000, 104 },
  367.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  790000, 124 },
  368.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  800000, 144 },
  369.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  810000, 165 },
  370.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  820000, 186 },
  371.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  830000, 208 },
  372.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  840000, 229 },
  373.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  850000, 252 },
  374.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  860000, 275 },
  375.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  870000, 298 },
  376.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  880000, 321 },
  377.     { 0, { 1267200, HFPLL, 1,  66 }, L2(13),  895000, 346 },
  378.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  910000, 371 },
  379.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  920000, 397 },
  380.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  930000, 423 },
  381.     { 0, { 1574400, HFPLL, 1,  82 }, L2(17),  940000, 450 },
  382.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  950000, 477 },
  383.     { 0, { 1728000, HFPLL, 1,  90 }, L2(18),  960000, 506 },
  384.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  975000, 536 },
  385.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18),  985000, 567 },
  386.     { 0, { 1958400, HFPLL, 1, 102 }, L2(19), 1000000, 598 },
  387.     { 0, { 0 } }
  388. };
  389.  
  390. static struct acpu_level acpu_freq_tbl_2g_pvs5_lge_factory[] __initdata = {
  391.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  750000,  73 },
  392.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  760000,  85 },
  393.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  770000, 104 },
  394.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  780000, 124 },
  395.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  790000, 144 },
  396.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  800000, 165 },
  397.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  810000, 186 },
  398.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  820000, 208 },
  399.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  830000, 229 },
  400.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  840000, 252 },
  401.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  850000, 275 },
  402.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  860000, 298 },
  403.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  870000, 321 },
  404.     { 0, { 1267200, HFPLL, 1,  66 }, L2(13),  880000, 346 },
  405.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  890000, 371 },
  406.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  900000, 397 },
  407.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  910000, 423 },
  408.     { 0, { 1574400, HFPLL, 1,  82 }, L2(17),  920000, 450 },
  409.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  930000, 477 },
  410.     { 0, { 1728000, HFPLL, 1,  90 }, L2(18),  940000, 506 },
  411.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  955000, 536 },
  412.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18),  965000, 567 },
  413.     { 0, { 1958400, HFPLL, 1, 102 }, L2(19),  975000, 598 },
  414.     { 0, { 0 } }
  415. };
  416.  
  417. static struct acpu_level acpu_freq_tbl_2g_pvs6_lge_factory[] __initdata = {
  418.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  750000,  73 },
  419.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  750000,  85 },
  420.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  760000, 104 },
  421.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  770000, 124 },
  422.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  780000, 144 },
  423.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  790000, 165 },
  424.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  800000, 186 },
  425.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  810000, 208 },
  426.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  820000, 229 },
  427.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  830000, 252 },
  428.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  840000, 275 },
  429.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  850000, 298 },
  430.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  860000, 321 },
  431.     { 0, { 1267200, HFPLL, 1,  66 }, L2(13),  870000, 346 },
  432.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  875000, 371 },
  433.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  885000, 397 },
  434.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  895000, 423 },
  435.     { 0, { 1574400, HFPLL, 1,  82 }, L2(17),  905000, 450 },
  436.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  915000, 477 },
  437.     { 0, { 1728000, HFPLL, 1,  90 }, L2(18),  920000, 506 },
  438.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  930000, 536 },
  439.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18),  940000, 567 },
  440.     { 0, { 1958400, HFPLL, 1, 102 }, L2(19),  950000, 598 },
  441.     { 0, { 0 } }
  442. };
  443.  
  444. static struct acpu_level acpu_freq_tbl_2p2g_pvs0_lge_factory[] __initdata = {
  445.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  800000,  72 },
  446.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  800000,  83 },
  447.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  805000, 102 },
  448.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  815000, 121 },
  449.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  825000, 141 },
  450.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  835000, 161 },
  451.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  845000, 181 },
  452.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  855000, 202 },
  453.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  865000, 223 },
  454.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  875000, 245 },
  455.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  890000, 267 },
  456.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  900000, 289 },
  457.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  915000, 313 },
  458.     { 0, { 1267200, HFPLL, 1,  66 }, L2(13),  925000, 336 },
  459.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  940000, 360 },
  460.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  950000, 383 },
  461.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  965000, 409 },
  462.     { 0, { 1574400, HFPLL, 1,  82 }, L2(17),  980000, 435 },
  463.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  995000, 461 },
  464.     { 0, { 1728000, HFPLL, 1,  90 }, L2(18), 1010000, 488 },
  465.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18), 1025000, 516 },
  466.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18), 1040000, 543 },
  467.     { 0, { 1958400, HFPLL, 1, 102 }, L2(19), 1055000, 573 },
  468.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 1070000, 604 },
  469.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 1085000, 636 },
  470.     { 0, { 2150400, HFPLL, 1, 112 }, L2(19), 1100000, 656 },
  471.     { 0, { 0 } }
  472. };
  473.  
  474. static struct acpu_level acpu_freq_tbl_2p2g_pvs1_lge_factory[] __initdata = {
  475.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  800000,  72 },
  476.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  800000,  83 },
  477.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  800000, 102 },
  478.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  800000, 121 },
  479.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  810000, 141 },
  480.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  820000, 161 },
  481.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  830000, 181 },
  482.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  840000, 202 },
  483.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  850000, 223 },
  484.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  860000, 245 },
  485.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  875000, 267 },
  486.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  885000, 289 },
  487.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  895000, 313 },
  488.     { 0, { 1267200, HFPLL, 1,  66 }, L2(13),  910000, 336 },
  489.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  920000, 360 },
  490.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  930000, 383 },
  491.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  945000, 409 },
  492.     { 0, { 1574400, HFPLL, 1,  82 }, L2(17),  960000, 435 },
  493.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  975000, 461 },
  494.     { 0, { 1728000, HFPLL, 1,  90 }, L2(18),  990000, 488 },
  495.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18), 1005000, 516 },
  496.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18), 1020000, 543 },
  497.     { 0, { 1958400, HFPLL, 1, 102 }, L2(19), 1030000, 573 },
  498.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 1045000, 604 },
  499.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 1060000, 636 },
  500.     { 0, { 2150400, HFPLL, 1, 112 }, L2(19), 1075000, 656 },
  501.     { 0, { 0 } }
  502. };
  503.  
  504. static struct acpu_level acpu_freq_tbl_2p2g_pvs2_lge_factory[] __initdata = {
  505.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  775000,  72 },
  506.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  775000,  83 },
  507.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  775000, 102 },
  508.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  785000, 121 },
  509.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  795000, 141 },
  510.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  805000, 161 },
  511.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  815000, 181 },
  512.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  825000, 202 },
  513.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  835000, 223 },
  514.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  845000, 245 },
  515.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  855000, 267 },
  516.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  865000, 289 },
  517.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  875000, 313 },
  518.     { 0, { 1267200, HFPLL, 1,  66 }, L2(13),  890000, 336 },
  519.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  900000, 360 },
  520.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  910000, 383 },
  521.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  925000, 409 },
  522.     { 0, { 1574400, HFPLL, 1,  82 }, L2(17),  940000, 435 },
  523.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  955000, 461 },
  524.     { 0, { 1728000, HFPLL, 1,  90 }, L2(18),  970000, 488 },
  525.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  980000, 516 },
  526.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18),  995000, 543 },
  527.     { 0, { 1958400, HFPLL, 1, 102 }, L2(19), 1005000, 573 },
  528.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 1020000, 604 },
  529.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 1035000, 636 },
  530.     { 0, { 2150400, HFPLL, 1, 112 }, L2(19), 1050000, 656 },
  531.     { 0, { 0 } }
  532. };
  533.  
  534. static struct acpu_level acpu_freq_tbl_2p2g_pvs3_lge_factory[] __initdata = {
  535.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  775000,  72 },
  536.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  775000,  83 },
  537.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  775000, 102 },
  538.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  775000, 121 },
  539.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  780000, 141 },
  540.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  790000, 161 },
  541.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  800000, 181 },
  542.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  810000, 202 },
  543.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  820000, 223 },
  544.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  830000, 245 },
  545.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  840000, 267 },
  546.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  850000, 289 },
  547.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  860000, 313 },
  548.     { 0, { 1267200, HFPLL, 1,  66 }, L2(13),  875000, 336 },
  549.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  885000, 360 },
  550.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  895000, 383 },
  551.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  910000, 409 },
  552.     { 0, { 1574400, HFPLL, 1,  82 }, L2(17),  925000, 435 },
  553.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  935000, 461 },
  554.     { 0, { 1728000, HFPLL, 1,  90 }, L2(18),  950000, 488 },
  555.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  960000, 516 },
  556.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18),  970000, 543 },
  557.     { 0, { 1958400, HFPLL, 1, 102 }, L2(19),  985000, 573 },
  558.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19),  995000, 604 },
  559.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 1010000, 636 },
  560.     { 0, { 2150400, HFPLL, 1, 112 }, L2(19), 1025000, 656 },
  561.     { 0, { 0 } }
  562. };
  563.  
  564. static struct acpu_level acpu_freq_tbl_2p2g_pvs4_lge_factory[] __initdata = {
  565.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  775000,  72 },
  566.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  775000,  83 },
  567.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  775000, 102 },
  568.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  775000, 121 },
  569.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  775000, 141 },
  570.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  780000, 161 },
  571.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  790000, 181 },
  572.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  800000, 202 },
  573.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  810000, 223 },
  574.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  820000, 245 },
  575.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  830000, 267 },
  576.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  840000, 289 },
  577.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  850000, 313 },
  578.     { 0, { 1267200, HFPLL, 1,  66 }, L2(13),  860000, 336 },
  579.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  870000, 360 },
  580.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  880000, 383 },
  581.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  895000, 409 },
  582.     { 0, { 1574400, HFPLL, 1,  82 }, L2(17),  910000, 435 },
  583.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  920000, 461 },
  584.     { 0, { 1728000, HFPLL, 1,  90 }, L2(18),  930000, 488 },
  585.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  940000, 516 },
  586.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18),  950000, 543 },
  587.     { 0, { 1958400, HFPLL, 1, 102 }, L2(19),  960000, 573 },
  588.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19),  975000, 604 },
  589.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19),  985000, 636 },
  590.     { 0, { 2150400, HFPLL, 1, 112 }, L2(19), 1000000, 656 },
  591.     { 0, { 0 } }
  592. };
  593.  
  594. static struct acpu_level acpu_freq_tbl_2p2g_pvs5_lge_factory[] __initdata = {
  595.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  750000,  72 },
  596.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  750000,  83 },
  597.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  750000, 102 },
  598.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  750000, 121 },
  599.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  760000, 141 },
  600.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  770000, 161 },
  601.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  780000, 181 },
  602.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  790000, 202 },
  603.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  800000, 223 },
  604.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  810000, 245 },
  605.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  820000, 267 },
  606.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  830000, 289 },
  607.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  840000, 313 },
  608.     { 0, { 1267200, HFPLL, 1,  66 }, L2(13),  850000, 336 },
  609.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  860000, 360 },
  610.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  870000, 383 },
  611.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  880000, 409 },
  612.     { 0, { 1574400, HFPLL, 1,  82 }, L2(17),  890000, 435 },
  613.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  900000, 461 },
  614.     { 0, { 1728000, HFPLL, 1,  90 }, L2(18),  910000, 488 },
  615.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  920000, 516 },
  616.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18),  930000, 543 },
  617.     { 0, { 1958400, HFPLL, 1, 102 }, L2(19),  940000, 573 },
  618.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19),  955000, 604 },
  619.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19),  965000, 636 },
  620.     { 0, { 2150400, HFPLL, 1, 112 }, L2(19),  975000, 656 },
  621.     { 0, { 0 } }
  622. };
  623.  
  624. static struct acpu_level acpu_freq_tbl_2p2g_pvs6_lge_factory[] __initdata = {
  625.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  750000,  72 },
  626.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  750000,  83 },
  627.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  750000, 102 },
  628.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  750000, 121 },
  629.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  750000, 141 },
  630.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  760000, 161 },
  631.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  770000, 181 },
  632.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  780000, 202 },
  633.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  790000, 223 },
  634.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  800000, 245 },
  635.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  810000, 267 },
  636.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  820000, 289 },
  637.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  830000, 313 },
  638.     { 0, { 1267200, HFPLL, 1,  66 }, L2(13),  840000, 336 },
  639.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  850000, 360 },
  640.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  860000, 383 },
  641.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  870000, 409 },
  642.     { 0, { 1574400, HFPLL, 1,  82 }, L2(17),  875000, 435 },
  643.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  885000, 461 },
  644.     { 0, { 1728000, HFPLL, 1,  90 }, L2(18),  895000, 488 },
  645.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  905000, 516 },
  646.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18),  915000, 543 },
  647.     { 0, { 1958400, HFPLL, 1, 102 }, L2(19),  920000, 573 },
  648.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19),  930000, 604 },
  649.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19),  940000, 636 },
  650.     { 0, { 2150400, HFPLL, 1, 112 }, L2(19),  950000, 656 },
  651.     { 0, { 0 } }
  652. };
  653.  
  654. static struct acpu_level acpu_freq_tbl_2p3g_pvs0_lge_factory[] __initdata = {
  655.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  800000,  72 },
  656.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  800000,  83 },
  657.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  800000, 101 },
  658.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  805000, 120 },
  659.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  815000, 139 },
  660.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  825000, 159 },
  661.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  835000, 180 },
  662.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  845000, 200 },
  663.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  855000, 221 },
  664.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  865000, 242 },
  665.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  875000, 264 },
  666.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  890000, 287 },
  667.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  900000, 308 },
  668.     { 0, { 1267200, HFPLL, 1,  66 }, L2(13),  915000, 333 },
  669.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  925000, 356 },
  670.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  940000, 380 },
  671.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  950000, 404 },
  672.     { 0, { 1574400, HFPLL, 1,  82 }, L2(17),  965000, 430 },
  673.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  980000, 456 },
  674.     { 0, { 1728000, HFPLL, 1,  90 }, L2(18),  995000, 482 },
  675.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18), 1010000, 510 },
  676.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18), 1025000, 538 },
  677.     { 0, { 1958400, HFPLL, 1, 102 }, L2(19), 1040000, 565 },
  678.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 1055000, 596 },
  679.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 1070000, 627 },
  680.     { 0, { 2188800, HFPLL, 1, 114 }, L2(19), 1085000, 659 },
  681.     { 0, { 2265600, HFPLL, 1, 118 }, L2(19), 1100000, 691 },
  682.     { 0, { 0 } }
  683. };
  684.  
  685. static struct acpu_level acpu_freq_tbl_2p3g_pvs1_lge_factory[] __initdata = {
  686.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  800000,  72 },
  687.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  800000,  83 },
  688.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  800000, 101 },
  689.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  800000, 120 },
  690.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  800000, 139 },
  691.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  810000, 159 },
  692.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  820000, 180 },
  693.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  830000, 200 },
  694.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  840000, 221 },
  695.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  850000, 242 },
  696.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  860000, 264 },
  697.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  875000, 287 },
  698.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  885000, 308 },
  699.     { 0, { 1267200, HFPLL, 1,  66 }, L2(13),  895000, 333 },
  700.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  910000, 356 },
  701.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  920000, 380 },
  702.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  930000, 404 },
  703.     { 0, { 1574400, HFPLL, 1,  82 }, L2(17),  945000, 430 },
  704.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  960000, 456 },
  705.     { 0, { 1728000, HFPLL, 1,  90 }, L2(18),  975000, 482 },
  706.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  990000, 510 },
  707.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18), 1005000, 538 },
  708.     { 0, { 1958400, HFPLL, 1, 102 }, L2(19), 1020000, 565 },
  709.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 1030000, 596 },
  710.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 1045000, 627 },
  711.     { 0, { 2188800, HFPLL, 1, 114 }, L2(19), 1060000, 659 },
  712.     { 0, { 2265600, HFPLL, 1, 118 }, L2(19), 1075000, 691 },
  713.     { 0, { 0 } }
  714. };
  715.  
  716. static struct acpu_level acpu_freq_tbl_2p3g_pvs2_lge_factory[] __initdata = {
  717.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  775000,  72 },
  718.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  775000,  83 },
  719.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  775000, 101 },
  720.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  775000, 120 },
  721.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  785000, 139 },
  722.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  795000, 159 },
  723.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  805000, 180 },
  724.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  815000, 200 },
  725.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  825000, 221 },
  726.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  835000, 242 },
  727.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  845000, 264 },
  728.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  855000, 287 },
  729.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  865000, 308 },
  730.     { 0, { 1267200, HFPLL, 1,  66 }, L2(13),  875000, 333 },
  731.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  890000, 356 },
  732.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  900000, 380 },
  733.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  910000, 404 },
  734.     { 0, { 1574400, HFPLL, 1,  82 }, L2(17),  925000, 430 },
  735.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  940000, 456 },
  736.     { 0, { 1728000, HFPLL, 1,  90 }, L2(18),  955000, 482 },
  737.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  970000, 510 },
  738.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18),  980000, 538 },
  739.     { 0, { 1958400, HFPLL, 1, 102 }, L2(19),  995000, 565 },
  740.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 1005000, 596 },
  741.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 1020000, 627 },
  742.     { 0, { 2188800, HFPLL, 1, 114 }, L2(19), 1035000, 659 },
  743.     { 0, { 2265600, HFPLL, 1, 118 }, L2(19), 1050000, 691 },
  744.     { 0, { 0 } }
  745. };
  746.  
  747. static struct acpu_level acpu_freq_tbl_2p3g_pvs3_lge_factory[] __initdata = {
  748.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  775000,  72 },
  749.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  775000,  83 },
  750.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  775000, 101 },
  751.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  775000, 120 },
  752.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  775000, 139 },
  753.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  780000, 159 },
  754.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  790000, 180 },
  755.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  800000, 200 },
  756.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  810000, 221 },
  757.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  820000, 242 },
  758.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  830000, 264 },
  759.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  840000, 287 },
  760.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  850000, 308 },
  761.     { 0, { 1267200, HFPLL, 1,  66 }, L2(13),  860000, 333 },
  762.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  875000, 356 },
  763.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  885000, 380 },
  764.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  895000, 404 },
  765.     { 0, { 1574400, HFPLL, 1,  82 }, L2(17),  910000, 430 },
  766.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  925000, 456 },
  767.     { 0, { 1728000, HFPLL, 1,  90 }, L2(18),  935000, 482 },
  768.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  950000, 510 },
  769.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18),  960000, 538 },
  770.     { 0, { 1958400, HFPLL, 1, 102 }, L2(19),  970000, 565 },
  771.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19),  985000, 596 },
  772.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19),  995000, 627 },
  773.     { 0, { 2188800, HFPLL, 1, 114 }, L2(19), 1010000, 659 },
  774.     { 0, { 2265600, HFPLL, 1, 118 }, L2(19), 1025000, 691 },
  775.     { 0, { 0 } }
  776. };
  777.  
  778. static struct acpu_level acpu_freq_tbl_2p3g_pvs4_lge_factory[] __initdata = {
  779.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  775000,  72 },
  780.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  775000,  83 },
  781.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  775000, 101 },
  782.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  775000, 120 },
  783.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  775000, 139 },
  784.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  775000, 159 },
  785.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  780000, 180 },
  786.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  790000, 200 },
  787.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  800000, 221 },
  788.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  810000, 242 },
  789.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  820000, 264 },
  790.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  830000, 287 },
  791.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  840000, 308 },
  792.     { 0, { 1267200, HFPLL, 1,  66 }, L2(13),  850000, 333 },
  793.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  860000, 356 },
  794.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  870000, 380 },
  795.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  880000, 404 },
  796.     { 0, { 1574400, HFPLL, 1,  82 }, L2(17),  895000, 430 },
  797.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  910000, 456 },
  798.     { 0, { 1728000, HFPLL, 1,  90 }, L2(18),  920000, 482 },
  799.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  930000, 510 },
  800.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18),  940000, 538 },
  801.     { 0, { 1958400, HFPLL, 1, 102 }, L2(19),  950000, 565 },
  802.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19),  960000, 596 },
  803.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19),  975000, 627 },
  804.     { 0, { 2188800, HFPLL, 1, 114 }, L2(19),  985000, 659 },
  805.     { 0, { 2265600, HFPLL, 1, 118 }, L2(19), 1000000, 691 },
  806.     { 0, { 0 } }
  807. };
  808.  
  809. static struct acpu_level acpu_freq_tbl_2p3g_pvs5_lge_factory[] __initdata = {
  810.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  750000,  72 },
  811.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  750000,  83 },
  812.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  750000, 101 },
  813.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  750000, 120 },
  814.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  750000, 139 },
  815.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  760000, 159 },
  816.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  770000, 180 },
  817.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  780000, 200 },
  818.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  790000, 221 },
  819.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  800000, 242 },
  820.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  810000, 264 },
  821.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  820000, 287 },
  822.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  830000, 308 },
  823.     { 0, { 1267200, HFPLL, 1,  66 }, L2(13),  840000, 333 },
  824.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  850000, 356 },
  825.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  860000, 380 },
  826.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  870000, 404 },
  827.     { 0, { 1574400, HFPLL, 1,  82 }, L2(17),  880000, 430 },
  828.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  890000, 456 },
  829.     { 0, { 1728000, HFPLL, 1,  90 }, L2(18),  900000, 482 },
  830.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  910000, 510 },
  831.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18),  920000, 538 },
  832.     { 0, { 1958400, HFPLL, 1, 102 }, L2(19),  930000, 565 },
  833.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19),  940000, 596 },
  834.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19),  955000, 627 },
  835.     { 0, { 2188800, HFPLL, 1, 114 }, L2(19),  965000, 659 },
  836.     { 0, { 2265600, HFPLL, 1, 118 }, L2(19),  975000, 691 },
  837.     { 0, { 0 } }
  838. };
  839.  
  840. static struct acpu_level acpu_freq_tbl_2p3g_pvs6_lge_factory[] __initdata = {
  841.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  750000,  72 },
  842.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  750000,  83 },
  843.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  750000, 101 },
  844.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  750000, 120 },
  845.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  750000, 139 },
  846.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  750000, 159 },
  847.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  760000, 180 },
  848.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  770000, 200 },
  849.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  780000, 221 },
  850.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  790000, 242 },
  851.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  800000, 264 },
  852.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  810000, 287 },
  853.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  820000, 308 },
  854.     { 0, { 1267200, HFPLL, 1,  66 }, L2(13),  830000, 333 },
  855.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  840000, 356 },
  856.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  850000, 380 },
  857.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  860000, 404 },
  858.     { 0, { 1574400, HFPLL, 1,  82 }, L2(17),  870000, 430 },
  859.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  875000, 456 },
  860.     { 0, { 1728000, HFPLL, 1,  90 }, L2(18),  885000, 482 },
  861.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  895000, 510 },
  862.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18),  905000, 538 },
  863.     { 0, { 1958400, HFPLL, 1, 102 }, L2(19),  915000, 565 },
  864.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19),  920000, 596 },
  865.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19),  930000, 627 },
  866.     { 0, { 2188800, HFPLL, 1, 114 }, L2(19),  940000, 659 },
  867.     { 0, { 2265600, HFPLL, 1, 118 }, L2(19),  950000, 691 },
  868.     { 0, { 0 } }
  869. };
  870. #endif
  871.  
  872. static struct pvs_table pvs_v1_lge_factory[NUM_SPEED_BINS][NUM_PVS] __initdata = {
  873.     /* 8974v1 1.7GHz Parts */
  874.     [0][0] = { acpu_freq_tbl_v1_pvs0_lge_factory, sizeof(acpu_freq_tbl_v1_pvs0_lge_factory) },
  875.     [0][1] = { acpu_freq_tbl_v1_pvs1_lge_factory, sizeof(acpu_freq_tbl_v1_pvs1_lge_factory) },
  876.     [0][2] = { acpu_freq_tbl_v1_pvs2_lge_factory, sizeof(acpu_freq_tbl_v1_pvs2_lge_factory) },
  877.     [0][3] = { acpu_freq_tbl_v1_pvs3_lge_factory, sizeof(acpu_freq_tbl_v1_pvs3_lge_factory) },
  878.     [0][4] = { acpu_freq_tbl_v1_pvs4_lge_factory, sizeof(acpu_freq_tbl_v1_pvs4_lge_factory) },
  879. };
  880.  
  881. static struct pvs_table pvs_v2_lge_factory[NUM_SPEED_BINS][NUM_PVS] __initdata = {
  882.     /* 8974v2 2.0GHz Parts */
  883.     [0][0] = { acpu_freq_tbl_2g_pvs0_lge_factory, sizeof(acpu_freq_tbl_2g_pvs0_lge_factory) },
  884.     [0][1] = { acpu_freq_tbl_2g_pvs1_lge_factory, sizeof(acpu_freq_tbl_2g_pvs1_lge_factory) },
  885.     [0][2] = { acpu_freq_tbl_2g_pvs2_lge_factory, sizeof(acpu_freq_tbl_2g_pvs2_lge_factory) },
  886.     [0][3] = { acpu_freq_tbl_2g_pvs3_lge_factory, sizeof(acpu_freq_tbl_2g_pvs3_lge_factory) },
  887.     [0][4] = { acpu_freq_tbl_2g_pvs4_lge_factory, sizeof(acpu_freq_tbl_2g_pvs4_lge_factory) },
  888.     [0][5] = { acpu_freq_tbl_2g_pvs5_lge_factory, sizeof(acpu_freq_tbl_2g_pvs5_lge_factory) },
  889.     [0][6] = { acpu_freq_tbl_2g_pvs6_lge_factory, sizeof(acpu_freq_tbl_2g_pvs6_lge_factory) },
  890.     [0][7] = { acpu_freq_tbl_2g_pvs6_lge_factory, sizeof(acpu_freq_tbl_2g_pvs6_lge_factory) },
  891.  
  892.     /* 8974v2 2.3GHz Parts */
  893.     [1][0] = { acpu_freq_tbl_2p3g_pvs0_lge_factory, sizeof(acpu_freq_tbl_2p3g_pvs0_lge_factory) },
  894.     [1][1] = { acpu_freq_tbl_2p3g_pvs1_lge_factory, sizeof(acpu_freq_tbl_2p3g_pvs1_lge_factory) },
  895.     [1][2] = { acpu_freq_tbl_2p3g_pvs2_lge_factory, sizeof(acpu_freq_tbl_2p3g_pvs2_lge_factory) },
  896.     [1][3] = { acpu_freq_tbl_2p3g_pvs3_lge_factory, sizeof(acpu_freq_tbl_2p3g_pvs3_lge_factory) },
  897.     [1][4] = { acpu_freq_tbl_2p3g_pvs4_lge_factory, sizeof(acpu_freq_tbl_2p3g_pvs4_lge_factory) },
  898.     [1][5] = { acpu_freq_tbl_2p3g_pvs5_lge_factory, sizeof(acpu_freq_tbl_2p3g_pvs5_lge_factory) },
  899.     [1][6] = { acpu_freq_tbl_2p3g_pvs6_lge_factory, sizeof(acpu_freq_tbl_2p3g_pvs6_lge_factory) },
  900.     [1][7] = { acpu_freq_tbl_2p3g_pvs6_lge_factory, sizeof(acpu_freq_tbl_2p3g_pvs6_lge_factory) },
  901.  
  902.     /* 8974v2 2.0GHz Parts */
  903.     [2][0] = { acpu_freq_tbl_2p2g_pvs0_lge_factory, sizeof(acpu_freq_tbl_2p2g_pvs0_lge_factory) },
  904.     [2][1] = { acpu_freq_tbl_2p2g_pvs1_lge_factory, sizeof(acpu_freq_tbl_2p2g_pvs1_lge_factory) },
  905.     [2][2] = { acpu_freq_tbl_2p2g_pvs2_lge_factory, sizeof(acpu_freq_tbl_2p2g_pvs2_lge_factory) },
  906.     [2][3] = { acpu_freq_tbl_2p2g_pvs3_lge_factory, sizeof(acpu_freq_tbl_2p2g_pvs3_lge_factory) },
  907.     [2][4] = { acpu_freq_tbl_2p2g_pvs4_lge_factory, sizeof(acpu_freq_tbl_2p2g_pvs4_lge_factory) },
  908.     [2][5] = { acpu_freq_tbl_2p2g_pvs5_lge_factory, sizeof(acpu_freq_tbl_2p2g_pvs5_lge_factory) },
  909.     [2][6] = { acpu_freq_tbl_2p2g_pvs6_lge_factory, sizeof(acpu_freq_tbl_2p2g_pvs6_lge_factory) },
  910.     [2][7] = { acpu_freq_tbl_2p2g_pvs6_lge_factory, sizeof(acpu_freq_tbl_2p2g_pvs6_lge_factory) },
  911.  
  912. };
  913. /* LGE_CHANGE_S support factory process without battery */
  914.  
  915. static struct acpu_level acpu_freq_tbl_v1_pvs0[] __initdata = {
  916.     { 1, {  300000, PLL_0, 0,   0 }, L2(0),   825000,  73 },
  917.     { 0, {  345600, HFPLL, 2,  36 }, L2(3),   825000,  85 },
  918.     { 1, {  422400, HFPLL, 2,  44 }, L2(3),   825000, 104 },
  919.     { 0, {  499200, HFPLL, 2,  52 }, L2(6),   825000, 124 },
  920.     { 1, {  576000, HFPLL, 1,  30 }, L2(6),   825000, 144 },
  921.     { 1, {  652800, HFPLL, 1,  34 }, L2(7),   825000, 165 },
  922.     { 1, {  729600, HFPLL, 1,  38 }, L2(7),   825000, 186 },
  923.     { 0, {  806400, HFPLL, 1,  42 }, L2(10),  835000, 208 },
  924.     { 1, {  883200, HFPLL, 1,  46 }, L2(10),  845000, 229 },
  925.     { 0, {  960000, HFPLL, 1,  50 }, L2(10),  860000, 252 },
  926.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  880000, 275 },
  927.     { 0, { 1113600, HFPLL, 1,  58 }, L2(12),  905000, 298 },
  928.     { 0, { 1190400, HFPLL, 1,  62 }, L2(12),  920000, 321 },
  929.     { 0, { 1267200, HFPLL, 1,  66 }, L2(12),  940000, 346 },
  930.     { 1, { 1344000, HFPLL, 1,  70 }, L2(12),  960000, 371 },
  931.     { 0, { 1420800, HFPLL, 1,  74 }, L2(16),  980000, 397 },
  932.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  995000, 423 },
  933.     { 0, { 1574400, HFPLL, 1,  82 }, L2(16), 1015000, 450 },
  934.     { 0, { 1651200, HFPLL, 1,  86 }, L2(16), 1030000, 477 },
  935.     { 1, { 1728000, HFPLL, 1,  90 }, L2(16), 1050000, 506 },
  936.     { 0, { 0 } }
  937. };
  938.  
  939. static struct acpu_level acpu_freq_tbl_v1_pvs1[] __initdata = {
  940.     { 1, {  300000, PLL_0, 0,   0 }, L2(0),   825000,  73 },
  941.     { 0, {  345600, HFPLL, 2,  36 }, L2(3),   825000,  85 },
  942.     { 1, {  422400, HFPLL, 2,  44 }, L2(3),   825000, 104 },
  943.     { 0, {  499200, HFPLL, 2,  52 }, L2(6),   825000, 124 },
  944.     { 1, {  576000, HFPLL, 1,  30 }, L2(6),   825000, 144 },
  945.     { 1, {  652800, HFPLL, 1,  34 }, L2(7),   825000, 165 },
  946.     { 1, {  729600, HFPLL, 1,  38 }, L2(7),   825000, 186 },
  947.     { 0, {  806400, HFPLL, 1,  42 }, L2(10),  835000, 208 },
  948.     { 1, {  883200, HFPLL, 1,  46 }, L2(10),  845000, 229 },
  949.     { 0, {  960000, HFPLL, 1,  50 }, L2(10),  860000, 252 },
  950.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  880000, 275 },
  951.     { 0, { 1113600, HFPLL, 1,  58 }, L2(12),  905000, 298 },
  952.     { 0, { 1190400, HFPLL, 1,  62 }, L2(12),  920000, 321 },
  953.     { 0, { 1267200, HFPLL, 1,  66 }, L2(12),  940000, 346 },
  954.     { 1, { 1344000, HFPLL, 1,  70 }, L2(12),  960000, 371 },
  955.     { 0, { 1420800, HFPLL, 1,  74 }, L2(16),  980000, 397 },
  956.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  995000, 423 },
  957.     { 0, { 1574400, HFPLL, 1,  82 }, L2(16), 1015000, 450 },
  958.     { 0, { 1651200, HFPLL, 1,  86 }, L2(16), 1030000, 477 },
  959.     { 1, { 1728000, HFPLL, 1,  90 }, L2(16), 1050000, 506 },
  960.     { 0, { 0 } }
  961. };
  962.  
  963. static struct acpu_level acpu_freq_tbl_v1_pvs2[] __initdata = {
  964.     { 1, {  300000, PLL_0, 0,   0 }, L2(0),   825000,  73 },
  965.     { 0, {  345600, HFPLL, 2,  36 }, L2(3),   825000,  85 },
  966.     { 1, {  422400, HFPLL, 2,  44 }, L2(3),   825000, 104 },
  967.     { 0, {  499200, HFPLL, 2,  52 }, L2(6),   825000, 124 },
  968.     { 1, {  576000, HFPLL, 1,  30 }, L2(6),   825000, 144 },
  969.     { 1, {  652800, HFPLL, 1,  34 }, L2(7),   825000, 165 },
  970.     { 1, {  729600, HFPLL, 1,  38 }, L2(7),   825000, 186 },
  971.     { 0, {  806400, HFPLL, 1,  42 }, L2(10),  825000, 208 },
  972.     { 1, {  883200, HFPLL, 1,  46 }, L2(10),  825000, 229 },
  973.     { 0, {  960000, HFPLL, 1,  50 }, L2(10),  835000, 252 },
  974.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  855000, 275 },
  975.     { 0, { 1113600, HFPLL, 1,  58 }, L2(12),  875000, 298 },
  976.     { 0, { 1190400, HFPLL, 1,  62 }, L2(12),  895000, 321 },
  977.     { 0, { 1267200, HFPLL, 1,  66 }, L2(12),  915000, 346 },
  978.     { 1, { 1344000, HFPLL, 1,  70 }, L2(12),  930000, 371 },
  979.     { 0, { 1420800, HFPLL, 1,  74 }, L2(16),  945000, 397 },
  980.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  960000, 423 },
  981.     { 0, { 1574400, HFPLL, 1,  82 }, L2(16),  975000, 450 },
  982.     { 0, { 1651200, HFPLL, 1,  86 }, L2(16),  990000, 477 },
  983.     { 1, { 1728000, HFPLL, 1,  90 }, L2(16), 1000000, 506 },
  984.     { 0, { 0 } }
  985. };
  986.  
  987. static struct acpu_level acpu_freq_tbl_v1_pvs3[] __initdata = {
  988.     { 1, {  300000, PLL_0, 0,   0 }, L2(0),   825000,  73 },
  989.     { 0, {  345600, HFPLL, 2,  36 }, L2(3),   825000,  85 },
  990.     { 1, {  422400, HFPLL, 2,  44 }, L2(3),   825000, 104 },
  991.     { 0, {  499200, HFPLL, 2,  52 }, L2(6),   825000, 124 },
  992.     { 1, {  576000, HFPLL, 1,  30 }, L2(6),   825000, 144 },
  993.     { 1, {  652800, HFPLL, 1,  34 }, L2(7),   825000, 165 },
  994.     { 1, {  729600, HFPLL, 1,  38 }, L2(7),   825000, 186 },
  995.     { 0, {  806400, HFPLL, 1,  42 }, L2(10),  825000, 208 },
  996.     { 1, {  883200, HFPLL, 1,  46 }, L2(10),  825000, 229 },
  997.     { 0, {  960000, HFPLL, 1,  50 }, L2(10),  835000, 252 },
  998.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  855000, 275 },
  999.     { 0, { 1113600, HFPLL, 1,  58 }, L2(12),  875000, 298 },
  1000.     { 0, { 1190400, HFPLL, 1,  62 }, L2(12),  895000, 321 },
  1001.     { 0, { 1267200, HFPLL, 1,  66 }, L2(12),  915000, 346 },
  1002.     { 1, { 1344000, HFPLL, 1,  70 }, L2(12),  930000, 371 },
  1003.     { 0, { 1420800, HFPLL, 1,  74 }, L2(16),  945000, 397 },
  1004.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16),  960000, 423 },
  1005.     { 0, { 1574400, HFPLL, 1,  82 }, L2(16),  975000, 450 },
  1006.     { 0, { 1651200, HFPLL, 1,  86 }, L2(16),  990000, 477 },
  1007.     { 1, { 1728000, HFPLL, 1,  90 }, L2(16), 1000000, 506 },
  1008.     { 0, { 0 } }
  1009. };
  1010.  
  1011. static struct acpu_level acpu_freq_tbl_v1_pvs4[] __initdata = {
  1012.     { 1, {  300000, PLL_0, 0,   0 }, L2(0),  825000,  73 },
  1013.     { 0, {  345600, HFPLL, 2,  36 }, L2(3),  825000,  85 },
  1014.     { 1, {  422400, HFPLL, 2,  44 }, L2(3),  825000, 104 },
  1015.     { 0, {  499200, HFPLL, 2,  52 }, L2(6),  825000, 124 },
  1016.     { 1, {  576000, HFPLL, 1,  30 }, L2(6),  825000, 144 },
  1017.     { 1, {  652800, HFPLL, 1,  34 }, L2(7),  825000, 165 },
  1018.     { 1, {  729600, HFPLL, 1,  38 }, L2(7),  825000, 186 },
  1019.     { 0, {  806400, HFPLL, 1,  42 }, L2(10), 825000, 208 },
  1020.     { 1, {  883200, HFPLL, 1,  46 }, L2(10), 825000, 229 },
  1021.     { 0, {  960000, HFPLL, 1,  50 }, L2(10), 825000, 252 },
  1022.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10), 825000, 275 },
  1023.     { 0, { 1113600, HFPLL, 1,  58 }, L2(12), 835000, 298 },
  1024.     { 0, { 1190400, HFPLL, 1,  62 }, L2(12), 855000, 321 },
  1025.     { 0, { 1267200, HFPLL, 1,  66 }, L2(12), 870000, 346 },
  1026.     { 1, { 1344000, HFPLL, 1,  70 }, L2(12), 885000, 371 },
  1027.     { 0, { 1420800, HFPLL, 1,  74 }, L2(16), 900000, 397 },
  1028.     { 0, { 1497600, HFPLL, 1,  78 }, L2(16), 910000, 423 },
  1029.     { 0, { 1574400, HFPLL, 1,  82 }, L2(16), 925000, 450 },
  1030.     { 0, { 1651200, HFPLL, 1,  86 }, L2(16), 940000, 477 },
  1031.     { 1, { 1728000, HFPLL, 1,  90 }, L2(16), 950000, 506 },
  1032.     { 0, { 0 } }
  1033. };
  1034.  
  1035. static struct msm_bus_paths bw_level_tbl_v2[] __initdata = {
  1036.     [0] =  BW_MBPS(600), /* At least  75 MHz on bus. */
  1037.     [1] =  BW_MBPS(800), /* At least 100 MHz on bus. */
  1038.     [2] = BW_MBPS(1200), /* At least 150 MHz on bus. */
  1039.     [3] = BW_MBPS(1600), /* At least 200 MHz on bus. */
  1040.     [4] = BW_MBPS(2456), /* At least 307 MHz on bus. */
  1041.     [5] = BW_MBPS(3680), /* At least 460 MHz on bus. */
  1042.     [6] = BW_MBPS(4912), /* At least 614 MHz on bus. */
  1043.     [7] = BW_MBPS(6400), /* At least 800 MHz on bus. */
  1044.     [8] = BW_MBPS(7448), /* At least 931 MHz on bus. */
  1045. };
  1046.  
  1047. static struct l2_level l2_freq_tbl_v2[] __initdata = {
  1048.     [0]  = { {  300000, PLL_0, 0,   0 }, LVL_LOW,   950000, 0 },
  1049.     [1]  = { {  345600, HFPLL, 2,  36 }, LVL_LOW,   950000, 1 },
  1050.     [2]  = { {  422400, HFPLL, 2,  44 }, LVL_LOW,   950000, 2 },
  1051.     [3]  = { {  499200, HFPLL, 2,  52 }, LVL_LOW,   950000, 3 },
  1052.     [4]  = { {  576000, HFPLL, 1,  30 }, LVL_LOW,   950000, 4 },
  1053.     [5]  = { {  652800, HFPLL, 1,  34 }, LVL_NOM,   950000, 4 },
  1054.     [6]  = { {  729600, HFPLL, 1,  38 }, LVL_NOM,   950000, 4 },
  1055.     [7]  = { {  806400, HFPLL, 1,  42 }, LVL_NOM,   950000, 4 },
  1056.     [8]  = { {  883200, HFPLL, 1,  46 }, LVL_NOM,   950000, 5 },
  1057.     [9]  = { {  960000, HFPLL, 1,  50 }, LVL_NOM,   950000, 5 },
  1058.     [10] = { { 1036800, HFPLL, 1,  54 }, LVL_NOM,   950000, 6 },
  1059.     [11] = { { 1113600, HFPLL, 1,  58 }, LVL_HIGH, 1050000, 6 },
  1060.     [12] = { { 1190400, HFPLL, 1,  62 }, LVL_HIGH, 1050000, 6 },
  1061.     [13] = { { 1267200, HFPLL, 1,  66 }, LVL_HIGH, 1050000, 7 },
  1062.     [14] = { { 1344000, HFPLL, 1,  70 }, LVL_HIGH, 1050000, 7 },
  1063.     [15] = { { 1420800, HFPLL, 1,  74 }, LVL_HIGH, 1050000, 7 },
  1064.     [16] = { { 1497600, HFPLL, 1,  78 }, LVL_HIGH, 1050000, 7 },
  1065.     [17] = { { 1574400, HFPLL, 1,  82 }, LVL_HIGH, 1050000, 7 },
  1066.     [18] = { { 1651200, HFPLL, 1,  86 }, LVL_HIGH, 1050000, 7 },
  1067.     [19] = { { 1728000, HFPLL, 1,  90 }, LVL_HIGH, 1050000, 8 },
  1068.     { }
  1069. };
  1070.  
  1071. static struct acpu_level acpu_freq_tbl_2g_pvs0[] __initdata = {
  1072.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  815000,  73 },
  1073.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  825000,  85 },
  1074.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  835000, 104 },
  1075.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  845000, 124 },
  1076.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  855000, 144 },
  1077.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  865000, 165 },
  1078.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  875000, 186 },
  1079.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  890000, 208 },
  1080.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  900000, 229 },
  1081.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  915000, 252 },
  1082.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  925000, 275 },
  1083.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  940000, 298 },
  1084.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  950000, 321 },
  1085.     { 1, { 1267200, HFPLL, 1,  66 }, L2(13),  965000, 346 },
  1086.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  980000, 371 },
  1087.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  995000, 397 },
  1088.     { 1, { 1497600, HFPLL, 1,  78 }, L2(16), 1010000, 423 },
  1089.     { 1, { 1574400, HFPLL, 1,  82 }, L2(17), 1025000, 450 },
  1090.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17), 1040000, 477 },
  1091.     { 1, { 1728000, HFPLL, 1,  90 }, L2(18), 1055000, 506 },
  1092.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18), 1070000, 536 },
  1093.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18), 1085000, 567 },
  1094.     { 1, { 1958400, HFPLL, 1, 102 }, L2(19), 1100000, 598 },
  1095.     { 0, { 0 } }
  1096. };
  1097.  
  1098. static struct acpu_level acpu_freq_tbl_2g_pvs1[] __initdata = {
  1099.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  800000,  73 },
  1100.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  810000,  85 },
  1101.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  820000, 104 },
  1102.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  830000, 124 },
  1103.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  840000, 144 },
  1104.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  850000, 165 },
  1105.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  860000, 186 },
  1106.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  875000, 208 },
  1107.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  885000, 229 },
  1108.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  895000, 252 },
  1109.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  910000, 275 },
  1110.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  920000, 298 },
  1111.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  930000, 321 },
  1112.     { 1, { 1267200, HFPLL, 1,  66 }, L2(13),  945000, 346 },
  1113.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  960000, 371 },
  1114.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  975000, 397 },
  1115.     { 1, { 1497600, HFPLL, 1,  78 }, L2(16),  990000, 423 },
  1116.     { 1, { 1574400, HFPLL, 1,  82 }, L2(17), 1005000, 450 },
  1117.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17), 1020000, 477 },
  1118.     { 1, { 1728000, HFPLL, 1,  90 }, L2(18), 1030000, 506 },
  1119.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18), 1045000, 536 },
  1120.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18), 1060000, 567 },
  1121.     { 1, { 1958400, HFPLL, 1, 102 }, L2(19), 1075000, 598 },
  1122.     { 0, { 0 } }
  1123. };
  1124.  
  1125. static struct acpu_level acpu_freq_tbl_2g_pvs2[] __initdata = {
  1126.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  785000,  73 },
  1127.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  795000,  85 },
  1128.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  805000, 104 },
  1129.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  815000, 124 },
  1130.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  825000, 144 },
  1131.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  835000, 165 },
  1132.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  845000, 186 },
  1133.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  855000, 208 },
  1134.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  865000, 229 },
  1135.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  875000, 252 },
  1136.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  890000, 275 },
  1137.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  900000, 298 },
  1138.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  910000, 321 },
  1139.     { 1, { 1267200, HFPLL, 1,  66 }, L2(13),  925000, 346 },
  1140.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  940000, 371 },
  1141.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  955000, 397 },
  1142.     { 1, { 1497600, HFPLL, 1,  78 }, L2(16),  970000, 423 },
  1143.     { 1, { 1574400, HFPLL, 1,  82 }, L2(17),  980000, 450 },
  1144.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  995000, 477 },
  1145.     { 1, { 1728000, HFPLL, 1,  90 }, L2(18), 1005000, 506 },
  1146.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18), 1020000, 536 },
  1147.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18), 1035000, 567 },
  1148.     { 1, { 1958400, HFPLL, 1, 102 }, L2(19), 1050000, 598 },
  1149.     { 0, { 0 } }
  1150. };
  1151.  
  1152. static struct acpu_level acpu_freq_tbl_2g_pvs3[] __initdata = {
  1153.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  775000,  73 },
  1154.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  780000,  85 },
  1155.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  790000, 104 },
  1156.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  800000, 124 },
  1157.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  810000, 144 },
  1158.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  820000, 165 },
  1159.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  830000, 186 },
  1160.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  840000, 208 },
  1161.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  850000, 229 },
  1162.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  860000, 252 },
  1163.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  875000, 275 },
  1164.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  885000, 298 },
  1165.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  895000, 321 },
  1166.     { 1, { 1267200, HFPLL, 1,  66 }, L2(13),  910000, 346 },
  1167.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  925000, 371 },
  1168.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  935000, 397 },
  1169.     { 1, { 1497600, HFPLL, 1,  78 }, L2(16),  950000, 423 },
  1170.     { 1, { 1574400, HFPLL, 1,  82 }, L2(17),  960000, 450 },
  1171.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  970000, 477 },
  1172.     { 1, { 1728000, HFPLL, 1,  90 }, L2(18),  985000, 506 },
  1173.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  995000, 536 },
  1174.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18), 1010000, 567 },
  1175.     { 1, { 1958400, HFPLL, 1, 102 }, L2(19), 1025000, 598 },
  1176.     { 0, { 0 } }
  1177. };
  1178.  
  1179. static struct acpu_level acpu_freq_tbl_2g_pvs4[] __initdata = {
  1180.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  775000,  73 },
  1181.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  775000,  85 },
  1182.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  780000, 104 },
  1183.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  790000, 124 },
  1184.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  800000, 144 },
  1185.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  810000, 165 },
  1186.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  820000, 186 },
  1187.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  830000, 208 },
  1188.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  840000, 229 },
  1189.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  850000, 252 },
  1190.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  860000, 275 },
  1191.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  870000, 298 },
  1192.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  880000, 321 },
  1193.     { 1, { 1267200, HFPLL, 1,  66 }, L2(13),  895000, 346 },
  1194.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  910000, 371 },
  1195.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  920000, 397 },
  1196.     { 1, { 1497600, HFPLL, 1,  78 }, L2(16),  930000, 423 },
  1197.     { 1, { 1574400, HFPLL, 1,  82 }, L2(17),  940000, 450 },
  1198.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  950000, 477 },
  1199.     { 1, { 1728000, HFPLL, 1,  90 }, L2(18),  960000, 506 },
  1200.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  975000, 536 },
  1201.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18),  985000, 567 },
  1202.     { 1, { 1958400, HFPLL, 1, 102 }, L2(19), 1000000, 598 },
  1203.     { 0, { 0 } }
  1204. };
  1205.  
  1206. static struct acpu_level acpu_freq_tbl_2g_pvs5[] __initdata = {
  1207.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  750000,  73 },
  1208.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  760000,  85 },
  1209.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  770000, 104 },
  1210.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  780000, 124 },
  1211.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  790000, 144 },
  1212.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  800000, 165 },
  1213.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  810000, 186 },
  1214.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  820000, 208 },
  1215.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  830000, 229 },
  1216.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  840000, 252 },
  1217.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  850000, 275 },
  1218.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  860000, 298 },
  1219.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  870000, 321 },
  1220.     { 1, { 1267200, HFPLL, 1,  66 }, L2(13),  880000, 346 },
  1221.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  890000, 371 },
  1222.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  900000, 397 },
  1223.     { 1, { 1497600, HFPLL, 1,  78 }, L2(16),  910000, 423 },
  1224.     { 1, { 1574400, HFPLL, 1,  82 }, L2(17),  920000, 450 },
  1225.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  930000, 477 },
  1226.     { 1, { 1728000, HFPLL, 1,  90 }, L2(18),  940000, 506 },
  1227.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  955000, 536 },
  1228.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18),  965000, 567 },
  1229.     { 1, { 1958400, HFPLL, 1, 102 }, L2(19),  975000, 598 },
  1230.     { 0, { 0 } }
  1231. };
  1232.  
  1233. static struct acpu_level acpu_freq_tbl_2g_pvs6[] __initdata = {
  1234.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  750000,  73 },
  1235.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  750000,  85 },
  1236.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  760000, 104 },
  1237.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  770000, 124 },
  1238.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  780000, 144 },
  1239.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  790000, 165 },
  1240.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  800000, 186 },
  1241.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  810000, 208 },
  1242.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  820000, 229 },
  1243.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  830000, 252 },
  1244.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  840000, 275 },
  1245.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  850000, 298 },
  1246.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  860000, 321 },
  1247.     { 1, { 1267200, HFPLL, 1,  66 }, L2(13),  870000, 346 },
  1248.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  875000, 371 },
  1249.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  885000, 397 },
  1250.     { 1, { 1497600, HFPLL, 1,  78 }, L2(16),  895000, 423 },
  1251.     { 1, { 1574400, HFPLL, 1,  82 }, L2(17),  905000, 450 },
  1252.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  915000, 477 },
  1253.     { 1, { 1728000, HFPLL, 1,  90 }, L2(18),  920000, 506 },
  1254.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  930000, 536 },
  1255.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18),  940000, 567 },
  1256.     { 1, { 1958400, HFPLL, 1, 102 }, L2(19),  950000, 598 },
  1257.     { 0, { 0 } }
  1258. };
  1259.  
  1260. static struct acpu_level acpu_freq_tbl_2p2g_pvs0[] __initdata = {
  1261.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  800000,  72 },
  1262.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  800000,  83 },
  1263.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  805000, 102 },
  1264.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  815000, 121 },
  1265.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  825000, 141 },
  1266.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  835000, 161 },
  1267.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  845000, 181 },
  1268.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  855000, 202 },
  1269.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  865000, 223 },
  1270.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  875000, 245 },
  1271.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  890000, 267 },
  1272.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  900000, 289 },
  1273.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  915000, 313 },
  1274.     { 1, { 1267200, HFPLL, 1,  66 }, L2(13),  925000, 336 },
  1275.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  940000, 360 },
  1276.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  950000, 383 },
  1277.     { 1, { 1497600, HFPLL, 1,  78 }, L2(16),  965000, 409 },
  1278.     { 1, { 1574400, HFPLL, 1,  82 }, L2(17),  980000, 435 },
  1279.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  995000, 461 },
  1280.     { 1, { 1728000, HFPLL, 1,  90 }, L2(18), 1010000, 488 },
  1281.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18), 1025000, 516 },
  1282.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18), 1040000, 543 },
  1283.     { 1, { 1958400, HFPLL, 1, 102 }, L2(19), 1055000, 573 },
  1284.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 1070000, 604 },
  1285.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 1085000, 636 },
  1286.     { 1, { 2150400, HFPLL, 1, 112 }, L2(19), 1100000, 656 },
  1287.     { 0, { 0 } }
  1288. };
  1289.  
  1290. static struct acpu_level acpu_freq_tbl_2p2g_pvs1[] __initdata = {
  1291.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  800000,  72 },
  1292.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  800000,  83 },
  1293.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  800000, 102 },
  1294.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  800000, 121 },
  1295.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  810000, 141 },
  1296.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  820000, 161 },
  1297.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  830000, 181 },
  1298.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  840000, 202 },
  1299.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  850000, 223 },
  1300.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  860000, 245 },
  1301.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  875000, 267 },
  1302.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  885000, 289 },
  1303.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  895000, 313 },
  1304.     { 1, { 1267200, HFPLL, 1,  66 }, L2(13),  910000, 336 },
  1305.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  920000, 360 },
  1306.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  930000, 383 },
  1307.     { 1, { 1497600, HFPLL, 1,  78 }, L2(16),  945000, 409 },
  1308.     { 1, { 1574400, HFPLL, 1,  82 }, L2(17),  960000, 435 },
  1309.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  975000, 461 },
  1310.     { 1, { 1728000, HFPLL, 1,  90 }, L2(18),  990000, 488 },
  1311.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18), 1005000, 516 },
  1312.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18), 1020000, 543 },
  1313.     { 1, { 1958400, HFPLL, 1, 102 }, L2(19), 1030000, 573 },
  1314.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 1045000, 604 },
  1315.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 1060000, 636 },
  1316.     { 1, { 2150400, HFPLL, 1, 112 }, L2(19), 1075000, 656 },
  1317.     { 0, { 0 } }
  1318. };
  1319.  
  1320. static struct acpu_level acpu_freq_tbl_2p2g_pvs2[] __initdata = {
  1321.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  775000,  72 },
  1322.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  775000,  83 },
  1323.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  775000, 102 },
  1324.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  785000, 121 },
  1325.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  795000, 141 },
  1326.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  805000, 161 },
  1327.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  815000, 181 },
  1328.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  825000, 202 },
  1329.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  835000, 223 },
  1330.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  845000, 245 },
  1331.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  855000, 267 },
  1332.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  865000, 289 },
  1333.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  875000, 313 },
  1334.     { 1, { 1267200, HFPLL, 1,  66 }, L2(13),  890000, 336 },
  1335.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  900000, 360 },
  1336.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  910000, 383 },
  1337.     { 1, { 1497600, HFPLL, 1,  78 }, L2(16),  925000, 409 },
  1338.     { 1, { 1574400, HFPLL, 1,  82 }, L2(17),  940000, 435 },
  1339.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  955000, 461 },
  1340.     { 1, { 1728000, HFPLL, 1,  90 }, L2(18),  970000, 488 },
  1341.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  980000, 516 },
  1342.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18),  995000, 543 },
  1343.     { 1, { 1958400, HFPLL, 1, 102 }, L2(19), 1005000, 573 },
  1344.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 1020000, 604 },
  1345.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 1035000, 636 },
  1346.     { 1, { 2150400, HFPLL, 1, 112 }, L2(19), 1050000, 656 },
  1347.     { 0, { 0 } }
  1348. };
  1349.  
  1350. static struct acpu_level acpu_freq_tbl_2p2g_pvs3[] __initdata = {
  1351.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  775000,  72 },
  1352.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  775000,  83 },
  1353.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  775000, 102 },
  1354.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  775000, 121 },
  1355.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  780000, 141 },
  1356.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  790000, 161 },
  1357.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  800000, 181 },
  1358.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  810000, 202 },
  1359.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  820000, 223 },
  1360.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  830000, 245 },
  1361.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  840000, 267 },
  1362.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  850000, 289 },
  1363.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  860000, 313 },
  1364.     { 1, { 1267200, HFPLL, 1,  66 }, L2(13),  875000, 336 },
  1365.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  885000, 360 },
  1366.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  895000, 383 },
  1367.     { 1, { 1497600, HFPLL, 1,  78 }, L2(16),  910000, 409 },
  1368.     { 1, { 1574400, HFPLL, 1,  82 }, L2(17),  925000, 435 },
  1369.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  935000, 461 },
  1370.     { 1, { 1728000, HFPLL, 1,  90 }, L2(18),  950000, 488 },
  1371.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  960000, 516 },
  1372.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18),  970000, 543 },
  1373.     { 1, { 1958400, HFPLL, 1, 102 }, L2(19),  985000, 573 },
  1374.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19),  995000, 604 },
  1375.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 1010000, 636 },
  1376.     { 1, { 2150400, HFPLL, 1, 112 }, L2(19), 1025000, 656 },
  1377.     { 0, { 0 } }
  1378. };
  1379.  
  1380. static struct acpu_level acpu_freq_tbl_2p2g_pvs4[] __initdata = {
  1381.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  775000,  72 },
  1382.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  775000,  83 },
  1383.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  775000, 102 },
  1384.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  775000, 121 },
  1385.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  775000, 141 },
  1386.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  780000, 161 },
  1387.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  790000, 181 },
  1388.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  800000, 202 },
  1389.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  810000, 223 },
  1390.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  820000, 245 },
  1391.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  830000, 267 },
  1392.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  840000, 289 },
  1393.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  850000, 313 },
  1394.     { 1, { 1267200, HFPLL, 1,  66 }, L2(13),  860000, 336 },
  1395.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  870000, 360 },
  1396.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  880000, 383 },
  1397.     { 1, { 1497600, HFPLL, 1,  78 }, L2(16),  895000, 409 },
  1398.     { 1, { 1574400, HFPLL, 1,  82 }, L2(17),  910000, 435 },
  1399.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  920000, 461 },
  1400.     { 1, { 1728000, HFPLL, 1,  90 }, L2(18),  930000, 488 },
  1401.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  940000, 516 },
  1402.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18),  950000, 543 },
  1403.     { 1, { 1958400, HFPLL, 1, 102 }, L2(19),  960000, 573 },
  1404.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19),  975000, 604 },
  1405.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19),  985000, 636 },
  1406.     { 1, { 2150400, HFPLL, 1, 112 }, L2(19), 1000000, 656 },
  1407.     { 0, { 0 } }
  1408. };
  1409.  
  1410. static struct acpu_level acpu_freq_tbl_2p2g_pvs5[] __initdata = {
  1411.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  750000,  72 },
  1412.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  750000,  83 },
  1413.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  750000, 102 },
  1414.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  750000, 121 },
  1415.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  760000, 141 },
  1416.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  770000, 161 },
  1417.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  780000, 181 },
  1418.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  790000, 202 },
  1419.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  800000, 223 },
  1420.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  810000, 245 },
  1421.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  820000, 267 },
  1422.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  830000, 289 },
  1423.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  840000, 313 },
  1424.     { 1, { 1267200, HFPLL, 1,  66 }, L2(13),  850000, 336 },
  1425.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  860000, 360 },
  1426.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  870000, 383 },
  1427.     { 1, { 1497600, HFPLL, 1,  78 }, L2(16),  880000, 409 },
  1428.     { 1, { 1574400, HFPLL, 1,  82 }, L2(17),  890000, 435 },
  1429.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  900000, 461 },
  1430.     { 1, { 1728000, HFPLL, 1,  90 }, L2(18),  910000, 488 },
  1431.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  920000, 516 },
  1432.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18),  930000, 543 },
  1433.     { 1, { 1958400, HFPLL, 1, 102 }, L2(19),  940000, 573 },
  1434.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19),  955000, 604 },
  1435.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19),  965000, 636 },
  1436.     { 1, { 2150400, HFPLL, 1, 112 }, L2(19),  975000, 656 },
  1437.     { 0, { 0 } }
  1438. };
  1439.  
  1440. static struct acpu_level acpu_freq_tbl_2p2g_pvs6[] __initdata = {
  1441.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  750000,  72 },
  1442.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  750000,  83 },
  1443.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  750000, 102 },
  1444.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  750000, 121 },
  1445.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  750000, 141 },
  1446.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  760000, 161 },
  1447.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  770000, 181 },
  1448.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  780000, 202 },
  1449.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  790000, 223 },
  1450.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  800000, 245 },
  1451.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  810000, 267 },
  1452.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  820000, 289 },
  1453.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  830000, 313 },
  1454.     { 1, { 1267200, HFPLL, 1,  66 }, L2(13),  840000, 336 },
  1455.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  850000, 360 },
  1456.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  860000, 383 },
  1457.     { 1, { 1497600, HFPLL, 1,  78 }, L2(16),  870000, 409 },
  1458.     { 1, { 1574400, HFPLL, 1,  82 }, L2(17),  875000, 435 },
  1459.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  885000, 461 },
  1460.     { 1, { 1728000, HFPLL, 1,  90 }, L2(18),  895000, 488 },
  1461.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  905000, 516 },
  1462.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18),  915000, 543 },
  1463.     { 1, { 1958400, HFPLL, 1, 102 }, L2(19),  920000, 573 },
  1464.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19),  930000, 604 },
  1465.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19),  940000, 636 },
  1466.     { 1, { 2150400, HFPLL, 1, 112 }, L2(19),  950000, 656 },
  1467.     { 0, { 0 } }
  1468. };
  1469.  
  1470. static struct acpu_level acpu_freq_tbl_2p3g_pvs0[] __initdata = {
  1471.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  800000,  72 },
  1472.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  800000,  83 },
  1473.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  800000, 101 },
  1474.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  805000, 120 },
  1475.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  815000, 139 },
  1476.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  825000, 159 },
  1477.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  835000, 180 },
  1478.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  845000, 200 },
  1479.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  855000, 221 },
  1480.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  865000, 242 },
  1481.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  875000, 264 },
  1482.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  890000, 287 },
  1483.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  900000, 308 },
  1484.     { 1, { 1267200, HFPLL, 1,  66 }, L2(13),  915000, 333 },
  1485.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  925000, 356 },
  1486.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  940000, 380 },
  1487.     { 1, { 1497600, HFPLL, 1,  78 }, L2(16),  950000, 404 },
  1488.     { 1, { 1574400, HFPLL, 1,  82 }, L2(17),  965000, 430 },
  1489.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  980000, 456 },
  1490.     { 1, { 1728000, HFPLL, 1,  90 }, L2(18),  995000, 482 },
  1491.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18), 1010000, 510 },
  1492.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18), 1025000, 538 },
  1493.     { 1, { 1958400, HFPLL, 1, 102 }, L2(19), 1040000, 565 },
  1494.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 1055000, 596 },
  1495.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 1070000, 627 },
  1496.     { 0, { 2188800, HFPLL, 1, 114 }, L2(19), 1085000, 659 },
  1497.     { 1, { 2265600, HFPLL, 1, 118 }, L2(19), 1100000, 691 },
  1498.     { 0, { 0 } }
  1499. };
  1500.  
  1501. static struct acpu_level acpu_freq_tbl_2p3g_pvs1[] __initdata = {
  1502.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  800000,  72 },
  1503.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  800000,  83 },
  1504.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  800000, 101 },
  1505.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  800000, 120 },
  1506.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  800000, 139 },
  1507.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  810000, 159 },
  1508.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  820000, 180 },
  1509.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  830000, 200 },
  1510.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  840000, 221 },
  1511.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  850000, 242 },
  1512.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  860000, 264 },
  1513.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  875000, 287 },
  1514.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  885000, 308 },
  1515.     { 1, { 1267200, HFPLL, 1,  66 }, L2(13),  895000, 333 },
  1516.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  910000, 356 },
  1517.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  920000, 380 },
  1518.     { 1, { 1497600, HFPLL, 1,  78 }, L2(16),  930000, 404 },
  1519.     { 1, { 1574400, HFPLL, 1,  82 }, L2(17),  945000, 430 },
  1520.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  960000, 456 },
  1521.     { 1, { 1728000, HFPLL, 1,  90 }, L2(18),  975000, 482 },
  1522.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  990000, 510 },
  1523.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18), 1005000, 538 },
  1524.     { 1, { 1958400, HFPLL, 1, 102 }, L2(19), 1020000, 565 },
  1525.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 1030000, 596 },
  1526.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 1045000, 627 },
  1527.     { 0, { 2188800, HFPLL, 1, 114 }, L2(19), 1060000, 659 },
  1528.     { 1, { 2265600, HFPLL, 1, 118 }, L2(19), 1075000, 691 },
  1529.     { 0, { 0 } }
  1530. };
  1531.  
  1532. static struct acpu_level acpu_freq_tbl_2p3g_pvs2[] __initdata = {
  1533.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  775000,  72 },
  1534.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  775000,  83 },
  1535.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  775000, 101 },
  1536.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  775000, 120 },
  1537.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  785000, 139 },
  1538.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  795000, 159 },
  1539.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  805000, 180 },
  1540.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  815000, 200 },
  1541.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  825000, 221 },
  1542.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  835000, 242 },
  1543.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  845000, 264 },
  1544.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  855000, 287 },
  1545.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  865000, 308 },
  1546.     { 1, { 1267200, HFPLL, 1,  66 }, L2(13),  875000, 333 },
  1547.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  890000, 356 },
  1548.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  900000, 380 },
  1549.     { 1, { 1497600, HFPLL, 1,  78 }, L2(16),  910000, 404 },
  1550.     { 1, { 1574400, HFPLL, 1,  82 }, L2(17),  925000, 430 },
  1551.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  940000, 456 },
  1552.     { 1, { 1728000, HFPLL, 1,  90 }, L2(18),  955000, 482 },
  1553.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  970000, 510 },
  1554.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18),  980000, 538 },
  1555.     { 1, { 1958400, HFPLL, 1, 102 }, L2(19),  995000, 565 },
  1556.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19), 1005000, 596 },
  1557.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19), 1020000, 627 },
  1558.     { 0, { 2188800, HFPLL, 1, 114 }, L2(19), 1035000, 659 },
  1559.     { 1, { 2265600, HFPLL, 1, 118 }, L2(19), 1050000, 691 },
  1560.     { 0, { 0 } }
  1561. };
  1562.  
  1563. static struct acpu_level acpu_freq_tbl_2p3g_pvs3[] __initdata = {
  1564.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  775000,  72 },
  1565.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  775000,  83 },
  1566.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  775000, 101 },
  1567.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  775000, 120 },
  1568.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  775000, 139 },
  1569.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  780000, 159 },
  1570.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  790000, 180 },
  1571.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  800000, 200 },
  1572.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  810000, 221 },
  1573.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  820000, 242 },
  1574.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  830000, 264 },
  1575.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  840000, 287 },
  1576.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  850000, 308 },
  1577.     { 1, { 1267200, HFPLL, 1,  66 }, L2(13),  860000, 333 },
  1578.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  875000, 356 },
  1579.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  885000, 380 },
  1580.     { 1, { 1497600, HFPLL, 1,  78 }, L2(16),  895000, 404 },
  1581.     { 1, { 1574400, HFPLL, 1,  82 }, L2(17),  910000, 430 },
  1582.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  925000, 456 },
  1583.     { 1, { 1728000, HFPLL, 1,  90 }, L2(18),  935000, 482 },
  1584.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  950000, 510 },
  1585.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18),  960000, 538 },
  1586.     { 1, { 1958400, HFPLL, 1, 102 }, L2(19),  970000, 565 },
  1587.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19),  985000, 596 },
  1588.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19),  995000, 627 },
  1589.     { 0, { 2188800, HFPLL, 1, 114 }, L2(19), 1010000, 659 },
  1590.     { 1, { 2265600, HFPLL, 1, 118 }, L2(19), 1025000, 691 },
  1591.     { 0, { 0 } }
  1592. };
  1593.  
  1594. static struct acpu_level acpu_freq_tbl_2p3g_pvs4[] __initdata = {
  1595.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  775000,  72 },
  1596.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  775000,  83 },
  1597.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  775000, 101 },
  1598.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  775000, 120 },
  1599.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  775000, 139 },
  1600.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  775000, 159 },
  1601.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  780000, 180 },
  1602.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  790000, 200 },
  1603.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  800000, 221 },
  1604.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  810000, 242 },
  1605.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  820000, 264 },
  1606.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  830000, 287 },
  1607.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  840000, 308 },
  1608.     { 1, { 1267200, HFPLL, 1,  66 }, L2(13),  850000, 333 },
  1609.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  860000, 356 },
  1610.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  870000, 380 },
  1611.     { 1, { 1497600, HFPLL, 1,  78 }, L2(16),  880000, 404 },
  1612.     { 1, { 1574400, HFPLL, 1,  82 }, L2(17),  895000, 430 },
  1613.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  910000, 456 },
  1614.     { 1, { 1728000, HFPLL, 1,  90 }, L2(18),  920000, 482 },
  1615.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  930000, 510 },
  1616.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18),  940000, 538 },
  1617.     { 1, { 1958400, HFPLL, 1, 102 }, L2(19),  950000, 565 },
  1618.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19),  960000, 596 },
  1619.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19),  975000, 627 },
  1620.     { 0, { 2188800, HFPLL, 1, 114 }, L2(19),  985000, 659 },
  1621.     { 1, { 2265600, HFPLL, 1, 118 }, L2(19), 1000000, 691 },
  1622.     { 0, { 0 } }
  1623. };
  1624.  
  1625. static struct acpu_level acpu_freq_tbl_2p3g_pvs5[] __initdata = {
  1626.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  750000,  72 },
  1627.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  750000,  83 },
  1628.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  750000, 101 },
  1629.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  750000, 120 },
  1630.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  750000, 139 },
  1631.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  760000, 159 },
  1632.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  770000, 180 },
  1633.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  780000, 200 },
  1634.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  790000, 221 },
  1635.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  800000, 242 },
  1636.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  810000, 264 },
  1637.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  820000, 287 },
  1638.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  830000, 308 },
  1639.     { 1, { 1267200, HFPLL, 1,  66 }, L2(13),  840000, 333 },
  1640.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  850000, 356 },
  1641.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  860000, 380 },
  1642.     { 1, { 1497600, HFPLL, 1,  78 }, L2(16),  870000, 404 },
  1643.     { 1, { 1574400, HFPLL, 1,  82 }, L2(17),  880000, 430 },
  1644.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  890000, 456 },
  1645.     { 1, { 1728000, HFPLL, 1,  90 }, L2(18),  900000, 482 },
  1646.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  910000, 510 },
  1647.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18),  920000, 538 },
  1648.     { 1, { 1958400, HFPLL, 1, 102 }, L2(19),  930000, 565 },
  1649.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19),  940000, 596 },
  1650.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19),  955000, 627 },
  1651.     { 0, { 2188800, HFPLL, 1, 114 }, L2(19),  965000, 659 },
  1652.     { 1, { 2265600, HFPLL, 1, 118 }, L2(19),  975000, 691 },
  1653.     { 0, { 0 } }
  1654. };
  1655.  
  1656. static struct acpu_level acpu_freq_tbl_2p3g_pvs6[] __initdata = {
  1657.     { 1, {  300000, PLL_0, 0,   0 },  L2(0),  750000,  72 },
  1658.     { 0, {  345600, HFPLL, 2,  36 },  L2(1),  750000,  83 },
  1659.     { 1, {  422400, HFPLL, 2,  44 },  L2(2),  750000, 101 },
  1660.     { 0, {  499200, HFPLL, 2,  52 },  L2(2),  750000, 120 },
  1661.     { 0, {  576000, HFPLL, 1,  30 },  L2(3),  750000, 139 },
  1662.     { 1, {  652800, HFPLL, 1,  34 },  L2(3),  750000, 159 },
  1663.     { 1, {  729600, HFPLL, 1,  38 },  L2(4),  760000, 180 },
  1664.     { 0, {  806400, HFPLL, 1,  42 },  L2(4),  770000, 200 },
  1665.     { 1, {  883200, HFPLL, 1,  46 },  L2(4),  780000, 221 },
  1666.     { 1, {  960000, HFPLL, 1,  50 },  L2(9),  790000, 242 },
  1667.     { 1, { 1036800, HFPLL, 1,  54 }, L2(10),  800000, 264 },
  1668.     { 0, { 1113600, HFPLL, 1,  58 }, L2(10),  810000, 287 },
  1669.     { 1, { 1190400, HFPLL, 1,  62 }, L2(10),  820000, 308 },
  1670.     { 1, { 1267200, HFPLL, 1,  66 }, L2(13),  830000, 333 },
  1671.     { 0, { 1344000, HFPLL, 1,  70 }, L2(14),  840000, 356 },
  1672.     { 0, { 1420800, HFPLL, 1,  74 }, L2(15),  850000, 380 },
  1673.     { 1, { 1497600, HFPLL, 1,  78 }, L2(16),  860000, 404 },
  1674.     { 1, { 1574400, HFPLL, 1,  82 }, L2(17),  870000, 430 },
  1675.     { 0, { 1651200, HFPLL, 1,  86 }, L2(17),  875000, 456 },
  1676.     { 1, { 1728000, HFPLL, 1,  90 }, L2(18),  885000, 482 },
  1677.     { 0, { 1804800, HFPLL, 1,  94 }, L2(18),  895000, 510 },
  1678.     { 0, { 1881600, HFPLL, 1,  98 }, L2(18),  905000, 538 },
  1679.     { 1, { 1958400, HFPLL, 1, 102 }, L2(19),  915000, 565 },
  1680.     { 0, { 2035200, HFPLL, 1, 106 }, L2(19),  920000, 596 },
  1681.     { 0, { 2112000, HFPLL, 1, 110 }, L2(19),  930000, 627 },
  1682.     { 0, { 2188800, HFPLL, 1, 114 }, L2(19),  940000, 659 },
  1683.     { 1, { 2265600, HFPLL, 1, 118 }, L2(19),  950000, 691 },
  1684.     { 0, { 0 } }
  1685. };
  1686.  
  1687. static struct pvs_table pvs_v1[NUM_SPEED_BINS][NUM_PVS] __initdata = {
  1688.     /* 8974v1 1.7GHz Parts */
  1689.     [0][0] = { acpu_freq_tbl_v1_pvs0, sizeof(acpu_freq_tbl_v1_pvs0) },
  1690.     [0][1] = { acpu_freq_tbl_v1_pvs1, sizeof(acpu_freq_tbl_v1_pvs1) },
  1691.     [0][2] = { acpu_freq_tbl_v1_pvs2, sizeof(acpu_freq_tbl_v1_pvs2) },
  1692.     [0][3] = { acpu_freq_tbl_v1_pvs3, sizeof(acpu_freq_tbl_v1_pvs3) },
  1693.     [0][4] = { acpu_freq_tbl_v1_pvs4, sizeof(acpu_freq_tbl_v1_pvs4) },
  1694. };
  1695.  
  1696. static struct pvs_table pvs_v2[NUM_SPEED_BINS][NUM_PVS] __initdata = {
  1697.     /* 8974v2 2.0GHz Parts */
  1698.     [0][0] = { acpu_freq_tbl_2g_pvs0, sizeof(acpu_freq_tbl_2g_pvs0) },
  1699.     [0][1] = { acpu_freq_tbl_2g_pvs1, sizeof(acpu_freq_tbl_2g_pvs1) },
  1700.     [0][2] = { acpu_freq_tbl_2g_pvs2, sizeof(acpu_freq_tbl_2g_pvs2) },
  1701.     [0][3] = { acpu_freq_tbl_2g_pvs3, sizeof(acpu_freq_tbl_2g_pvs3) },
  1702.     [0][4] = { acpu_freq_tbl_2g_pvs4, sizeof(acpu_freq_tbl_2g_pvs4) },
  1703.     [0][5] = { acpu_freq_tbl_2g_pvs5, sizeof(acpu_freq_tbl_2g_pvs5) },
  1704.     [0][6] = { acpu_freq_tbl_2g_pvs6, sizeof(acpu_freq_tbl_2g_pvs6) },
  1705.     [0][7] = { acpu_freq_tbl_2g_pvs6, sizeof(acpu_freq_tbl_2g_pvs6) },
  1706.  
  1707.     /* 8974v2 2.3GHz Parts */
  1708.     [1][0] = { acpu_freq_tbl_2p3g_pvs0, sizeof(acpu_freq_tbl_2p3g_pvs0) },
  1709.     [1][1] = { acpu_freq_tbl_2p3g_pvs1, sizeof(acpu_freq_tbl_2p3g_pvs1) },
  1710.     [1][2] = { acpu_freq_tbl_2p3g_pvs2, sizeof(acpu_freq_tbl_2p3g_pvs2) },
  1711.     [1][3] = { acpu_freq_tbl_2p3g_pvs3, sizeof(acpu_freq_tbl_2p3g_pvs3) },
  1712.     [1][4] = { acpu_freq_tbl_2p3g_pvs4, sizeof(acpu_freq_tbl_2p3g_pvs4) },
  1713.     [1][5] = { acpu_freq_tbl_2p3g_pvs5, sizeof(acpu_freq_tbl_2p3g_pvs5) },
  1714.     [1][6] = { acpu_freq_tbl_2p3g_pvs6, sizeof(acpu_freq_tbl_2p3g_pvs6) },
  1715.     [1][7] = { acpu_freq_tbl_2p3g_pvs6, sizeof(acpu_freq_tbl_2p3g_pvs6) },
  1716.  
  1717.     /* 8974v2 2.0GHz Parts */
  1718.     [2][0] = { acpu_freq_tbl_2p2g_pvs0, sizeof(acpu_freq_tbl_2p2g_pvs0) },
  1719.     [2][1] = { acpu_freq_tbl_2p2g_pvs1, sizeof(acpu_freq_tbl_2p2g_pvs1) },
  1720.     [2][2] = { acpu_freq_tbl_2p2g_pvs2, sizeof(acpu_freq_tbl_2p2g_pvs2) },
  1721.     [2][3] = { acpu_freq_tbl_2p2g_pvs3, sizeof(acpu_freq_tbl_2p2g_pvs3) },
  1722.     [2][4] = { acpu_freq_tbl_2p2g_pvs4, sizeof(acpu_freq_tbl_2p2g_pvs4) },
  1723.     [2][5] = { acpu_freq_tbl_2p2g_pvs5, sizeof(acpu_freq_tbl_2p2g_pvs5) },
  1724.     [2][6] = { acpu_freq_tbl_2p2g_pvs6, sizeof(acpu_freq_tbl_2p2g_pvs6) },
  1725.     [2][7] = { acpu_freq_tbl_2p2g_pvs6, sizeof(acpu_freq_tbl_2p2g_pvs6) },
  1726.  
  1727. };
  1728.  
  1729. static struct msm_bus_scale_pdata bus_scale_data __initdata = {
  1730.     .usecase = bw_level_tbl_v2,
  1731.     .num_usecases = ARRAY_SIZE(bw_level_tbl_v2),
  1732.     .active_only = 1,
  1733.     .name = "acpuclk-8974",
  1734. };
  1735.  
  1736. /* LGE_CHANGE_S support factory process without battery */
  1737. static struct acpuclk_krait_params acpuclk_8974_params_lge_factory __initdata = {
  1738.     .scalable = scalable,
  1739.     .scalable_size = sizeof(scalable),
  1740.     .hfpll_data = &hfpll_data,
  1741.     .pvs_tables = pvs_v2_lge_factory,
  1742.     .l2_freq_tbl = l2_freq_tbl_v2,
  1743.     .l2_freq_tbl_size = sizeof(l2_freq_tbl_v2),
  1744.     .bus_scale = &bus_scale_data,
  1745.     .pte_efuse_phys = 0xFC4B80B0,
  1746.     .get_bin_info = get_krait_bin_format_b,
  1747.     .stby_khz = 300000,
  1748. };
  1749. /* LGE_CHANGE_S support factory process without battery */
  1750.  
  1751. static struct acpuclk_krait_params acpuclk_8974_params __initdata = {
  1752.     .scalable = scalable,
  1753.     .scalable_size = sizeof(scalable),
  1754.     .hfpll_data = &hfpll_data,
  1755.     .pvs_tables = pvs_v2,
  1756.     .l2_freq_tbl = l2_freq_tbl_v2,
  1757.     .l2_freq_tbl_size = sizeof(l2_freq_tbl_v2),
  1758.     .bus_scale = &bus_scale_data,
  1759.     .pte_efuse_phys = 0xFC4B80B0,
  1760.     .get_bin_info = get_krait_bin_format_b,
  1761.     .stby_khz = 300000,
  1762. };
  1763.  
  1764. static void __init apply_v1_l2_workaround(void)
  1765. {
  1766.     static struct l2_level resticted_l2_tbl[] __initdata = {
  1767.         [0] = { {  300000, PLL_0, 0,   0 }, LVL_LOW,  1050000, 0 },
  1768.         [1] = { { 1497600, HFPLL, 1,  78 }, LVL_HIGH, 1050000, 7 },
  1769.         { }
  1770.     };
  1771.     struct acpu_level *l;
  1772.     int s, p;
  1773.  
  1774.     /* LGE_CHANGE support factory process without battery */
  1775.     enum lge_boot_mode_type boot_mode = lge_get_boot_mode();
  1776.     if(boot_mode == LGE_BOOT_MODE_MINIOS || boot_mode == LGE_BOOT_MODE_FACTORY2 || boot_mode == LGE_BOOT_MODE_PIFBOOT2) {
  1777.         for (s = 0; s < NUM_SPEED_BINS; s++)
  1778.             for (p = 0; p < NUM_PVS; p++)
  1779.                 for (l = pvs_v1_lge_factory[s][p].table; l && l->speed.khz; l++)
  1780.                     l->l2_level = l->l2_level > 5 ? 1 : 0;
  1781.  
  1782.         acpuclk_8974_params_lge_factory.l2_freq_tbl = resticted_l2_tbl;
  1783.         acpuclk_8974_params_lge_factory.l2_freq_tbl_size = sizeof(resticted_l2_tbl);
  1784.     } else {
  1785.         for (s = 0; s < NUM_SPEED_BINS; s++)
  1786.             for (p = 0; p < NUM_PVS; p++)
  1787.                 for (l = pvs_v1[s][p].table; l && l->speed.khz; l++)
  1788.                     l->l2_level = l->l2_level > 5 ? 1 : 0;
  1789.  
  1790.         acpuclk_8974_params.l2_freq_tbl = resticted_l2_tbl;
  1791.         acpuclk_8974_params.l2_freq_tbl_size = sizeof(resticted_l2_tbl);
  1792.     }
  1793. }
  1794.  
  1795. static int __init acpuclk_8974_probe(struct platform_device *pdev)
  1796. {
  1797.     /* LGE_CHANGE support factory process without battery */
  1798.     enum lge_boot_mode_type boot_mode = lge_get_boot_mode();
  1799.     if(boot_mode == LGE_BOOT_MODE_MINIOS || boot_mode == LGE_BOOT_MODE_FACTORY2 || boot_mode == LGE_BOOT_MODE_PIFBOOT2) {
  1800.         if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 1) {
  1801.             acpuclk_8974_params_lge_factory.pvs_tables = pvs_v1_lge_factory;
  1802.             acpuclk_8974_params_lge_factory.l2_freq_tbl = l2_freq_tbl_v1;
  1803.             bus_scale_data.usecase = bw_level_tbl_v1;
  1804.             bus_scale_data.num_usecases = ARRAY_SIZE(bw_level_tbl_v1);
  1805.             acpuclk_8974_params_lge_factory.l2_freq_tbl_size = sizeof(l2_freq_tbl_v1);
  1806.  
  1807.             /*
  1808.              * 8974 hardware revisions older than v1.2 may experience L2
  1809.              * parity errors when running at some performance points between
  1810.              * 300MHz and 1497.6MHz (non-inclusive), or when vdd_mx is less
  1811.              * than 1.05V. Restrict L2 operation to safe performance points
  1812.              * on these devices.
  1813.              */
  1814.             if (SOCINFO_VERSION_MINOR(socinfo_get_version()) < 2)
  1815.                 apply_v1_l2_workaround();
  1816.         }
  1817.  
  1818.         return acpuclk_krait_init(&pdev->dev, &acpuclk_8974_params_lge_factory);
  1819.     } else {
  1820.         if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 1) {
  1821.             acpuclk_8974_params.pvs_tables = pvs_v1;
  1822.             acpuclk_8974_params.l2_freq_tbl = l2_freq_tbl_v1;
  1823.             bus_scale_data.usecase = bw_level_tbl_v1;
  1824.             bus_scale_data.num_usecases = ARRAY_SIZE(bw_level_tbl_v1);
  1825.             acpuclk_8974_params.l2_freq_tbl_size = sizeof(l2_freq_tbl_v1);
  1826.  
  1827.             /*
  1828.              * 8974 hardware revisions older than v1.2 may experience L2
  1829.              * parity errors when running at some performance points between
  1830.              * 300MHz and 1497.6MHz (non-inclusive), or when vdd_mx is less
  1831.              * than 1.05V. Restrict L2 operation to safe performance points
  1832.              * on these devices.
  1833.              */
  1834.             if (SOCINFO_VERSION_MINOR(socinfo_get_version()) < 2)
  1835.                 apply_v1_l2_workaround();
  1836.         }
  1837.  
  1838.         return acpuclk_krait_init(&pdev->dev, &acpuclk_8974_params);
  1839.     }
  1840. }
  1841.  
  1842. static struct of_device_id acpuclk_8974_match_table[] = {
  1843.     { .compatible = "qcom,acpuclk-8974" },
  1844.     {}
  1845. };
  1846.  
  1847. static struct platform_driver acpuclk_8974_driver = {
  1848.     .driver = {
  1849.         .name = "acpuclk-8974",
  1850.         .of_match_table = acpuclk_8974_match_table,
  1851.         .owner = THIS_MODULE,
  1852.     },
  1853. };
  1854.  
  1855. static int __init acpuclk_8974_init(void)
  1856. {
  1857.     return platform_driver_probe(&acpuclk_8974_driver,
  1858.                      acpuclk_8974_probe);
  1859. }
  1860. device_initcall(acpuclk_8974_init);
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